Mpmc u4 ece_arun

26 February 2014 M.M.Arun Prasath., AP/ECE

UNIT – IV 8 BIT MICROCONTROLLER – H/W

ARCHITECTURE, INSTRUCTION SET AND PROGRAMMING

RAM ROM

I/O

Port Timer

Serial

COM

Port

Microcontroller

CPU

INTRODUCTION

A smaller computer

On-chip RAM, ROM, I/O ports...

Example：Intel’s 8051, Motorola’s 6811, Zilog’s Z8 and PIC 16X

26 February 2014 M.M.Arun Prasath., AP/ECE 2

A single chip


PIN DIAGRAM

8051

Pin Description of the 8051


1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

P1.0

P1.1

P1.2

P1.3

P1.4

P1.5

P1.6

P1.7

RST

(RXD)P3.0

(TXD)P3.1

(T0)P3.4

(T1)P3.5

XTAL2

XTAL1

GND

(INT0)P3.2

(INT1)P3.3

(RD)P3.7

(WR)P3.6

Vcc

P0.0(AD0)

P0.1(AD1)

P0.2(AD2)

P0.3(AD3)

P0.4(AD4)

P0.5(AD5)

P0.6(AD6)

P0.7(AD7)

EA/VPP

ALE/PROG

PSEN P2.7(A15)

P2.6(A14)

P2.5(A13)

P2.4(A12)

P2.3(A11)

P2.2(A10)

P2.1(A9)

P2.0(A8)

8051

(8031)

Pins of 8051

VCC pin 40 ：VCC provides supply voltage to the chip. [+5V]

GND pin 20 ：ground

XTAL1 and XTAL2 pins 19,18 ：

These 2 pins provide external

clock frequency for the operation.

RST pin 9 ：reset

It is a power-on reset.

Upon applying a high pulse to RST, the microcontroller will

reset and all values in registers will be lost


C2

30p

F C1

30p

F

XTAL

2

XTAL

1

GN

D

Pins of 8051

EA¯ pin 31 ：external access

When the pin is high program fetches to address 0000H-0FFFH

directed to internal ROM and program fetches to address 1000H-

FFFFH are directed to external ROM/EPROM.

When the pin is low all addresses (0000H - FFFFH) fetched by

program are directed to the external ROM/PROM.

PSEN¯ pin 29 ：program store enable

It is the active low output control signal used to activate the enable

signal of the external ROM/PROM.

ALE pin 30 ：address latch enable

AD0-AD7 are multiplexed. To demultiplex these lines and for

obtaining lower half of an address, an external latch and ALE signal

of 8051 is used.


Pins of 8051

I/O port pins

The four ports P0, P1, P2, and P3.

Each port uses 8 pins.

All I/O pins are bi-directional.

Port 0 (pins 32-39) used as a multiplexed address/data bus.

Port 1 (pins 1-8) used only as I/O pins.

Port 2 (pins 21-28) used to access external memory when the

address is 16bit wide otherwise port2 is used as an I/O port.

Port 3 (pins 10-17) multifunctional port pins. It can be

programmed to use as I/O or as one of the alternate function. It

includes 2 external interrupts, 2 counter inputs, 2 special data

lines and 2 timing control.



ARCHITECTURE 8051


ARCHITECTURE 8051

BLOCK DIAGRAM

Architecture of 8051 Microcontroller Accumulator: 8-bit register. Arithmetic operations.

B Register: 8-bit register. General purpose register.

Program Status Word: Set of flags contains the status information. It is one of the SFR.

Stack Pointer: 8-bit register.

Data Pointer: 16-bit register contains a high byte (DPH) and low byte (DPL). It has been

allotted two addresses in the SFR bank for its two bytes DPH and DPL.

Port 0 to 3 Latches and Drivers: These 4 latches and driver pairs are allotted to each of the 4

on-chip I/O ports. These latches have been allotted addresses in the SFR bank. Using the

allotted address the user can communicate with these ports (P0,P1,P2,P3)

Serial Data Buffer: It contains 2 independent register one of them is transmit buffer, which is a

parallel-in-serial-out register. The other is a receive buffer, which is a serial-in-parallel-out

register. It is one of the SFR.

Timer Registers: Two 16-bit registers. TL0, TH0 represent the lower and higher byte of timer

register 0, similarly TL1, TH1 represent the lower and higher byte of timer register 1.


Control Registers: It contains control and status information for interrupts

Timing and Control Unit: It derives all the necessary timing at control signals register for

internal operation of the circuit.

Oscillator: It generates the basic timing clock signal for the operation of the circuit using

crystal oscillator.

Instruction Register: This register decodes the opcode of an instruction to be executed and

gives information to the timing and control unit to generate necessary signals on the execution

of instruction.

EPROM and Program Address Register: It provides an on chip EPROM and a mechanism to

internally address it.

RAM and RAM Address Register: It provide internal 128 bytes of RAM and a mechanism to

address it internally.

ALU: It performs 8-bit arithmetic, logical operations over the operands held by temporary

register TMP1 and TMP2. users can’t access these temp. register.

SFR Register Bank: Special Function register range 80H to FFH.



ADDRESSING MODES OF 8051

ADDRESSING MODES OF 8051

The 8051 provides a total of five distinct addressing modes.

1. Immediate Addressing mode

2. Register Addressing mode

3. Direct Addressing mode

4. Register Indirect Addressing mode

5. Indexed Addressing mode

6. Register Specific Addressing mode


1) Immediate Addressing Mode

The operand comes immediately after the op-code.

The immediate data must be preceded by the pound sign, "#".

Ex: MOV A, #25H ; load 25H into A

MOV DPTR, #3481H ; DPTR=3481H

2) Register Addressing Mode

Register addressing mode involves the use of registers to hold the data to be manipulated

Ex: MOV A,R0 ; copy the contents of R0 into A

ADD A,R5 ; add the contents of R5 to contents of A


3) Direct Addressing Mode

It is most often used to access RAM locations 30 - 7FH.

In the direct addressing mode, the data is in a RAM memory location whose

address is known, and this address is given as a part of the instruction

Ex: MOV 56H,A ; save content of A in RAM location 56H

MOV R4,34H ; move contents of RAM location 34H to R4

4) Register Indirect Addressing Mode

A register is used as a pointer to the data.

If the data is inside the CPU, only registers R0 and R1 are used for this.

When RO and R1 are used as pointers they must be preceded by the @ sign.

Ex: MOV A,@R0 ;move the contents of RAM location whose address is held by R0 into A

MOV @R1,B ;move content of B in to RAM location whose address is held by R1


5) Indexed Addressing Mode

Indexed addressing mode is widely used in accessing data elements of look-up table entries located in the program ROM space of the 8051.

The instruction used for this purpose is : MOVC A, @ A+DPTR

The 16-bit register DPTR and register A are used to form the address of the data element stored in on-chip ROM.

The instruction MOVC is used instead of MOV. "C" means code.

6) Register Specific Addressing Mode

Instructions are specific to the registers such as accumulator or DPTR

Ex: SWAP A ; Swap nibbles within the Accumulator

RAL ; Rotate Accumulator Left

RAR ; Rotate Accumulator Right



8051 INSTRUCTION SET


DATA TRANSFER INSTRUCTIONS







ARITHMETIC OPERATORS




LOGICAL OPERATIONS


JUMP & BRANCH INSTRUCTIONS



8051 TIMER/COUNTER




SERIAL DATA INPUT/OUTPUT

8051 has a serial data communication circuit that uses

Register Serial port data Buffer (SBUF):

SBUF is physically two registers.

One is write only and is used to hold data to be transmitted out of the 8051 via TXD

Other is read only and holds the received data from external sources via RXD

Register Serial port control (SCON):

Controls data communication

There are four programmable modes for serial data communication that are chosen by setting the SMx bits in SCON.

Register Power mode control (PCON):

Controls data rates and pins RXD & TXD


SCON

SM0 & SM1: Serial port mode bit0 & bit1

SM2: Multiprocessor communications bit.

Set/clear to enable multiprocessor communications.

REN: Receive Enable bit. set/clear to enable/disable reception.

TB8: Transmitted bit 8.

RB8: Received bit 8.

TI: Transmit interrupt flag.

RI: Receive interrupt flag. 26 February 2014 M.M.Arun Prasath., AP/ECE 33

7 6 5 4 3 2 1 0

SM0 SM1 SM2 REN TB8 RB8 TI RI

SM0 SM1 Mode Description

0 0 0 Shift register; baud=f/12

0 1 1 8-bit UART; baud=set by timer1

1 0 2 9-bit UART; baud=f/32 or f/64

1 1 3 9-bit UART; baud=set by timer1

PCON

SMOD: Serial baud rate modify bit. Set to double baud rate using timer 1 for modes 1,2 & 3.

6-4: Not implemented.

GF1: General purpose user flag bit 1.

GF0: General purpose user flag bit 0.

PD: By setting this bit the microcontroller enters the Power

Down mode

IDL: By setting this bit the microcontroller enters the Idle mode.


7 6 5 4 3 2 1 0

SMOD - - - GF1 GF0 PD IDL


INTERRUPTS

Interrupts may be generated by the internal chip operations or provided by the external sources.

5 interrupts are available in 8051

3 are generated automatically by the internal operations: Timer flag 0, Timer flag 1 & Serial port interrupt (RI or TI)

2 are triggered by external signals provided by the circuitry that is connected to pins INT0‾ and INT1‾

Programmer is able to alter control bits in the IE, IP and TCON.


INTERRUPT ENABLE (IE)

EA: Enable interrupt bit.

Bit 6: not implemented

ET2: future use

ES: Enable serial port interrupt

ET1: Enable Timer 1 overflow interrupt

EX1: Enable external interrupt 1

ET0: Enable Timer 0 overflow interrupt

EX0: Enable external interrupt 0


7 6 5 4 3 2 1 0

EA -- ET2 ES ET1 EX1 ET0 EX0



PT2: future use

PS: Priority of serial port interrupt

PT1: Priority of Timer 1 overflow interrupt

PX1: Priority of external interrupt 1

PT0: Priority of Timer 0 overflow interrupt

PX0: Priority of external interrupt 0


7 6 5 4 3 2 1 0

-- -- PT2 PS PT1 PX1 PT0 PX0


8051 INTERFACING


KEYBOARD INTERFACING

4x4 matrix connected with two ports of 8051

Rows to output port columns to input port

If data reads from column is D3-D0 = 1111, no key is pressed

If key press occurred for ex: D3-D0=1011, a key in D2 column has been pressed.

After a key press detected the MC will go through the process of identifying the key.

Grounding each row from D0-D3 it reads the column, if the data read is all 1’s, no key in that row is activated and the process is moved to next row.

After row identification next task to identify column


KEYBOARD INTERFACING

LCD INTERFACING


LCD has 14pins: 8 data pins (D0-D7), 3 supply pins (Vcc,VEE,Vss) and 3 control pins(RS,R/W,EN)

When RS=0 the instruction command code register is selected user can send command to clear display, etc.,

When RS=1 the data register is selected the user to send data to be displayed on LCD.

R/W=1 data read from LCD

R/W=0 information written to the LCD

Enable pin used to latch information presented to its data pins.


LCD INTERFACING


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