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Israel, May 4, 2010
nanoRVInteractive™
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Nanometer Reliability
Israel, May 4, 2010
Nanometer Reliability – Current Verification Flow Done only when large IC layout blocks are ready
Long RV time
Reliability Corrections lead to DRC, LVS Re-Verification
Reliability issues waived due to Tape Out schedules
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Israel, May 4, 2010
Nanometer Era – Challenges
Process Shrink – integrating more transistors on a die
IC’s complexity increase – Thousands of Design Rules
Performance increase with lower current consumption
New materials, new physical phenomenon
Design constraints
Package complexity
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Israel, May 4, 2010
Reliability Challenges
Hot Electron Effect & Oxide Degradation
Electromigration & Self Heat
Oxide Breakdown
Latchup
ESD – Electrostatic Discharge
Voltage Drop
Soft Errors
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Israel, May 4, 2010
Hot Electron Effect & Oxide Degradation Electrons/Holes that gained high kinetic energy
due to a strong electric field
Especially in MOS devices
Electrons/Holes can get injected and trapped in wrong areas
The term “Hot” means the range of kinetic energy to escape from the atom’s path
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Israel, May 4, 2010
Electromigration & Self Heat
Hot Electron Effect & Oxide Degradation
Electron movement induced by the current in the metal power lines causes metal ions to migrate
POWER Electromigration – Uni Direction EM
Switching signals are defined as Bi-Direction EM
EM is accelerated by high temperature
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Israel, May 4, 2010
Electromigration & Self Heat (Cont.)
Short Circuit OPEN Circuit
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Images Source: Computer Simulation Laboratory ; Clark University
Israel, May 4, 2010
Oxide Breakdown
Hot Electron Effect & Oxide Degradation
The destruction of an oxide layer in a semiconductor device
Oxide layers are used in many parts of devices Gate oxide between the metal and the semiconductor in
MOS transistors Dielectric layer in capacitors Inter-layer dielectric to isolate conductors
Oxide breakdown is also referred to as 'oxide rupture' or 'oxide puncthrough'
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Israel, May 4, 2010
Latchup
Hot Electron Effect & Oxide Degradation
Short circuit which can occur in an improperly designed circuit
Unintended creation of a low impedance path between the power supply
Triggering a parasitic structure which disrupts proper functioning of the part and possibly even leading to its destruction due to over current
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Israel, May 4, 2010
ESD – Electrostatic Charge
Sudden and momentary electric current that flows between two objects at different electrical potentials caused by direct contact or induced by an electrostatic field
An IC connected to external ports is susceptible to damaging ESD pulses from the operating environment and peripherals
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Israel, May 4, 2010
Voltage Drop
The reduction in voltage in an electrical circuit between the source and load due to wire res. & current drawn from power
Causes lower voltage than required, which leads to larger TPDs, also effect Noise
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Israel, May 4, 2010
Soft Errors – Datum Error
Transient faults that occur in VLSI circuits due to external radiation and affect the logic states of sensitive nodes
Generally occur from nuclear decay of packaging materials or atmospheric particles accelerated towards the earth by cosmic rays
Neutron radiation interferes with charges held in sensitive nodes in circuits causing soft errors - or SEU (Single event upset)
Generally affect storage elements such as memory, latches and registers
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Israel, May 4, 2010
Current verification
EDA offers standard verification tools (Cadence, Synopsys, Apache)
IC Design houses develop in-house flows
Synthesis tools include built-in reliability considerations (P&R)
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Israel, May 4, 2010
Current Solutions
Circuit Designs – Current Limiters (Frontend)
Signals & Power metals width (Backend)
Manufacturing improvements (Fabrication)
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Future Innovation
Early Reliability Analysis During IC Layout Design Find problems as they are created Fix them when it is easy Reach signoff checks with significantly fewer issues
Analysis Correlation with simulation results
Critical signals timely analysis (Clocks, Critical Paths, Etc)
Look Ahead analysis during construction, creating Signoff Ready design
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Early Detection – Example #1
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Early Detection – Example #2
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Early Detection – Example #3
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Israel, May 4, 2010
Thank you for your time!
Q/A
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Israel, May 4, 2010
Thank you for your time!
Thank You
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