Analog VLSI: Circuits and Principles
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Analog VLSI: Circuits and Principles
Shih-Chii Liu, Jorg Kramer, Giacomo Indiveri, Tobias Delbruck, andRodney Douglaswith contributions from Albert Bergemont, Chris Diorio, Carver A.Mead, Bradley A. Minch, Rahul Sarpeshkar, and Eric Vittoz.
A Bradford BookThe MIT PressCambridge, MassachusettsLondon, England
c
2002 Massachusetts Institute of Technology
All rights reserved. No part of this book may be reproduced in any form by any electronicor mechanical means (including photocopying, recording, or information storage and retrieval)without permission in writing from the publisher.
This book was set in Times Roman by the authors using the LATEX document preparation system.Printed on recycled paper and bound in the United States of America.
Library of Congress Cataloging-in-Publication Data
Analog VLSI : circuits and principles / Shih-Chii Liu ... [et al.] with contributions from Albert
ISBN 0-262-12255-3 (hc. : alk. paper)1. Integrated circuits, Very large scale integration. 2. Linear integrated circuits. I. Liu,Shih-Chii.
Bergemont ... [et al.].p. cm.
Includes bibliographical references and index.
TK7874.75 .A397 2002621.39'5dc21
2002021915
This book is dedicated to the memory of our creative colleague and friend,Misha Mahowald, who was a pioneer and an inspiration in this eld.
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Contents
Authors and Contributors xiiiAcknowledgments xvPreface xviiForeword xix
1 Introduction 1
I SILICON AND TRANSISTORS
2 Semiconductor Device Physics - Jorg Kramer 7
2.1 Crystal Structure 7
2.2 Energy Band Diagrams 9
2.3 Carrier Concentrations at Thermal Equilibrium 13
2.4 Impurity Doping 15
2.5 Current Densities 19
2.6 p-n Junction Diode 24
2.7 The Metal-Insulator-Semiconductor Structure 35
3 MOSFET Characteristics - Shih-Chii Liu and BradleyA. Minch 47
3.1 MOSFET Structure 48
3.2 CurrentVoltage Characteristics of an nFET 52
3.3 CurrentVoltage Characteristics of a pFET 70
3.4 Small-Signal Model at Low Frequencies 71
3.5 Second-Order Effects 75
3.6 Noise and Transistor Matching 80
3.7 Appendices 81
4 Floating-Gate MOSFETs - Chris Diorio 93
4.1 Floating-Gate MOSFETs 93
4.2 Synapse Transistors 98
4.3 Silicon Learning Arrays 107
4.4 Appendices 116
viii Contents
II STATICS
5 Basic Static Circuits - Jorg Kramer 123
5.1 Single-Transistor Circuits 124
5.2 Two-Transistor Circuits 127
5.3 Differential Pair and Transconductance Amplier 133
5.4 Unity-Gain Follower 142
6 Current-Mode Circuits - Giacomo Indiveri and TobiasDelbruck 145
6.1 The Current Conveyor 145
6.2 The Current Normalizer 148
6.3 Winner-Take-All Circuits 150
6.4 Resistive Networks 164
6.5 Current Correlator and Bump Circuit 168
7 Analysis and Synthesis of Static Translinear Circuits- Bradley A. Minch 177
7.1 The Ideal Translinear Element 179
7.2 Translinear Signal Representations 181
7.3 The Translinear Principle 183
7.4 ABCs of Translinear-LoopCircuit Synthesis 195
7.5 The Multiple-Input Translinear Element 202
7.6 Multiple-Input Translinear Element Networks 205
7.7 Analysis of MITE Networks 210
7.8 ABCs of MITE-Network Synthesis 216
III DYNAMICS
8 Linear Systems Theory - Giacomo Indiveri 231
8.1 Linear Shift-Invariant Systems 231
8.2 Convolution 234
Contents ix
8.3 Impulses 236
8.4 Impulse Response of a System 237
8.5 Resistor-Capacitor Circuits 240
8.6 Higher Order Equations 241
8.7 The Heaviside-Laplace Transform 243
8.8 Linear Systems Transfer Function 244
8.9 The Resistor-Capacitor Circuit (A Second Look) 2468.10 Low-Pass, High-Pass, and Band-Pass Filters 249
9 Integrator-Differentiator Circuits - Giacomo Indiveriand Jorg Kramer 251
9.1 The Follower-Integrator 252
9.2 The Current-Mirror Integrator 256
9.3 The Capacitor 261
9.4 The Follower-Differentiator Circuit 263
9.5 The diff1 and diff2 Circuits 264
9.6 Hysteretic Differentiators 270
10 Photosensors - Jorg Kramer and Tobias Delbruck 275
10.1 Photodiode 275
10.2 Phototransistor 283
10.3 Photogate 284
10.4 Logarithmic Photosensors 286
10.5 Imaging Arrays 299
10.6 Limitations Imposed by Dark Current on Photosensing 307
IV SPECIAL TOPICS
11 Noise in MOS Transistors and Resistors - RahulSarpeshkar, Tobias Delbruck, Carver Mead, andShih-Chii Liu 313
x Contents
11.1 Noise Denition 313
11.2 Noise in Subthreshold MOSFETs 317
11.3 Shot Noise versus Thermal Noise 325
11.4 The Equipartition Theorem and Noise Calculations 328
11.5 Noise Examples 333
12 Layout Masks and Design Techniques - Eric Vittoz,Shih-Chii Liu, and Jorg Kramer 341
12.1 Mask Layout for CMOS Fabrication 341
12.2 Layout Techniques for Better Performance 346
12.3 Short List of Matching Techniques 351
12.4 Parasitic Effects 353
12.5 Latchup 355
12.6 Substrate Coupling 356
12.7 Device Matching Measurements 359
13 A Millennium Silicon Process Technology - AlbertBergemont, Tobias Delbruck, and Shih-Chii Liu 361
13.1 A typical 0.25 m CMOS Process Flow 361
13.2 Scaling Limits for Conventional Planar CMOSArchitectures 373
13.3 Conclusions and Guidelines for New Generations 382
14 Scaling of MOS Technology to SubmicrometerFeature Sizes - Carver Mead 385
14.1 Scaling Approach 386
14.2 Threshold Scaling 394
14.3 Device Characteristics 395
14.4 System Properties 402
14.5 Conclusions 402
Contents xi
Appendix A:Units and symbols 407
References 415Index 429
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Authors and Contributors
Albert BergemontMaxim Integrated Products3725 North First Street,San Jose, CA 951341350U.S.A.
Tobias DelbruckInstitute of Neuroinformatics,ETH/UNIZWinterthurerstrasse 1908057 Zurich, Switzerland
Chris DiorioDepartment of Computer Scienceand EngineeringThe University of Washington114 Sieg Hall, Box 352350Seattle, WA 98195U.S.A.
Rodney DouglasInstitute of Neuroinformatics,ETH/UNIZWinterthurerstrasse 1908057 Zurich, Switzerland
Giacomo IndiveriInstitute of Neuroinformatics,ETH/UNIZWinterthurerstrasse 1908057 Zurich, Switzerland
Jorg KramerInstitute of Neuroinformatics,ETH/UNIZWinterthurerstrasse 1908057 Zurich, Switzerland
Shih-Chii LiuInstitute of Neuroinformatics,ETH/UNIZWinterthurerstrasse 1908057 Zurich, Switzerland
Carver A. MeadDepartment of Computation andNeural SystemsCalifornia Institute of TechnologyPasadena, CA 91125U.S.A.
Bradley A. MinchDepartment of Electrical EngineeringCornell University405 Phillips HallIthaca, NY 148535401U.S.A.
Rahul SarpeshkarResearch Laboratory of ElectronicsMassachusetts Institute ofTechnologyCambridge, MA 02139U.S.A.
Eric VittozChief ScientistAdvanced MicroelectronicsCenter for Electronics andMicrotechnologyJaquet-Droz 12007 NeuchatelSwitzerland
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Acknowledgments
This book was written by a small group of authors who represent the work of afar larger community. We would like to acknowledge our colleagues who havecontributed to the advance of concepts and circuits in neuromorphic engineer-ing; in particular, John Lazzaro, Massimo Silvilotti, John Tanner, KwabenaBoahen, Paul Hasler, Steve Deweerth, Ron Benson, Andre van Schaik, JohnHarris, Andreas Andreou, Ralph Etienne-Cummings, and many others. We es-pecially wish to thank the following people for their help in the completionof this book: Andre Van Schaik, Regina Mudra, Elisabetta Chicca, and RalphEtienne-Cummings for their constructive comments in earlier versions of thebook; Samuel Zahnd for putting together the material for the example circuitson the website; Adrian Whatley for ensuring the integrity of the bibliography,David Lawrence for dealing with computer mishaps, Mietta Loi for enteringsome of the material in the book, Kathrin Aguilar-Ruiz for dealing with legaldetails, Claudia Stenger for her endless patience with all sorts of requests, andDonna Fox for always providing the answers for difcult requests. We alsothank Sarah K. Douglas for the cover design of this book. The work in thisedging eld has been supported by progressive funding organizations: Na-tional Science Foundation, Ofce of Naval Research, Gatsby Charitable Foun-dation, Swiss National Science Foundation, Whitaker Foundation, Departmentof Advanced Research Projects Agency, and our various home institutions. Wealso acknowledge Mike Rutter for his enthusiasm in starting this project, andBob Prior for seeing the project to its completion.
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Preface
The aim of this book is to present the collective expertise of the neuromor-phic engineering community. It presents the central concepts required for cre-ative and successful design of analog very-large-scale-integrated (VLSI) cir-cuits. The book could support teaching courses, and provides an efcient intro-duction to new practitioners who have some previous training in engineering,physics, or computer science.
Neuromorphic engineers are striving to improve the performance of arti-cial systems by developing chips and systems that process information collec-tively using predominantly analog circuits. Consequently, our book biases thediscussion of analog principles and design towards novel circuits that emulatenatural signal processing. These circuits have been used in implementationsof neural computational systems or neuromorphic systems and biologically-inspired processing systems. Unlike most circuits in commercial or industrialapplications, our circuits are operated mainly in the subthreshold or weak in-version region. Moreover, their functionality is not limited to linear operations,but encompasses also many interesting nonlinear operations similar to thoseoccuring in natural systems.
Although digital circuits are the basis for a large fraction of circuts in cur-rent VLSI systems, certain computations like addition, subtraction, expansion,and compression are natural for analog circuits and can be implemented witha small number of transistors. These types of computations are prevalent in thenatural system which has an architecture which is not that of a conventionalTuring machine. The mechanisms for signaling in the neural system whichare governed by Boltzmann statistics can be captured by circuits comprisingmetal-oxide-semiconductor eld effect transistors (MOSFETs) that operate inthe subthreshold or weak inversion regime. Because the exponential depen-dence of charges on the terminal voltages of a MOSFET is similar to those ofthe bipolar junction transistor (BJT), current techniques for constructing a cir-cuit which implements a given function using bipolar circuits, can be extendedto MOSFET circuits1. Besides the advantage of the reduced power consump-tion of MOSFET circuits that operate in the weak inversion regime, this newcircuit philosophy also translates to novel circuits and system architectures.
Local memory is an essential part of any articial parallel distributed pro-cessor or neural network system. In this book, we show circuits for analogmemory storage and for implementing local and global learning rules us-ing oating-gate charge modulation techniques in conventional CMOS tech-
1 BJTs are traditionally used for analog circuits in industry.
xviii Preface
nology. We also show how by using oating-gate circuits together with thetranslinear principle, we can develop compact circuits which implement a largeclass of nonlinear functions.
The rst integrated aVLSI system that implemented a biological functionwas a silicon retina by Mead and Mahowald. This system used analog circuitsthat performed both linear and nonlinear functions in weak-inversion opera-tion. Following this initial success, subsequent examples of simple computa-tional systems and novel circuits have been developed by different labs. Theseexamples include photoreceptor circuits, silicon cochleas, conductance-basedneurons, and integrate-and-re neurons. These different circuits form the foun-dation for a physical computational system that models natural informationprocessing.
The material presented in this book has evolved from the pioneering seriesof lectures on aVLSI and principles introduced by Carver Mead into thePhysics of Computation curriculum at the California Institute of Technologyin the mid 80s. Today, similar courses are taught at many institutions aroundthe world; and particularly, at the innovative annual Telluride NeuromorphicWorkshop (funded by the US National Science Foundation, and others). Manyof the people who teach these courses are colleagues who were trained atCaltech, or who have worked together at Telluride.
We have been fortunate to obtain the enthusiastic participation of the manyauthors who provided material and the primary text for this book. Their namesare associated with each chapter. However, the result is not simply an editedcollection of papers. Each of the authors named on the cover made substantialcontributions to the entire book. Liu and Douglas have edited the text toprovide a single voice.
We have attempted to make the material in this book accessible to readersfrom any academic background by providing intuition for the functionality ofthe circuits. We hope that the book will prove useful for insights into novelcircuits and that it will stimulate and educate researchers in both engineeringand interdisciplinary elds, such as computational neuroscience, and neuro-morphic engineering.
Foreword
Carver Mead
In the beginning of any new technology, the applications of the technologycannot be separated from the development of the technology itself. With vac-uum tubes, discrete transistors, or integrated circuits, the rst circuit topologieswere invented by those closest to the device physics and fabrication process.As time passes, the knowledge of how to make the devices gradually separatesfrom the knowledge of how to use the devices. Abstractions are developed thatgreatly simplify our conceptual models of the underlying technology. Canoni-cal circuit forms are encapsulated into symbols that have meaning in the eldof use, rather than in the space of implementation. Familiar examples are logicgates, operational ampliers, and the like. As more time passes, the abstrac-tions become entrenched in university courses and industrial job descriptions.It is common to hear phrases like we need to hire a system architect, twologic designers, a circuit designer, and a layout specialist or who will we getto teach the op-amp course next year? This inexorable trend toward special-ization ts well with the myth that putting more engineers on a design task willmake it happen faster. In my personal experience, I have never seen this mythreected in reality. In many cases, I have seen chips designed by large groupsfail to converge at all. Chip designs that converge rapidly and perform wellhave always been done by small, cohesive groups. For the truly great chip de-signs, there has always been a single person that could keep the entire design intheir head. The lesson from these experiences is unmistakable: leading contrib-utors are able to lead because they move past the limitations of the prevailingparadigm.
The second myth is that digital techniques are displacing analog techniquesthroughout modern electronics. In fact, an explosion of new analog applica-tions is occurring as this sentence is being written. Cellular telephones, berop-tic transmitters and receivers, wideband wired and wireless data modems, elec-tronic image capture devices, digital audio and video systems, smart powercontrol, and many others all have explicitly analog circuits. But, and perhapseven more important, all circuits are analog, even if they are used as digitalbuilding blocks. Rise times, delays, settling times, and metastable behaviorsare analog properties of nominally digital circuits. As the speed of operationapproaches the limits of the technology, analog considerations increasinglydominate the process of digital design.
xx Foreword
Modern integrated circuit technology is extremely sophisticated; it is ca-pable of realizing a vast array of useful device and circuit structures. Designerswho avail themselves of the richness of the technology have a powerful advan-tage over those who are limited to logic gates and operational ampliers. Thisbook contains precisely the information required by such renaissance design-ers. Device physics, process technology, linear and nonlinear circuit forms,photodetectors, oating-gate devices, and noise analysis are all described inclear, no-nonsense terms. It stands in refreshing contrast to the litany of oper-ational amplier and switched capacitor techniques that are widely mistakenfor the whole of analog design.
1 Introduction
This book presents an integrated circuit design methodology that derives itscomputational primitives directly from the physics of the used materials andthe topography of the circuitry. The complexity of the performed computationsdoes not reveal itself in a simple schematic diagram of the circuitry on thetransistor level, as in standard digital integrated circuits, but rather in theimplicit characteristics of each transistor and other device that is representedby a single symbol in a circuit diagram. The main advantage of this circuit-design approach is the possibility of very efciently implementing certainnatural computations that may be cumbersome to implement on a symboliclevel with standard logic circuits. These computations can be implementedwith compact circuits with low power consumption permitting highly-parallelarchitectures for collective data processing in real time. The same type ofapproach to computation can be observed in biological neural structures, wherethe way that processing, communication, and memory have evolved has largelybeen determined by the material substrate and structural constraints. The dataprocessing strategies found in biology are similar to the ones that turn out tobe efcient within our circuit-design paradigm and biology is thus a source ofinspiration for the design of such circuits.
The material substrates that will be considered for the circuits in thisbook are provided by standard integrated semiconductor circuit technology andmore specically, by Complementary Metal Oxide Silicon (CMOS) technol-ogy. The reason for this choice lies in the fact that integrated silicon technologyis by far the most widely used data processing technology and is consequentlycommonly available, inexpensive, and well-understood. CMOS technology hasthe additional advantages of only moderate complexity, cost-effectiveness, andlow power consumption. Furthermore it provides basic structures suitable forimplementation of short-term and long-term memory, which is particularly im-portant for adaptive and learning structures as found ubiquitously in biologicalsystems. Although we will specically consider CMOS technology as a phys-ical framework it turns out that various fundamental relationships are quitesimilar in other frameworks, such as in bipolar silicon technology, in othersemiconductor technologies and to a certain extent also in biological neuralstructures. The latter similarities form the basis of neuromorphic emulation ofbiological circuits on an electrical level that led to such structures as siliconneurons and silicon retinas.
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2 Chapter 1
The book is divided into four sections: Silicon and Transistors; Statics;Dynamics; and Special Topics. The rst section (Silicon and Transistors) pro-vides a short introduction into the underlying physics of the devices that arediscussed in the rest of the book; in particular the operation of the MOSFETin the subthreshold region and a discussion of analog charge storage usingoating-gate technology. Chapter 2 discusses useful equations that can be de-rived from modeling the physics of the basic devices in the silicon substrate.These device models provide a foundation for the derivation of the equationsgoverning the operation of the MOSFET as described in Chapter 3. From re-sults discussed in Chapters 2 and 3 we show in Chapter 4 how MOS technologycan be used to build analog charge storage elements. Readers who are more in-terested in circuits at the transistor level description may omit Chapters 2 and4 and continue to the Statics section.
The Statics section comprises three chapters. These chapters describe ex-amples of linear and nonlinear static functions that can be implemented bysimple circuits. Chapter 5 presents some basic circuits which show the richnessof the processing that can be performed by the transistor. Chapter 6 introducesan analog circuit design concept where currents represent the signal and statevariables in a circuit. As examples, some current-mode circuits are describedthat implement nonlinear functions that are prevalent in natural systems, forexample, a winner-take-all circuit. Chapter 7 derives a methodology for im-plementing a large class of linear and nonlinear functions using a particularbuilding block called a multiple-input translinear element.
The Dynamics section describes circuits which process time-varying sig-nals. Chapter 8 reviews the basics of linear systems theory, which is a usefultool for the small-signal analysis of circuits both in the time and space domain.We apply this theory in Chapter 9 to selected examples of simple circuits forrst-order and second-order lters. Chapter 10 provides a brief introductioninto semiconductor photosensors and focuses on circuits that model prominentproperties of biological photoreceptors. It also gives an overview of commonimage sensing principles.
The last section (Special Topics) contains chapters which expound fur-ther on the basics of semiconductor technology. These chapters cover topicson noise in transistors, the ow from design to layout to fabrication of an in-tegrated circuit, and the issue of scaling semiconductor technology into thefuture. Chapter 11 describes the different noise sources in a transistor and howthese sources can be measured. It also presents a novel way of demonstrat-ing the equivalence of thermal noise and shot noise. The circuit layout masks
Introduction 3
needed to specify a layout to a fabrication house are listed in Chapter 12 alongwith useful layout tips for good circuit performance. Chapter 13 describes theprocessing steps executed in a 0.25m process and Chapter 14 projects howtransistors will scale in future technologies.
This book is directed towards students from a variety of backgrounds. Thestudents who are more interested in circuits can omit Section I and shouldstill be able to follow the chapters in Sections II and III. Most of the materialin this book has been taught in classes at the Institute for Neuroinformatics,University of Zurich/ ETH Zurich, Switzerland, and also at the TellurideNeuromorphic Engineering Workshop.
Examples of simulation and layout les for simple circuits are availablefrom the Institute of Neuroinformatics website. These circuits were fabricatedand used in our laboratory courses. They have been developed using theintegrated circuit design tools available from Tanner Research, Inc. Studentswho are interested in simulating these circuits can also use the free publicdomain software AnaLOG by John Lazzaro and David Gillespie.
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I SILICON AND TRANSISTORS
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2 Semiconductor Device Physics
The purpose of this chapter is to provide an introduction to the basics of thesemiconductor physics needed for the understanding of the devices describedin this book. Most of this introduction pertains to semiconductors in general.Where general statements are not possible we focus on silicon. The values ofmaterial constants, and the typical values of other parameters, are for silicon.It is not intended to provide a detailed step-by-step derivation of the formulasdescribing device behavior. Often we limit ourselves to stating the necessaryconditions for the derivation to hold and the important results without formalderivation. More extended summaries of solid-state and semiconductor physicscan be found in standard texts (Grove, 1967; Sze, 1981; Kittel, 1996; Singh,2001). Detailed analyses of the subject ll entire books (Dunlap, 1957; Smith,1979; Moss, 1980).
2.1 Crystal Structure
In semiconductors and other materials the atoms are arranged in regular struc-tures, known as crystals. These structures are dened and held together bythe way the valence (outermost) electrons of the atoms are distributed, giventhat electrons tend to form pairs with antiparallel spin. Figure 2.1 shows thecrystal structures of some important semiconductors; silicon (Si) and galliumarsenide (GaAs). A silicon atom, for example, has four unpaired valence elec-trons that can form covalent bonds with a tetrahedral spatial characteristic(Fig. 2.1(b)). Pure silicon naturally crystallizes in a diamond structure. Thediamond lattice is based on the face-centered cubic (fcc) arrangement shownin Fig. 2.1(a), which means that the atoms are located at the corners and facecenters of cubes with a given side length a, called the lattice constant. The di-amond structure consists of two interleaved fcc lattices that are displaced bya=4 in each dimension. Silicon has a lattice constant of a = 5:43 A. Galliumarsenide has the same structure as silicon, except that one of the interleavedfcc lattices holds the gallium atoms and the other the arsenic atoms. This ar-rangement is known as zincblende structure.
8 Chapter 2
Simple cubic
a
Face-centered cubic
a
[100]
[111][110]
(a)
a
Diamond(C, Ge, Si, etc)
a
Zincblende(GaAs, GaP, etc)
Ga
As
(b)
Figure 2.1Various crystal lattice structures, with lattice constant a. (a) Simple cubic lattice with atoms at thecube corners, and face-centered cubic (fcc) lattice with additional atoms on the cube faces. Themost important crystal directions [100], [110], and [111] of the simple cubic lattice are indicated.(b) Structures with two interleaved fcc lattices: Diamond structure, consisting of one kind of atom,and zincblende structure, consisting of two kinds of atoms. Figure adapted from S. M. Sze (1981),Physics of Semiconductor Devices, 2nd Edition. c1981 by John Wiley & Sons, Inc. Reprinted bypermission of John Wiley & Sons, Inc.
Semiconductor Device Physics 9
E E E
Insulator Semiconductor Conductor
Figure 2.2Schematic representation of electron energy bands in a crystal for an insulator, a semiconductor,and a conductor (or metal). The energy bands are represented as boxes. The hatched areassymbolize the states in the energy bands that are occupied by electrons at zero temperature. At non-zero temperatures some electrons (denoted by circled minus signs) occupy higher-energy states,leaving holes (denoted by circled plus signs) in the unoccupied lower-energy states.
2.2 Energy Band Diagrams
Crystals and other solids are classied according to their electrical conduc-tivity into insulators, semiconductors, and conductors or metals in the orderof increasing conductivity. Electrical processing structures, such as transistors,are mostly fabricated from semiconductors because they operate at an inter-mediate conductivity level, which can be modulated by varying the electricalboundary conditions and by introducing atoms of foreign elements into thecrystal structure. This latter process is called impurity doping. Conductors andinsulators also play an important role in electrical circuits, because they con-nect and separate respectively, the nodes of the processing structures. For ex-ample, in integrated silicon technologies silicon dioxide (SiO
2
) (often referredto as oxide) is commonly used as an insulator, while polycrystalline silicon,also known as polysilicon, and aluminum are used as conductors.
The physical basis for the above classication of the materials lies in theproperties of the atoms and their arrangement. Electrical currents in solids arecarried by the motion of valence electrons, which are attracted to the xedpositively charged ion cores. A valence electron can thus either be boundto a particular ion core by electromagnetic forces or it can be mobile and
10 Chapter 2
contribute to the current ow. In order to be mobile, an electron must acquirea certain minimum energy to break free of its ion core. This energy is calledionization energy. While free electrons can be in any energy state, the energiesof electrons in solids lie in certain ranges of values, which are separated byforbidden zones due to the interaction of the valence electrons with the ioncores. The allowed ranges of energy values are called energy bands and theforbidden zones are called energy gaps or bandgaps. Each energy band in acrystal consists of closely-spaced discrete levels. This discretization of energylevels is a quantum-mechanical effect that is due to the spatial connementof bound electrons and to the spatial periodicity of the potential energy formobile electrons. An energy level supports a limited number of states, each ofwhich is either occupied by an electron or empty at any given time. Simpliedenergy band diagrams of an insulator, a semiconductor, and a conductor areschematically shown in Fig. 2.2. Under normal conditions, the energy bands ofinsulators are either completely lled or completely empty, that is all electronsare bound. A metal has a partly lled bands within which electrons can move.Some metals have two or more overlapping energy bands that are partly lled.They are often referred to as semimetals. In a semiconductor, one or morebands are either almost lled or almost empty. Current ow is then inuencedby certain physical parameters and boundary conditions.
The energy bands in semiconductors are called valence bands and conduc-tion bands according to whether they are almost lled or almost empty. In aconduction band, electrons are essentially free to move, while in valence bandsthe electrons are bound to the atom bodies and can only move from one of thefew unoccupied states to another one, if they cannot acquire enough energyto bridge the bandgap to a conduction band. An elegant mathematical con-cept, which is commonly used throughout the semiconductor literature, allowsa more symmetric view of this mechanism. This concept considers unoccupiedenergy states in a valence band as holes. The term derives from the notion thatan electron is absent from a state that is usually occupied. An electron valenceband can thus be considered as a hole conduction band, since the holes arequite free to move around, that is electrons in the valence band in the vicinityof an unoccupied state may hop to that state and leave their initial state free foranother electron to hop in, and so on. In common terminology the denitionof valence and conduction bands is related to electrons and the holes are thussaid to move in the valence band. In mathematical expressions the holes canbe treated as positively charged particles that within a semiconductor acquireas much physical reality as electrons. Consequently, they are also attributed
Semiconductor Device Physics 11
other physical parameters used to characterize particles, such as mass and mo-bility. However, it is important to note that holes are not just positively chargedelectrons, but have different characteristic parameter values. Furthermore, youshould keep in mind that the symmetry between electrons and holes breaksdown as soon as the charge carriers leave the semiconductor, as we shall see,for example, in the chapters dealing with oating-gate structures.
Energy bands in a crystal have certain properties that are closely relatedto the crystal structure and thus vary signicantly between different types ofcrystals. Graphic representations of the energy-band diagrams of Si and GaAsare shown in Fig. 2.3. The allowed electron energies are plotted as a function ofthe electron momentum for two sets of directions (cf. Fig. 2.1(a)), namely the[100] directions along the edges of the crystal lattice and the [111] directionsalong the lattice diagonals. By convention, energy-band diagrams are drawnsuch that electron energy increases in the upward direction. Energy valuesare usually specied in units of electron volts (eV). This unit is convenientfor the conversion of an energy-band diagram into an electrostatic potentialdistribution, which is obtained by dividing the energy values by the electroncharge, that is the negative value of the elementary charge q = 1:60218 10
19 C. An electron volt is the energy corresponding to a potential change ofan electron of one volt.
For simplicity, only the valence band and the conduction band with thesmallest energy separation are shown in Fig. 2.3. The lines represent the bandedges, that is the highest-energy states of the valence band and the lowest-energy states of the conduction band. The band edges tell us the minimumamount of energy an electron has to acquire or lose to bridge the bandgap fora given change in momentum. The difference between the lowest conductionband energy and the highest valence band energy is called bandgap energyE
g
.
The bandgap energy of silicon at room temperature is 1.12 eV. The valenceband edge appears at zero momentum and is degenerate, that is common toseveral valence bands, for the most widely-used semiconductors. The momen-tum associated with the conduction band edge may be zero or not, dependingon the semiconductor, and the conduction band edge is not degenerate. If theminimum of the conduction band edge is at the same momentum as the maxi-mum of the valence band edge we speak of a direct bandgap, otherwise of anindirect bandgap. As we can see from Fig. 2.3, gallium arsenide has a directbandgap and silicon has an indirect bandgap.
Electron energy and momentum changes can be induced by different phys-ical processes, the most important of which are interactions with lattice vibra-
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12 Chapter 2
Si
Eg
L [111] [100] XWave vector
++++ +
++
(a)
GaAs
Eg
L [111] [100] XWave vector
Lowervalley
Uppervalley
E = 0.31eV
+
+ +++ + + +
(b)
Figure 2.3Energy-band diagrams of (a) silicon (Si) and (b) gallium arsenide (GaAs). Only the edges of theuppermost valence band and of the lowermost conduction band are shown as a function of thewave vector for two sets of directions in the crystal. The point corresponds to charge carriersbeing at rest. The [111] set of directions is along the diagonals of the crystals, while the [100]set is oriented along the edges of the crystals, as shown in Fig. 2.1(a). The L point stands forwave vectors (=a)(1;1;1); and the X point stands for wave vectors (2=a)(1; 0; 0),(2=a)(0;1; 0) and (2=a)(0; 0;1). The momentum p of a charge carrier is computed fromits wave vector k, as p = hk where h is the reduced Planck constant. The bandgap energy E
g
is the separation between the top of the topmost valence band and the bottom of the bottommostconduction band. These extrema appear at different momenta for Si and at the same momentum forGaAs. The bandgap of Si is thus called indirect and the bandgap of GaAs is called direct. Figureadapted from J. R. Chelikowsky and M. L. Cohen (1976), Nonlocal pseudopotential calculationsfor the electronic structure of eleven diamond and zinc-blende semiconductors, Phys. Rev., B14,556-582. c1976 by the American Physical Society.
tions, that is collisions with the ions in the crystal, and with electromagneticwaves. The energies that are transferred during these interactions are quan-tized. The energy quantum of a crystal lattice vibration is called a phonon andthe energy quantum of an electromagnetic wave is called a photon. Absorption
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Semiconductor Device Physics 13
or emission of a phonon changes mainly the momentum of an electron whilethe energy change is typically small (0.01 eV to 0.03 eV) compared to thebandgap energy. On the other hand, the momentum transfer by a photon withan energy of the order of the bandgap energy is negligible. This means that inthe case of an indirect bandgap the transitions between valence and conductionbands with the smallest energies typically involve phonons and photons, whiledirect bandgaps can, for example, be bridged by photons alone. This is thereason why materials with direct bandgaps can be used as efcient sources ofelectromagnetic radiation, while those with indirect bandgaps are inefcient,because the minimum energy transitions, which are the most probable ones,depend on the availability of a phonon with the proper momentum.
Most semiconductor devices do not make use of the electromagnetic prop-erties of the material and the circuits are therefore shielded from high-energyelectromagnetic radiation. Changes in electron momentum are then much moreeasily induced than changes in energy that are large enough to make the elec-tron bridge the bandgap. The majority of electrical properties of semiconduc-tors can thus be sufciently accurately described without considering the mo-mentum space at all. In the energy band diagrams the electron energies of themaximum of the valence band edge and the minimum of conduction band edgeis therefore usually plotted as a function of position in one- or two-dimensionalspace, while the structure of the bands in momentum space does not appearanymore. Such a simplied energy band diagram is shown in Fig. 2.4.
2.3 Carrier Concentrations at Thermal Equilibrium
Thermal energy expresses itself in vibrations of the crystal lattice. Energytransfer from the lattice to the electrons is thus established through absorptionor emission of phonons. At zero temperature, all low-energy states are lledand all high-energy states are empty. At higher temperatures some electronswill leave their lower-energy states in favor of higher-energy states. The occu-pancy of energy states is statistically described by a probability distribution.This distribution is known as Fermi-Dirac distribution. The probability that anenergy state with value E is occupied is given by
F (E) =
1 + e
(EE
F
)=kT
1
(2.3.1)
where EF
denotes the energy at which the occupation probability is 0.5, calledFermi level or chemical potential, k = 1:38066 1023 J/K is the Boltzmann
14 Chapter 2
Position
EV
Electronenergy
Conduction band
Valence bandHoleenergy
BandgapEC Eg
Figure 2.4Simplied semiconductor energy-band diagram. The energy is plotted as a function of position inone dimension. Mobile charge carriers are symbolized by the signed circles.
constant, and T is the absolute temperature. For intrinsic (undoped) semicon-ductor crystals E
F
is very close to the center of the bandgap. For typical im-purity doping concentrations and bandgaps of commonly used semiconductorsE
F
is well-separated from the valence and conduction band edges, such thatjEE
F
j >> kT for all allowed energy states. This simplies the Fermi-Diracdistribution in the conduction band to the Boltzmann distribution
F (E) = e
(EE
F
)=kT
: (2.3.2)
This probability distribution is the reason for the exponential characteristics ofdiodes and transistors that will be described in this and the next chapter; andthese devices will determine the characteristics of most circuits in this book.
The electron density dn(E; dE) within an energy interval dE around anenergy E is given by
dn(E; dE) = N(E)F (E)dE (2.3.3)
where N(E) /p
E E
C
near the bottom of the conduction band. In thermalequilibrium, that is if no external voltage is applied to the semiconductorand no net current ows, the total electron density in the conduction band is
Syed MuffassirHighlight
Semiconductor Device Physics 15
obtained by integrating Eq. 2.3.3 with respect to energy from the conductionband edge to innity, resulting in
n = N
C
e
(E
C
E
F
)=kT (2.3.4)where N
C
denotes the effective density of states in the conduction band nearits edge, and E
C
is the energy of the conduction band edge. A correspondingequation can be derived for the hole density near the top of the valence band:
p = N
V
e
(E
F
E
V
)=kT
: (2.3.5)For intrinsic semiconductors n and p are equal. We dene an intrinsic carrierdensity n
i
as
n
2
i
= np (2.3.6)It follows from Eqs. 2.3.4, 2.3.5, and 2.3.6 that
n
i
=
p
np =
p
N
C
N
V
e
E
g
=2kT (2.3.7)and that the Fermi level E
i
for an intrinsic semiconductor is given by
E
i
=
E
C
+E
V
2
+
kT
2
log
N
V
N
C
: (2.3.8)
For silicon, NC
= 2:80 10
19 cm3, NV
= 1:04 10
19 cm3, and ni
=
1:45 10
10 cm3 at room temperature. The concentration of Si atoms in acrystal is 5 1022 cm3, which means that only one out of 3 1012 atoms isionized at room temperature and therefore conductivity is very low.
2.4 Impurity Doping
The conductivity of a semiconductor can be increased signicantly by dopingit with impurities. In the doping process a small fraction of the semiconductoratoms in the crystal structure are replaced by atoms of a different element.As illustrated in Fig. 2.5, a donor impurity is an atom with a valence electronmore than the semiconductor atom and an acceptor impurity is an atom witha valence electron less than the semiconductor atom. Note that impurity atomsare electrically neutral: The difference in number of electrons is balanced byan equal difference in number of protons in the nucleus. Since the additionalvalence electron of a donor does not t into the crystal bond structure it isonly loosely bound to its nucleus by electromagnetic forces. In the energy-band diagram donors form an energy level in the bandgap that is typically
16 Chapter 2
donorimpurity
(a)
acceptorimpurity
(b)
Figure 2.5Illustration of a semiconductor with (a) donor and (b) acceptor impurity doping. The ion cores(dashed circles) are bound into the crystal structure by covalent bonds (dashed lines). The excesscharge carrier (solid circle) that is introduced with the impurity does not t into the covalent bondstructure. This excess charge carrier is only loosely bound to the ion core of the impurity atom byelectromagnetic forces and so is mobile. The hole introduced by an acceptor is a missing electronin a covalent bond.
close to the conduction-band edge. As long as the surplus electron is bound toits nucleus the corresponding state on that level is occupied and dened to beneutral. Conversely, acceptor atoms have loosely bound holes that appear asneutral states on an energy level in the bandgap that is typically close to thevalence-band edge.
Figure 2.6 shows the energy-band diagrams, the state densities, the Fermi-Dirac distributions, and the carrier concentrations for differently-doped semi-conductors. The introduction of donors moves the Fermi level from near thecenter of the bandgap further towards the conduction-band edge, whereas theintroduction of acceptors moves it closer to the valence-band edge. If thedonor-doping density is larger than the acceptor-doping density there
are more electrons in the conduction band than holes in the the valenceband (n > p) under charge-neutrality conditions and the semiconductor issaid to be n-type. In the reverse case, p > n and the semiconductor is saidto be p-type. The doping strength is often indicated by plus or minus signs.For example, a weak p-type doping is denoted by p and a very strong n-type doping by n++. If the semiconductor is so strongly doped that the Fermi
Semiconductor Device Physics 17
E
ECEg
EV
Valenceband
Conductionband
++
EF EF
EC
EV
n = Nc exp(= ni )
(EC EF)/kT[ [
p = NV exp(= ni)
(EF EV)/kT[ [
(a)
EC
E
EF EFEC
EV
ED ND
EV
+
CB
VB
np = ni
n
p
2
(b)
EFEV
ECEC
E
EAEV
+ + + +
CB
VB
EFNA
n
p
np = ni2
N(E ) F(E ) n,p0 0.5 1.0
(c)
Figure 2.6Energy-band diagram, density of states, Fermi-Dirac distribution, and carrier concentrations for(a) intrinsic, (b) n-type, and (c) p-type semiconductors at thermal equilibrium. The concentrationsof mobile electrons and holes are indicated by the hatched areas in the plots on the right. Figureadapted from S. M. Sze (1981), Physics of Semiconductor Devices, 2nd Edition. c1981 by JohnWiley & Sons, Inc. Reprinted by permission of John Wiley & Sons, Inc.
18 Chapter 2
level is within the conduction or valence band or very near the edge of oneof these bands, such that a large fraction of the states at the band edge areoccupied, its properties become similar to those of a metal and we speak of adegenerate semiconductor. This happens for acceptor doping concentrations ofaround N
C
and donor doping concentrations of around NV
. Commonly-useddoping elements for silicon are phosphorus (P) and arsenic (As) as donors andboron (B) as an acceptor. The ionization energy of such an impurity atom,that is the energy required to remove the loosely-bound charge carrier fromits ionic core, is on the order of 0.05 eV. This is only a small fraction of thebandgap energy and most donors and acceptors are thermally ionized at roomtemperature. The condition of charge neutrality in the crystal can then be statedas
n+N
A
= p+N
D
(2.4.1)
where NA
denotes the acceptor impurity concentration and ND
the donor im-purity concentration. Furthermore, Eq. 2.3.7 is also valid for doped semicon-ductors.
The mobile charge carriers that are more abundant in a semiconductorin thermal equilibrium are called majority carriers, whereas the sparser onesare called minority carriers. Using Eqs. 2.3.7 and 2.4.1 the concentration ofmajority electrons in the conduction band of an n-type semiconductor can beapproximated by
n
no
=
1
2
N
D
N
A
+
q
(N
D
N
A
)
2
+ 4n
2
i
(2.4.2)
and the concentration of majority holes in the valence band of a p-type semi-conductor by
p
po
=
1
2
N
A
N
D
+
q
(N
A
N
D
)
2
+ 4n
2
i
: (2.4.3)
For strongly doped n-type material with ND
>> N
A
and ND
N
A
>> n
i
n
no
N
D
(2.4.4)
and for strongly doped p-type material withNA
>> N
D
andNA
N
D
>> n
i
p
po
N
A
: (2.4.5)
Syed MuffassirHighlight
Semiconductor Device Physics 19
The minority carrier concentrations can be computed from Eq. 2.3.6 as
p
no
=
n
2
i
n
no
n
2
i
N
D
(2.4.6)
and
n
po
=
n
2
i
p
po
n
2
i
N
A
: (2.4.7)
Using Eqs. 2.3.4 and 2.4.4 we can approximate the Fermi level of a highly-doped n-type semiconductor by
E
F
= E
C
kT log
N
C
N
D
: (2.4.8)
Correspondingly, Eqs. 2.3.5 and 2.4.5 yield an approximation of the Fermilevel of a strongly-doped p-type semiconductor:
E
F
= E
V
+ kT log
N
V
N
A
: (2.4.9)
Hence, the Fermi level is near the conduction band edge for ND
N
C
andnear the valence band edge for N
A
N
V
, as we noted before.
2.5 Current Densities
In the presence of external electric and magnetic elds the thermal equilibriumin the semiconductor is disturbed. The behavior of charged particles in suchelds is described by the Maxwell equations. In normal semiconductor oper-ation magnetic effects can be neglected. The most important consequence ofthe Maxwell equations, for our purposes, relates the charge density (chargeper volume) to the divergence of the electric eld E :
r E =
"
s
(2.5.1)
where r is the Nabla operator1, and "s
= "
0
" is the electrical permittivityof the semiconductor with "
0
= 8:85418 10
12 F/m denoting the vacuumpermittivity, and " is the dielectric constant of the semiconductor. For silicon," = 11:9. This equation holds for homogeneous and isotropic materials underquasi-static conditions and is called the Poisson equation. The gradient of the
1 r =
@
@x
;
@
@y
;
@
@z
20 Chapter 2
electrostatic potential V is given by
rV = E : (2.5.2)
Hence, the Poisson equation can be rewritten as
V =
"
s
(2.5.3)
where is the Laplacian operator2. Since the potential energy of an electron isqV , and the potential energy of a hole is qV , the differential spatial structureof the energy band edges can be computed from the electric eld as
rE
C
= rE
V
= qrV = qE : (2.5.4)
The mobile charge carriers in a material that is not in thermal equilibriumgive rise to current ow. The total current density J (charge owing through agiven cross-section during a given time interval) in a semiconductor is the sumof an electron current density J
n
and a hole current density Jp
. By historicaldenition the electron is assigned the negative elementary charge q, wherewe dene q to be positive. However, the direction of the current density isdened as the direction of positive charge ow. Consequently, J
n
is antiparallelto the electron ow and J
p
is parallel to the hole ow. The average electronow velocity can be expressed as
v
n
=
J
n
qn
(2.5.5)
and the average hole ow velocity as
v
p
=
J
p
qp
: (2.5.6)
For each carrier type the current ow is due to two basic mechanisms,namely diffusion and drift. Diffusion is a term borrowed from gas dynamics. Itdescribes the process by which a net particle ow is directed from a region ofhigher particle density to a region of lower particle density along the densitygradient. This phenomenon is a direct consequence of the assumption of statis-tical isotropic motion of the particles. The electron and hole diffusion current
2 = r
2
=
@
2
@x
2
+
@
2
@y
2
+
@
2
@z
2
Semiconductor Device Physics 21
n
n
vn,diff
Jn,diff
(a)
p
p
vp,diff
Jp,diff
(b)
Figure 2.7Diffusion of (a) electrons and (b) holes. The directions of the carrier concentration gradients,carrier motion, and electrical currents are shown.
densities are respectively given by
J
n;diff
= qD
n
rn (2.5.7)J
p;diff
= qD
p
rp (2.5.8)
where Dn
and Dp
are positive constants denoting the electron and hole diffu-sion coefcient, respectively. The average diffusion velocities are
v
n;diff
= D
n
rn
n
(2.5.9)
v
p;diff
= D
p
rp
p
: (2.5.10)
The relationships between the carrier concentrations, their gradients, the dif-fusion velocities, and the diffusion current densities are shown schematicallyin Fig. 2.7. As we shall see, diffusion determines the current ow in diodesand, within the operating range mainly considered in this book, in transistors.Diffusion also governs the ion ows in biological neurons.
22 Chapter 2
Drift currents are caused by electric elds. For low electric elds theelectron and hole drift current densities, respectively, are given by
J
n;drift
= q
n
nE (2.5.11)J
p;drift
= q
p
pE (2.5.12)
where n
and p
are positive constants denoting the electron and hole mobility,respectively. The mobilities are the proportionality constants that relate thedrift velocities of the charge carriers to the electric eld according to
v
n;drift
=
n
E (2.5.13)v
p;drift
=
p
E : (2.5.14)The mobilities decrease with increasing temperature as / T n, where n=1.5in theory, but empirically is found to be closer to n=2.5. The relationshipsbetween the different parameters are illustrated in Fig. 2.8. At sufciently largeelectric elds the drift velocities saturate due to scattering effects and the termE in the above equations must be replaced by a constant term v
s
, which isof the same order of magnitude as the thermal velocity. For intrinsic silicon atroom temperature, approximate values of the mobilities are
n
= 1500 cm2/Vsand
p
= 450 cm2/Vs, and the thermal velocity is 5 106 cm/s. Mobilitiesdecrease with increasing impurity doping concentrations.
For non-degenerate semiconductors, there is a simple relation betweendiffusion constants and mobilities that was discovered by Einstein when he wasstudying Brownian motion, and is therefore known as the Einstein relation:
D
n
= U
T
n
(2.5.15)D
p
= U
T
p
(2.5.16)whereU
T
= kT=q is the thermal voltage, and is the natural voltage scaling unitin the diffusion regime. Its value at room temperature is approximately 25 mV.From Eqs. 2.5.72.5.16 we then obtain the total electron and hole currentdensities
J
n
= J
n;drift
+ J
n;diff
= q
n
(nE + U
T
rn) (2.5.17)J
p
= J
p;drift
+ J
p;diff
= q
p
(pE U
T
rp) : (2.5.18)
In thermal equilibrium, diffusion and drift currents are balanced, that is Jn
=
J
p
= 0 and the carrier concentration gradients can be computed by differen-tiating Eqs. 2.3.4 and 2.3.5. If we further use Eq. 2.5.4 to express the electric
Semiconductor Device Physics 23
V
vn,drift
Jn,drift
(a)
V
vp,drift
Jp,drift
(b)
Figure 2.8Drift of (a) electrons and (b) holes in an electrostatic potential V . The directions of the electriceld E , carrier motion, and electrical currents are shown.
eld in terms of the gradient of the energy-band edges, we obtain the importantresult that in thermal equilibrium
rE
F
= 0 : (2.5.19)That is, the Fermi level is constant. This result is intuitively clear, becauseotherwise a state of a given energy would more likely be occupied in one spatialposition than in another. More mobile charge carriers would then move to thisposition than away from it, and so the energy states would be lled up until theprobabilities would be matched everywhere.
The temporal dynamics of the the carrier density distributions are de-scribed by the continuity equations, which are a direct result of the Maxwellequations:
@n
@t
= G
n
R
n
+
1
q
r J
n
(2.5.20)@p
@t
= G
p
R
p
1
q
r J
p
: (2.5.21)
where Gn
and Gp
denote the electron and hole generation rate and Rn
and
24 Chapter 2
R
p
the electron and hole recombination rate, respectively. Generation andrecombination effects account for the creation and annihilation of electron-hole pairs due to transitions between valence band and conduction band.Generation requires a certain amount of energy that can be supplied by thermaleffects, optical excitation (discussed in Chapter 10) or impact ionization inhigh electric elds. Recombination counterbalances generation and is drivenby the principle that a system tends towards a state of minimum energy.For a recombination process to take place an electron and a hole have to bepresent in close vicinity. Recombination is therefore limited by the availabilityof minority carriers. Approximations of the recombination rates under lowinjection conditions, where the majority carrier densities are much larger thanthe minority carrier densities are given by
R
n
=
n
p
n
po
n
(2.5.22)
R
p
=
p
n
p
no
p
(2.5.23)
where np
and pn
are the minority carrier densities and npo
and pno
their valuesat thermal equilibrium. The minority carrier lifetimes
n
and p
are equal ifelectrons and holes always recombine in pairs and no trapping effects occur.
2.6 p-n Junction Diode
The p-n junction diode is the fundamental semiconductor device. It is used asa basis for every transistor type. Furthermore, it is the dominant light-sensingdevice, and it will also become the most widely used sensor for electronicimaging applications. Light-sensing applications of diodes will be discussedin Chapter 10. The p-n junction has also found wide-spread use as the light-emitting diode (LED). However, light-emitting diodes are very inefcient forsemiconductors with indirect bandgaps, such as silicon, and will not be treatedin this book.
Thermal Equilibrium
Consider what happens when an n-type semiconductor and a p-type semicon-ductor are brought into physical contact 3. The diffusion processes describedin Section 2.5 give rise to a net electron ow from the n-type region to the
3 In practice, surface oxidation of the semiconductor materials would prevent this.
Semiconductor Device Physics 25
p region n region
bi
EC
EV
EF
E
V
x
x
x
x
x
xp
d
Depletion region
xn
0
biq
Figure 2.9Characteristics of an abrupt p-n junction in thermal equilibrium with space-charge distribution ,electric eld distribution E , potential distribution V , and energy-band diagram E.
26 Chapter 2
p-type region and a net hole ow from the p-type region to the n-type re-gion. The combination of these two effects results in a diffusion current den-sity J
diff
= J
n;diff
+ J
p;diff
from the p-type to the n-type region, as givenby Eqs. 2.5.7 and 2.5.8. The diffusing minority carriers recombine with ma-jority carriers in the vicinity of the junction. As a result, this diffusion regionis largely devoid of mobile charge carriers and np
Semiconductor Device Physics 27
region is fully depleted we obtain charge densities of
n
= qN
D
(2.6.3)
p
= qN
A
(2.6.4)
within the depletion regions of the n-type and p-type material, respectively. Thenet charge density outside the depletion regions is zero, since the n-type andp-type bulks are electrically neutral. According to Eq. 2.5.1 the relationshipbetween charge density distribution and electric eld is given by
@E
x
(x)
@x
=
(x)
"
s
(2.6.5)
in the one-dimensional case, where x is the coordinate along an axis perpendic-ular to the junction plane with E
x
pointing along that axis. Using the conditionthat the electric eld is zero at the boundaries x
n
and xp
of the depletion re-gion in the n-type and p-type material, respectively; and the charge neutralitycondition N
D
x
n
= N
A
x
p
; Eq. 2.6.5 can be integrated to yield
E
x
(x) =
qN
D
(x x
n
)
"
s
= E
0
+
qN
D
x
"
s
(2.6.6)
in the n-type depletion region and
E
x
(x) =
qN
A
(x x
p
)
"
s
= E
0
qN
A
x
"
s
(2.6.7)
in the p-type depletion region. Here
E
0
= E
x
(x = 0) =
qN
D
x
n
"
s
=
qN
A
x
p
"
s
(2.6.8)
is the electric eld at the junction; where it reaches its largest magnitude. Theone-dimensional version of Eq. 2.5.2 states that the electric eld is the partialderivative of the potential distribution along the x direction according to
@V (x)
@x
= E
x
(x) : (2.6.9)
Since potentials are always measured with respect to a reference value theoffset of the V (x) curve is arbitrary. Choosing V (x = 0) = 0 we nd
V (x) = E
0
x+
E
0
2x
n
x
2 (2.6.10)
28 Chapter 2
in the n-type depletion region and
V (x) = E
0
x+
E
0
2x
p
x
2 (2.6.11)
in the p-type depletion region. The built-in potential can then be expressed interms of the depletion region width
d = jx
n
x
p
j (2.6.12)as
bi
= jV (x
n
) V (x
p
)j =
1
2
E
0
d : (2.6.13)
Eliminating E0
from Eqs. 2.6.8 and 2.6.13 and solving for the depletion regionwidth we obtain
d =
s
2"
s
q
N
A
+N
D
N
A
N
D
bi
: (2.6.14)
The p-n junctions fabricated with typical silicon processes are not abrupt,but have a more gradual prole. Their characteristics have to be determined nu-merically, but are qualitatively similar to those of the abrupt junction analyzedabove.
Forward and Reverse Bias
Having characterized the p-n junction under thermal equilibrium conditions wenow consider the cases where a net current ows through the diode. In practice,the most common way of generating such a current ow is by changing theboundary conditions for the n-type and p-type regions through the externalapplication of a potential difference. If a positive voltage is applied to the p-type region relative to the n-type region the potential difference is called aforward bias, if the voltage applied to the n-type region is higher we speak ofa reverse bias. Consequently, a current owing from the p-type region to then-type region is called forward current and a current owing from the n-typeregion to the p-type region is called reverse current.
In steady state, the total current density must be constant throughout thediode. In the n-type and p-type bulk regions the current is made up of majoritycarriers. The electron current in the n-type region is thus transformed into ahole current in the p-type region. This transformation happens in the vicinityof the depletion region. The applied voltage V appears across the depletionregion as a change in the built-in voltage and thus modies the width of the
Semiconductor Device Physics 29
depletion region and the minority carrier densities outside the depletion regionboundaries. The depletion region width can be computed from Eq. 2.6.14 bysubstituting
bi
with bi
V , if we dene V to be positive for a forward bias:
d =
s
2"
s
q
N
A
+N
D
N
A
N
D
(
bi
V ) : (2.6.15)
According to the Boltzmann distribution (Eq. 2.3.2) the minority carrierdensities grow exponentially with decreasing electrostatic potential, so thatoutside the depletion region boundaries they become
n
p
= n
po
e
V=U
T (2.6.16)p
n
= p
no
e
V=U
T
: (2.6.17)Since the majority carrier distributions are approximately constant throughoutthe neutral regions, the np product is now given by
np = n
2
i
e
V=U
T (2.6.18)at the depletion region boundaries. The probability distributions for the occu-pancy of a given energy state are now centered around the so-called quasi-Fermi levels q
n
and qp
, where
V =
p
n
(2.6.19)at the depletion region boundaries. The same argument that led to Eq. 2.5.19for the thermal-equilibrium case now gives
J
n
= q
n
nr
n
(2.6.20)J
p
= q
p
pr
p
: (2.6.21)The current densities are therefore proportional to the gradients of the quasi-Fermi levels. Outside the depletion region the electric eld is small, as in thethermal-equilibrium case, and the current ows mainly by diffusion. Within thedepletion region the concentration of mobile charge carriers is very low, andtherefore no signicant recombination effects take place there. Consequently,the electron and hole currents are almost constant throughout the depletionregion. The energy band diagrams for the two different biasing conditionsare shown in Fig. 2.10 and the carrier distributions and current densities inFig. 2.11.
A forward bias diminishes the potential step across the junction. As a re-sult, the minority carrier concentration and thus the np product on either side
30 Chapter 2
p region n region
EV
E
x
d
Depletion region
(biV)qn-qqV
J
EC
p-q
(a)
p region n region
EV
E
x
d
Depletion region
(biV)q
n-q-qV
JEC
p-q
(b)
Figure 2.10Energy band diagram of a p-n junction diode for (a) forward bias, and (b) reverse bias.
of the depletion region are increased. This condition leads to an increase inthe recombination rate outside the depletion region boundaries and thus to aminority carrier gradient that gives rise to a forward diffusion current. Sincethe minority carrier densities at the depletion region boundaries increase expo-nentially with applied forward bias (Eqs. 2.6.16 and 2.6.17) the recombinationrate, and therefore the forward current density, increase exponentially.
Semiconductor Device Physics 31
n,pp region n region
O
O
np(xp)
xp xn
J = Jn + Jp
J
np
Jp
Jn
npo
pnoLp
Ln
pn(xn)
pn
x
x
(a)
p region n regionn,p
O
J
np
npo
pno
pn
x
Oxp xn
|Jn| + |Jp|Jp
Jn
x
(b)
Figure 2.11Minority carrier distributions and current densities in the vicinity of a p-n junction for (a) forwardbias, and (b) reverse bias. Figure adapted from S. M. Sze (1981), Physics of SemiconductorDevices, 2nd Edition. c1981 by John Wiley & Sons, Inc. Reprinted by permission of John Wiley& Sons, Inc.
A reverse bias increases the potential step across the junction. The minoritycarrier concentrations, and the np products on both sides of the depletionregion are decreased and therefore the recombination rate is decreased. Thethermal generation rate now exceeds the recombination rate near the depletionregion boundaries. This condition results in a small minority carrier gradientpointing away from the junction, and thus a small reverse diffusion currentdensity occurs.
32 Chapter 2
An approximation of the diode current-voltage relationship based on theabove considerations is given by the Shockley equation:
J = J
n
+ J
p
= J
s
e
V=U
T
1
(2.6.22)
with
J
s
=
qD
n
n
po
L
n
+
qD
p
p
no
L
p
(2.6.23)
where Ln
=
p
D
n
n
is called the electron diffusion length and Lp
=
p
D
p
p
the hole diffusion length. This current-voltage relationship is illustrated inFig. 2.12(a). Since the reverse current density is limited by J
s
, which is muchsmaller than forward current densities at forward biases larger than about 4U
T
,
diodes are often used as rectiers with a large conductivity in the forwarddirection and a small conductivity in the reverse direction. This application isreected in the circuit symbol for the diode (Fig. 2.12(b)), which is resemblesan arrow pointing in the forward current direction.
V
J
Js
(a)
JF
p n
(b)
Figure 2.12The p-n junction diode. (a) Current-voltage characteristic of an ideal diode according to theShockley approximation. (b) Diode symbol; the arrow indicates the direction of a forward currentdensity J
F
.
The Shockley equation is derived from the diffusion current density equa-tions 2.5.7 and 2.5.8, the continuity equations 2.5.20 and 2.5.21, as well asEqs. 2.5.22 and 2.5.23 for the recombination rates. The underlying assump-
Semiconductor Device Physics 33
tions (Shockley approximation) are: Abrupt depletion layer boundaries; thevalidity of the Boltzmann approximation given by Eq. 2.3.2, and of the low-injection condition; negligible generation current in the depletion layer; andconstant electron and hole currents within the depletion layer.
108
107
106
105
104
|J/J S
|
103
102
101
100
101
(d)
(c)
(b)
(a)(e)
0 5 10 15 20 25 30q|V |/kT
Ideal reverse
Ideal forward
Reverse
Forward
Junctionbreakdown
Figure 2.13Comparison of the current-voltage characteristics of an ideal and a practical diode. (a) Generation-recombination current domain. (b) Diffusion current domain. (c) High-injection domain.(d) Series-resistance effect. (e) Reverse leakage current due to generation-recombination and sur-face effects. Figure adapted from J. L. Moll (1958), The evolution of the theory of the current-voltage characteristics of p-n junctions, Proc. IRE, 46, 1076. c1958 IRE now IEEE.
For silicon p-n junctions there is only a qualitative agreement betweenthe observed behavior and the Shockley equation 2.6.22, because the aboveapproximations are not completely justied; and because of surface effectsat the semiconductor boundaries. Figure 2.13 compares the current-voltage
34 Chapter 2
characteristics of an ideal diode and a real diode. In semiconductors with smallintrinsic carrier concentrations n
i
, such as silicon, the reverse diffusion currentdensity (given by J
s
for reverse biases larger than approximately 4UT
) maybe dominated by a superimposed reverse generation current density J
gen
. Thegeneration current is mainly due to trapping centers in the depletion region.Trapping centers are imperfections in the crystal, which capture and releasemobile charge carriers. The generation current density due to trapping is givenby
J
gen
=
qn
i
d
e
(2.6.24)
where e
is the effective lifetime of the trapping. Similarly, under forward biasconditions there is a recombination current density component due to carriercapture processes mainly in the depletion region that exhibits an exponentialbehavior
J
rec
e
V=2U
T
: (2.6.25)Empirically, the total forward current density can be t with the function
J
F
e
V=nU
T (2.6.26)where n is a number between 1 and 2, depending on which current densitycomponent dominates.
For large forward biases, where the minority carrier concentrations ap-proach the majority carrier concentrations near the depletion region bound-aries, part of the applied voltage appears as linear potential drops outside thedepletion region, which with increasing forward bias start to extend more andmore into the semiconductor between the diode terminals. In this domain, theforward current-voltage characteristic is subexponential and nally asymptotesto a linear behavior given by the series resistance of the bulk regions.
For large reverse biases, a phenomenon called junction breakdown occursthat expresses itself in a sudden increase of reverse current at a certain reversevoltage. For silicon with typical impurity doping concentrations this effect isdue to impact ionization: The generation of electron-hole pairs by collisionwith an electron or hole that has acquired sufcient kinetic energy in the elec-tric eld of the depletion region. A charge carrier may create multiple electron-hole pairs during its transition through the depletion region. The generated car-riers can in turn create electron-hole pairs if they acquire sufcient energy, andso on. This effect is known as avalanche multiplication. It is characterized bya sharp onset and a high gain with respect to a reverse voltage change.
Semiconductor Device Physics 35
2.7 The Metal-Insulator-Semiconductor Structure
As its name implies, the Metal-Insulator-Semiconductor (MIS) structure con-sists of a conductor and a semiconductor that are separated by a thin insu-lator layer. The most common version of the MIS structure is the Metal-Oxide-Silicon (MOS) structure, where the oxide is in most cases silicondioxide (SiO
2
). The MOS structure and the p-n junction diode are the build-ing blocks of todays most widely used type of transistor, commonly knownas Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) . In addi-tion, the MOS structure is the basic building block of the Charge-CoupledDevice (CCD), which is currently the most widely used device for electronicimaging applications, and which is presented in Section 10.5.
Operation Domains
In a typical MIS structure the insulator layer is sufciently thick that it can-not be crossed by charge carriers under normal operating conditions and suf-ciently thin that the charge on the conductor can inuence the charge distribu-tion in the semiconductor via the electrostatic potential it induces. A positivecharge on the conductor attracts mobile electrons from the semiconductor tothe semiconductor-insulator interface and repels mobile holes away from theinterface. Conversely, a negative charge on the conductor attracts holes andrepels electrons. If the semiconductor is n-type, a positive charge on the con-ductor increases the majority carrier density near the semiconductor surface,an effect known as accumulation, while a negative charge on the conductorreduces the majority carrier density. With increasing negative charge on theconductor, most majority carriers are driven from the region near the surface,resulting in depletion, and eventually minority carriers start to accumulate atthe semiconductor surface, an effect called inversion. The same effects are ob-served in p-type semiconductors, if the sign of the charge on the conductor isreversed.
The energy-band diagram is a helpful tool to visualize these effects. Inorder to be able to compare the energy levels and potentials in the conductorand the semiconductor it is helpful to dene a few more parameters, as shownin the band diagram of Fig. 2.14 for the case of a p-type semiconductor. Thebasic concept is that of the work function, which is dened as the energydifference of an electron between the Fermi level in the material and thevacuum level in free space. The work function is denoted by q
m
, where m
isthe electrostatic potential difference corresponding to the work function. In the
Syed MuffassirHighlight
36 Chapter 2
EC
EV
Ei
m
i
B
B
Eg/2
Vacuumlevel
di
EF
InsulatorMetal Semiconductor
q
q
q
Figure 2.14Energy-band diagram of an ideal MIS diode with no applied bias between the semiconductor andmetal for a p-type semiconductor.
same context the electron afnity is dened as the energy difference betweenthe bottom of the conduction band in the semiconductor or the insulator andthe vacuum level. For the semiconductor we denote the electron afnity byq, for the insulator by q
i
. Furthermore, the potential difference between theFermi level in the metal and the insulator conduction-band edge is denoted by
B
. The potential difference separating the Fermi level EF
and the intrinsicFermi level E
i
of the semiconductor can be computed from Eqs. 2.3.7, 2.3.8,and 2.4.9 as
B
= U
T
log
N
A
n
i
: (2.7.1)
An MIS diode is called ideal if it has the following properties: Firstly, whenthere is no applied bias, the work functions of the semiconductor and the metalare equal: the Fermi levels line up and the energy bands in the semiconductorare at (at-band condition). Secondly, the charge on the conductor plate isequal to the total charge in the semiconductor with opposite sign. Finally, theinsulator is neither charged nor permeable to charge carriers. Note that forcertain applications deviations from this ideal behavior may be desirable, aswe will see in later chapters.
Syed MuffassirHighlight
Syed MuffassirHighlight
Semiconductor Device Physics 37
Steady-State Analysis
With the above terminology and assumptions we can now explain the effects ofaccumulation, depletion, and inversion with the bending of the semiconductorenergy bands near the semiconductor-insulator interface, as shown in Fig. 2.15for a p-type semiconductor. In thermal equilibrium, the semiconductor Fermilevel is constant and separated from the conductor Fermi level by the energycorresponding to the applied potential difference. Inversion occurs when theintrinsic Fermi level crosses the Fermi level near the surface, correspondingto the situation where the minority carrier density is larger than the majoritycarrier density at the surface.
EV
Semiconductor
EC
EFEi
EF
V0
InsulatorMetal
(b)
EV
Semiconductor
EC
EFEi
EF
V>0
InsulatorMetal
(c)
Figure 2.15Energy-band diagrams of an ideal MIS diode with applied bias for a p-type semiconductor in(a) accumulation, (b) depletion, and (c) inversion.
For further analysis we dene an electrostatic potential correspondingto the difference between the local intrinsic Fermi level and the intrinsic Fermilevel in the bulk. The value of this potential at the semiconductor surface iscalled surface potential
s
. For a p-type semiconductor, s
< 0 correspondsto accumulation;
s
= 0 to the at-band condition; 0 < s
<
B
to depletion;and
B
<
s
to inversion. The potential distribution and therefore the bendingof the energy bands can be computed from the space-charge distribution using
38 Chapter 2
the Poisson equationd
2
dx
2
=
(x)
"
s
(2.7.2)
where the x axis is perpendicular to the semiconductor surface. The followinganalysis will only be made for a p-type semiconductor. For an n-type semi-conductor the results are the same if the symbols p and n are interchanged,and the signs are appropriately changed. Using the at-band charge-neutralitycondition the space-charge density can be expressed as
(x) = q(N
+
D
N
A
+ p
p
n
p
) = q(n
po
p
po
+ p
p
n
p
) (2.7.3)where N+
D
and NA
are the densities of ionized donors and acceptors, respec-tively. The carrier concentrations are given by
n
p
= n
po
e
=U
T (2.7.4)p
p
= p
po
e
=U
T
: (2.7.5)The Poisson equation can then be rewritten as
@
2
@x
2
=
q
"
s
p
po
e
=U
T
1
n
po
e
=U
T
1
: (2.7.6)
Integration of this equation leads to
E
x
(x) =
@
@x
(2.7.7)
=
p
2U
T
L
D
s
e
=U
T
+
U
T
1 +
n
po
p
po
e
=U
T
U
T
1
(2.7.8)
where LD
=
p
"
s
U
T
=qp
po
, and the electric eld has the same sign as thepotential. Integrating Eq. 2.6.5 from the bulk to the surface we can now denean area charge Q
s
as the charge underneath a unit area of semiconductorsurface and relate it to the surface potential using Eq. 2.7.7:
Q
s
= "
s
E
s
(2.7.9)
=
p
2"
s
U
T
L
D
s
e
s
=U
T
+
s
U
T
1 +
n
po
p
po
e
s
=U
T
s
U
T
1
(2.7.10)where E
s
is the electric eld at the surface. This relationship between area
Semiconductor Device Physics 39
104
105
106
107
108
109
|QS|
(C/cm
2 )
2 B
B
~ S
~exp (q| S|/2kT)(Accumulation)
~exp (q S /2kT)(Strong inversion)
S (V)
EV Ei EC
Flatband
WeakinversionDepletion
0.4 0.2 0 0.2 0.4 0.6 0.8 1.0
p type Si (300K)NA = 4 1015 cm3
Figure 2.16Dependence of the area charge Q
s
on the surface potential for p-type silicon with acceptor densityN
A
= 4 10
15 cm3 at room temperature. Figure adapted from S. M. Sze (1981), Physics ofSemiconductor Devices, 2nd Edition. c1981 by John Wiley & Sons, Inc. Reprinted by permissionof John Wiley & Sons, Inc.
charge in the semiconductor and surface potential is plotted in Fig. 2.16. Thedifferent domains shown in Fig. 2.15 can be distinguished by the differentdependencies of Q
s
on s
. In accumulation ( s
< 0) the rst term underthe square root dominates, and we obtain Q
s
e
s
=2U
T
. In the at-bandsituation (
s
= 0), Qs
= 0. In depletion (0 < s
<
B
) the secondterm dominates, and Q
s
p
s
=U
T
. According to these characteristics theinversion domain is separated into two distinct sub-domains; weak inversion( B
<
s
< 2
B
) which exhibits the same relationship between Qs
and s
as depletion; and strong inversion ( s
2
B
) with Qs
e
s
=2U
T
. Thetransition region between weak and strong inversion (
s
2
B
) is called
40 Chapter 2
moderate inversion. Strong inversion shows a relatively abrupt onset at
s
2
B
: (2.7.11)In the case of inversion, the area charge consists of a contribution by mobileelectrons close to the surface, denoted by Q
i
, and a contribution by ionizedacceptors in the depletion region, Q
d
, and is equal with opposite sign to thecharge per unit area on the conductor plate, Q
g
:
Q
g
= Q
s
= Q
i
Q
d
(2.7.12)where
Q
d
= qN
A
d (2.7.13)and d is the depletion region width. Figure 2.17 shows the distributions ofarea charge, electric eld and potential in the ideal MIS diode in inversionwith an externally applied potential difference V , under the assumption thatall mobile charge accumulates at the surface. Since the insulator is assumedto be neutral, the electric eld is constant and the potential decreases linearlywithin the insulator. The total potential drop through the insulator is given by
V
i
= E
xi
d
i
=
Q
s
d
i
"
i
=
Q
s
C
i
(2.7.14)
where Exi
denotes the electric eld in the insulator, di
the thickness of theinsulator, "
i
the permittivity of the insulator, and
C
i
= "
i
=d
i
(2.7.15)is the insulator capacitance per unit area. The applied voltage is the sum of thevoltage drop across the insulator and the surface potential:
V = V
i
+
s
: (2.7.16)In the depletion and weak inversion case, the mobile charge can be neglectedand the space-charge density is given by
= qN
A
: (2.7.17)The potential distribution can be obtained as a function of the depletion regionwidth using Eq. 2.7.2:
=
s
(1
x
d
)
2 (2.7.18)
Semiconductor Device Physics 41
EF
EC
EV
Ei
V>0
s
x
x
xd
Vi
-di
V
Qg/
Qg
0 x
QdQi
Depletion
Inversion
Metal Insulator Semiconductor
EF
i
Figure 2.17Ideal MIS diode with applied bias for a p-type semiconductor in inversion: Energy-band diagram,area charge distribution , electric eld distribution E , and potential distribution .
with
s
=
qN
A
d
2
2"
s
: (2.7.19)
The depletion region width reaches its maximum at the onset of strong inver-
42 Chapter 2
sion, which can be computed from Eqs. 2.7.11 and 2.7.19 as
d
max
=
s
4"
s
B
qN
A
: (2.7.20)
The minimum voltage that has to be applied to the MIS structure to obtainstrong inversion is called threshold voltage. With the approximation thatQ
i
Q
d
at the onset of strong inversion and using Eqs. 2.7.11, 2.7.13, 2.7.14, 2.7.16,and 2.7.20 the threshold voltage can be estimated to be
V
T
Q
d
C
i
+ 2
B
=
p
4"
s
qN
A
B
C
i
+ 2
B
: (2.7.21)
Semiconductor
ConductordiInsulator
Depletion regionInversion layer
Ci
V
Cd
s
Figure 2.18MIS diode in inversion with equivalent capacitive-divider circuit.
MIS Capacitance
Because the depletion layer does not contain any mobile charge, it can beregarded as a capacitor and assigned an incremental capacitance per unit areawhich is obtained by differentiating Eq. 2.7.9:
C
d
=
@Q
s
@
s
(2.7.22)
=
"
s
p
2L
D
1 e
s
=U
T
+
n
po
p
po
e
s
=U
T
1
r
e
s
=U
T
+
s
U
T
1 +
n
po
p
po
e
s
=U
T
s
U
T
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