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VLSI Design Introduction Frank Sill Torres Universidade Federal de Minas Gerais (UFMG), Brazil

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Page 1: VLSI Design Introduction · VLSI Design: Introduction 1 VLSI Design Introduction ... Quiz Which of the ... Control output. Overview. window. Menu. Coordinates. Tools. Layer

1VLSI Design: Introduction

VLSI DesignIntroduction

Frank Sill TorresUniversidade Federal de Minas Gerais (UFMG), Brazil

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2VLSI Design: Introduction

Estudo de projeto avançado de circuitos integradosem muito larga escala (VLSI)

Assuntos:– Fluxo de projeto

– Tecnologia de Processo CMOS e transistor MOS

– Métodos de Projeto

– Atraso, Consumo

– Logica combinatória e sequencial

– Interconexões, memória, somadores

– Confiabilidade e Testes

– Ferramentas

Objetivos do curso

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3VLSI Design: Introduction

N. Weste, D. Harris: “CMOS VLSI Design: A Circuits and Systems Perspective (4th Edition)”, Addison Wesley.

C. Saint, J. Saint: “IC Layout Basics: A Practical Guide”, McGraw-Hill, 2001;

C. Saint, J. Saint: “IC Mask Design: Essential Layout Techniques”, McGraw-Hill, 2002.

Bibliografia Básica

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4VLSI Design: Introduction

Pergunte, se você não entende alguma coisa!– Baseado no assunto

– Baseado na articulação

Pagina da disciplina: minhaufmg.br (ambiente moodle)

Para mais perguntas e/ou pessoas tímidas:– E-mail: [email protected]

Até 31/Mar/18

– Tel.: 3409-3454

– Escritório: EE - Bloco I - sala 2630

Comunicação

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5VLSI Design: Introduction

Aulas expositivas– Slides (pdf) no ambiente Moodle

Apresentação de exemplos em sala de aula

Material para atividades em laboratório no ambiente Moodle

Desenvolvimento de projetos em laboratório

5

Dinâmica do curso

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6VLSI Design: Introduction

Dia Horário Sala19/03 (2ª) 16h00 – 19h30 241921/03 (4ª) 13h00 – 19h30 2418B26/03 (2ª) 16h00 – 19h30 241928/03 (4ª) 16h00 – 19h30 2418B

Aulas Presenciais

Vídeo aulas

– Cada 2 semanas uma aula

– 01/Abril – 30/Junho

– Moodle

Laboratório

– (provavelmente) pelo servidor e ssh

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7VLSI Design: Introduction

01 prova + nota de projeto final (PRO) + Atividades moodle (MOO) Prova: 40 pontos Projeto Final: 40 pontos Atividades moodle: 20 pontos Consulte as datas das provas no documento com o planejamento

das aulas

Nota final (NF):

Avaliação

1NF = P PRO MOO+ +

7

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9VLSI Design: Introduction

Áreas da Microeletrônica

Os três áreas principais da microeletrônica

– Processos e dispositivos

– Circuitos

– Sistemas

Visão Geral

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10VLSI Design: Introduction

Áreas da Microeletrônica

Todas as atividades relacionadas à fabricaçãode circuitos integrados (Litografia, Etching, IonImplantation,…)

Projeto de novos dispositivos transistores (Bulk-CMOS, SOI, FinFet,…)

Trabalhos com matérias para semicondutores

Sistemas eletromecânicos micrométricos (MEMS), por exemplo:

– Microfone do iPhone5

– Microlentes

– Micromotores

Processos/Dispositivos

Catraca como MEMS(memx.com)

Sala limpa - UFMG

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11VLSI Design: Introduction

Áreas da Microeletrônica

Projeto de circuitos integrados analógicos

Projeto de portas lógicas

Projeto de sensores e atuadoresintegrados

Projeto de circuitos mistos(conversores, ...)

Projeto de circuitos de radiofrequência (RF)

Circuitos

Pixel ativo para câmera digital (OptMAlab)

high-Vth/Tox

low-Vth/Tox

Porta lógica com baixo consumo (OptMA/ART)

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12VLSI Design: Introduction

Áreas da Microeletrônica

Projeto de sistemas integrados

– Sistemas integrados de aplicação específica (ASIC)

– Processadores

– Sistemas em Chip (SoC)

– Digital / Análogo / Sinal-Misto

Projeto de blocos de propriedade intelectual (IP)

Projetos com FPGAs

Sistemas

Copyright: ELV.de

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13VLSI Design: Introduction

Quiz

Which of the following areas doesn’t belong to microelectronics?A. Processes and Devices

B. Integrated Systems

C. Operating System

D. Circuits

What is a mixed-signal design?A. Mixture of hardware and software

B. Mixture of analog and digital blocks in the same design

C. Mixture of transistors and MEMS devices

D. Mixture of FPGA and ASIC

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14VLSI Design: Introduction

Quiz

Which of the following areas doesn’t belong to microelectronics?A. Processes and Devices

B. Integrated Systems

C. Operating System

D. Circuits

What is a mixed-signal design?A. Mixture of hardware and software

B. Mixture of analog and digital blocks in the same design

C. Mixture of transistors and MEMS devices

D. Mixture of FPGA and ASIC

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15VLSI Design: Introduction

Tendências

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16VLSI Design: Introduction

Tendências

Predição anunciada por Gordon Moore em 1965

Tecnologia de semicondutores vão dobrar a efetividade cada 18 meses (corr. para 24)

Níveis de Integração:

– SSI: 10 células

– MSI: 1000 células

– LSI: 10.000 células

– VLSI: > 10k células

A Lei de Moore

16151413121110987654321

Log2

ofth

eN

umbe

rof

Com

pone

nts

Per

Inte

grat

edFu

nctio

n

Year

1959

1960

1961

1962

1963

1964

1965

1966

1967

1968

1969

1970

1971

1972

1973

1974

1975

YearFonte: Moore, 1965

Log 2

de n

umer

o de

tran

sisto

res

para

cad

a fu

nção

inte

grad

a

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17VLSI Design: Introduction

TendênciasA Lei de Moore

Source: Moore, ISSCC 2003

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18VLSI Design: Introduction

0

300

600

900

1200

1500

1800

2100

2002 2004 2006 2008 2010 2012 2014

# Tr

ansi

stor

s (M

ill.)

Year

Sandy Bridge995 Mill.

Northwood55 Mill.

Prescott125 Mill.

Yonah151 Mill.

Wolfdale410 Mill.

Ivy Bridge1860 Mill.

Broadwell1300 Mill.

TendênciasTecnologias Reais

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19VLSI Design: Introduction

Tendências

1 m10 cm1 cm1 mm100 µm10 µm100 nm

„22 nm“-TransistorFonte: Intel

Source: „Spektrum der Wissenschaften“

Dimensões atuais

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20VLSI Design: Introduction

Tendências

Fábrica:

– Fabricação, encapsulamento e teste

– Muito caro (p.e. Intel 14nm - USD 5 Billion, GlobalFoundries28nm – USD 4.6 Billion, fonte: Wikipedia)

Fabricação

CEITEC S.A., Rio Grande do Sul(Work in Progress, 0.6 um)

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21VLSI Design: Introduction

Passado– Projetistas e fábrica juntos

– Propriedade intelectual da fábrica

Presente– Projetistas e fábrica separados

– Propriedade intelectual fica com projetistas

TendênciaProjeto de Sistemas Integrados no Presente

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22VLSI Design: Introduction

Quiz

What means the Moore’s law?A. The size of a processor increases every 24 months

B. The size of a transistor increases every 24 months

C. The amount of transistor per area increases every 24 months

D. The price of a processor decreases every 24 months

What is a fundamental change in the microelectronics world in the last decadesA. Today, ICs are designed, fabricated and tested at the same place

B. Today, each IC is designed, fabricated and tested in different places

C. Today, ICs can be designed, fabricated and tested in different places

D. Today, IC designer don’t have to be located in the same country as the IC fabrication facility.

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23VLSI Design: Introduction

Quiz

What means the Moore’s law?A. The size of a processor increases every 24 months

B. The size of a transistor increases every 24 months

C. The amount of transistor per area increases every 24 months

D. The price of a processor decreases every 24 months

What is a fundamental change in the microelectronics world in the last decadesA. Today, ICs are designed, fabricated and tested at the same place

B. Today, each IC is designed, fabricated and tested in different places

C. Today, ICs can be designed, fabricated and tested in different places

D. Today, IC designer don’t have to be located in the same country as the IC fabrication facility.

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24VLSI Design: Introduction

Projeto de Chip

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25VLSI Design: Introduction

Projetos Digitais Descrição do projeto com

linguagens de descrição (HDL)

Elementos menor: portas lógicas

Aplicações:– Processadores

– Conversores de áudio

– Controladores

Projeto de Chip

Projetos Analógicos Desenho de circuito como

esquemático e layout

Elementos menor: transistores, capacitores, resistores, ...

Aplicações:– Amplificadores

– Espelhos de corrente

– Sensores

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26VLSI Design: Introduction

Projeto de Chip - DigitalStandard Designflow

26

Textual description of the design

Mapping of the design onto logic cells

Floorplanning

Placement

Routing

Synthesis

VHDL, SystemC …

Planing of basic structure of the chip (Size, I/O, power supply, blocks, …)

Placement of logic cell on chip

Wiring of logic cells

Production

Presenter
Presentation Notes
Analogien: Schaltungsbeschreibung = Programmiersprache Synthese = Compilierung Wiederholte Tests, Verifikation, Prototyping (FPGA) etc.
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27VLSI Design: Introduction

Projeto de Chip - Digital

Up to 35 years ago: chips developed on drawing board

End of 80‘s: Hardware Description Languages (HDL)

– Verilog - 1985

– VHDL - 1987

Newest developments

– Object orientated approach

– SystemC

Task Description

Presenter
Presentation Notes
Hier soll klar werden, dass wir bei uns Hardware entwickeln. Programme (Software) stellen für uns eigentlich nur die Werkzeuge dafür bereit. Hat jemand unter den Schülern schon einmal objektorientiert Software programmiert (C++ oder Java)?
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28VLSI Design: Introduction

Projeto de Chip - Digital

Called: Synthesis Conversion of high-level description into logic cells

Happens automatic by special tools

Representation with logic cells

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29VLSI Design: Introduction

Projeto de Chip - DigitalSynthesis – Tool (Synopsys DesignVision)

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30VLSI Design: Introduction

Called: Floorplanning Planning of basic structure of the chip (Size, Inputs/Outputs,

power supply, blocks)

What decides the chip size?

BLOCK-limitedPAD-limited CORE-limited

Projeto de Chip - DigitalDetermination of Chip Sizes

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31VLSI Design: Introduction

Control output

Overviewwindow

Menu

Coordinates

Tools

Layerselection

Projeto de Chip - DigitalFloorplanning – Tool (Cadence Second Encounter)

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32VLSI Design: Introduction

Projeto de Chip - Digital

Placement of logic cells

Usually: Standard cells− Uniform cell height

− Different widths

Tool support

Copyright: Yu, UC Davies

Placement

Copyright: Weste, 2011

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33VLSI Design: Introduction

Projeto de Chip - DigitalPlacement - Example

Copyright: Yu, UC Davies

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34VLSI Design: Introduction

Projeto de Chip - Digital

Placing of wires that connect logic cells

Two Phases:

– Global Routing

– Detailed Routing

Tool support

Routing

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35VLSI Design: Introduction

Projeto de Chip - DigitalRouting - Examples

Copyright: Yu, UC Davies

Ref.: Wikipedia

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36VLSI Design: Introduction

Projeto de Chip – AnalógicoBiblioteca

Bibliotecas

Célula numa biblioteca

Imagens das células

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37VLSI Design: Introduction

Projeto de Chip - Analógico

Biblioteca

Imagem de símbolo

Imagem de esquemática

Célula

Estrutura da Biblioteca

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38VLSI Design: Introduction

Projeto de Chip - AnalógicoEsquemáticos - Janela de Projeto

Controlar e salvar

ZoomMover objeto

Copiar objetoRemover

Criar fio

PropriedadesCriar instância

Desfazer

Criar barramentoCriar nome de fio

Criar conexãoOpções de CMD

Refazer

Salvar

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39VLSI Design: Introduction

Projeto de Chip - AnalógicoConteúdo de um Esquemático

fio

Instância de um componente

Conexão (pin)

Nome e parâmetros de uma instância

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40VLSI Design: Introduction

Projeto de Chip - AnalógicoTestbench

Circuito a ser testado

Geração de Sinais de

teste

Carga na saída

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41VLSI Design: Introduction

Projeto de Chip - AnalógicoSimulação

Menu

Selecionar o design

Análises

Modificar variáveis

Dados de saídaRemoverCriar o netlist e simular

SimularMostrar os resultados

Modo de desenharLinha de estado

Campo de dados de saída

Campo de tipos de simulação

Campo de variáveis

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42VLSI Design: Introduction

Projeto de Chip - AnalógicoResultados das Simulação

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43VLSI Design: Introduction

Projeto de Chip - AnalógicoLayout

Escolha de tipo de camada Polígonos

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44VLSI Design: Introduction

Largura mínima (minWidth)

Espaço mínimo entre objetos (minSpacing)

Entalhe mínimo (minNotch)

Projeto de Chip – AnalógicoLayout - Regras de Design

0.2

0.24

0.3

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45VLSI Design: Introduction

Projeto de Chip – Analógico

Reação dinâmica no caso da violação de regras de design

No caso da violação → Ação não bloqueada

Layout - Regras de Design com Suporte

Notificação no caso da violação

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46VLSI Design: Introduction

Projeto de Chip - AnalógicoLayout de um Inversor

46

VDD

Gate

GND

PMOS

NMOS

Drain

Source

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47VLSI Design: Introduction

Projeto de Chip – Analógico

DRC: Controle das regras de design – Design Rule Check

Extração– Extração de componentes analógicos (transistores, condensadores,

resistores, fios...)

LVS: Layout contra esquemático– Layout Versus Schematic

– Verificação se função de esquemático e função de layout são idênticas

Layout - Verificação

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48VLSI Design: Introduction

Projeto de Chip – AnalógicoVerificação

Extração

DRC

LVS

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49VLSI Design: Introduction

Projeto de Chip – AnalógicoVerificação

CIW com tipo e número dos erros

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50VLSI Design: Introduction

Projeto de Chip – AnalógicoLayout Contra Esquemático: Resultados (LVS→Output)

Comparação dos dispositivos no esquemático e na célula extraída

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51VLSI Design: Introduction

Projeto de Chip – AnalógicoLayout Contra Esquemático: Erros

(LVS→Error Display)

Navegação através dos erros

Descrição dos erros

Seleção dos tipos de erro

Erro é destacado

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52VLSI Design: Introduction

Quiz

What are differences between analog and digital designs?A. Fabrication

B. Whether or not the designer touches transistors

C. Need for DRC (Design Rule Check)

D. Need for LVS check (Layout versus Schematic)

Which of the following figures is a Schematic

A. C.

B. D.

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53VLSI Design: Introduction

Quiz

What are differences between analog and digital designs?A. Fabrication

B. Whether or not the designer touches transistors

C. Need for DRC (Design Rule Check)

D. Need for LVS check (Layout versus Schematic)

Which of the following figures is a Schematic

A. C.

B. D.