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Dr. Ke Huang COMPE 572 VLSI Circuit Design Fall 2015 Lecture 1: Introduction to VLSI Circuits VLSI Circuit Design

VLSI CIRCUIT DESIGN

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INTRODUCTION OF VLSI DESIGN

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Page 1: VLSI CIRCUIT DESIGN

Dr. Ke Huang

COMPE 572

VLSI Circuit Design

Fall 2015

Lecture 1: Introduction to VLSI Circuits

VLSI Circuit Design

Page 2: VLSI CIRCUIT DESIGN

• Course #: COMPE 572

• Course name: VLSI Circuit Design

• Two lectures per week: Tuesday, Thursday 5:30PM-6:45PM

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Class administration

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• Instructor: Dr. Ke Huang

• Email: [email protected]

• Office: E202B

• Office hours: Tuesday 10:00am - 12:00pm Thursday 10:00 am - 12:00pm • Phone: 619-594-7792

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Class administration

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• When emailing me, please format the subject line as follows:

“COMPE572 - <last name> <first name> - <subject>”

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Email

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• Title : CMOS VLSI Design – A Circuits and Systems Perspective

• Edition: 4th, Addison Wesley

• Authors: Neil H.E. West David Money Harris

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Textbooks

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• Title : Microelectronic Circuits

• Edition: 7th, Oxford University Press

• Authors: Adel S. Sedra Kenneth C. Smith

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Textbooks

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• Title : Digital Systems Design using VHDL

• Edition: 2nd, Cengage Learning

• Authors: Charles H. Roth, Jr. Lizy Kurian John

• Course material available on the Blackboard

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Textbooks

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• Homework will be assigned on a weekly basis. Available on Blackboard every week.

• Homework is due at the beginning of class on the date specified on Blackboard.

Penalty will apply if submitted late.

• Homework is essential to the learning process!

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Homework

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• Four lab project assignments in total

• Lab reports due dates specified on Blackboard

• There are no scheduled lab times. Perform your lab work when you wish (subject to lab open hours)

• Project assignments must be completed to pass the course, in accordance with accreditation requirements

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Lab

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• Several quizzes during the semester

• One mid-term exam during the semester

• One final exam at the end of the semester

• Exams are closed book, but you are allowed to bring one page of notes (letter size) prepared by your own

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Exams

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• Homework and project assignments

30% of grade

• Midterm exam and quizzes

30% of grade

• Final exam

40% of grade

• Class participation bonus

Up to 5% of grade. You will have a bonus when you come to the board and correctly resolve a problem

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Class grades

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Class grades • Grading system

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• Attend class and participate

• Spend time outside of class learning the material

• Read the text books

• Do the homework

• Attend the lab and complete all of the lab projects

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You are expected to

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• COMPE271, EE330

• You must provide the proof of prerequisites (e.g. copy of official transcript) by 8/27/2015, otherwise you will be dropped from the class. If your prerequisite courses were not taken at SDSU, you should obtain a proof of course equivalency from the Office of Advising and Evaluations at SDSU, showing that the courses you have taken are equivalent to COMPE271 and EE330.

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Prerequisites

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• In my file, the following students are enrolled but have not provided the proof of prerequisites yet:

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Prerequisites

M. Alva J. L. Ashok Kumar S. Bheemareddy R. Bommakuri D. Damani P. Gupta A. Ilango J. Jadhav P. Kansara P. Kondlapudi

D. Sanghvi S. Sanjay D. Shah D. Shah H. Shah

A.M. Kothari A. Kulkarni R. M. Kulkarni P. Mhasalkar N. Namala D. Patel

J. Shah R. Shah V. Shashidhara Q. Su A. Tyagi M. Vanga

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Questions?

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• Introduction of VLSI

• Review of bipolar junction transistor (BJT)

• Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

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Learning objectives

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Introduction of VLSI

• Application of Very-Large-Scale Integration (VLSI) systems

VLSI systems

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• Different levels of abstraction

System design

Memory ALU

Control I/O

Logic design Circuit design

We focus on circuit design in this course

Introduction of VLSI

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Introduction of VLSI

• Discrete electronic components

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Introduction of VLSI

• Circuit design with discrete electronic components

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Introduction of VLSI

• First integrated circuit (IC) - Texas Instruments 1958

• 1 transistor and 4 other devices on 1 chip • Winner of the 2000 Nobel Prize

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Introduction of VLSI

• First commercial planar IC – Fairchild 1959

• 1-bit memory device on a chip • 4 transistors and 5 resistors – small scale integration

technology

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Introduction of VLSI

• 𝜇𝐴709 operational amplifier – Fairchild 1965

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Introduction of VLSI

• First 1,024 bit memory chip – Intel 1970

Mostly made of nMOS transistors

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Introduction of VLSI

• First microprocessor – Intel 1971

The Intel 4004 – 2,300 Transistors

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Introduction of VLSI

• Intel core i7 Bloomfield – Intel 2008

1.4 billion transistors

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Introduction of VLSI

• Scales of integrated circuits

Small-scale integration (SSI) ~10 components

Medium-scale integration (MSI) ~100 components

Large-scale integration

(LSI) ~10,000 components

Very large-scale integration (VLSI) has more than tens of thousands of transistors on a single chip

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Introduction of VLSI

• Semiconductor manufacturing

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Introduction of VLSI

• Semiconductor manufacturing

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Introduction of VLSI

• IC wafers and packaging

After metal deposition, each wafer contains a number of the same ICs, which will be cut into distinct pieces and put in the package

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Introduction of VLSI

• Illustration of IC layout

3-D illustration of an IC Cross-sectional diagram of

n- and p-MOSFETs

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Introduction of VLSI

• What do we do?

Circuit-level schematic design

Layout design Hardware description language

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• Introduction of VLSI

• Review of bipolar junction transistor (BJT)

• Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

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Learning objectives

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Review of bipolar junction transistor (BJT)

• Simplified structure of the npn and pnp transistors

npn transistor

pnp transistor

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Review of bipolar junction transistor (BJT)

• Characteristic for an npn transistor

𝑖𝐶 − 𝑣𝐵𝐸 characteristic 𝑖𝐶 − 𝑖𝐵 − 𝑣𝐶𝐸 characteristic

Page 37: VLSI CIRCUIT DESIGN

• Introduction of VLSI

• Review of bipolar junction transistor (BJT)

• Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

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Learning objectives

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Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

• Physical structure of NMOS transistors

Physical structure of NMOS Cross-section of NMOS

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Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

• Complementary MOS (CMOS)

Cross-section of a CMOS integrated circuit

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Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

• Characteristics of nMOS

G

S

D Overdrive voltage: how much 𝑣𝐺𝑆 exceeds 𝑉𝑡𝑛

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Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

• Characteristics of nMOS – a 3-dimensional view

𝑉𝐷𝑆

𝑉𝐺𝑆

𝐼𝐷

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Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

• Characteristics of nMOS – a 3-dimensional view

𝑉𝐷𝑆

𝑉𝐺𝑆

𝐼𝐷

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Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

• Characteristics of nMOS

𝑖𝐷 − 𝑉𝐺𝑆 − 𝑉𝐷𝑆 characteristic

G

S

D

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Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

• Characteristics of nMOS

𝑖𝐷 − 𝑉𝐺𝑆 characteristic in saturation region

or G

S

D

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Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

• Characteristics of pMOS

G

D

S

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Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

• Characteristics of pMOS

𝑉𝐷𝑆

𝐼𝐷

0 0

𝑉𝐺𝑆 = −2V

𝑉𝐺𝑆 = −3V

𝑉𝐺𝑆 = −4V

𝑉𝐺𝑆 = −5V

G

D

S

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Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

• Characteristics of pMOS

𝑖𝐷 − 𝑉𝐺𝑆 characteristic in saturation region

G

D

S

𝑉𝐺𝑆 (V)

-𝐼𝐷 (A)

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• Introduction of VLSI

• Review of bipolar junction transistor (BJT)

• Review of metal–oxide–semiconductor field-effect transistor (MOSFET)

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Summary