UCC3800/1/2/3/4/5 BiCMOS Current Mode Control IC's · UCC3800 7.2 6.9 UCC3801 9.4 7.4 UCC3802, 4 12.5 8.3 UCC3803, 5 4.1 3.6 Figure 2. Powering the UCC3802. Figure 3. During Undervoltage

Unitrode Part #

Max Duty Cycle

VRef(V)

UVLO Turn-On

UVLOTurn-Off

UCC3800 100% 5.0 7.2 6.9

UCC3801 50% 5.0 9.4 7.4

UCC3802 100% 5.0 12.5 8.4

UCC3803 100% 4.0 4.1 3.6

UCC3804 50% 5.0 12.5 8.4

UCC3805 50% 4.0 4.1 3.6

Power supply design has become increasingly more challenging as engineers confront the difficulties ofobtaining higher power density, improved performance and lower cost. The control for many of theseswitchmode supplies was revolutionized with two significant introductions; an advance technique known ascurrent mode control, and a novel PWM solution, the UC3842 controller. This IC contained several innova-tive features for general purpose current mode controlled applications. Included were high speed circuitry,undervoltage lockout, an op-amp type error amplifier, fast overcurrrent protection, a precision referenceand a high current totem-pole output.

The popular UC3842 control circuit architecture has been recently improved upon to deliver even higherlevels of protection and performance. Advanced circuitry such as leading edge blanking of the currentsense signal, soft-start and full cycle restart have been built-in to minimize external parts count. Addition-ally, these integrated circuits have been developed on a BiCMOS wafer fabrication process geared to virtu-ally eliminate supply power and propagation delays in comparison to the bipolar UC3842 devices. Thesesophisticated new BiCMOS controllers, the UCC3800 through UCC3805 pulse width modulators addressthe challenges presented by the upcoming generations of power supply designs. This application note willhighlight the features incoporated into this new generation of PWM controllers in addition to realizeable en-hancements in typical applications. The specific differences between members of the UCC3800/1/2/3/4/5family are reflective of their maximum duty cycle, undervoltage lockout thresholds and reference voltagewhich are summarized in the following table.

UCC 3800/1/2/3/4/5 BiCMOSCURRENT MODE CONTROL ICs

BILL ANDREYCAK

INTRODUCTION

APPLICATION NOTE U-133A

UCC3800/1/2/3/4/5 PWM FEATURES

A. Low start-up current

B. Undervoltage lockout

C. Low operating current

D. Internal soft start

E. Self biasing output during UVLO

F. Leading Edge Blanking

G. Self regulating Vcc supply

H. Full cycle restart after fault

I. Clamped gate drive amplitude

J. Reduced propagation delays

K. 5 Volt operation (UCC3803 & 05)

IN-CIRCUIT ADVANTAGES vs. UC3842

• Greatly reduced power requirements• Eliminates bootstrap supply• Fewer external components• Lower junction temperature• Reduced stress during faults• No current sense R/C filter network• Faster response to fault• Higher frequency operation• Higher maximum duty cycles

UCC3800/1/2/3/4/5 DEVICE OVERVIEW

The BiCMOS UCC3800/1/2/3/4/5 devices havesimilar standard features and pinouts to the bipolarUC3842/3/4/5 PWMs and are enhanced replace-ments in many applications. There are a few impor-tant differences however which may require minormodifications to existing applications.

APPLICATION DIFFERENCES

1.Maximum supply voltage from a low impedancesource: 12V versus 30V

2.Undervoltage lockout thresholds

3.Start-up current

4.Operating current

5.Oscillator timing component values

6.Reference voltage (UCC3803 and 05)

7.Vcc supply self clamping zener voltage

8.Internal soft start

9.Internal full cycle restart

10.Clamped gate drive voltage

11.Current loop gain

12.E/A reference voltage (’03 & ’05)

Figure 1.

UCC3800/1/2/3/4/5 BLOCK DIAGRAM

U-133AAPPLICATION NOTE

2

SUPPLYING POWER

An internal Vcc shunt regulator is incorporated ineach member of the UCC3800/1/2/3/4/5 PWMs toregulate the supply voltage at approximately 13.5volts. A series resistor from Vcc to the input supplysource is required with inputs above 12 volts tolimit the shunt regulator current as shown in figure2. A maximum of 10 milliamps can be shunted toground by the internal regulator.

The internal regulator in conjunction with the de-vice’s low startup and operating current can greatlysimplify powering the device and may eliminate theneed for a regulated bootstrap auxiliary supply andwinding in many applications. The supply voltage isMOSFET gate level compatible and needs no ex-ternal zener diode or regulator protection with acurrent limited input supply. The UVLO start-upthreshold is 1.0 volts below the shunt regulatorlevel on the ’02 and ’04 devices to guarantee start-up.

It is important to bypass the ICs supply (Vcc) andreference voltage (Vref) pins with a 0.1uF to 1uFceramic capacitor to ground. The capacitors shouldbe located as close to the actual pin connectionsas possible for optimal noise filtering. A second,larger filter capacitor may also be required in off-line applications to hold the supply voltage (Vcc)above the UVLO turn-off threshold during start-up.

UNDERVOLTAGE LOCKOUT

The UCC3800/1/2/3/4/5 devices feature undervol-tage lockout protection circuits for controlled opera-tion during power-up and power-down sequences.Both the supply voltage (Vcc) and the referencevoltage (Vref) are monitored by the UVLO circuitry.An active low, self biasing totem pole output duringUVLO design is also incorporated for enhancedpower switch protection.

Undervoltage lockout thresholds for the UCC3802/3/4/5 devices are different from the previousgeneration of UC3842/3/4/5 PWMs. Basically, thethresholds are optimized for two groups of applica-tions; off-line power supplies and DC-DC convert-ers. The UCC3802 and UCC3804 feature typicalUVLO thresholds of 12.5V for turn-on and 8.3V forturn-off, providing 4.3V of hysteresis. For low volt-age inputs which include battery and 5V applica-tions, the UCC3803 and UCC3805 turn on at 4.1Vand turn off at 3.6V with 0.5V of hysteresis. TheUCC3800 and UCC3801 have UVLO thresholdsoptimized for automotive and battery applications.

During UVLO the IC draws approximately 100 mi-croamps of supply current. Once crossing the turn-on threshold the IC supply current increasestypically to about 500 microamps, over an order ofmagnitude lower than bipolar counterparts.

SELF BIASING, ACTIVE LOW OUTPUT

The self biasing, active low clamp circuit showneliminates the potential for problematic MOSFETturn on. As the PWM output voltage rises while inUVLO, the P device drives the larger N type switchON which clamps the output voltage low. Power tothis circuit is supplied by the externally rising gatevoltage, so full protection is available regardless ofthe ICs supply voltage during undervoltage lockout.

µ

Device Vton Vtoff

UCC3800 7.2 6.9

UCC3801 9.4 7.4

UCC3802, 4 12.5 8.3

UCC3803, 5 4.1 3.6Figure 2. Powering the UCC3802.

Figure 3. During Undervoltage Lockout


3

REFERENCE VOLTAGE

The traditional 5.0V amplitude bandgap referencevoltage of the UC3842 family can be also found onthe UCC3800,1,2 and UCC3804 devices. However,the reference voltage of the UCC3803 andUCC3805 device is 4.0 volts. This change was nec-essary to facilitate operation with input supply volt-ages below five volts. Many of the referencevoltage specifications are similar to the UC3842devices although the test conditions have beenchanged, indicative of lower current PWM applica-tions. Similar to their bipolar counterparts, theBiCMOS devices internally pull the reference volt-age low during UVLO which can be used as aUVLO status indication.

REFERENCE DIFFERENCES

Note that the 4V reference voltage on theUCC3803 and UCC3805 is derived from the supplyvoltage (Vcc) and requires about 0.5V of headroomto maintain regulation. Whenever Vcc is below ap-proximately 4.5V, the reference voltage also willdrop outside of its specified range for normal op-eration. The relationship between Vcc and Vref dur-ing this excursion is shown in Figure 7.

The noninverting input to the error amplifier is tiedto one-half of the PWMs reference voltage, Vref.Note that this input is 2.0V on the UCC3803 andUCC3805 and 2.5V on the higher reference volt-age parts, the UCC3800, UCC3801, UCC3802 andUCC3804.

OSCILLATOR SECTION

The oscillator section of the UCC3800 throughUCC3805 BiCMOS devices has few similarities tothe UC3842 type — other than single pin program-ming. It does still utilize a resistor to the referencevoltage and capacitor to ground to program the os-cillator frequency up to 1 MHz. Timing componentvalues will need to be changed since a much lowercharging current is desirable for low power opera-tion.

Several characteristics of the oscillator have beenoptimized for high speed, noise immune operation.The oscillator peak to peak amplitude has been in-creased to 2.45V typical versus 1.7V on the UC3842 family. The lower oscillator threshold hasbeen dropped to approximately 0.2 volts while theupper threshold remains fairly close to the original2.8 volts at approximately 2.65V.

Figure 4: Internal circuit which holds output low during UVLO.

Figure 5: Output voltage vs. output current during UVLO.

Figure 6: Required reference bypass.

Figure 7: UCC3803 VREF output vs. VCC.


4

Discharge current of the timing capacitor has beenincreased to nearly 20 milliamps peak as opposedto roughly 8mA. As shown, this can be representedby approximately 130 ohms in series with the dis-charge switch to ground. A higher current was nec-

essary to achieve brief deadtimes and high dutycycles with high frequency operation. Practical ap-plications can utilize these new ICs to a 1 MHzswitching frequency.

SYNCHRONIZATION

Synchronization of these PWM controllers is bestobtained by the universal technique shown in figure12. The ICs oscillator is programmed to free run ata frequency about 20% lower than that of the syn-chronizing frequency. A brief positive pulse is ap-plied across the 50Ω resistor to forcesynchronization. Typically, a one volt amplitudepulse of 100 nanoseconds width is sufficient formost applications.

The ICs can also be synchronized to a pulse traininput directly to the oscillator Rt/Ct pin. Note thatthe IC will internally pull low at this node once theupper oscillator threshold is crossed. This 130 ohmimpedance to ground remains active until the pin islowered to approximately 0.2 V. External synchroni-zation circuits should accommodate these condi-tions.

PWM SECTION :MAXIMUM DUTY CYCLE

Maximum duty cycle is higher for these devicesthan for their UC3842/3/4/5 predecessors. This isprimarily due to the higher ratio of timing capacitordischarge to charge current which can exceed one-hundred to one in a typical BiCMOS application.Attempts to program the oscillator maximumduty cycle much below the specified range byadjusting the timing component values of Rtand Ct should be avoided. There are two reasonsto refrain from this design practice. First, the ICshigh discharge current would necessitate highercharging currents than necessary for programming,

Figure 8: Oscillator equivalent circuit.

Figure 9: OSC Waveform

Figure 10: Oscillator frequency vs. RT for several CT.

Figure 11: Minimum dead time vs. CT.


5

defeating the purpose of low power operation. Sec-ondly, a low value timing resistor will prevent the ca-pacitor from discharging to the lower threshold andinitiating the next switching cycle.

DEADTIME CONTROL

Deadtime is the term used to describe the guaran-teed OFF time of the PWM output during each oscil-lator cycle. It is used to insure that even at maximumduty cycle, there is enough time to reset the magneticcircuit elements, and prevent saturation.

The deadtime of the UCC380x PWM family is de-termined by the internal 130 Ohm discharge im-pedance and the timing capacitor value. Largercapacitance values extend the deadtime whereassmaller values will result in higher maximum dutycycles for the same operating frequency. A curvefor deadtime versus timing capacitor values is pro-vided in figure 11.

Increasing the deadtime is possible by adding a re-sistor between the Rt/Ct pin of the IC and the tim-ing components. The deadtime increases with thedischarge resistor value to about 470 Ohms as in-dicated from the curve. Higher resistances shouldbe avoided as they can decrease the deadtime andreduce the oscillator peak-to-peak amplitude. Sink-ing too much current (1 mA) by reducing Rt will

“freeze” the oscillator OFF by preventing dischargeto the lower comparator threshold voltage of 0.2 V.

Reducing the maximum duty cycle can be accom-plished by adding a discharge resistor (below 470Ohms) between the ICs Rt/Ct pin and the actualRt/Ct components. Adding this discharge controlresistor has several impacts on the oscillator pro-gramming. First, it introduces a DC offset to the ca-pacitor during the discharge – but not the chargingportion of the timing cycle, thus lowering the usablepeak-to-peak timing capacitor amplitude.

Because of the reduced peak-to-peak amplitude,the exact value of Ct may need to be adjusted fromUC3842 type designs to obtain the correct initialoscillator frequency. One alternative is keep thesame value timing capacitor and adjust both thetiming and discharge resistor values since theseare readily available in finer numerical increments.

LEADING EDGE BLANKING

A 100 nanosecond leading edge blanking intervalis applied to the current sense input circuitry of theUCC3800/1/2/3/4/5 devices. This internal featurehas been incorporated to eliminate the need for anexternal resistor-capacitor filter network to sup-

Figure 15: Current sense filter required with older PWM ICs.

Figure 14: Maximum duty cycle vs. RD for RT = 20k.

Figure 13: Circuit to produce controlled maximum duty cycle.

Figure 12: Synchronizing the oscillator.


6

press the switching spike associated with turn-onof the power MOSFET. This 100 nanosecond pe-riod should be adequate for most switchmode de-signs but can be lengthened by adding an externalR/C filter.

Note that the 100 ns leading edge blanking is alsoapplied to the cycle-by-cycle current limiting func-tion in addition to the overcurrent fault comparator.

MINIMUM PULSE WIDTH

The leading edge blanking circuitry can lead to aminimum pulse width equal to the blanking intervalunder certain conditions. This will occur when theerror amplifier output voltage (minus a diode dropand divided by 1.65) is lower than the currentsense input. However, the amplifier output voltagemust also be higher than a diode forward voltagedrop of about 0.5V. It is only during these condi-tions that a minimum output pulse width equal tothe blanking duration can be obtained.

Note that the PWM comparator has two inputs; oneis from the current sense input. The other PWM in-put is the error amplifier output which has a diodeand two resistors in series to ground. The diode in

this network is used to guarantee that zero duty cy-cle can be reached. Whenever the E/A output fallsbelow a diode forward voltage drop, no currentflows in the resistor divider and the PWM inputgoes to zero, along with pulse width.

PROTECTION CIRCUITRY:CURRENT LIMITING

A 1.0 volt (typical) cycle-by-cycle current limitthreshold is incorporated into the UCC3800 family.Note that the 100 nanosecond leading edge blank-ing pulse is applied to this current limiting circuitry.The blanking overrides the current limit comparatoroutput to prevent the leading edge switch noisefrom triggering a current limit function.

Propagation delay from the current limit compara-tor to the output is typically 70 nanoseconds. Thishigh speed path minimizes power semiconductordissipation during an overload by abbreviating theon time.

CURRENT SENSE OFFSET CIRCUITRY

For increased efficiency in the current sense cir-cuitry, the circuit shown in figure 18 can be used.Resistors RA and RB bias the actual current senseresistor voltage up, allowing a small current senseamplitude to be used. This circuitry provides cur-rent limiting protection with lower power loss cur-rent sensing.

The example shown uses a 200 millivolt full scalesignal at the current sense resistor. Resistor Rb bi-ases this up by approximately 700 mV to mate withthe 0.9V minimum specification of the current limitcomparator of the IC. The value of resistor Rachanges with the specific IC used, due to the differ-ent reference voltages. The resistor values shouldbe selected for minimal power loss. For example, a50 uA bias sets Rb = 13k ohms, Ra=75 k ohms(UCC3800,1,2,4) or Ra=56k ohms with theUCC3803 and UCC3805 devices.Zero duty cycle is achievable by forcing the er-ror amplifier output below the zero duty cycle

threshold of one diode voltage drop.

Figure 18: Biasing Isense for lower current sense voltage.

Figure 17.

Figure 16: Current sense waveforms with leading edge blanking.


7

OVERCURRENT PROTECTIONAND FULL CYCLE RESTART

A separate overcurrent comparator within the UCC3800/1/2/3/4/5 devices handles operation into ashort circuited or severely overloaded power sup-ply output. This overcurrent comparator has a 1.5volt threshold and is also gated by the leadingedge blanking signal to prevent false triggering.Once triggered, the overcurrent comparator usesthe internal soft start capacitor to generate a delaybefore retry is attempted. Often referred to as “hic-cup”, this delay time is used to significantly reducethe input and dissipated power of the main con-verter and switching components.

Full Cycle Soft Start insures that there is a predict-able delay of greater than 3 milliseconds betweensuccessive attempts to operate during fault. Thecircuit shown in figure 20 and the timing diagram infigure 21 show how the IC responds to a severefault, such as a saturated inductor. When the faultis first detected, the internal soft start capacitor in-stantly discharges and stays discharged until thefault clears. At the same time, the PWM output is

turned off and held off. When the fault clears, thecapacitor will slowly charge and will allow the erroramp output (COMP) to rise. When COMP gets highenough to enable the ouput, another fault occurs,latching off the PWM output, but the soft start ca-pacitor still continues to rise to 4V before being dis-charged and permitting start of a new cycle. Thismeans that for a severe fault, sucessive retries willbe spaced by the time required to fully charge thesoft start capacitor.

Low leakage transformer designs are recom-mended in high frequency applications to activatethe overcurrent protection feature. Otherwise, theswitch current may not ramp up sufficiently to trig-ger the overcurrent comparator within the leadingedge blanking duration. This condition would causecontinual cyclical triggering of the cycle-by-cycle

current limit comparator but not the overcurrentcomparator. This would result in brief high powerdissipation durations in the main converter at theswitching frequency. The intent of the overcurrentcomparator is to reduce the effective retry rate un-der these conditions to a few milliseconds, thussignificantly lowering the short circuit power dissi-pation of the converter.

Figure 19.

Figure 20. Figure 22.

Figure 21.


8

SOFT START

Internal soft starting of the PWM output is accom-plished by gradually increasing error amplifier (E/A)output voltage. When used in current mode control,this implementation slowly raises the peak switch

current each PWM cycle in comparison, forcing acontrolled start-up. In voltage mode (duty cycle)control, this feature continually widens the pulsewidth.

The soft start capacitor (Css) is discharged follow-ing an undervoltage lockout transition or if the ref-erence voltage is below a minimum value fornormal operation. Additionally, discharge of Css oc-curs whenever the overcurrent protection compara-tor is triggered by a fault.

Soft start is performed within the UCC3800/-1/2/3/4/5 devices by clamping the E/A amplifieroutput to an internal soft start capacitor (Css)which is charged by a current source. The soft startclamp circuitry is overridden once Css charges

above the voltage commanded by the error ampli-fier for normal PWM operation.

APPLICATIONS SECTION:CURRENT MODE CONTROL

Peak current mode control is obtained by feedingthe converters switch current waveform into thecurrent sense (Isens) input of a UCC3800/1/2/3/4/5device. The sense resistor should be selected todevelop a 0.9 V peak amplitude at full load, includ-ing slope compensation. Because of the internal100 ns typical leading edge blanking, the traditionalresistor-capacitor (Rf/Cf) filter to suppress the turn-on noise spike may not be needed.

SLOPE COMPENSATION

Slope compensation can be added in all currentmode control applications to cancel the peak to av-erage current error. Slope compensation is neces-

Figure 27: Low-power buck PWM example using on-chip power FETs.

Figure 24: Adding slope compensation.

Figure 23.


9

sary with applications with duty cycles exceeding50%, but also improves performance in those be-low 50%.

Primary current is sensed using resistor Rcs in se-ries with the converter switch. The timing resistorcan be broken up into two series resistors to biasup the NPN follower. This is needed to provide am-ple compliance for slope compensation at the be-ginning of a switching cycle, especially withcontinuous current converters. A NPN voltage fol-lower drives the slope compensating programmingresistor (Rsc) to provide a slope compensating cur-rent into Cf.

VOLTAGE MODE OPERATION

Any current mode control IC can be used as a di-rect duty cycle control (voltage mode) by applyinga sawtooth ramp to the current sense input. Theexponential charging of the timing capacitor (Ct) isused as an approximation of a sawtooth.

The oscillator waveform is resistively divided downby R1 and R2 to a 0.9V maximum amplitude andfed into the current sense input for duty cycle con-trol. A small capacitor across R1 might be neces-sary to completely bring the current sense input to

Q1

D1

COUT

Figure 25: Connecting UCC3802 for voltage mode.

Figure 26: a) Using the UCC3805 to double VIN.b). Using the UCC3805 to create Vo = −VIN.

a).

b).

Figure 28: A practical boost PWM example.


10

zero volts at the beginning of each PWM cycle.Current in the divider network should be keptaround 50 microamps, a compromise between lowpower consumption and good noise immunity. A15K ohm and 30 K ohm are used in the example.

This circuit can also be used to program the PWMmaximum duty cycle. Values should be calculatedto attain the 0.9V current sense voltage at the de-sired maximum duty cycle.

LOW POWER DC/DC CONVERTERSCHARGE PUMP CONVERTERS

Charge pump converters are popular for simple,low power applications. The two basic applicationsare free running step-up and inverting switcherswhich use few external components as shown infigure 26.

LOW POWER BUCK REGULATOR

For voltage step down applications, the UCC 380xtotem pole output can be used as both the switchand commutating diode of the buck regulator (seefigure 27). Power dissipation and the one amp peakcurrent rating of the IC’s output stage limit therange of applications to less than 1 amp of outputcurrent. High frequency operation permits the useof small and inexpensive surface mount compo-nents.

BUCK-BOOST CONVERTER for VOLTAGE STEP-UP and/or STEP-DOWN APPLICATIONS

A two-switch buck-boost converter can be control-led by the UCC380x family of PWMs. This specific

Q1

COUTD1

3

COUTD1

3

Figure 30: Buck PWM using a PMOS high-side switch.

Figure 29: A practical buck PWM that runs with VIN ≥ 4.1V.


11

converter is useful in applications where the inputvoltage can be both higher and lower than the de-sired output voltage. Implementation combines thevoltage step-down characteristic of the buck regu-lator with the voltage step-up of the boost con-verter. Both switches are driven simultaneouslywith this adaptation to simplify the control algo-rithm. Note that the PWM output of the IC will beused directly for the high side switch in a low powerapplication thus requiring only one external switch.Also, the body diode of the lower side totem-poleoutput is used as one of the commutating rectifiers,further reducing complexity. As shown in figure 31,this approach is ideal for low voltage, low powerDC to DC applications. Higher voltage and higherpower applications will require the use of discretesemiconductors for the high side switch and lowerdiode.

Duty cycle is varied with input line voltage to pro-vide a regulated output. This non isolated buck-boost converter can be operated in either thediscontinuous and continuous inductor currentmodes. High frequency switching permits the useof very small and inexpensive surface mount induc-tors for most low power applications. The convertercan be controlled by duty cycle modulation (voltagemode) or current mode control, and with or withoutovercurrent protection.

BOOST CONVERTERS

The UCC 3803 and UCC 3805 devices are fullyoperational from a 4.5 volt input supply and areideally suited for 5VDC and battery input PWMboost converter applications. MOSFETs featuring“logic level” gate thresholds are the most likely can-didates for the PWM switch as opposed to usingstandard devices which typically require a gatevoltage near 12 volts to be fully on. Currently, manypopular N channel MOSFETs are available withlogic level gate inputs as an option. Note that manylogic level FETs have maximum gate voltage rat-ings of +/- 10V as opposed to +/- 20V for most con-ventional FETs which limits their application. Alsonote that the UCC 380x devices will require a cur-rent limited supply when used above 12 volts froma low impedance source.

A basic current mode controlled boost converterapplication circuit is shown in figure 28. Typicalcomponent values for 250 kHz operation are listedin the following tables for a 12V and 24V output ap-plications. The boost converter design equationsare summarized below.

BOOST DESIGN SUMMARY:

(Discontinuous inductor current)

Vout = Vin ×

t (on)t (off)

+ 1

Iin = Iout ×

t(on)t(off)

+ 1

Ip = 2 × Iin × {t(period)t(on)

Ip = 2 × t(period) × Iout × (t(on) + t(off))

[t(on) × t(off)]

where t (period) = 1F (switching)

L = Vout minus Vin (min) × t(off)]

Ip

C out = (lp × t (off ) max)

2 × dVout

ESR (max) = dVoutlp

6

7

5

Figure 31. Simplified two switch buck/boost converter drive switches together.

Figure 32. Buck/boost PWM for low power systems.


12

BOOST CONVERTER DESIGNTABLE 1

VIN = 4.5 to 10 VDC

VOUT = 12 VDC

IOUT = 0.2, 0.4, 1 ADC

DISCONTINUOUS I MODE

F(SWITCHING) = 250kHz

TABLE 2

VIN = 4.5 to 10 VDC

VOUT = 24 VDC

IOUT = 0.1, 0.2, 0.5 ADC



TABLE 3

VIN = 10 to 18 VDC

VOUT = 24 VDC

IOUT = 0.1, 0.2, 0.5 ADC



BUCK REGULATOR

The buck regulator is a more difficult design chal-lenge than the boost converter due to the high sideswitch. A transformer coupled gate drive is typicallyrequired to deliver drive pulses to the switch, whichrequires about ten volts above the input voltage forproper drive. Current mode control further compli-cates the design by requiring a current transformerto level shift the high side current sense signaldown to the ground based input of the IC. In manyapplications, direct duty cycle control (voltagemode) can be used to simplify the design althoughovercurrent protection is lost with common groundapplications.

Several examples of common buck regulator applica-tion circuits are shown in figures 29 and 30. Direct dutycycle control is used for simplicity, however currentmode control can be easily adapted as shown in theexample. Tables listing component values and typicalpart numbers have been included.

POUT 3W 6W 12W

D1 1A/40V1N5819

3A/40V1N5822

6A/45V6TQ045

L 12uH 6.8uH 1.8uH

PCH- 27-123 27-682 27-182

Cout 100uF 300uF 500uF

Rcs(ohm) 0.1 0.05 0.033

Q1* 2A/50VRFL2NO5L

IRLZ14 IRLZ14

POUT 3W 6W 12W

D1 1A/40V1N5819

3A/40V1N5822

6A/45V6TQ045

L 22uH 12uH 3.9uH

PCH- 27-223 27-123 27-392


Rcs(ohm) 0.2 0.1 0.066

Q1* 3A/60VIRFF113

3A/60VIRFF113

IRFF133

POUT 3W 6W 12W

D1 1A/40V1N5819

3A/40V1N5822

6A/45V6TQ045

L 12uH 6.8uH 3.9uH

PCH- 27-123 27-682 27-392


Rcs(ohm) 0.1 0.05 0.033

Q1* 2A/50VRFL2NO5L

8A/50VIRLZ14

IRLZ14

NOTE 1: Coilcraft inductor part number.NOTE 2: Cout must be low ESR and ESl.NOTE 3: MOSFET ratings and part number. LOGIC LEVEL gate threshold.




13

DESIGN EQUATIONS:

Vout = Vin * D (duty cycle)

where D = T (on)

T (period)

L=Vout × t (off)d lo

where: Delta Io is the inductor ripple current andequal to one-half of the minimum output current.Minimum output current has been selected as 10%of the full load current

lpk = Io + d Io2

Iin(DC) = Iout * D

Cout = d Io(8 × F × d Vout)

where F is the switching frequency and ∆ Vout isthe output ripple voltage

BUCK REGULATOR DESIGN TABLES

TABLE 4

VIN = 4.5 to 10 VDC

VOUT = 3.3 VDC

IOUT = 1, 3 and 5 ADC

CONTINUOUS I MODE


Iout(min) = Iout(max)/10

TABLE 5

VIN = 10 to 18 VDC

VOUT = 5 VDC

IOUT = 1, 3 and 5 ADC

CONTINUOUS I MODE


Iout(min) = Iout(max)/10

TABLE 6

VIN = 10 to 18 VDC

VOUT = 9 VDC

IOUT = 1, 3, 5 ADC

CONTINUOUS I MODE


Iout(min) = Iout(max)/10IOUT 1A 3A 5A

D1 3A/20V1N5820

6A/40V6TQ045

12A/45V12TQ045

L 39uH 22uH 6.8uH

PCH- 27-393 45-223 45-682

Cout 2uF 4.7uF 10uF

Q1* 8A/60VIRLZ14

8A/60VIRLZ14

IRLZ14

IOUT 1A 3A 5A

D1 3A/40V1N5822

6A/40V6TQ045

12A/40V12TQ045

L 120uH 39uH 22uH

PCH- 27-1243 45-393 45-223

Cout 2uF 5uF 10uF

Q1* 4A/50VIRF9Z12

8A/50VIRF9Z22

12A/50VIRF9Z30

IOUT 1A 3A 5A

D1 3A/40V1N5822

6A/40V6TQ045

12A/40V12TQ045

L 39uH 12uH 6.9uH

PCH- 27-293 27-123 27-682

Cout 1uF 3uF 5uF





14

OFF-LINE APPLICATIONS:FORWARD AND FLYBACKCONVERTERS

Several benefits can be realized in off-line applica-tions by using the low current, UC380x BiCMOSPWM controllers. First, the IC can be powered froma resistor to the rectified input voltage source,eliminating the bootstrap winding. This applies tomost low frequency applications (50kHz) where theDC supply current required for the gate drive is low.Soft start of the power supply and delayed restartfollowing a fault requires no external parts. The in-

ternal leading edge blanking eliminates filtering ofthe current sense signal. Also, the ICs undervol-tage lockout thresholds, internal Vcc shunt regula-tor and active low totem pole output eliminate anyproblematic gate drive operation.

The basic schematic of a forward converter isshown in figure 33, and a flyback is shown in figure34. In each, the UCC3804 limits the maximum dutycycle to 50% by internal logic, allowing time for themain transformer to reset. Applications which utilizehigher maximum duty cycles, for example 65%,should use the UCC 3802 device without the inter-nal toggle flip flop.

UCC380X OTHER APPLICATIONS:UNIVERSAL SYNC GENERATOR

The UCC3803 can be used as a synchronization(SYNC) pulse generator and driver for a variety ofapplications. Basically, one circuit shown uses theleading edge blanking duration as the SYNC out-put pulse width. The current limit input is biased at1.25 volts to terminate the output pulse immedi-ately after the ICs internal blanking pulse width.

The oscillator is resistively programmed to a DClevel of 1.25 volts also, midway between its upperand lower thresholds. When a TTL compatibleSYNC pulse is injected, the amplitude at the oscil-lator input is raised above its upper threshold. Thisturns on the internal discharge circuitry which pullsthe pin to about 0.2 volts, crossing the lower oscil-lator threshold. Once this occurs, the dischargetransistor is turned off and the ICs output is turnedon, generating the SYNC pulse. Note that the cur-rent sense input is biased to turn the ICs output offfollowing the leading edge blanking duration, whichis used to program the SYNC output pulse width.This 100 nanosecond duration is ideal for synchro-nizing most PWMs used today with the techniqueshown.

This circuit can be adapted to generate other widthpulses with minor modifications. A capacitor can beadded across the lower resistor in the divider net-work to the current sense input for extending thepulse width. Note that the voltage must be limitedbelow 1.4 volts or a full cycle soft start will be in-curred. Also, this capacitor must be discharged be-fore the beginning of each pulse for proper timing

Figure 33. Forward Converter

Figure 34. Flyback Converter

Figure 35. Synchronization Circuit


15

to occur. One recommendation is to diode couplethe current sense input to the oscillator Rt/Ct pin.External circuits can also be used for more preciseprogramming.

VFO APPLICATIONS

Members of the UCC380x family of devices areadaptable for use in variable frequency applica-tions. The most direct means of accomplishing thisis to vary the charging current to the oscillator tim-ing capacitor. Note that the minimum compliancevoltage of the current source must exceed the up-

per oscillator threshold of approximately 2.7 volts.The VFO current source can be generated by anexternal op-amp for general purpose applicationsas shown.

Some VFO applications can utilize the ICs internalerror amplifier to vary the frequency over a pro-grammed minimum and maximum frequencyrange. This is done by programming the minimumfrequency by a resistor to Vref. Another currentsink/source is formed by a resistor to the E/A out-put. This arrangement performs frequency modula-tion as the E/A output voltage is varied.Applications which require a fixed 50% duty cycleat varying frequencies, electronic ballasts, for ex-

Figure 36. Electronic circuit breaker application.

Figure 37. Synchronization Circuit Waveforms

Figure 38. Using UCC380x as a VFO.


16

ample, should use the UCC3804 or UCC3805 de-vices. Output frequency from these will be one-halfof the ICs oscillator due to the internal divide-by-two gating circuitry.

FIXED OFF-TIME APPLICATIONS

Obtaining a fixed off-time, variable on-time controltechnique is easily implemented with the UCC380xfamily. The oscillator Rt/Ct timing components areused to generate the off-time rather than the oper-ating frequency. Implementation is shown in thecorresponding figure 40.

FULL DUTY CYCLE APPLICATIONS

Any of the UCC380x PWM controllers can be usedat full (100%) duty cycle. This mode of operationmay be required in certain applications, includingDC switch drivers. Implementation requires “freez-ing” the oscillator so that the output stays high untilit is time to turn off. Switch Q1 insures that thePWM output is high when switch Q2 is activated tostop the oscillator. Current limiting can still be ac-complished by using the current sense feature ofthe IC, in addition to modulating the peak currentvia the error amplifier.

HIGH SPEED, PROGRAMABLE ELEC-TRONIC CIRCUIT BREAKER

A high speed, programmable electronic circuitbreaker can be built using the UCC380x family toperform the control and MOSFET drive functions.Basically, back-to-back power MOSFETS are usedas the switching element although an SCR, TRIACor bipolar switch can also be used. The MOSFETSare connected with the sources tied together tosimplify the gate drive while providing a blockingpath to current in either direction. Current limitingfor an AC supply requires a current transformer,also shown, which can be simplified to a resistorfor use in DC input applications. The current senseinput to the IC can either be biased up for lowerpower loss in the current sense network, or pro-grammed by adjusting the error amplifier outputvoltage to yield a similar result.

8

4

6

6

8

4

Figure 41. 100% Duty Cycle Circuit

Figure 40: Fixed off-time control.

Figure 39: Using the error amplifier to make a simple VFO.


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SWITCHING COMPONENT NOTES:P CHANNEL MOSFET SWITCHES

Logic level P channel MOSFETs are unavailabletoday which limits the use of P channel MOSFETsto those with input voltages greater than about tenvolts for proper gate drive. The P channel switchwill also require a small N channel device to invertits gate drive command, due to the active high out-put of the PWM (figure 30). High speed PNP tran-sistors are also a suitable choice for someapplications.

N CHANNEL MOSFET SWITCHES

Proper gate drive for N channel high side switcheswill require a supply voltage which is several voltsabove the input voltage. This is not a problem infive volt input applications using logic level FETs ifa nine volt (or higher) supply is also available. Ifnot, one option is to construct a very low powerboost converter to generate the nine volt supply topower the IC and gate drive. The boost converterswitch can be driven from the UCC380x outputwhich is switching the main output (figure 29).Small, inexpensive surface mount inductors,switches and diodes are readily available. Anotherpossibility is to build a charge pump circuit drivenfrom the PWM output, provided that only a fewvolts of headroom are required.

GATE DRIVE TRANSFORMER

Higher input voltage applications using high-sideswitches will require a gate drive transformer dueto 12 volt maximum supply rating of the UCC 380xIC family. A small ferrite toroid with two windingsand minimal insulation is typically used. A capacitoris placed in series with the primary and is neededfor proper reset of the core. The DC offset intro-duced by the capacitor will effect the primary tosecondary turns ratio of the transformer which isdependant on the application. A PULSE Engineer-ing (phone 619-268-2400) model PE-64973 can beemployed in most Buck regulator designs.

CURRENT SENSE TRANSFORMER

A current sense transformer is required in the buckregulator application for current mode control. Thistransformer is used to level shift the current signalfrom the high side input supply to the ground refer-enced PWM circuitry. A high turns ratio should beincorporated to reduce power dissipation. Parasiticnoise can be minimized by inserting the trans-

former in series with the drain of the power switchas opposed to its source. A PULSE Engineering(phone 619-268-2400) model PE-64978 currenttransformer with a one turn primary and 50 turnsecondary can be used in most applications.

ADDITIONAL INFORMATION

1. UNITRODE Application Note U-100A;

“ The UC3842/3/4/5 Series of Current

Mode PWM ICs" :

• UC3842/3/4/5 PWMs

• Applications Information

2. UNITRODE Application Note U-111;

“ Practical Considerations in Current

Mode Power Supplies” ;

• Fixed OFF-Time Implementation

• Full Duty Cycle

• Paralleling Power Supplies

• Shutdown Techniques

• Slope Compensation (implementation)

• Soft Start

• Synchronization

• Variable Frequency Operation

• Voltage Mode Operation

3. UNITRODE Application Note U-96A

“A 25 Watt Off-Line Flyback Switching Regulator”:

• Flyback Converter Design

4. UNITRODE Application Note U-97

“Modelling, Analysis and Compensation of the Cur-rent Mode Converter ”

• Current Mode Control

• Slope Compensation

5. UNITRODE Design Note DN-42

“Design Considerations for Transitioning fromUC3842 to the New UCC3802 Family”

UNITRODE CORPORATION7 CONTINENTAL BLVD. • MERRIMACK, NH 03054TEL. 603-424-2410 • FAX 603-424-3460


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Copyright 1999, Texas Instruments Incorporated

Data Sheets

Documents

UCC3800/1/2/3/4/5 BiCMOS Current Mode Control IC's · UCC3800 7.2 6.9 UCC3801 9.4 7.4 UCC3802, 4 12.5 8.3 UCC3803, 5 4.1 3.6 Figure 2. Powering the UCC3802. Figure 3. During Undervoltage