IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 56, NO. 4, AUGUST 2009 1937

TID Test of an 8-Gbit NAND Flash MemoryH. Schmidt, K. Grürmann, B. Nickson, F. Gliem, and R. Harboe-Sørensen

Abstract—We report on new results of TID tests on an advanced8-Gbit NAND-Flash memory. Data error percentage and standbycurrent depend strongly on operational mode. Preventive memoryrefresh is proposed to move the first error occurrence to significanthigher dose values. The count of erase cycles until wear out is notaffected by the accumulated dose.

Index Terms—Data refresh, NAND-flash, standby current, TID.

I. INTRODUCTION

N AND-Flash memory devices [1]–[3] combine non-volatility with the highest storage density of contempo-

rary solid state memory devices. These outstanding advantageshave to be balanced against several Flash specific disadvantagesin particular (i) access only to large data structures as pages of 4kbytes, (ii) only moderate read/write data rates as 200/80 Mbpscompared to of DDR2 SDRAMs, and (iii) wear outlimit of erase/program operations.

At this time NAND-Flash based telemetry buffer memoriesare under development at several sites [4], [5]. In this type ofapplication the wear out limit will not be reached even after 10years of operation. Fig. 1 presents a comparison between DDR2SDRAM and NAND-Flash based memory modules of compa-rable physical size and mass, mounted with either single-dieDDR2 or single-die NAND-Flash devices [6]. Extremely highbit rates above 10 Gbps are the domain of DDR2 based buffermemories, and extremely high capacities of above 500 Gbit thedomain of NAND-Flash based memories. E.g. a buffer memoryof 300 Gbit and 2 Gbps can be implemented either using 5DDR2 based modules or using 2 NAND-Flash based modules,redundant modules not taken into account. Multi-die packagessuch as by 3Dplus or Samsung shift the domain boundaries tolarger capacities, but the bit rate remains unchanged [6].

In this context the TID and the SEE sensitivity of state of theart NAND-Flash and SDRAM devices is of major importance.ESA/ESTEC initiated to study the implementation aspects of aFlash based Safeguard Data Recorder (SGDR). One main aspectis the sensitivity of NAND-Flash devices to space radiation. TIDtest results of NAND-Flash memories with device capacities upto 4 Gbit have been reported in [7]–[14]. Here we report theresults of our most recent TID tests of state of the art NAND-Flash devices with the main focus on the Samsung 8 Gbit Flash.SEE cross sections already have been presented in [15].

Manuscript received September 08, 2008; revised November 06, 2008. Cur-rent version published August 12, 2009.

H. Schmidt, K. Grürmann, and F. Gliem are with Technische Univer-sität Braunschweig, D-38106 Braunschweig, Germany (e-mail: hagen.schmidt@tu-bs.de).

B. Nickson and R. Harboe-Sørensen are with the European Space Agency/ESTEC, 2200 AG Nordwijk, The Netherlands.

Digital Object Identifier 10.1109/TNS.2008.2009982

TABLE ISAMPLES USED FOR TID TESTS

II. TID TEST SET UP

The ESTEC source was used with mean dose rateof about 150 over anarea of 10 10 cm. Dosimetry was carried out using a FarmerDosimeter with 0.6 ionization chamber. All dose valuesare given in rad(Si) at the averageenergy of 1.25 MeV. Eight DUTs were biased and irradiatedsimultaneously, and were exercised one after the other. Table Idescribes the parts used in our both TID test campaigns.

III. TEST MODES

Three test modes were applied: TID Wear Out Mode, TIDStorage Mode and TID Refresh Mode. In all three test modesthe DUTs were irradiated continuously.

In Wear Out Mode one page is exercised by continuous erase/program operations until an error occurs, then another page ofanother block is exercised, and so forth.

In Storage Mode the test pattern is written before irradia-tion. In “Almost Unbiased Storage Mode” the DUTs are bi-ased during irradiation only for data verification after a givendose increase of about 5 krad. In order to shorten the biaseddose interval the subsequent read of eight DUTs is restrictedto 128 blocks, each. In consequence it takes only a 3 min in-terval, equivalent to a dose increase of 400 rad, i.e., onlyof the dose accumulation between subsequent data verifications.In “Always Biased Storage Mode” the DUTs are continuouslybiased during irradiation. Both modes are operated in paralleland therefore, the coverage is restricted to 128 blocks, also.

In Refresh Mode read/erase/program operations are executedat dose intervals of about 5, 10, 20 or 40 krad. Again, this isperformed either “Always Biased” or “Almost Unbiased” andagain, the exercised address space is restricted to 128 blocks.

IV. TID WEAR OUT TEST

During irradiation one page in a given block was exercisedcontinuously with “Block Erase/Page Program Cycles” (EPC).

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1938 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 56, NO. 4, AUGUST 2009

Fig. 1. Comparison between DDR2 and NAND-Flash memory domains.

Fig. 2. Number of Erase-Program Cycles until Wear Out versus Dose, 8 GbitSamsung. Dashed lines: Start of exercising a fresh block at a new address.Double lines: Irradiation stops at approx. 30 krad and 39 krad.

About once per minute (every 20000th EPC) the block contentsafter erase and the page contents after programming were ver-ified. After wear out of the respective block/page another pagein another block was exercised in the same manner, and so onup to the loss of device functionality. Two conditions for thewear out were checked: (a) erase or program operation failed or(b) data error detected. In all test runs the stop was triggered bycondition (a).

Four 8 Gbit and four 4 Gbit DUTs were tested [15]. The countof EPC until wear out varied between 4 and 3 (Fig. 2)and is not affected by the accumulated dose apparently, as wasexpected.

Erase time and programming time increased slightly withtotal dose, e.g., the erase time from toand the programming time from to . Initialprogramming of a new page of a new block consumes 50through 4 50 more time.

Fig. 3. Percentage of Data Errors in Storage Mode, Samsung 8 Gbit Unbiased10 DUTs, Biased 8 DUTs. Open symbols indicate “No errors up to this dosevalue”.

V. TID STORAGE TEST

Ten 8 Gbit DUTs were tested in “Almost Unbiased StorageMode”, and eight other DUTs in “Always Biased StorageMode”. In Fig. 3 the percentage of erroneous bits is plottedversus dose. In significant contrast to the Wear Out Test firstsingle errors start to appear already between .After the threshold dose the error count rises exponentially withdose. There is a wide spread of error percentage between the 18DUTs of the same device type. Nearly all errors are spurioussingle bit errors in “0” “1” direction.

For both modes the maximum and the minimum error sharesare plotted. A principal differentiation between “Always Bi-ased” and “Almost Unbiased” DUTs is not recognizable. AllDUTs were fully functional up to the irradiation stop between60 and 70 krad.

SCHMIDT et al.: TID TEST OF AN 8-Gbit NAND FLASH MEMORY 1939

Fig. 4. Idealized Threshold Distribution of the Flash Transistors in “0” and “1”State.

VI. DISCUSSION OF STORAGE TEST RESULTS

In the most sensitive DUT, Single Bit Error appearancestarted between 20 and 30 krad. From the error signature(spurious single bits, all “0” “1”) we conclude that theseerrors originate from the cell array and not from the peripheralcircuitry, such as data register, address register, control registersand so on.

Fig. 4 illustrates the distribution of the “0” and “1” thresholdvoltage of the respective floating gate transistors before irradia-tion. Radiation induced holes are trapped near the floating gateand in consequence, the threshold distribution is shifted to morenegative voltages during irradiation, i.e., the “0”-state thresholdis approaching the decision level of the sense amplifier with theeffect that more and more “0”-state cells erroneously are classi-fied as in “1”-state [7], [11].

In contrast to the Storage Modes in the Wear Out Test thefloating gate transistor cells are continuously erased and pro-grammed. Both the erase and the program operation are closedloop operations. The firing of high voltage pulses is not stoppeduntil the threshold distribution is shifted back to its nominal po-sition.

This closed loop restoration of the nominal threshold distri-bution calls for preventive data refresh by erase/program opera-tion, to be executed before the dose proportional threshold shiftreaches a critical value, e.g., in space after every 20 krad of doseaccumulation.

VII. TID REFRESH TEST

Under continuous irradiation 128 blocks of two DUTs wererefreshed every 4.5 krad, two other DUTs every 9 krad, twoother DUTs every 18 krad and the last two DUTs every 36 krad.Refresh at every accumulation of 4.5, 9 or 18 krad resulted inno errors up to irradiation stop at 72 krad (Fig. 5). All 8 DUTswere still fully functional at irradiation stop.

In contrast refresh after 36 krad resulted in 36 errors of oneDUT, i.e., an error percentage of about 1 , and no errors ofthe other DUT. This is in accordance with the outcome of theStorage Test. There the most sensitive DUT delivered the firsterrors between 20 and 30 krad.

The DUT which showed no errors before refresh at 36 krad,showed also no errors at 72 krad. Unfortunately, the DUT whichshowed errors before refresh at 36 krad could be irradiated only

Fig. 5. Percentage of Data Errors in Refresh Mode, Samsung 8 Gbit RefreshInterval 4.5, 9, 18 krad: Unbiased and Biased 5 DUTs, each; Refresh Interval� �� ����: Unbiased and Biased 3 DUTs, each. Open symbols indicate “Noerrors at this dose value”.

Fig. 6. Standby Current versus Dose in Storage/Refresh Test Mode, Samsung8 Gbit. Gray curve and gray scale on the right side: Most distinct increase duringWear Out Test (ST 4 Gbit) Double lines: Irradiation stops at approx. 30 krad and39 krad during Wear Out Test.

up to 57 krad because of beam time limitations. Up to this doseit did not show any errors.

As expected, data refresh after every dose accumulation ofshifts the error occurrence to high dose values, possibly

up to the final dose induced function loss. In our first TID testcampaign we observed functional loss of the 8 Gbit SamsungNAND-Flash between 65 krad and 90 krad.

VIII. STANDBY CURRENT VERSUS DOSE

Fig. 6 displays the standby current range of 8 “AlwaysBiased” DUTs and of 10 “Mostly Unbiased” DUTs versusdose, measured in Storage and Refresh Test. Both, the currentincrease with dose and the variation between the samples arerather minor.

In contrast all DUTs exercised in the Wear Out Test showeda significant increase of the standby current. The most distinctincrease (ST 4 Gbit) up to the limit of the measurement setup(approx. 1800 ) is also plotted in Fig. 6. It seems that theoperational stress works together with dose accumulation. Aftera beam stop of about 14 hours at 30 krad exercising of the same

1940 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 56, NO. 4, AUGUST 2009

Fig. 7. Standby Current versus Dose in Wear Out Test, Samsung 8 Gbit. Dashedlines: Start of exercising a fresh block at a new address. Double lines: Irradiationstops at approx. 30 krad and 39 krad.

Fig. 8. Standby Current versus Dose in Wear Out Test, Samsung 4 Gbit. Dashedlines: Start of exercising a fresh block at a new address. Double lines: Irradiationstops at approx. 30 krad and 39 krad.

block was resumed. Within the idle time of 14 hours annealingcaused a current drop of about 10%.

In Fig. 7 the current increase of a Samsung 8 Gbit DUT duringWear Out Test is plotted. The gaps in the plot are due to idle timeintervals between reaching of the wear out at the exercised blockand the start of exercising a fresh block. The most right curverepresents the situation that a fresh block is exercised after onlyvery short time gap. In this case the steep increase of the standbycurrent is continued.

In the case of larger idle time intervals the standby currentstarts at a low base level, but it increases steeply with the doseduring the exercising of the fresh block. This seems to indicatethat the memory of the previous radiation stress is not blockspecific, but is situated in peripheral circuitry which is commonto all blocks.

In contrast Samsung 4 Gbit DUTs showed a direct continua-tion of the current curve in the case of exercising a fresh blockafter an idle time in the order of an hour (Fig. 8). In principalthis behavior is similar to that of the ST 4 Gbit DUT, but thecurrent increase with dose is much more moderate.

In our view the behavior of the standby current in the WearOut Test is still to be studied in more detail.

IX. SUMMARY

TID tests of an advanced 8 Gbit NAND-Flash device havebeen performed. The occurrence of spurious single bit errorsis strongly device dependent. It starts between 20 krad and 60krad in the case of no refresh operation. Performing a read/erase/program refresh after every 20 krad no errors occur up to at least70 krad, and possibly up to the functional device failure. Thisadvocates for occasional data relocation in the case of long-termstorage in a high dose environment.

The erase/program cycle count up to wear out was alwayssubstantially above the data sheet value of . It proved to beindependent of the accumulated dose.

The standby current during the Storage/Refresh Tests showedonly a slight increase with the dose, in contrast to the signifi-cant increase during the Wear Out Test. This discrepancy willbe studied by a future TID test.

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