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Signal Integrity Signal Integrity Advantages of HDI Advantages of HDI
TechnologyTechnologyby
Happy Holden / Westwood/NanYa&
Dr. Eric Bogatin / GigaTest Labs
Copyright 2001 Westwood Associates
Overview
HDI Design & PerformanceShorter Interconnects
HDI Dielectrics
VIP & Surface Gnd Planes
Fine-pitch Components
Case Study on HDI Advantage
Dr. Eric Bogatin-GigaTest Labs
Copyright 2001 Westwood Associates
The Design Challenge for
High Performance
HDI's ADVANTAGES
Signal IntegrityComponentsMaterialsStackupAssembly
Lower CostsLower Costs Reduces Layers Higher Density At A Lower Cost
Reduces Size
Ease of Use For BGAs
Improved MechanicalsImproved Mechanicals
For Advanced PackagesFor Advanced Packages Required for Flip Chip
Higher Layout Efficiency
Essential for Chip Scale Packages
Faster Time To MarketFaster Time To Market
Performance ImprovementsPerformance Improvements
Improved Reliability
Product Miniturization
Increased Thermal Efficiency
Faster Layouts
Lower RFI / EMI Improved Signal Integrity
Increased Wiring Density
Copyright 2001 Westwood Associates
HDI features Signal quality
Cross talk
Switching Noise
EMI
Short interconnect lengths X X
Low dielectric constant X X
Small vias and small features X X
Vias in pads X
Fine lines and thin dielectric X X X
Support for fine-pitch components
X X
HDI Features and SI Problems
They Help Solve
Reduction of noiseReflectionsCrosstalkSimultaneous switchingEMI reductionImproved signal propagation and lower attenuation
Copyright 2001 Westwood Associates
New HDI Via Structures
Via-In-Pad
Coincident vias
Adjacent vias
Inset vias
Copyright 2001 Westwood Associates
before after
Via-In-Pad Area Reduction
40% reduction in area, 33% reduction in layers
Copyright 2001 Westwood Associates
before after
Via-In-Pad Area Reduction
Copyright 2001 Westwood Associates
HDI Material Options
Uni-directional Glass
Non-woven PTFE
Woven Glass
Reinforced Non-Reinforced
PhotoimageableNon-Photoimageable
Resin Coated
Cu-Foil
Dry film or Liquid Dielectric
Foil-based
Dry Film
Liquid Non-woven Aramid
Material Options by Reinforcement
Copyright 2001 Westwood Associates
Microvias-HDI's Primary Feature
3 mil blind via inPo lym ide·
drilled through copper/dielectric with UV-YAG
ITRI Project Sample
CO2 lasered cavity
Plasma via in RCC
Photodielectric via
CO2 lasered blind via
Copyright 2001 Westwood Associates
Advantages Planes on Outerlayers
conventional TH (pads and lines on OL):
power plane
component
pads on Outerlayer
ground plane
loop area is size of componentbreakout & stackup
power plane
loop area is size of component, pad and blind via
component
pads on Outerlayer
VIP, planes on Outerlayer:
ground plane
shielding for RFI (radio frequency interference) because of stripline structurecontrolled impedance on all signal layers possible→→you can put 1 signal layer or 2 perpendicular signal layers between 2 planesdecreased loop area→→improved RFI performance
Copyright 2001 Westwood Associates
Ground Loops:Thruvias Vs Microvias
Micro-via, outer layer ground/pads
Conventional inner layer ground
Copyright 2001 Westwood Associates
676 Pin, 1.0 mm pitch BGA
Support for Fine-Pitch
(d) IPC Type II stackup, 1 + N + 1 w/variable depth vias
232 Pin, 0.65 mm pitch BGA
384 Pin, 0.8mm Pitch BGA
(d) IPC Type II stackup, 1 + N + 1 w/ stacked vias and variable depth vias
Copyright 2001 Westwood Associates
PCB Paradigm Switch
Application: High Speed Optical Network for Multiple Airborne Computers, 10 Gb/sec
11.75" x 8.75" (2-up on panel)0.092", FR-4, controlled impedance18 Layer- 8 signal1410 parts10530 leads102 leads/sq.in6560 lin. inches17% layout eff. 8.3 in. per sq. in per layer5/5, 12,568 @ 13/25 (trace/space, holes/lands)
The "old" paradigm: Through-HolesSize:Thickness:Layer:No. of Components:No of Connections:Assy Density:Wiring Length:Layout efficiency:Design rules:
9.2" x 6.3" (4-up on panel)0.072", Low Dk and Dj, controlled impedance10 Layer (1+8+1)- 6 signal1621 parts12456 leads216 leads/sq.in6028 lin. inches42% layout eff. 18.6 in. per sq.in. per layer5/7, 13,000 @ 6/12 & 4356 @ 13/25 (trace/space, uvia/land & bur via/land
The "new" paradigm: Microvias - HDISize:Thickness:Layer:No. of Components:No of Connections:Assy Density:Wiring Length:Layout efficiency:Design Rules:
Copyright 2001 Westwood Associates
New 10 Layer HDI Multilayer
1+8+1, 0.062", 9.2" x 6.3"
Copyright 2001 Westwood Associates
New 10 Layer HDI Multilayer
Replaces a 18 Layer, 0.092", 11.0" x 8.0"
Copyright 2001 Westwood Associates
New 10 Layer HDI Multilayer
1. SMT/GND2. Sig_1/PWR3. Sig_24. PWR5. Sig_36. Sig_47. PWR8. Sig_59. Sig_6/PWR10. SMT/GND
35% smaller, 44% fewer layers, 33% thinner,10% more components , 25% shorter design time
AND 43% less expensive
9. PWR10. PWR11. GND
14. GND
Sig
1. SMT2.GND3. Sig _14. Sig _25. GND6. Sig _37. Sig _48. GND
12. Sig _513. Sig _6
15. Sig _716. _817. GND18. SMT
10 Layer1621 parts12456 leads216 leads/sq.in6028 lin. inches42% layout eff.
18 Layer1410 parts10530 leads120 leads/sq.in6560 lin. inches28% layout eff.
Copyright 2001 Westwood Associates
Additional Information
Copy of the paper and EMC slides are available on the IEEE Web site,
www.ieee.org/RMCEMC
or
my FTP Box
atftp://[email protected] (passwd:memory) [MS Internet Exployer]
ftp://user17:[email protected]/users/user17/ [Netscape]
see the "FTP Table of Contents.xls"