Semi-Z-source inverter topology for grid-connected photovoltaic

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Published in IET Power ElectronicsReceived on 25th March 2013Revised on 25th June 2014Accepted on 17th August 2014doi: 10.1049/iet-pel.2013.0486

T Power Electron., 2015, Vol. 8, Iss. 1, pp. 63–75oi: 10.1049/iet-pel.2013.0486

ISSN 1755-4535

Semi-Z-source inverter topology for grid-connectedphotovoltaic systemTofael Ahmed, Saad Mekhilef

Power Electronics and Renewable Energy Research Laboratory (PEARL), Department of Electrical Engineering, Faculty of

Engineering, University of Malaya, 50603 Kuala Lumpur, Malaysia

E-mail: [email protected]

Abstract: Transformer-less inverters are necessary parts for grid-connected renewable energy resources. Owing to its costeffectiveness, downsize and less weight, great attention has been paid to these inverters development. With theseaforementioned advantages, these inverters have limitations like the flow of leakage current through photovoltaic arrays, hightotal harmonic distortion (THD) at inverter’s output and DC current injection to the grid. This study presents coupledinductor-based single-phase transformer-less semi-Z-source inverter topology to lessen those limitations. Since the DC inputand AC output voltage share a common ground, the presented inverter system is categorised under doubly groundedtopologies. For the purpose of handling, the non-linearity of the voltage gain of semi-Z-source inverter, a non-linearsinusoidal pulse-width modulation technique has been employed. The prototype of the suggested inverter has beenconstructed. The performance and compatibility of modulation technique are verified under different loading conditions. Thefeasibility of the configuration is ensured based on the mitigated common-mode leakage current, the substantially lower THDas well as DC current injected to the grid. Moreover, the presence of coupled inductor significantly contributes in reducinginput current ripple, installation area of the inverter and enhancing the efficiency. Finally, this topology exhibits appreciableperformance to operate synchronously and transfer power to the grid.

1 Introduction

Renewable energy resources (RERs), like wind turbine, solarphotovoltaic (PV) and fuel cell are becoming more and morepopular in recent era. This is because of the increasingdemand of the clean energy, rapid development of ruralarea and the concern regarding environmental pollutionaround the world. As a result, power supplied to the utilitygrid, especially single-phase low-power systems (≤5 kW)from RER is demanding. These RERs are only capable ofproducing DC voltage at the output, while to connect theseRER with grid, these require AC voltage at the output.Therefore inverters are required to place in between RERand grid to regulate power conversion and controloptimisation [1, 2].Isolated and non-isolated inverters are widely used for

connecting RERs with utility grid. The problems of usingthese isolated inverters are not only the high system costand larger system size but also reduced overall efficiency ofthe system. The reason behind these disadvantages is thepresence of transformers in the system with line or highfrequency for electrical isolation [3]. In contrast, use ofnon-isolated inverters reduces both cost and size along withimproved system efficiency. Presently, the requirement ofgalvanic isolation is almost obsolete from low-voltageutility grid. Hence, transformerless inverters have turnedinto the market mainstream [4–6]. However, transformerlesssystems require some safety issues to be considered, likeminimisation of connection effect between the input DC

source and the grid as well as DC current injection to theutility grid. If same ground is not shared by both the PVcell and the grid, a variable common mode voltage isdeveloped. As a result, large common-mode leakage currentmay flow through the parasitic capacitor between PV arrayand the ground which in turns, reduces the current qualityof the grid, rises the system losses and induceselectromagnetic interference (conducted and radiated) [6–9].Conventionally, half or full-bridge inverters have been

used to mitigate the problem of common-mode leakagecurrent using bipolar sinusoidal pulse-width modulation(SPWM). So that, no variable common mode voltage isgenerated. However, half-bridge inverter requiresapproximately more than 700 V of the DC voltage toproduce 220 Vac at the output. Hence, series connections oflarge number of PV arrays or high conversion ratio DC–DCconverter are required. On the other hand, the full-bridgeinverter topology requires 50% of the input voltage thanthat of half-bridge topology (approximately greater than350 V for 220 Vac) [9]. However, the disadvantages offull-bridge inverter topology are high-current ripple, lowerefficiency and large filter inductor. Another way to solvethe common-mode leakage current problem is to use doublygrounded topologies. The advantages of these topologiesare simple circuit design, low investment cost and enhancedsafety [6, 7, 10]. Hence, in this paper, preference has beengiven to the doubly grounded transformerless topology.On the contrary, some operational issues also need to be

taken into consideration for transformerless grid connected

63& The Institution of Engineering and Technology 2015

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systems in order to maintain power quality. Such operationalissues contain total harmonic distortion (THD), outputcurrent regulation and DC current injection. The IEEE andthe IEC standards have provided some limit on the maximumrange of THD and injected DC current [11, 12]. Acuteattention is needed for the DC current injection because thismay flow through distribution transformer, energy meters andresidual current devices [13–15]. Otherwise, DC currentcause saturation to distribution transformer, decrease theefficiency of the system, error in the measurement of energymeter and protective equipment starts malfunctioning. Thestandard values of DC current injection are different aroundthe world. This limit varies from 5 mA to 1 A where 5 mA isfor UK and 1 A for Germany [16, 17]. In contrast, the limitof DC current injection is 0.5% of the rated output current ofthe inverter for USA and 1% of the rated output current ofthe inverter for Japan [11, 12].On the other hand, enhancement of the performance of
these transformerless inverters is possible by designing thepassive components of the inverter. Most importantly,inductor design is important to improve the performance. Itis found that choosing of coupled inductor than separatedinductor is best choice for the betterment of inverterperformance [18–23]. Also, the role of coupled inductor isvery significant in the modern high-frequency switchinginverters topology. Since, coupled inductors have the abilityto reduce the input current ripple, output voltage ripple andminimise the inverter size. Moreover, the inverter thatcontains coupled inductor can respond faster to loadtransient and can decrease the output decouplingcapacitance. As coupled inductor minimises the ripplecurrent, it can also minimise the core loss [18–23].To improve the performance and lessen the cost, many

transformerless inverter topologies based on traditionalinverter and Z-source or quasi-Z-source inverters have beenpresented and analysed for renewable energy distributedgenerators especially for PV application in [14, 24–35].Doubly grounded features are not included in most of thesetopologies. Recently, in [36], semi-Z-source inverter forsingle-phase PV system has been proposed, which showsthe ground sharing option between grid and inverters.However, in [36], only the working principle ofsemi-Z-source inverter with respect to resistive load hasbeen presented. Although, it is mentioned that, this inverter

Fig. 1 Discontinuous voltage gain and Continuous voltage gain

a, b Z-source and quasi-Z-source DC–DC convertersc, d Z-source and quasi-Z-source DC–DC converters


is applicable to incorporate solar PV to utility grid, but theresults of grid tie application has not presented in [36]. Inaddition, the power quality issues during grid connectedapplication like THD and DC current injection have notexpressed. Also the features of coupled inductors techniquehave not illustrated. Another study in [37], discussed aboutthree-switch three-state single-phase Z-source invertertopologies. However, the performance of the inverter underdifferent loading conditions along with the analysis of THDand DC current injection has not included in [37].A single-stage transformerless semi-Z-source inverter

topology for grid connected application is presented in thispaper by considering coupled inductor technique. Thebenefit of this semi-Z-source inverter topology overtraditional single-phase full-bridge inverters and Z-source orquasi-Z-source inverters is, to generate sinusoidal voltage atthe output of semi-Z-source inverter needs only twoswitches. Beside this, it contains Z-source network in ACside of the semi-Z-source network, which is different fromconventional topology and results in size minimisation. Thefeasibility of the inverter topology has been analysed notonly for static load like R, R–L but also for dynamic loadlike single-phase induction motor and grid. This inverteraims to minimise the common-mode leakage current withits ground sharing features. It also ensures less THD andDC current injections to the grid by utilising the coupledinductor techniques. In addition, the presentedsemi-Z-source inverter topology maintains appreciable DCto AC conversion efficiency compared with theconventional inverter and semi-Z-source inverter in [36] byutilising the coupled inductor techniques. On the contrary,the coupled inductor contributes in minimising size of theinverter. To generate sinusoidal voltage at the output, ituses the non-linear sinusoidal voltage gain curve as voltagereference. For this, a non-linear SPWM technique is used toobtain necessary control signal to generate sinusoidal voltage.Section 1 contains an introduction specifying the rational

of the project described in this paper. Basic principles ofthe transformerless semi-Z-source inverters are brieflydescribed in Section 2 followed by the modulationprinciples in Section 3. Section 4 provides requiredequations for design. Section 5 describes the importantdetails of experimental setup as well as the results obtainedand their discussion. Also this section shows the distortionfactor enquiry followed by power losses and efficiencyanalysis. At last, Section 6 includes the conclusion drawnfrom all the above discussed section.

2 Basic principle of transformerlesssemi-Z-source inverter

Topologies of the DC–DC converters of Z-source andquasi-Z-source are shown in Fig. 1 with the ground sharingnature [30]. Discontinuous voltage gain curve for convertersof Figs. 1a and b are shown in Fig. 2a. While, Fig. 2bshows the continuous voltage gain curve of the topologiesshown in Figs. 1c and d. Alternating (positive and negative)voltage can be generated by all these topologies at theoutput when duty ratio varies in between 0 and 1. However,generation of positive and negative voltages at the outputwith continuous voltage gain curve can be done only bythe topologies shown in Figs. 1c and d. Hence, withappropriate modulation strategy these two topologies can beused as inverter as like as the traditional full-bridge inverter.This inverter can generate voltages between –Vin to +Vin at

IET Power Electron., 2015, Vol. 8, Iss. 1, pp. 63–75doi: 10.1049/iet-pel.2013.0486

Fig. 2 Discontinuous voltage gain, continuous voltage gain curves and single-phase semi-Z-source inverters

a Discontinuous voltage gain curve of Z-source and quasi-Z-source DC–DC convertersb Continuous voltage gain curve of Z-source and quasi-Z-source DC–DC convertersc, d Single-phase semi-Z-source inverters

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the output while the duty cycle changes remains in between 0and 2/3.Based on the aforementioned discussions, topologies of the

single-phase semi-Z-source inverters with coupled inductorare shown in Figs. 2c and d. From the duty cycle againstvoltage gain curve shown in Fig. 3a, it is clear that whenthe duty cycle of switch S1 varies from 0 to 1/2, theinverters can provide positive voltage at the output,whereas, from 1/2 to 2/3 the output voltage is negative [36].For the duty cycle of 1/2, the inverter produces zero voltageat the output. Figs. 3b and c show the two states ofoperation, respectively. In state I, switch S1 conducts whereinput voltage source and capacitor C1 charge the twoinductors. For state II, switch S2 conducts and twoinductors have turned into sources.The direction of current references of the inductor and the

voltage references of the capacitor are mentioned in Figs. 3band c for the following steady-state equations. Details of themodes of DC operation are shown in [30]. The steady-stateequations can be derived based on inductor voltage-secondbalance and capacitor charge balance principle. Thesteady-state equations are as follows

Vo

Vin= 1− 2D

1− D(1)

VC1= D

1− DVin (2)

IL2 = −Io (3)

IL1 = − D

1− DIo (4)


If it is assumed that, inverter output voltage is (5) then themodulation index can be expressed as in (6). Equation (7)has been derived from (1), (5) and (6). D′ = 1–D, the dutycycle of switch S2, which can be expressed as (8)

Vo = V sin vt (5)

M = V

Vin(6)

D = 1−M sinvt

2−M sinvt(7)

D′ = 1

2−M sinvt(8)

3 Semi-Z-source inverters modulationprinciple

Traditional full-bridge inverter has straight line relationbetween duty cycle and voltage gain. For this reason, togenerate sinusoidal voltage at the output SPWM techniqueis used. However, there is a non-linear relation betweenvoltage gain and duty cycles of semi-Z-source inverters. Forthis reason, a non-linear SPWM is used to generatesinusoidal wave as shown in Fig. 3d [36]. A derivedreference voltage is shown in (8) to control the duty cycleof switch S2. To turn on switch S2, it is necessary thereference value should be greater than carrier value.Equation (7) shows the reference signal of S1, which iscomplementary of S2 and the range of the modulation indexis between 0 and 1. Fig. 3d shows the switching signals of


Fig. 3 Semi-Z-source inverters

a Voltage gain of single-phase semi-Z-source invertersb Modes of operation of semi-Z-source inverters at state Ic Modes of operation of semi-Z-source inverters at state IId Modulation methods of semi-Z-source inverters

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the switches S1 and S2 at the time when the modulation indexis 2/3.

4 Design and analysis of the circuitparameter

Configuration of semi-Z-source inverter shown in Fig. 2d hasbeen chosen to analyse various parameters and designconsideration of the circuit component. Let the outputcurrent expressed in (9) is in phase with output voltage.Voltage across the switch during the OFF state and currentthrough the switch during the ON state can be presentedlike (10) and (11). From (10) and (11), the maximum OFFstate voltage across the switch and maximum ON statecurrent through the switch can be calculated. For thisinverter topology, although the switches need to withstand ahigh voltage it can be applied with high-voltage siliconcarbide (SiC) switches [38, 39]

Io = I sinvt (9)

VS = Vin + VC = 1

1− DVin = (2−M sinvt)Vin (10)

IS = IL1 + IL2 = − 1

1− DIo = −(2 sinvt −M ( sinvt)2)I

(11)


Voltage across capacitor C1 and current through inductor L1can be stated by (12) and (13), which are derived from (2),(4), (7) and (9). Voltage ripple of the capacitor C1 and thecurrent ripple of the inductor can be dictated by (14) and(15) considering L1 = L2. Now, from (12) and (14), thevalue of capacitance C1 and from (11) and (13), the valueof inductance L1 can be selected considering the peak ripplerequirement of the voltage and current, respectively. Owingto page limit, details of the design procedure has notprovided here. For detail design procedure, one can gothrough [36]

VC1= D

1− DVin = (1−M sinvt)Vin (12)

IL1 = − D

1− DIo = −( sinvt −M ( sinvt)2)I (13)

DVC1= (1− D)Ts IL1

C1= − sinvt +M ( sinvt)2 Ts I

(2−M sinvt)C1(14)

DIL1 = DIL2 =Vin Ts D

L1= VinTs(1−M sinvt)

L1(2−M sinvt)(15)


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5 Experimental design
For the purpose of experimental validation, a prototype rated48-W, 50 Hz transformerless semi-Z-source inverter isconstructed according to the diagram shown in Fig. 2d. Theconstructed laboratory prototype model of thetransformerless semi-Z-source inverter system is shown inFig. 4. The input voltage of this prototype is about 50 Vand the output voltage is about 35.35 V. The switchingfrequency of this system is 50 kHz. Here, for the prototype,two MOSFETs (STP75NF20) are chosen as switches. Thevalues of both the capacitors C1 and C2 are 4.7 µFconsidering voltage ripple is limited to 5.75% of the peakvoltage across the capacitors. For the prototype, polyesterfilm capacitors (MPE475 K) are chosen. Performancereal-time target machine (SPEEDGOAT) has been used toproduce the switching signals for the inverter.As mentioned earlier, the most essential components for

semi-Z-source inverter are inductor that not only protect theinput voltage source but also limit the input current ripple ofthe inverter. Inductor also serves the purpose of output filter.Two inductors (L1 and L2) used in semi-Z-source inverterscan be placed in a single core or in two different cores. Tominimise the input current ripple and to reduce the size,coupled inductor method is chosen for the prototype byensuring identical current flow. For high frequency operation,ferrite materials have the low loss feature and for this,magnetic core of ferrite materials (45528EE) is chosen forthis prototype. To prevent the inductor core from saturationunder load, an air gap is used within the core structurebecause; the energy is being stored in air gap, which willprevent the core from saturation under load. The values ofthe inductor L1 is 400 µH considering current ripple limitedto 1/3 of the peak current of the inductor. The values of theinductor L2 is also 400 µH that can be calculated by thesame procedure. Finally, the THD of the output voltage andcurrent has been analysed using YOKOGAWA WT 1800precision power analyser.Experimental results of the laboratory prototype model of

48-W transformerless semi-Z-source inverter are shown in

Fig. 4 Most important components of the experimental setup of semi-Z


Figs. 5–10. The prototype has been tested under R load,R–L load and motor load. During the laboratory experiment,about 50 V input voltage has been applied and themodulation index has been fixed to 0.95. Around 27 Ωresistance and 285 mH inductance have been used as load.Also, a single-phase induction motor (1/4 Horse power, 50Hz, 220 V, 2.84 A and RPM-1450) from MitsubishiElectric has been used as load.Experimental results for R load are shown in Fig. 5. Fig. 5a

shows the gate to source voltage VGS1 of switch S1, drain tosource voltage VDS1 of switch S1, output voltage Vo andoutput current Io during R load condition. Zoomed versionof Fig. 5a is depicted in Fig. 5b. VGS1 and VDS1 of switchS1 are operating in completely reverse according to thegiven figures. In addition, there is no phase differencebetween output voltage and output current. Moreover,output voltage polarity changes with the change of dutycycle of the switch, which satisfies the theoreticalbackground. Drain to source voltage VDS1 of switch S1,drain to source voltage VDS2 of switch S2, output voltage Vo

and output current Io are shown in Fig. 5c. Fig. 5drepresents zoomed view of Fig. 5c. It can be said that, likethe theoretical background these two switches are operatingin complementary manner with 50 kHz switching frequencyand maximum off state voltage across the switches are 150 V.Fig. 6 illustrates the experimental results for R–L load.

When R–L have been considered as load, except for outputcurrent and voltage the remaining results are almost samelike R load. It observed from Figs. 6a and c that the outputcurrent is lagging the output voltage and the magnitude ofthe output current decreases as the load increase.Waveforms of input voltage Vin, voltage across capacitor

C1, output voltage Vo and output current Io for R and R–Lloads are shown in Figs. 7a and b, respectively. These twofigures illustrate that, peak capacitor voltage is twice theinput voltage for both the R and R–L loads. Moreover, boththe positive and negative peak values of the output voltageare equal to the input voltage. Furthermore, duringexperiment the input voltage has been measured betweenDC + terminal and ground for both the R and R–L loads.

-source inverter


Fig. 5 Experimental waveforms for R load

a Gate to source voltage, drain to source voltage, output voltage and output currentb Zoomed in waveform of gate to source voltage, drain to source voltage, output voltage and output currentc Drain to source voltage of two switches, output voltage and output currentd Zoomed in waveform of drain to source voltage of two switches, output voltage and output current

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Figs. 7a and b display that for both the R and R–L loadscondition, the input voltage Vin is almost constant andcontains no high frequency variation. As a consequence, thegeneration of common mode voltage is minimised, which inturns results in reduction of common-mode leakage current.The voltage across capacitor C1, current through inductorL1, output voltage and output current of the inverter forboth the R and R–L loads are shown in Figs. 7c and d,respectively. Both the figures notified, voltage developedacross the capacitor C1 followed by the inductor current IL1and inductor current is approximately twice the outputcurrent for both the load conditions.Fig. 8 illustrates the condition when a single-phase

induction motor has been applied as load at the output ofinverter. Fig. 8a shows the waveforms of input voltage Vin,output voltage Vo and output current Io at the startingcondition of the motor. Meanwhile, Fig. 8b shows the samewaveforms when the motor operates at one of thesteady-state condition of motor. It is seen from these twofigures that, motor draws high current during starting assingle-phase induction motor requires high current densityat the auxiliary winding during starting. For this reason, the


output voltage and current of the inverter have somedistortion at the starting condition. Whereas, at steady-statecondition it draws less current from inverter which in turns,reduce the distortion of output voltage and current. It canalso be seen that, the output current is lagging the outputvoltage for both the starting and running conditions for themotor load.THD and harmonic spectrum of the output voltage and

current for R, R–L and motor loads (starting andsteady-state condition) are displayed in Figs. 9a–d,respectively. It can be depicted from Figs. 9a and b that, forR load the inverter produces RMS output voltage of35.94 V with THD of 4.506% and RMS output current of1.30 A with THD of 4.50%. While for R–L load theinverter produces RMS output voltage of 35.76 V withTHD of 1.16% and RMS output current of 0.315 A withTHD of 1.68%. In case of R load, the inverter supplies realpower of 46.76 W at unity power factor. On the other hand,the inverter supplies real power of 3.68 W and reactivepower of 10.62var for R–L load. In addition, for both the Rand R–L loads condition, THD’s are within the limit (<5%),no occurrence of DC current component and percentage of


Fig. 6 Experimental waveforms for R–L load

a Gate to source voltage, drain to source voltage, output voltage and output currentb Zoomed in waveform of gate to source voltage, drain to source voltage, output voltage and output currentc Drain to source voltage of two switches, output voltage and output currentd Zoomed in waveform of drain to source voltage of two switches, output voltage and output current

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higher order harmonic components are very negligible at theoutput. On the contrary, Fig. 9c shows the THD and harmonicspectrum at the starting condition of motor load. Whereas,Fig. 9d shows the THD and harmonic spectrum when themotor load has been operated at one of the steady-stateconditions of motor. At the starting of the motor, theinverter produces RMS output voltage of 32.26 V withTHD of 9.93% and RMS output current of 2.65 A withTHD of 10.49%. Whereas, at the steady-state condition theinverter produces RMS output voltage of 40.25 V withTHD of 0.834% and RMS output current of 0.38 A withTHD of 5.48%. At the starting of motor, the output voltageand current of inverter contains high THD because, motorstator winding of single-phase induction have highharmonic distortion during starting [40]. However, duringthe steady-state condition, the output voltage contains veryless THD and current contains slightly greater than 5% asthe motor does not run in rated speed here. It is also seenfrom these figures that, the inverter supplies real power of68.70 W and reactive power of 50.91var at 0.80 powerfactor during starting of motor load. Furthermore, duringthe steady-state condition of motor, the inverter supplies


real power of 4.90 W and reactive power of 14.27var at0.33 power factor. In addition, the inverter is capable ofsupplying not only real power but also reactive power atlow power factor and output contains no DC components aswell as higher order harmonics.Finally, the prototype of the inverter has interfaced with the

low voltage utility grid to observe the power transfer insynchronous mode. During interfacing with the grid inlaboratory condition the utility grid voltage has been taken50 Vac with frequency of 50 Hz. Synchronous operationbetween grid voltage and inverter output voltage is shownin Fig. 10a. Fig. 10b shows the experimental waveforms ofgrid voltage and grid current during full-load condition. Itshows that, there is no phase difference between thesinusoidal output current of inverter or grid current and thegrid voltage. Experimental waveforms of input voltage Vin,voltage across capacitor C1 and output current Io of theinverter during grid interfacing are shown in Fig. 10c. Thisfigure depicts that, during grid tied application input voltageis almost constant and contains no high frequency variation,which means that the generation of common mode voltageis minimised, which results in the generation of common


Fig. 7 Input DC voltage, capacitor C1 voltage

a Output voltage and output current for R loadb Output voltage and output current for R–L loadc Inductor L1 current, output voltage and output current for R loadd Inductor L1 current, output voltage and output current for R–L load

Fig. 8 Input DC voltage, output voltage and output current at the

a Starting condition of motor loadb Steady-state condition of motor load

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Fig. 9 THD and harmonic spectrum of output voltage and current

a For R loadb For R–L loadc At the starting condition of motor loadd At the steady-state condition of motor load

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mode current. Also it shows that, peak values across thecapacitor is double of input voltage and inverter outputcurrent or injected grid current is almost sinusoidal. THDand harmonic spectrum of the inverter output voltage andinjected grid current during interfacing with the grid areshown in Fig. 10d. It can be seen from this figure that, theinverter transfers power of 44.19 W and injected gridcurrent have THD of 4.58%. During this time, the invertershows almost unity power factor. In addition, percentagesof higher order harmonic components are very negligibleand no occurrence of DC current during transferring powerto the grid. Hence, it is observed that the inverter is capableof transferring power to the grid by maintaining the powerquality issues. Because, the coupled inductors have theability to reduce the input current ripple, output voltageripple and can decrease the output decoupling capacitance,which results in the power quality issues improvement.The sum up of the above discussions is, the transformerless

semi-Z-source inverter generates sinusoidal voltage at theoutput by utilising only two switches where this number isfour for traditional single-phase full-bridge inverters and


Z-source or quasi-Z-source inverters, which minimises thecost. Also, this inverter is capable of working under staticas well as dynamic load. For grid connected application, thedesigned transformerless semi-Z-source inverter injects lessvoltage as well as current harmonics (<5%) and no DCcurrent component to the grid, which follows the IEEE andIEC standards as stated in [11, 12]. Moreover, thistransformerless topology is rarely affected by the higherorder harmonics. Furthermore, this inverter can exhibitsstable operation for supplying both the real and reactivepower till violation of maximum rating of thesemiconductor devices and passive components. Finally,utilisation of coupled inductor techniques and the Z-sourcenetwork in AC side rather than DC side ensures the totalsize minimisation of the presented semi-Z-source inverter.

5.1 Distortion factor (DF)

DF refers to the total distortion of any waveform consideringall the harmonics and noise contents of that waveform.Voltage distortion factor (VDF) and current distortion (IDF)


Fig. 10 Experimental waveforms of

a Inverter output voltage and grid voltageb Grid voltage and grid currentc Input DC voltage, capacitor C1 voltage and output current during interfacing with gridd THD and harmonic spectrum of output voltage and current during interfacing with grid

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factor can be defined as the following equations

VDF(%) =��V 2h02 + V 2

h03 + V 2h04 + · · · + V 2

hn

V 2rms

√× 100%

=��V 2rms − V 2

h01

V 2rms

√× 100% (16)

IDF(%) =��I2h02 + I2h03 + I2h04 + · · · + I2hn

I2rms

√× 100%

=��I2rms − I2h01

I2rms

√× 100% (17)

where Vh01, Vh02, Vh03, ..., Vhn are the amplitude offundamental, 2nd, 3rd, …, nth harmonics of voltage andIh01, Ih02, Ih03, …, Ihn are the amplitude of fundamental,2nd, 3rd, …, nth harmonics of current. By using (16) and(17), DF can be calculated and Table 1 shows the values ofDF for different load conditions.


5.2 Power losses and efficiency

Power loss and efficiency are very important factors forinverter design. Generally, two types of power lossesassociated with semi-Z-source inverter topology like powerlosses in semiconductor devices and power losses in inductor.

5.2.1 Semiconductor devices power losses ofsemi-Z-source inverter: Power losses analysis fortransformerless inverter efficiency evaluation has beenshown in [6, 41–44]. Equations (18) and (19) show thefirst-order conduction voltage drop model for MOSFET anddiode, respectively

vds(t) = i(t)Rds (18)

vak(t) = Vf + i(t)Rak (19)

where vds, Rds, Vf and Rak are the MOSFET drain–sourcevoltage drop, MOSFET drain–source on resistance, diodeequivalent voltage drop under zero current condition anddiode on resistance, respectively. Here, i(t) is the inverteroutput current as shown in (9). As stated earlier, the two


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switches of the semi-Z-source inverter are working incomplementary mode and the duty ratios of the switchs S1and S2 are shown in (7) and (8), respectively.Equation (20)–(23) show the conduction losses for
switches S1, S2, source–drain diode conduction losses of S1and source–drain diode conduction losses of S2, respectively

Ps1 MOSFET = 1

2p

∫p0i(t)vds(t)D(t) dvt (20)

Ps2 MOSFET = 1

2p

∫p0i(t)vds(t)D

′(t) dvt (21)

PSource Drain Diode S1 =1

2p

∫p0i(t)vak(t)D(t) dvt (22)

PSource Drain Diode S2 =1

2p

∫p0i(t)vak(t)D

′(t) dvt (23)

Most of the losses occur during drain-to-source switchingtransition of the MOSFET switch. Discharging of thejunction capacitor Coss of MOSFETs causes the capacitiveturn-on loss, which in turns, cause the switching loss. As in[45], the switching losses can be calculated from thefollowing equation

PSW MOSFET = 1

2IVds(td(on) + td(off ))fsw + 1

2CossV

2dsfsw (24)

where td(on),td(off), fsw and Coss are turn-on delay time, turn-offdelay time, switching frequency and output capacitance,respectively.Another important loss is the diode switching loss, which is

induced for reverse recovery energy of diode (EonD). (EonD)and the diode switching losses can be calculated from (25)and (26), respectively. By substituting the values fromdatasheet [46], the power losses of the two semiconductor(MOSFET) switches have been calculated

EonD =∫tr+tf

0vak(t)i(t) dvt ≃

1

4QrrVds (25)

Psw Source Drain Diode = EonDfsw (26)

where tr, tf and Qrr are rise time, fall time and reverse recoverycharge, respectively.

5.2.2 Inductor power losses of semi-Z-sourceinverter: Power losses across inductor take place becauseof core losses and winding losses. Semi-Z-source inverterwinding losses includes the conduction losses of DCresistance RDC and AC resistance RAC. Core losses of theinductor can be calculated from the data sheet [47] at

Table 1 Values of DF for different load

Load type Voltagedistortion factor

VDF, %

Current distortionfactor IDF, %

Voltage

R load 5.27 5.68 35.94R–L load 3.73 10.38 35.75motor load (startingcondition)

13.09 18.85 32.28

motor load(steady-statecondition)

6.06 16.59 40.24


applied switching frequency by calculating the peak-to-peakflux density by the following equation

DB = Vt

NAe(27)

where ΔB, V, t, N and Ae are flux density in Tesla, appliedvoltage to the winding in volts, time of applying voltage inseconds and cross-section area of core in square metre.The conducting losses for DC and AC resistance of the

inductors L1 and L2 can be calculated by using (28)–(31),respectively

PDC L1 = I2dc1Rdc1 = I2L1Rdc1 (28)

PDC L2 = I2dc2Rdc2 = I2L2Rdc2 (29)

PAC L1 = I2AC1RAC1 =DI2L112

RAC1 (30)

PAC L2 = I2AC2RAC2 =DI2L212

RAC2 (31)

To calculate the power loss of semi-Z-source inductor, DCand AC resistances have been measured by LCR meter(PINTEK LCR-900). The values of the DC resistance of thetwo inductors are RDC1 = 0.10 Ω and RDC2 = 0.09 Ω,respectively. AC resistance of the inductors have beenmeasured at switching frequency and the values are RAC1 =0.14 Ω and RAC2 = 0.135 Ω, respectively. After calculatingthe inductor power losses, total power losses ofsemi-Z-source inverter topology can be calculated bysumming semiconductor devices power losses and inductorpower losses.

5.2.3 Efficiency: After calculating the total losses ofsemi-Z-source inverter topology, the relative efficiency canbe calculated based on the following equation

Efficiency(%) = Pout

Pout + Ploss × 100%(32)

Also, for the prototype, the efficiency can be measured basedon the following equation

Efficiency(%) = Pout

Pin × 100%(33)

During the measurement of efficiency all kind of losses like,core and copper loss of the inductor, gate drive loss, switchingloss (turn on, turn off and diode reverse recovery interval)have been considered.

, V Current, A VTHD, % ITHD, % Realpower, W

Reactivepower, VAR

1 1.30 4.50 4.50 46.76 0.529 0.314 1.162 1.681 3.68 10.631 2.65 9.93 10.50 68.70 50.91

4 0.375 0.834 5.489 4.90 14.266


Table 2 Comparison of the loss mechanism in the traditional full-bridge inverter [47] and the semi-Z-source inverter topology

Traditional full-bridgeinverter [48]

Semi-Z-source inverter[36]

Semi-Z-source inverter(calculated)

Semi-Z-source inverter(measured)

power loss(Ploss), W

3.59 4.58 2.169 2.42

efficiency, % 92.68 90.45 95.56 94.96

www.ietdl.org

Table 2 shows the comparison of the power losses andefficiency between semi-Z-source inverter, traditionalfull-bridge inverter topology of [48] and semi-Z-sourceinverter in [36] for the instance when both the invertershave same output power ratings. It can be said the, theprototype of the presented semi-Z-source inverter have alesser amount of losses, which increases the efficiencycompared with the traditional single-phase full-bridgeinverter and semi-Z-source inverter in [36].

6 Conclusions

This paper describes a transformerless semi-Z-source invertertopology. This inverter topology is acceptable for interfacingRERs especially for solar PV with utility grid and supplyingstandalone PV power conditioner. By utilising semi Z-sourcenetwork; this topology employs only two active switches anda non-linear SPWM technique to generate required sinusoidalvoltage at the output. Coupled inductor techniques areincluded in the topology to limit the input current rippleoutput, output voltage ripple and decrease the outputdecoupling capacitance as well as to minimise the invertersize and enhance the efficiency. As the input and outputterminals share the same ground, the leakage current flowsthrough both grid and RERs obtain minimised. In additionto those, this low cost-compact inverter configuration couldensure the reduced THD of output voltage and currentwithout any filter and suppress DC current componentinjection to the utility AC grid line in spite of thetransformerless inter connection PV-conditioner by utilisingthe benefit of coupled inductor techniques. Also, for thedesigned prototype the calculated and measured powerlosses are 2.169 and 2.48 W, respectively, which helps tomaintain appreciable efficiency compared with thetraditional full-bridge inverter during DC to AC conversion.The performance of these topologies can be improved by

choosing efficient inductor design and can be expanded totwo-phase or three-phase, which will be capable to utilisethe total range of the duty cycle.

7 Acknowledgments

The authors thank the Ministry of Higher Education ofMalaysia and University of Malaya for providing financialsupport under the research Grant No. UM.C/HIR/MOHE/ENG/16001-00-D000024 and Fundamental Research GrantScheme (FRGS) Grant No. FP014-2014A.

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Semi-Z-source inverter topology for grid-connected photovoltaic