SEM REPORT.doc

8/20/2019 SEM REPORT.doc

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Low Power High Frequency SMPS Seminar Report 2015

CHAPTER 2

SWITCH MODE POWER SUPPLY

' witch !ode "ower upply is an electronic power supply that incorporates a switching

regulator to convert electric power efficiently. 8i#e other power supplies, an !" transfers

power from a source, li#e main power, to a load, such as a personal computer, while converting

voltage and current characteristics. 9nli#e a linear power supply, the pass transistor of a

switching mode supply continually switches between low*dissipation, full*on and full*o states,

and spends very little time in the high dissipation transitions, which minimizes wasted energy.1deally, a switch mode power supply does not dissipate energy. -oltage regulation is achieved

by varying the ratio of on to off time.

witch mode power supply converts the available unregulated ac or dc input voltage to a

regulated dc output voltage. 1n case of !" with input supply drawn from the ac mains, the

input voltage is rectified and filtered using a capacitor at the rectifier output. The unregulated

dc voltage across the capacitor is then fed to a high frequency dc*to*dc converter. !ost of the

dc*to*dc converters used in !" have an intermediate high frequency ac conversion stage tofacilitate the use of a high frequency transformer for voltage scaling and isolation. 1n contrast,

in linear power supplies with input voltage drawn from ac mains, the mains voltage is first

stepped down to the desired magnitude using a mains frequency transformer, followed by

rectification and filtering. The high frequency transformer used in a !" is much smaller in

size and weight compared to the low frequency transformer of the linear power supply circuit.

The witched !ode "ower upply owes its name to the dc*to*dc switching converter for

conversion from unregulated dc input voltage to regulated dc output voltage. The switchemployed is turned $: and $%% at a high frequency. ;uring $: mode, the switch is in

saturation mode with negligible voltage drop across the collector and emitter terminals of the

switch whereas in $%% mode, the switch is in cut*off mode with negligible current through the

collector and emitter terminals. $n the contrary, the voltage*regulating switch, in a linear

regulator circuit, always remains in the active region.

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1n a !" circuit, the unregulated input dc voltage is fed to a high frequency voltage

chopping circuit such that when the chopping circuit (often called dc to dc chopper) is in $:state, the unregulated voltage is applied to the output circuit that includes the load and some

filtering circuit. When the chopper is in $%% state, zero magnitude of voltage is applied to the

output side. The $: and $%% durations are suitably controlled such that the average dc voltage

applied to the output circuit equals the desired magnitude of output voltage. The ratio of $:

time to cycle time ($: < $%% time) is #nown as duty ratio of the chopper circuit. ' high

switching frequency (of the order of / =z) and a fast control over the duty ratio results in

application of the desired mean voltage along with ripple voltage of a very high frequency tothe output side, consisting of a low pass filter circuit followed by the load. The high frequency

ripple in voltage is effectively filtered using small values of filter capacitors and inductors.

%igure 5./> witched mode dc to dc chopper circuit

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2.1 THEORY OF OPERATION

'n !" consists of an input rectifier stage, an inverter stage, a voltage converter and anoutput rectifier. The bloc# diagram of !" is as shown*

%igure 5.5> Bloc# diagram of !"

2.1.1 INPUT RECTIFIER STAGE

1f the !" has an '? input, then the first stage is to convert the input to ;?. This is

called rectification. ' !" with a ;? input does not require this stage. 1n some power

supplies (mostly computer 'T@ power supplies), the rectifier circuit can be configured as a

voltage doubler by the addition of a switch operated either manually or automatically. This

feature permits an operation from power sources that are normally at //- or at 5-. The

rectifier produces an unregulated ;? voltage which is then sent to a large filter capacitor. The

current drawn from the mains supply by this rectifier circuit occurs in short pulses around the

'? voltage pea#s. These pulses have significant high frequency energy which reduces the

power factor. To correct this, many newer !" use of "%? circuit to ma#e the input current

follow the sinusoidal shape of the '? input voltage, correcting the power factor. "ower

supplies that use "%? usually are auto*ranging, supporting input voltages from / -'? *5-

'?, with no input voltage selector switch.

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2.1.2 INVERTER STAGE

The inverter stage converts ;?, whether directly from the input or from the rectifier stage described above, to '? by running it through a power oscillator, whose output

transformer is very small with few windings at a frequency of tens or hundreds of =ilohertz.

The frequency is usually chosen to be above 5 #z, to ma#e it inaudible to humans. The

switching is implemented as a multistage (to achieve high gain) !$%&T amplifier. !$%&Ts

are a type of transistors with a low on*resistance and a high current*handling capacity.

2.1.3 VOLTAGE CONVERTER AND OUTPUT RECTIFIER

1f the output is required to be isolated from the input, as is usually the case in mains

power supplies, the inverted '? is used to drive the primary winding of a high*frequency

transformer. This converts the voltage up or down to the required output level on its secondary

winding. The output transformer in the bloc# diagram serves this purpose. 1f a ;? output is

required, the '? output from the transformer is recti ed. %or output voltages above ten volts or

so, ordinary silicon diodes are commonly used. %or lower voltages, chott#y diodes are

commonly used as the rectifier elementsA they have the advantages of faster recovery times

than silicon diodes (allowing low*loss operation at higher frequencies) and a lower voltage

drop when conducting. %or even lower output voltages, !$%&Ts may be used as

synchronous rectifiersA compared to chott#y diodes, these have even lower conducting state

voltage drops.

The rectified output is then smoothed by a filter consisting of inductors and capacitors.

%or higher switching frequencies, components with lower capacitance and inductance are

needed. impler, non*isolated power supplies contain an inductor instead of a transformer. This

type includes boost, buc# and buc#*boost converters. These belong to the simplest class of

single input, single output converters which use one inductor and one active switch.

The buc# converter reduces the input voltage in direct proportion to the ratio of

conductive time to the total switching period, called the duty cycle. ' buc# converter with a /

- input operating at a 7 duty cycle will produce an average output voltage of -. '

feedbac# control loop is employed to regulate the output voltage by varying the duty cycle to



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compensate for variations in input voltage. The output voltage of a boost converters is always

greater than the input voltage and the buc#*boost output voltage is inverted but can be greater than, equal to, or less than the magnitude of its input voltage. There are many variations and

e0tensions to this class of converters but these three form the basis of almost all isolated and

non*isolated ;? to ;? converters. By adding a second inductor the ?u# and &"1? converters

can be implemented, or, by adding additional active switches, various bridge converters can be

realized. $ther types of !"s use a capacitor diode voltage multiplier instead of inductors

and transformers. These are mostly used for generating high voltages at low currents. The low

voltage variant is called charge pump.

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2.2 ADVANTAGES AND DISADVANTAGES

The advantages of a !" are primarily lower weight, smaller size, higher efficiency,wide '? input voltage range and reduced cost for larger amounts of power being delivered.

8ow weight and smaller size come about because operation is at a very high frequency range

and inductive elements are vastly smaller and much cheaper. igher efficiency occurs because

the power transistor is switched very rapidly between saturation and cut o and there is little

power dissipation and it allows reduced heat sin#ing requirements. Wider '? input voltage

range results from the fle0ibility in selecting frequency and the transistor duty cycle which

ma#es voltage adaption unnecessary. educed costs occur owing to the absence of large bul#y power transformers, a huge reduction in volume and power dissipation, smaller material

requirements and also smaller semiconductor devices.

;isadvantages include greater comple0ity, the generation of high*amplitude, high

frequency energy that the low*pass filter must bloc# to avoid electromagnetic interference

(&!1), a ripple voltage at the switching frequency and the harmonic frequencies thereof.

-ery low cost !"s may couple electrical switching noise bac# onto the mains power

line, causing interference with 'C- equipment connected to the same phase. :on*power*factor corrected !"s also cause harmonic distortion.

2.3 APPLICATIONS

witch*mode power supply units ("9s) are used in domestic products such as personal

computers. They often have universal inputs, meaning that they can accept power from mains

supplies throughout the world, although a manual voltage range switch may be required.

witch*mode power supplies can tolerate a wide range of power frequencies and voltages and

hence can be used in all such applications.

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CHAPTER 3

RESONANT CONVERTER

The development of switch mode power supplies (!") has made it possible to increase

the power density significantly, but it is limited by the size of the passive energy storing

components (inductors and capacitors). The value and size of these are however dependent on

the switching frequency. Traditional !" topologies li#e Buc# and Boost are hard switching,

this means the !$%&T is switching while energy is stored in the output capacitance. The

result is that energy is dissipated in the !$%&T every time it turns on. This introduces lossesin the converter, when the frequency is increased to the very high frequency (-%) range (*

!z) the dissipated power gets almost / times larger. This amount of energy would

ruin the efficiency and require e0treme cooling of the !$%&T. This leads to the development

of resonant converters.

%igure > Bloc# diagram of resonant converter

The resonant converter comprises of a % amplifiers (inverters) combined with a rectifier

for dcCdc converters. With these type of converters, it is possible to achieve zero voltage

switching (D-) andCor zero current switching (D?). 1n this case, the !$%&T turns $:

when the voltage andCor current acrossCthrough it is zero. Theoretically, this should eliminate

switching losses if the switching is done instantaneously and at e0actly the right time. This is

not practically achievable, but even with slight deviations from the ideal case very highefficiencies can be achieved.

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'n increase in frequency will lead to a reduction in size, as long as the size of the passive

scales with the value. This assumption generally holds, but magnetic materials and pac#aging

introduce some challenges. When the frequency is pushed far into the megahertz range,

magnetic core losses increase rapidly and become unacceptably high for most core materials. 't

this point, air core and "?B embedded inductors become a viable solutions, as the inductances

needed at these frequencies can be made in a small physical size and the core losses avoided.

;ue to the high switching frequency the converter will reach steady state after Eust a few

microseconds, this ma#es it possible to use an array of small converters and switch them on and

off as needed. 1n this way, each converter is designed to operate with a defined load. This

ma#es the design much easier as resonant inverters are generally load dependent. esonantinverters need large load impedance in ideal situations (having both D- and D?). This ma#es

them well suited for boost*type converters, but ma#ing a buc# type is a bit more challenging.

The most commonly used way to overcome this is to add an autotransformer at the output, so

that the load impedance seen by the inverter is increased. 'nother way to achieve a low output

voltage is to use an array of converters with input in series and output in parallel.

The efficiency equation of the converter s

-1:5f F

/

"out G H

1t is problematic to have a high input voltage and switching frequency while having a low

output power and still #eeping the efficiency high. The input voltage sets (together with ?oss)

the energy stored in the output capacitance of the !$%&T each switching period and f sets

how many times this has to be done each second. ?ombined these values are hence

proportional to the circulating energy, that needs to run in the converter in order to ensure D-.The relation states that it is difficult to achieve high efficiency, if the circulating energy that is

needed for D- is high compared to the output power.

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%rom the previous researches as shown in table /, it is seen that the converters have

limited gains, with a step down of 2.2 times and a step up of 5 being the largest.

Table/. esults from previous research



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The design specifications for the proposed scheme of resonant converter is

The paper aim showing relation between efficiency and frequency is as plotted below.

Table5. elation between * 21: f S +P $9T and , for the converters



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CHAPTER 4

RESONANT RECTIFIER

The power converter utilizes a !$%&T power transistors switch with its output electrode

coupled to a tuned 8? networ# that operatively limits the voltage waveforms across the power

switch to periodic unipolar pulses. The transistor switch may be operated at a high frequency

so that its drain to gate inter electrode capacitance is sufficient to comprise the sole oscillatory

sustaining feedbac# path of the converter. ' reactive networ# which is inductive in nature at the

operating frequency couples the gate to source electrodes of the transistor switch. ' resonant

rectifier includes a tuned circuit to shape the voltage waveforms across the rectifying diodes as

a time inverse of the power switch waveform. The input resistance of the rectifier is controlled

so that it is invariant to frequency change within the switching frequency range of the

converter.

The rectifier converts the ac current from the inverter to a dc output. Iust as the !$%&T

has an output capacitance, the diode has a Eunction capacitance. 1n order not to dissipate this

energy in the diode, it is important that the transition is made smoothly, so that the capacitance

is discharged before the diode turns on. The commonly used rectifiers are

1) ?8' & &?T1%1&

2) ?8' ;& &?T1%1&



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4.1 CLASS E RECTIFIER

The class & rectifier is a simple circuit, consisting of a diode, two capacitors, and an

inductor. Together, these constitute a resonant rectifier capable of rectifying the ac input current

to a dc output. 1t is assumed that the output capacitance is infinite, so that the output voltage is

constant. The diode is assumed to be ideal, i.e., it has no forward voltage drop, no Eunction

capacitance, and no reverse current. The rectifier will appear resistive at the switching

frequency, if the resonance frequency of 8 and ? are set to this frequency.

%igure + > chematic of the class & ectifier

The scaling of the two components will determine the duty cycle of the diode, ;;. 's theforward voltage drop of a diode increases with the current running through it, it is desirable to

#eep ;; as high as possible. owever, as the diode is connected to the output through an

inductor, the average voltage across it has to be -$9T. ence, a high ;; will lead to a high pea#

voltage across the diode.

1n order to select ;;, and thereby the scaling of the resonant components, the values of

real components have to be considered. 1f a ;; of 7 is chosen, the pea# diode voltage will

be .2- and -$9T J /3.4 -. With this ;; the value of ? should be

/C

R J J 23.p%

5K5 f s 8

With this capacitance, the value of 8 can be calculated

The inductor has, as e0pected, a dc current of .5' (the output current with / W and -)

and on top of that an ac current with an amplitude of /5 m' (see %ig. +). The dc resistance of

the inductor is estimated to 5 mL and the ac resistance to mL (these values are based on Dept.of 1$ !"H ngg co##ege

LR J

/ MM

J +/3:h(5Kf )5?


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an air core inductor with a diameter of 2 mm and 4 turns of .+ mm wire). The loss caused by

the inductor can then be calculated to / mW due to dc losses and 5.+ mW due to ac losses. This

is .+7 of the output power and these resistances are based on a relatively large air core

inductor. The equivalent series resistance (&) of the ceramic capacitor in the sizes used herewill be less than 5 mL and the currents running through them are smaller than the current in

the inductor. The loss caused by them will thus not be significant. %urthermore, the parasitic

capacitance of the diode can account for -R. 'ctually, the parasitic capacitance of the chosen

diode is, according to the datasheet, 2 p% at - reverse voltage fitting almost perfectly with

the calculated value.

Figure5: Class E rectifer waveorms simulated with PLECS

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4.2 CLASS DE RECTIFIER

The class ;& rectifier has an e0tra diode compared to the class &, but it does not have anyinductors and the physical size and price are e0pected to be more or less the same. 's seen in

the schematic in %ig. , the output capacitance is split in two. %or now, they will both be

assumed to be infinite ma#ing the output voltage pure ;?. 's the diodes are connected directly

to the output, the total voltage across them will always be -$9T. The diode duty cycle can

therefore be chosen freely between and ., a higher duty cycle would require both diodes to

conduct at the same time.

Figure : Schematic o the class !E rectifer

1f 1 1: pea# is isolated and / is also isolated, ? can be isolated in order to find the capacitances

needed to get a desired diode duty cycle. 1f a diode duty cycle of 57 is chosen, the needed

capacitance can be calculated as 223 p%.

$utput voltage

(4.3)



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's the diodes are coupled directly to the output, also as they provide the only dc path for

the output current. The average current through each of the diodes will therefore be 1$9T,

resulting in twice the diode loss as for the class & rectifier. This results in a total loss of more

than /mW.Though several diodes could be put in parallel to reduce the forward voltage drop

a bit, the diode losses will still be well above / mW, i.e., /7 of the output power.

Figure " : Class !E rectifer waveorms simulated with

PLECS

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4.3 SELECTION OF RECTIFIER

The following table shows a comparison between the rectifier topologies.

Table > ?omparison of topologies

#ased o$ the a$al%sis o the two rectifers& the class E rectifer is ou$dto 'e the 'est choice. (he si)e a$d *ri)e o the two rectifers will 'e similar&

'ut the loss o the class !E will 'e sig$ifca$tl% higher tha$ or the class E.

For a high voltage out*ut the !E might 'e 'etter though& as the

voltage across the diodes is lower a$d smaller diodes might 'e used. #ut

or the low out*ut $eeded or this co$verter& a class E rectifer is ou$d to

'e the 'est choice. (he losses o the class !E rectifer might eve$ 'e

u$acce*ta'le. + wa% to reduce the losses could 'e to use a s%$chro$ousrectifer, this will elimi$ate the orward voltage loss. (his will however

re-uire a$ additio$al /SFE(& with the ollowi$g $eed or gate drive a$d

co$trol.

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CHAPTER 5

RESONANT INVERTER

esonant inverters are electrical inverters based on resonant current oscillation. 1n series

resonant inverters, the resonating components and switching device are placed in series with

the load to form an under damped circuit. This type of inverter produces a sinusoidal waveform

at a high output frequency, ranging from 5 #z to / #z. a resonant inverter is used in

order to eliminate switching losses. &ither D- or D? can be achieved and in some special

cases both. Nenerally, D- will eliminate losses due to parasitic capacitances and D? will

eliminate losses due to parasitic inductance.

%or !$%&Ts and diodes in power applications the capacitances causes the dominating

loss, D- will therefore be the main criteria. 1f only D- can be achieved, the !$%&T needs

to turn $: at e0actly the point where the voltage across it hits zero. 1f it switches Eust a little

too early, there will be energy stored in the capacitor causing switching losses. 1f it switches a

little too late, the drain source voltage will go below zero and the body diode will start to

conduct which also gives losses.

The commonly used resonant inverters are>

/) ?8' & 1:-&T&

5) ?8' 5 1:-&T& ϕ

) ?8' ;& 1:-&T&

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5.1 CLASS E INVERTER

The most commonly used resonant inverter is the class &. 1t consists of a single

!$%&T, two inductors, and two capacitors. 1n optimum operation 81: is an infinite cho#e

providing a pure dc input current. The resonant circuit (8 and ? ) is inductive at the switching

frequency and the inverter is designed to have both D- and D;.

Figure 0 : Schematic o the class E i$verter

S a$d !S switchi$g ca$ o$l% 'e achieved i

the drai$ source voltage o the /SFE( is assumed to 'e a hal si$e

wave whe$ it is o4 a$d )ero whe$ it is o$& the *ea voltage across the

/SFE( will 'e

(he rms value o a hal wave rectifed si$e wave is

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(he rms value o the out*ut voltage is

(he reacta$ce o the reso$a$ce circuit ca$ $ow 'e determi$ed '%

#% com'i$i$g the e6*ressio$ or the $eeded reacta$ce as u$ctio$ o

i$*ut voltage& dut% c%cle& out*ut *ower& a$d load we get

1t is desirable to #eep the duty cycle low in order to reduce the pea# voltage across the

!$%&T. owever, due to turn on and off times and delays, it is decided to #eep it close

to 7. 'lso, from equation for -; pea# , it is found that a duty cycle of +7 will give a pea#

voltage of /+5.4 -, leaving a little headroom if a / - !$%&T is used. 9sing this value

along with the previous results, the needed reactance is found to be 52 L. 1f a capacitor of 24

p% is used, the value of the inductor can be calculated according to

The ne0t step is to determine the values of 81: and ?. 1n order to minimize losses , it is

preferable to #eep 81: large. Thus large ac currents running in and out of the converter andthereby causing unnecessary losses are avoided. 1f the input cho#e is assumed infinite, the ne0t

step is to calculate the value of ?. 1n order to ensure D-, the voltage across ? needs to rise

to the pea# and fall bac# down to zero within the period where the switch is open. This requires

? and the resonance circuit to resonate at a frequency with a period equal to two times the

period where the switch is open.



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7e$ce & time *eriod

1f the reactance of ? is the same as the reactance of the resonant tan# at f R , the circuit

will resonate at this frequency. owever, as the capacitor is only used when the !$%&T is

off, it has to be scaled by /D.

The output capacitance of the !$%&T is only contributing to the resonance in the part

of the period where the !$%&T is $%%. ence it has to be scaled by /D in order to find the

effective capacitance. The effective capacitance of the output capacitor is

7e$ce the total i$ducta$ce o the reso$a$ce circuit a$d the i$*ut

i$ductor should 'e

=nowing the values of @?, the input inductance can be calculated according to

t has 28 *F out*ut ca*acita$ce at 58 a$d a$ o$9resista$ce o 1.2&

this gives a co$ductio$ loss i$ the /SFE( o u* to 33 m;. (he ac

resista$ce o the i$ductors is estimated to 'e 188 m& thus the% will have a

com'i$ed loss o 5.3" m;. +s or the rectifers& the losses i$ the ca*acitors

are assumed to 'e $egligi'le. (hus& the total loss i$ the class E i$verter is

estimated to 'e 30 m;.



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%igure 6 > ?lass & inverter waveforms with realistic - $ simulated with "8&?



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5.2 CLASSϕ2 (EF2) INVERTER

The class /5 (or &%5 ) inverter, which is a hybrid between the class & and %5 inverters,

was developed in order to ma#e the voltage across the !$%&T closer to a square wave. The

voltage across the !$%&T should thereby become significantly smaller. This is done by

inserting a L- circuit in parallel with the !$%&T

%igure / > ?lass &%5 1nverter

(his circuit is desig$ed to have a reso$a$ce re-ue$c% at the seco$d

harmo$ic& which causes the voltage across the /SFE( to 'ecome a

tra*e)oidal wave co$sisti$g o the frst a$d

third harmo$ics. (he same 'e$efts ca$ 'e achieved with the


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With the !$%&T used for the class & the conduction loss will be up to /.+ mW. The

current through 8 will be the same as for the class & and though the inductance is a bit lower,

the & will still be estimated to / mL giving a loss of +.mW. The input inductor and 8!

are noticeably smaller and their & will therefore be estimated to mL and 5 mL,

respectively. With these resistances and the listed rms currents, their loss will be +.4 and 5.

mW, respectively. The total loss of the class /5 inverter (ignoring losses in the capacitors) is

estimated to be 25.4 mW.

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Figure 11: Tuned class /5 inverter waveforms simulated with "8&?

5.3 CLASS DE INVERTER

(he class !E i$verter has the same S *ro*erties as the class E

i$verter a$d the low voltage stresses o the class ! i$verter. t is the

cou$ter*art o the class !E rectifer +s the !E

rectifer& the !E i$verter has two switches co$$ected directl% to the dc

voltage& i$ this case /SFE(s co$$ected to the i$*ut voltage. #oth

/SFE(s have ca*acitors across them which ca$ 'e tu$ed to achieve S. (he o$l% additio$al com*o$e$t is a reso$a$t circuit at the out*ut.

Schematic o the class !E i$verter



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+s or the class E i$verter& S a$d !S switchi$g ca$ 'e achieved.

7owever& the values $eeded are di4ere$t.

With these equations, the demands for the load impedance and output capacitance

become 8 J /52.3 L and ? J 2.23 p%.

the voltage across CS1 a$d CS2 are assumed to rise li$ear whe$

the% are charged& the rms value o the voltage at the $ode 'etwee$ the

/SFE(s will 'e tra*e)oidal. the dut% c%cle o each /SFE( is set to 25=&

the rms value ca$ 'e calculated as

(his value ca$ 'e used to f$d the $eeded reacta$ce o the reso$a$t

circuit. Fi$di$g the value o C> ? 08 *F& the value o L> is calculated to 'e

05@ $7. +s or the class E i$verter& the value o each o CS1 a$d CS2 ca$ 'e

ou$d usi$g the reacta$ce o the reso$a$ce circuit

a$d scali$g them accordi$g to the dut% c%cle. (his gives

's the total voltage across the two !$%&Ts always will be - 1:, the average voltage

across each of them is 5 -. The output capacitance of the !$%&T, used for the & and /5

inverters, almost fit the capacitance needed at this voltage and it will thus be used for the

efficiency estimates. owever, as the pea# voltage across the !$%&Ts is limited to the input

voltage, several other !$%&Ts could be used (or the input voltage could be increased).

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Iust as the case were for the two other inverters, it was necessary to adEust 8 a bit to give

the desired output power. 'dEusting the 8 to n and thus recalculating ? to 5/.+ p% gave

the desired output power and the rms currents were e0tracted.

With these currents, the losses in the !$%&Ts and in the inductor are estimated to be

"8 5.5 mW (using an & of mL due to the small inductance) and losses in %&Ts P %&T/

J P %&T5 J . mW. 1f the losses in the capacitors are assumed negligible, the total

loss will be /.5 mW.

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Figure 13: Class !E i$verter waveorms simulated with

PLECS

5.4 SELECTION OF INVERTER

The following table shows a comparison between the inverter topologies

(a'le A: Com*ariso$ 'etwee$ $verter to*ologies

The class & inverter consists of only one !$%&T, two inductors, and a capacitor. 1t has

however the largest voltage pea# across the !$%&T which will limit the input voltage for a

given !$%&T. 'lso, the two inductors are both larger than any of the inductors used for the

two other converters. This limits the minimum size of the inverter as inductors are assumed to

be the largest components. The total loss was estimated to be +7 of the output power

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The class /5 inverter was a lot li#e the class & inverter, the only difference being the

added L- circuit put in to reduce the voltage across the !$%&T. The total loss was estimated

to be 25.4 mW which is a 27 increase compared to the class & inverter.

The class ;& inverter was the only inverter with two switches. But, as -S / and -S 5 are

composed by the parasitic capacitance of the !$%&Ts, the total component count of the class

;& inverter is the same as for the class & inverter. The pea# voltage across the !$%&Ts were

by far the lowest seen in any of the inverters and the currents were also the lowest. These

things combined gave the smallest output inductor and the lowest losses of /.5 mW.

%rom the above analysis, the class ;& inverter seems to be the best solution available.

owever, during this analysis the gate drive has not been considered. ' good high side gate

drive which is capable of operating in the -% range has yet to be developed whereas a low

side gate drive can be made with few components. The comple0ity, price, and losses associated

with the added high side gate drive reduces the benefits of the ;& inverter. With the above

considerations in mind, the class & inverter is chosen for the final design.

CHAPTER 6

POWER STAGES

The most commonly used !$%&T in resonant converters are the >F5082 BM1

a$d F!D02A BM2. Com*ari$g the two /SFE(s& the >F5082 has much

higher o$9resista$ce tha$ the F!D02A. 7owever& the out*ut ca*acita$ce

is lower a$d will as me$tio$ed decrease the curre$ts a$d thus reduce the

draw'ac o the high o$9resista$ce. +ssumi$g the waveorm o the voltage

across the /SFE( is the same usi$g the two /SFE(s& the curre$t usi$g

M2 will 'e -M 5 -M /C-M / J /+57 larger tha$ usi$g M1. (he o$ resista$ce

will 'e reduced '% RM /RM 5C RM / J 3./7. Com'i$i$g this gives a total loss

reductio$ o 53.+7.

9sing the estimated loss, this correspond to 6 mW. %urthermore, the increased current

will also give losses in the input inductor, again using the earlier estimate, the increased loss isfound to be/+57 of .3 mW J 3.2 mW. ence, the total loss difference using the two

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!$%&Ts is estimated to be less than 5 mW. The increased capacitance will however also

ma#e the timing of the switching more important, as a larger amount of energy will be stored in

the capacitor and dissipated in the !$%&T if the switching is Eust a little wrong. ence,

based on the analysis above, the !$%&T from 1% are found most suited.

The first power stage is the one with low capacitance, the second power stage is with

the !$%&T with lower ; ($:) and the last power stage is with a large input inductor and

higher output power, The gate signal is a sine wave which can be generated efficiently using

various types of resonant gate drives. The duty cycle is controlled by adEusting the dc offset of

the sine wave, hence a dc offset equal to the threshold of the !$%&T will lead to a duty cycle

of 7 and a lower offset lead to a lower duty cycle.

6.1 MOSFET WITH LOW COSS

?eramic?N capacitors were used for the resonating capacitors in order to ensure stable

capacitance with varying voltages and ceramic @3 capacitors were used as input and output

capacitors. ?ustom made air core solenoids were used in order to enable e0act tuning of the

inductances and thereby achieve D-. The tuning procedure was first to tune the inductor in

the output filter to ma#e it resistive at the switching frequency. $nce that was done, the inverter

was added to the design and a low voltage was applied. 1n order to get capacitors to discharge

faster, the values of the input and resonant inductors had to be lowered. %irst, the resonant

inductor was lowered to give the desired output power and then the input inductor was adEusted

to ma#e the converter D-. The output capacitance of the !$%&T was 5 p%. The probe

introduces capacitance and also the fact that the converter is not D- also introduces the miller

plateau in the gate charge and causes the gate signal to deviate from a sine wave when thevoltage reaches the miller voltage. o for the final fine tuning a thermal camera was used to

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measure the temperature of the !$%&T. The !$%&T was D- when the temperature rise

was lowest. 's the size of the components is almost equal this indicates that the total diode loss

is almost five times the total !$%&T loss (there are five diodes in parallel). The efficiency

was measured to be 3/.7.

%igure /+> !easurements on the prototype with low - $

6.2 MOSFET WITH LOW R ON

When the !$%&T was selected, the %;:425+2 was found to be equally good to the

1%45. The biggest difference between the two was on*resistances and parasitic

capacitances. ' prototype was implemented using the %;:425+2 type in a circuit almost

identical to the one used for the previous converter. ' few turns were removed from the inputinductor in order to ma#e the converter D- with the increased output capacitance in the new

!$%&T. The !$%&T gets almost / 3? warmer clearly indicating a higher loss. ;ue to the

higher output capacitance, more energy is stored and if the switch is switched at a few volts

instead of zero, much more energy will be dissipated in the on resistance. %urthermore, the ac

current in the input inductor is larger which also increases the losses. The total efficiency of the

converter was measured to 2.37.

6.2 MOSFET WITH LOW R ON



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' prototype was implemented using the %;:425+2 in a circuit almost identical to the

one used for the previous converter. ' few turns were removed from the input inductor in order

to ma#e the converter D- with the increased output capacitance in the new !$%&T. The

!$%&T gets almost / 3? warmer indicating a higher loss. ;ue to the higher outputcapacitance, more energy is stored and if the switch is switched at a few volts instead of zero,

much more energy will be dissipated in the on resistance. %urthermore, the ac current in the

input inductor is larger which also increases the losses. The total efficiency of the converter

was measured to 2.37.

6.3 MOSFET WITH LARGE INPUT INDUCTOR

(he highest ecie$c% should 'e achieved with a large i$*ut i$ductor.

So& a *rotot%*e was made with the >F5082& with a .5 μ7 i$*ut i$ductor.

(he$& the reso$a$ce circuit a$d the load were adusted i$ order to get S

a$d 5 out*ut. (he i$creased out*ut *ower made the curre$t through the

/SFE( closer to that see$ or the ideal class E i$verter. (he loss due to

slight deviatio$s i$ the timi$g o the switchi$g was smaller. /ut*ut voltage

o'tai$ed is 5.8 . ;he$ tu$ed& the out*ut *ower o the circuit 'ecame 1.53

; a$d the ecie$c% was measured to 45.67. (his ecie$c% is without gate

drive& 'ut it is still amo$g the 'est results achieved.



33/38


Figure 15: easureme$ts o$ the 1.53; *rotot%*e with

>F5082

CHAPTER

E!PERIMENTAL RESULTS

(he ecie$cies are achieved or the three *ower stages. From the

three *rotot%*es& it is see$ that good ecie$cies ca$ 'e achieved ust '%

havi$g S. 7owever& the larger the curre$t through the /SFE( is at the

switchi$g i$sta$t& the more im*orta$t 'ecomes the timi$g o the switchi$g

a$d losses i$crease. t has 'ee$ show$ that 7F co$verters with a ver% low

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-51: .f " "$9T actor ca$ 'e made with high ecie$c%& the 'est eve$ had a$

ecie$c% o 45.67, which *uts it amo$g the 'est 7F co$verters. For

com*ariso$& the results achieved or the *ower stages are show$ i$ fgure.

(he ecie$c% is $ot as high as wa$ted a$d the actor is a little higher tha$desired or o$e o the *rotot%*es due to the higher out*ut *ower. 7owever&

see$ $e6t to *reviousl% achieved results the% are ver% close.

%igure /2> The achieved -51: .f " "$9T actor and , ne0t to previous results

CHAPTER #

ADVANTAGES AND DISADVANTAGES

.1 ADVANTAGES

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/. Both D- and D? can be achieved minimizing the losses.

5. (here is a reductio$ i$ the *h%sical si)e o SPS.

. (here is a reductio$ i$ the ma$uacturi$g cost o SPS.

+. (here is a aster tra$sie$t res*o$se whe$ the switchi$g re-ue$c% is

raised to 7F ra$ge.

. Gse o higher re-ue$c% i$ the 7F ra$ge maes the SPS E

com*lia$t.

.2 DISADVANTAGES

/. 1t is very difficult to achieve good performance for the !" at varying loads as the

resonant inverters are load dependent.5. The designs of components require e0treme care as even a small deviation from the

calculated values could bring about variations in the output voltage and power.

CHAPTER $

APPLICATIONS



36/38


/. They can be used as low power !" in space shuttles.

5. They find widespread application in mobile technology of +N and above.

. They can be successfully used for envelope trac#ing applications.

CHAPTER 1%

CONCLUSION

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The theoretical design of the resonant converter was considered. everal different

topologies were considered and based on comple0ity and efficiency estimates a class & inverter

and rectifier were chosen. The class & inverter was chosen based on comple0ity, efficiency, and

the fact that it did not require a high side switch. With a simple and efficient high side gate

drive the ;& inverter is theoretically better, especially for converters with even higher input

voltages. uch a gate drive was however yet to be invented and this topology was therefore not

used for the practical implementation. %or the rectifier part it was again the class & topology

that were chosen, this time due to the forward voltage drop of the diodes. With a low*voltage

output, the forward voltage drop of the diode becomes a significant percentage of the output

voltage and a single diode rectifier was found to be the best choice. %or higher output voltages,

the ;& rectifier might be better as the loss due to forward voltage drop in the diodes becomes

insignificant and the voltages stress of the devices the maEor concern. Three different power

stages were madeA one with a !$%&T with the lowest available output capacitance, one with

a !$%&T with low on*resistance, and one with increased output power allowing a large input

inductor. 'll the converters had - input and - output and the achieved efficiencies were

between 2.37 and 45.67. This shows that it is possible to ma#e low power very high

frequency converters with high step down ratio running at sub nominal condition as long as the

components are chosen carefully.

REFERENCES

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H1I W. ?. Bowman, I. %. Balic#i, %. T. ;ic#ens, . !. oneycutt, W. '. :itz, W. trauss, W.

B. uiter, and :. N. Diesse, O' resonant ;?*to*;? converter operating at 55 megahertz,P

in Proc. 4 hir6 !nnu. !pp#.Power #ectron. -onf. 7po., %eb. /Q, /644, pp. Q//.

R5S . an, N. ?heung, '. 8i, ?. . ullivan, and ;. I. "erreault, O&valuation of magnetic

materials for very high frequency power applications,P 4 ran8. Power #ectron., vol.

53, no. /, pp. +5Q+, Ian. 5/5.

RS I. Uiu and ?. . ullivan, O;esign and fabrication of -% tapped power inductors using

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+63, ;ec. 5/5.

R+S . B. =otte, . 'mbatipudi, and =. Bertilsson, Oigh*speed (!z)series resonant

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transformer,P 4 ran8. Power #ectron.,vol. 54, no. , pp. /5Q/52+, !ar. 5/.

RS W. ?hen and . . on ui, O&limination of an electrolytic capacitor in '?C ;? light*

emitting diode (8&;) driver with high input power factor and constant output current,P

4 ran8. Power #ectron., vol. 53, no. , pp. /64Q/23, !ar. 5/5.

R2S . !a, I.*. 8ai, U. %eng, W. u, ?. Dheng, and D. Dhao, O' novel valley*fill &"1?*

derived power supply without electrolytic capacitor for 8&; lighting application,P 4

ran8. Power #ectron., vol. 53, no. 2, pp. 3Q3/, Iun. 5/5.

R3S ". hamsi and B. %ahimi, O;esign and development of very high frequency resonant

;?*;? boost converters,P 4 ran8. Power #ectron., vol. 53,no. 4, pp. 35Q3,

'ug. 5/5.

R4S $. Narcia, !. -asic, ". 'lou, I. $liver, and I. '. ?obos, O'n overview of fast ;?*;?

converters for envelope,P 4 ran8. Power #ectron.,vol. 54, no. /, pp. +3/5Q+355,

$ct. 5/.

R6S I. I. 'lonso, !. . "erdigao, ;. -aquero, '. I. ?alleEa, and &. araiva,O'nalysis, design,

and e0perimentation on constant*frequency ;?*;? resonant converters with magneticcontrol,P 4 ran8. Power #ectron.,vol. 53, no. , pp. /26Q/45, !ar. 5/5.

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