RFID BASED OFFICE ATTENDENCE LOGGER

TABLE OF CONTENTS

1. ABSTRACT

2. SCHEMATIC DIAGRAM

3. CIRCUITDESCRIPTION

3. INTRODUCTION

3.1. EMBEDDED SYSTEMS

3.2. MICROCONTROLLER

3.2. RFID

3.3. LCD

3.4. LED

3.5. CVAVR

4. COMPONENT DESCRIPTION

4.1. ATMEGA8515

4.2. RFID READER

4.3. AT24C08

4.4. DS1307

4.5. 74LS21

4.6. MAX232

4.7. ISP PROGRAMMER

5. CODING

6. BIBILOGRAPHY

ABSTRACT

Radio Frequency Identification (RFID) is a general term that is used to describe a

system that transmits the identity (in the form of a unique serial number) of an object

wirelessly, using radio waves. RFID is evolving as a major technology enabler for

tracking goods and assets around the world.

RFID is the reading of physical tags on single products, cases, pallets, or re-usable

containers that emit radio signals to be picked up by reader devices. The complete RFID

picture combines the technology of the tags and readers with access to global

standardized databases, ensuring real time access to up-to-date information about relevant

products at any point in the supply chain.

Tags contain a unique identification number called an Electronic Product Code

(EPC), and potentially additional information of interest to manufacturers, healthcare

organizations, military organizations, logistics providers, and retailers, or others that need

to track the physical location of goods or equipment. All information stored on RFID

tags, can be scanned wirelessly by a reader at high speed and from a distance of several

meters.

In this project we are going to implement an office attendance logger by using rfid

reader. Every employee has a specific rid card with unique employ ID. When ever he

enters into the office the reader reads that id and stores the in time of the employee and if

he leaves the office the system store the out time of the id.

Since the no. of employs in an office is having their own rfid tags, all the tag

holders’ office timings are recorded in a memory device. This data can be uploaded into

the PC by using serial communication. Now the memory device can be free for recording

the new attendance log.

APPLICATIONS:

Item visibility and status

Location tracking

Access control

Traceability

BLOCK DIAGRAM:

TRANSMITTER:

R F I D C A R D S

RECEIVER:

ATMEGA

8515

LCD

74LS21

MAX 232

RFID

READER

DS 1307

74LS21

SEL

INC

DEC

EXIT

UPLOAD

ERASE

AT24C08

PC

SCHEMATIC DIAGRAM

CIRCUIT DESCRIPTION

EMBEDDED SYSTEMS

Embedded systems are electronic devices that incorporate microprocessors

with in their implementations. The main purposes of the microprocessors are to simplify

the system design and provide flexibility. Having a microprocessor in the device helps in

removing the bugs, making modifications, or adding new features are only matter of

rewriting the software that controls the device. Or in other words embedded computer

systems are electronic systems that include a microcomputer to perform a specific

dedicated application. The computer is hidden inside these products. Embedded systems

are ubiquitous. Every week millions of tiny computer chips come pouring out of factories

finding their way into our everyday products.

Embedded systems are self-contained programs that are embedded within a piece

of hardware. Whereas a regular computer has many different applications and software

that can be applied to various tasks, embedded systems are usually set to a specific task

that cannot be altered without physically manipulating the circuitry. Another way to think

of an embedded system is as a computer system that is created with optimal efficiency,

thereby allowing it to complete specific functions as quickly as possible.

Embedded systems designers usually have a significant grasp of hardware

technologies. They use specific programming languages and software to develop

embedded systems and manipulate the equipment. When searching online, companies

offer embedded systems development kits and other embedded systems tools for use by

engineers and businesses.

Embedded systems technologies are usually fairly expensive due to the necessary

development time and built in efficiencies, but they are also highly valued in specific

industries. Smaller businesses may wish to hire a consultant to determine what sort of

embedded systems will add value to their organization.

CHARACTERISTICS:

Two major areas of differences are cost and power consumption. Since

many embedded systems are produced in tens of thousands to millions of units range,

reducing cost is a major concern. Embedded systems often use a (relatively) slow

processor and small memory size to minimize costs.

The slowness is not just clock speed. The whole architecture of the computer is

often intentionally simplified to lower costs. For example, embedded systems often use

peripherals controlled by synchronous serial interfaces, which are ten to hundreds of

times slower than comparable peripherals used in PCs. Programs on an embedded system

often run with real-time constraints with limited hardware resources: often there is no

disk drive, operating system, keyboard or screen. A flash drive may replace rotating

media, and a small keypad and LCD screen may be used instead of a PC's keyboard and

screen.

Firmware is the name for software that is embedded in hardware devices, e.g. in

one or more ROM/Flash memory IC chips. Embedded systems are routinely expected to

maintain 100% reliability while running continuously for long periods, sometimes

measured in years. Firmware is usually developed and tested too much harsher

requirements than is general-purpose software, which can usually be easily restarted if a

problem occurs.

PLATFORM:

There are many different CPU architectures used in embedded designs. This in

contrast to the desktop computer market which is limited to just a few competing

architectures mainly the Intel/AMD x86 and the Apple/Motorola/IBM Power PC’s which

are used in the Apple Macintosh. One common configuration for embedded systems is

the system on a chip, an application-specific integrated circuit, for which the CPU was

purchased as intellectual property to add to the IC's design.

TOOLS:

Like a typical computer programmer, embedded system designers use

compilers, assemblers and debuggers to develop an embedded system. Those software

tools can come from several sources:

Software companies that specialize in the embedded market Ported from

the GNU software development tools. Sometimes, development tools for a personal

computer can be used if the embedded processor is a close relative to a common PC

processor. Embedded system designers also use a few software tools rarely used by

typical computer programmers. Some designers keep a utility program to turn data files

into code, so that they can include any kind of data in a program. Most designers also

have utility programs to add a checksum or CRC to a program, so it can check its

program data before executing it.

OPERATING SYSTEM:

They often have no operating system, or a specialized embedded operating

system (often a real-time operating system), or the programmer is assigned to port one of

these to the new system.

DEBUGGING:

Debugging is usually performed with an in-circuit emulator, or some type

of debugger that can interrupt the micro controller’s internal microcode. The microcode

interrupt lets the debugger operate in hardware in which only the CPU works. The CPU-

based debugger can be used to test and debug the electronics of the computer from the

viewpoint of the CPU.

Developers should insist on debugging which shows the high-level language, with

breakpoints and single stepping, because these features are widely available. Also,

developers should write and use simple logging facilities to debug sequences of real-time

events. PC or mainframe programmers first encountering this sort of programming often

become confused about design priorities and acceptable methods. Mentoring, code-

reviews and ego less programming are recommended.

DESIGN OF EMBEDDED SYSTEMS:

The electronics usually uses either a microprocessor or a microcontroller.

Some large or old systems use general-purpose mainframes computers or minicomputers.

START-UP:

All embedded systems have start-up code. Usually it disables interrupts,

sets up the electronics, tests the computer (RAM, CPU and software), and then starts the

application code. Many embedded systems recover from short-term power failures by

restarting (without recent self-tests). Restart times under a tenth of a second are common.

Many designers have found one of more hardware plus software-

controlled LED’s useful to indicate errors during development (and in some instances,

after product release, to produce troubleshooting diagnostics). A common scheme is to

have the electronics turn off the LED(s) at reset, whereupon the software turns it on at the

first opportunity, to prove that the hardware and start-up software have performed their

job so far. After that, the software blinks the LED(s) or sets up light patterns during

normal operation, to indicate program execution progress and/or errors. This serves to

reassure most technicians/engineers and some users.

THE CONTROL LOOP:

In this design, the software has a loop. The loop calls subroutines. Each

subroutine manages a part of the hardware or software. Interrupts generally set flags, or

update counters that are read by the rest of the software. A simple API disables and

enables interrupts. Done right, it handles nested calls in nested subroutines, and restores

the preceding interrupt state in the outermost enable. This is one of the simplest methods

of creating an exocrine.

Typically, there's some sort of subroutine in the loop to manage a list of software

timers, using a periodic real time interrupt. When a timer expires, an associated

subroutine is run, or flag is set. Any expected hardware event should be backed-up with a

software timer. Hardware events fail about once in a trillion times.

State machines may be implemented with a function-pointer per state-

machine (in C++, C or assembly, anyway). A change of state stores a different function

into the pointer. The function pointer is executed every time the loop runs.

Many designers recommend reading each IO device once per loop, and storing the

result so the logic acts on consistent values. Many designers prefer to design their state

machines to check only one or two things per state. Usually this is a hardware event, and

a software timer. Designers recommend that hierarchical state machines should run the

lower-level state machines before the higher, so the higher run with accurate information.

Complex functions like internal combustion controls are often handled with multi-

dimensional tables. Instead of complex calculations, the code looks up the values. The

software can interpolate between entries, to keep the tables small and cheap.

One major disadvantage of this system is that it does not guarantee a time to

respond to any particular hardware event. Careful coding can easily assure that nothing

disables interrupts for long. Thus interrupt code can run at very precise timings. Another

major weakness of this system is that it can become complex to add new features.

Algorithms that take a long time to run must be carefully broken down so only a little

piece gets done each time through the main loop.

This system's strength is its simplicity, and on small pieces of software the loop is

usually so fast that nobody cares that it is not predictable. Another advantage is that this

system guarantees that the software will run. There is no mysterious operating system to

blame for bad behavior.

USER INTERFACES:

Interface designers at PARC, Apple Computer, Boeing and HP minimize

the number of types of user actions. For example, use two buttons (the absolute

minimum) to control a menu system (just to be clear, one button should be "next menu

entry" the other button should be "select this menu entry"). A touch-screen or screen-edge

buttons also minimize the types of user actions.

Another basic trick is to minimize and simplify the type of output. Designs should

consider using a status light for each interface plug, or failure condition, to tell what

failed. A cheap variation is to have two light bars with a printed matrix of errors that they

select- the user can glue on the labels for the language that she speaks.

For example, Boeing's standard test interface is a button and some lights. When

you press the button, all the lights turn on. When you release the button, the lights with

failures stay on. The labels are in Basic English.

Designers use colors. Red defines the users can get hurt- think of blood. Yellow

defines something might be wrong. Green defines everything's OK.

Another essential trick is to make any modes absolutely clear on the user's

display. If an interface has modes, they must be reversible in an obvious way. Most

designers prefer the display to respond to the user. The display should change

immediately after a user action. If the machine is going to do anything, it should start

within 7 seconds, or give progress reports.

One of the most successful general-purpose screen-based interfaces is the two

menu buttons and a line of text in the user's native language. It's used in pagers, medium-

priced printers, network switches, and other medium-priced situations that require

complex behavior from users. When there's text, there are languages. The default

language should be the one most widely understood.

MICROCONTROLLERS

Microcontrollers as the name suggests are small controllers. They are like

single chip computers that are often embedded into other systems to function as

processing/controlling unit. For example the remote control you are using probably has

microcontrollers inside that do decoding and other controlling functions. They are also

used in automobiles, washing machines, microwave ovens, toys ... etc, where automation

is needed.

Micro-controllers are useful to the extent that they communicate with

other devices, such as sensors, motors, switches, keypads, displays, memory and even

other micro-controllers. Many interface methods have been developed over the years to

solve the complex problem of balancing circuit design criteria such as features, cost, size,

weight, power consumption, reliability, availability, manufacturability. Many

microcontroller designs typically mix multiple interfacing methods. In a very simplistic

form, a micro-controller system can be viewed as a system that reads from (monitors)

inputs, performs processing and writes to (controls) outputs.

Embedded system means the processor is embedded into the required

application. An embedded product uses a microprocessor or microcontroller to do one

task only. In an embedded system, there is only one application software that is typically

burned into ROM. Example: printer, keyboard, video game player

Microprocessor - A single chip that contains the CPU or most of the computer

Microcontroller - A single chip used to control other devices

Microcontroller differs from a microprocessor in many ways. First and the

most important is its functionality. In order for a microprocessor to be used, other

components such as memory, or components for receiving and sending data must be

added to it. In short that means that microprocessor is the very heart of the computer. On

the other hand, microcontroller is designed to be all of that in one. No other external

components are needed for its application because all necessary peripherals are already

built into it. Thus, we save the time and space needed to construct devices.

MICROPROCESSOR VS MICROCONTROLLER:

Microprocessor:

CPU is stand-alone, RAM, ROM, I/O, timer are separate

Designer can decide on the amount of ROM, RAM and I/O ports.

expensive

versatility general-purpose

Microcontroller:

CPU, RAM, ROM, I/O and timer are all on a single chip

fix amount of on-chip ROM, RAM, I/O ports

for applications in which cost, power and space are critical

single-purpose

RFID

Ever since the advent of large-scale manufacturing, rapid identification

techniques helped speed the handling of goods and materials. Historically, printed labels

—a simple, cost effective technology—have been the staple of the manufacturing

industry. In the 1970s, labeling made a giant leap forward with the introduction of

Universal Product Code bar codes, which helped automate and standardize the

identification process. Bar codes are also cheap to produce, but they have many

limitations.

They require a clear line of sight between the reader and tag, can be

obscured by grease and nearby objects, and are hard to read in sunlight or when printed

on some substrates. RFID is an alternative labeling technology that has also been around

for decades.

The British employed RFID principles in World War II to identify their

aircraft using the IFF (Identification Friend or Foe) system. In the 1960s, Los Alamos

National Laboratory carried out work more closely related to modern RFID in its effort to

explore access control. It incorporated RFID tags into employee badges to automatically

identify people, limit access to secure areas, and make it harder to forge the badges.

Niche domains have also used RFID in various applications, such as to identify animals,

label airline luggage, time marathon runners, make toys interactive, prevent theft, and

locate lost items.

Regardless of these applications, RFID technology remained relatively

obscure for many years. Now, however, three major organizations are pioneering its

large-scale adoption: Wal-Mart, Tesco, and the US Department of Defense. Each aims to

offer more competitive pricing by using RFID to lower operational costs by streamlining

the tracking of stock, sales, and orders. When used in combination with computerized

databases and inventory control, linked through digital communication networks across a

global set of locations, RFID can pinpoint individual items as they move between

factories, warehouses, vehicles, and stores.

Radio-frequency-identification (RFID) is an automatic identification

method, relying on storing and remotely retrieving data using devices called RFID tags or

transponders. The technology requires some extent of cooperation of an RFID reader and

an RFID tag.

An RFID tag is an object that can be applied to or incorporated into a

product, animal, or person for the purpose of identification and tracking using radio

waves. Some tags can be read from several meters away and beyond the line of sight of

the reader. Most RFID tags contain at least two parts. One is an integrated circuit for

storing and processing information, modulating and demodulating a radio-frequency (RF)

signal, and other specialized functions. The second is an antenna for receiving and

transmitting the signal.

Future Chip less RFID allows for discrete identification of tags without an

integrated circuit, thereby allowing tags to be printed directly onto assets at a lower cost

than traditional tags. Currently none of the chip less concepts has become operational.

Today, RFID is used in enterprise supply chain management to improve the efficiency of

inventory tracking and management.

RFID is an identification technology. It holds data you can access by using

a reader. RFID uses radio technology. RFID (Radio Frequency Identification) is best

described as a wireless memory chip. Today RFID is the most intelligent technology for

managing and collecting a product's data or tracking it as it moves through the supply

chain. RFID technology has been used in various applications for many years, but now

chips are getting smaller and tags cheaper. With new applications developing, the

benefits are undeniable.

No single RFID transponder technology is ideal for implementation in all

areas. Different frequency bands are better suited for specific applications. When

selecting the proper solution, the following issues should be taken into consideration.

Geographical region

Regional regulatory requirements

General performance characteristics

Application requirements

Two frequency ranges are generally distinguished for smart RFID

systems, High Frequency (HF) 13.56 MHz and Ultra High Frequency (UHF) 860-956

MHz. SATO can support the encoding requirements for both Wal-Mart and Metro

following the general epic and ISO regulations.

Many types of RFID exist, but at the highest level, we can divide RFID

devices into two classes: active and passive. Active tags require a power source—they’re

either connected to a powered infrastructure or use energy stored in an integrated battery.

In the latter case, a tag’s lifetime is limited by the stored energy, balanced against the

number of read operations the device must undergo. One example of an active tag is the

transponder attached to an aircraft that identifies its national origin. Another example is a

LoJack device attached to a car, which incorporates cellular technology and a GPS to

locate the car if stolen.

However, batteries make the cost, size, and lifetime of active tags

impractical for the retail trade. Passive RFID is of interest because the tags don’t require

batteries or maintenance. The tags also have an indefinite operational life and are small

enough to fit into a practical adhesive label. A passive tag consists of three parts: an

antenna, a semi-conductor chip attached to the antenna, and some form of encapsulation.

The tag reader is responsible for powering and communicating with a tag.

The tag antenna captures energy and transfers the tag’s ID (the tag’s chip coordinates this

process). The encapsulation maintains the tag’s integrity and protects the antenna and

chip from environmental conditions or reagents.

Two fundamentally different RFID design approaches exist for

transferring power from the reader to the tag: magnetic induction and electromagnetic

(EM) wave capture. These two designs take advantage of the EM properties associated

with an RF antenna—the near field and the far field. Both can transfer enough power to a

remote tag to sustain its operation—typically between 10 _W and 1 mW, depending on

the tag type. (For comparison, the nominal power an Intel XScale processor consumes is

approximately 500 mW, and an Intel Pentium 4 consumes up to 50 W.) Through various

modulation techniques, near- and far-field-based signals can also transmit and receive

data.

This plays a major work in some applications like:

If this RFID is implemented in a library as the RFID tag can contain

identifying information, such as a book's title or material type without having to be

pointed to a separate database. The information is read by an RFID reader, which

replaces the standard barcode reader commonly found at a library's circulation desk. It

may replace or be added to the barcode, offering a different means of inventory

management by the staff and self service by the borrowers. It can also act as a security

device, taking the place of the more traditional electromagnetic security strip and not only

the books, but also the membership cards could be fitted with an RFID tag.

The scenarios focus on a bicycle manufacturer that produces high-end

bicycles for the global market. All parts are purchased from vendors, except for the

frames, which are made in-house from raw steel pipe. The description shows the potential

of RFID to deliver benefits at every stage of the supply chain as the bikes are assembled,

distributed to retailers, and finally sold to customers.

LIQUID CRYSTAL DISPLAY

A liquid crystal display (LCD) is a thin, flat panel used for electronically

displaying information such as text, images, and moving pictures. Its uses include

monitors for computers, televisions, instrument panels, and other devices ranging from

aircraft cockpit displays, to every-day consumer devices such as video players, gaming

devices, clocks, watches, calculators, and telephones. Among its major features are its

lightweight construction, its portability, and its ability to be produced in much larger

screen sizes than are practical for the construction of cathode ray tube (CRT) display

technology. Its low electrical power consumption enables it to be used in battery-powered

electronic equipment. It is an electronically-modulated optical device made up of any

number of pixels filled with liquid crystals and arrayed in front of a light source

(backlight) or reflector to produce images in color or monochrome. The earliest discovery

leading to the development of LCD technology, the discovery of liquid crystals, dates

from 1888. By 2008, worldwide sales of televisions with LCD screens had surpassed the

sale of CRT units.

PIN DESCRIPTION:

PIN DESCRIPTION:

PIN SYMBOL I/O DESCRIPTION

1 VSS -- Ground

2 VCC -- +5V power supply

3 VEE -- Power supply to control contrast

4 RS I RS=0 to select command register

RS=1 to select data register

5 R/W I R/W=0 for write

R/W=1 for read

6 EN I/O Enable

7 DB0 I/O The 8-bit data bus

8 DB1 I/O The 8-bit data bus

9 DB2 I/O The 8-bit data bus

10 DB3 I/O The 8-bit data bus

11 DB4 I/O The 8-bit data bus

12 DB5 I/O The 8-bit data bus

13 DB6 I/O The 8-bit data bus

14 DB7 I/O The 8-bit data bus

VCC, VSS and VEE:

While VCC and VSS provide +5V and ground respectively, VEE is used for

controlling LCD contrast.

RS (REGISTER SELECT):

There are two important registers inside the LCD. When RS is low (0), the

data is to be treated as a command or special instruction (such as clear screen, position

cursor, etc.). When RS is high (1), the data that is sent is a text data which should be

displayed on the screen. For example, to display the letter "T" on the screen you would

set RS high.

RW (READ/WRITE):

The RW line is the "Read/Write" control line. When RW is low (0), the

information on the data bus is being written to the LCD. When RW is high (1), the

program is effectively querying (or reading) the LCD. Only one instruction ("Get LCD

status") is a read command. All others are write commands, so RW will almost be low.

EN (ENABLE):

The EN line is called "Enable". This control line is used to tell the LCD

that you are sending it data. To send data to the LCD, your program should first set this

line high (1) and then set the other two control lines and/or put data on the data bus.

When the other lines are completely ready, bring EN low (0) again. The 1-0 transition

tells the 44780 to take the data currently found on the other control lines and on the data

bus and to treat it as a command.

D0-D7 (DATA LINES):

The 8-bit data pins, D0-D7 are used to send information to the LCD or

read the content of the LCD’s internal registers.

To display letters and numbers, we send ASCII codes for the letters A-Z,

a-z and numbers 0-9 to these pins while making RS=1.

There are also instruction command codes that can be sent to the LCD to

clear the display or force the cursor to the home position or blink the cursor.

We also use RS=0 to check the busy flag bit to see if the LCD is ready to

receive the information. The busy flag is D7 and can be read when R/W = 1 and RS=0, as

follows: if R/W = 1, RS = 0. When D7=1 (busy flag = 1), the LCD is busy taking care of

internal operations and will not accept any new information. When D7 = 0, the LCD is

ready to receive new information.

Note: it is recommended to check the flag before writing any data to LCD.

LCD COMMAND CODES:

CODE (HEX)

COMMAND TO LCD INSTRUCTION REGISTER

1 CLEAR DISPLAY SCREEN2 RETURN HOME4 DECREMENT CURSOR(SHIFT CURSOR TO LEFT)6 INCREMENT CURSOR(SHIFT CURSOR TO RIGHT)5 SHIFT DISPLAY RIGHT7 SHIFT DISPLAY LEFT8 DISPLAY OFF,CURSOR OFFA DISPLAY OFF,CURSOR ONC DISPLAY ON,CURSOR OFFE DISPLAY ON CURSOR BLINKINGF DISPLAY ON CURSOR BLINKING10 SHIFT CURSOR POSITION TO LEFT14 SHIFT CURSOR POSITION TO RIGHT18 SHIFT THE ENTIRE DISPLAY TO THE LEFT1C SHIFT THE ENTIRE DISPLAY TO THE RIGHT80 FORCE CURSOR TO BEGINNING OF 1ST LINEC0 FORCE CURSOR TO BEGINNING OF 2ND LINE38 2 LINES AND 5x7 MATRIX

CURSOR ADDRESSES FOR LCD’S:

16x2 LCD 80 81 82 83 84 85 86 through 8F C0 C1 C2 C3 C4 C5 C6 through CF20x1 LCD 80 81 82 83 through 9320x2 LCD 80 81 82 83 through 93 C0 C1 C2 C3 through D320x4 LCD 80 81 82 83 through 93 C0 C1 C2 C3 through D3 94 95 96 97 through A7 D4 D5 D6 D7 through E740x2 LCD 80 81 82 83 through A7 C0 C1 C2 C3 through E7NOTE: All data is in HEX.

ADVANTAGES:

LCD interfacing with 8051 is a real-world application. In recent years the LCD is

finding widespread use replacing LED’s (seven segment LED’s or other multi segment

LED’s).

This is due to following reasons:

The declining prices of LCD’s.

The ability to display numbers, characters and graphics. This is in contrast to

LED’s, which are limited to numbers and a few characters. An intelligent LCD

displays two lines, 20 characters per line, which is interfaced to the 8051.

Incorporation of a refreshing controller into the LCD, thereby relieving the CPU

to keep displaying the data.

Ease of programming for characters and graphics.

LIGHT EMITTING DIODE

A light-emitting diode (LED) is a semiconductor diode that emits

incoherent narrow spectrum light when electrically biased in the forward direction of the

pn-junction, as in the common LED circuit. This effect is a form of electroluminescence.

Like a normal diode, the LED consists of a chip of semi-conducting material

impregnated, or doped, with impurities to create a p-n junction. As in other diodes,

current flows easily from the p-side, or anode, to the n-side, or cathode, but not in the

reverse direction. Charge-carriers—electrons and holes—flow into the junction from

electrodes with different voltages. When an electron meets a hole, it falls into a lower

energy level, and releases energy in the form of a photon.

The wavelength of the light emitted, and therefore its color, depends on

the band gap energy of the materials forming the p-n junction. In silicon or germanium

diodes, the electrons and holes recombine by a non-radiative transition which produces

no optical emission, because these are indirect band gap materials. The materials used for

the LED have a direct band gap with energies corresponding to near-infrared, visible or

near-ultraviolet light.

LED development began with infrared and red devices made with gallium

arsenide. Advances in materials science have made possible the production of devices

with ever-shorter wavelengths, producing light in a variety of colors.

LEDs are usually built on an n-type substrate, with an electrode attached

to the p-type layer deposited on its surface. P-type substrates, while less common, occur

as well. Many commercial LEDs, especially GaN/InGaN, also use sapphire substrate.

Most materials used for LED production have very high refractive indices.

This means that much light will be reflected back in to the material at the material/air

surface interface. Therefore Light extraction in LEDs is an important aspect of LED

production, subject to much research and development.

Solid state devices such as LEDs are subject to very limited wear and tear

if operated at low currents and at low temperatures. Many of the LEDs produced in the

1970s and 1980s are still in service today. Typical lifetimes quoted are 25,000 to 100,000

hours but heat and current settings can extend or shorten this time significantly.

Conventional LEDs are made from a variety of inorganic semiconductor

materials; the following table shows the available colors with wavelength range and

voltage drop.

Color Wavelength (nm) Voltage (V)

Infrared λ > 760 ΔV < 1.9

Red 610 < λ < 760 1.63 < ΔV < 2.03

Orange 590 < λ < 610 2.03 < ΔV < 2.10

Yellow 570 < λ < 590 2.10 < ΔV < 2.18

Green 500 < λ < 570 1.9 < ΔV < 4.0

Blue 450 < λ < 500 2.48 < ΔV < 3.7

Violet 400 < λ < 450 2.76 < ΔV < 4.0

Purple multiple types 2.48 < ΔV < 3.7

Ultraviolet λ < 400 3.1 < ΔV < 4.4

White Broad spectrum ΔV = 3.5

ADVANTAGES OF LEDS:

LED’s have many advantages over other technologies like lasers. As compared to

laser diodes or IR sources

LED’s are conventional incandescent lamps. For one thing, they don't have a

filament that will burn out, so they last much longer. Additionally, their small

plastic bulb makes them a lot more durable. They also fit more easily into modern

electronic circuits.

The main advantage is efficiency. In conventional incandescent bulbs, the light-

production process involves generating a lot of heat (the filament must be

warmed). Unless you're using the lamp as a heater, because a huge portion of the

available electricity isn't going toward producing visible light.

LED’s generate very little heat. A much higher percentage of the electrical power

is going directly for generating light, which cuts down the electricity demands

considerably.

LED’s offer advantages such as low cost and long service life. Moreover LED’s

have very low power consumption and are easy to maintain.

DISADVANTAGES OF LEDS:

LED’s performance largely depends on the ambient temperature of the operating

environment.

LED’s must be supplied with the correct current.

LED’s do not approximate a "point source" of light, so cannot be used in

applications needing a highly collimated beam.

But the disadvantages are quite negligible as the negative properties of LED’s do not

apply and the advantages far exceed the limitations.

CODEVISION AVR C COMPILER

Assembly code is used for one or more of three reasons: speed,

compactness or because some functions are easier to do in assembler than in a higher

level language. It is well known that using a high level language always results in the

faster program development but there are times when, for the reasons stated above, one

wants to use assembly language.

The Code Vision AVR C Compiler, like other compilers meant for

microcontroller development, has an easy interface to assembly language. Assembler

code may be imbedded anywhere in a C program.

FEATURES:

Installing and Configuring Code Vision AVR to work with the Atmel STK500

starter kit and AVR Studio debugger.

Creating a New Project using the Code Wizard AVR Automatic Program

Generator

Editing and Compiling the C code

Loading the executable code into the target microcontroller on the STK500 starter

kit.

INTRODUCTION:

This is an introduction to the user through the preparation of an example C

program using the Code Vision AVR C compiler. The example, which is the subject of

this application note, is a simple program for the Atmel AT90S8515 microcontroller on

the STK500 starter kit.

PREPARATION:

Install the Code Vision AVR C Compiler by executing the file setup.exe.

It is assumed that the program was installed in the default directory: C:\cvavr. Install the

Atmel AVR Studio debugger by executing the file setup.exe. It is assumed that AVR

Studio was installed in the default directory: C:\Program Files\Atmel\AVR Studio. Setup

the starter kit (STK500) according to the instructions in the STK500 User Guide. Make

sure the power is off and insert the AT90S8515 chip into the appropriate socket marked

SCKT3000D3. Set the XTAL1 jumper. Also set the OSCSEL jumper between pins 1 and

2. Connect one 10 pin ribbon cable between the PORTB and LEDS headers. This will

allow displaying the state of AT90S8515’s PORTB outputs. Connect one 6 pin ribbon

cable between the ISP6PIN and SPROG3 headers. This will allow Code Vision AVR to

automatically program the AVR chip after a successful compilation. In order to use this

feature, one supplementary setting must be done: Open the Code Vision AVR IDE and

select the Settings | Programmer menu option. Make sure to select the Atmel STK500

AVR Chip Programmer Type and the corresponding Communication Port which is used

with the STK500 starter kit. Then press the STK500.EXE Directory button in order to

specify the location of the stk500.exe command line utility supplied with AVR Studio.

Select the c:\Program Files\Atmel\AVR Studio\STK500 directory and press the OK

button. Then press once again the OK button in order to save the Programmer Settings. In

order to be able to invoke the AVR Studio debugger/simulator from within the Code

Vision AVR IDE one final setting must be done. Select the Settings | Debugger menu

option.

SHORT REFERENCE:

PREPARATIONS:

1. Install the Code Vision AVR C compiler

2. Install the Atmel AVR Studio debugger

3. Install the Atmel STK500 starter kit

4. Configure the STK500 programmer support in the Code Vision AVR IDE by selecting:

Settings->Programmer-> AVR Chip Programmer Type: STK500-> Specify

STK500.EXE Directory: C:\Program Files\Atmel\AVR Studio\STK500->

Communication Port

5. Configure the AVR Studio support in the Code Vision AVR IDE by selecting:

Settings->Debugger-> Enter: C:\Program Files\Atmel\AVR Studio.

GETTING STARTED:

1. Create a new project by selecting: File->New->Select Project

2. Specify that the Code Wizard AVR will be used for producing the C source and project

files: Use the Code Wizard? ->Yes

3. In the Code Wizard AVR window specify the chip type and clock frequency: Chip-

>Chip: AT90S8515->Clock: 3.86MHz

4. Configure the I/O ports: Ports->Port B- >Data Direction: all Outputs->Output Value:

all 1’s

5. Configure Timer 1: Timers->Timer1- >Clock Value: 3.594 kHz->Interrupt on: Timer1

Overflow->Val: 0xF8FB

6. Generate the C source, C project and Code Wizard AVR project files by selecting: File

| Generate, Save and Exit-> Create new directory: C:\cvavr\led-> Save: led .c ->Save:

led.prj->Save: led.cwp

7. Edit the C source code

8. View or Modify the Project Configuration by selecting Project->Configure-> After

Make->Program the Chip

9. Compile the program by selecting: Project->Make

10. Automatically program the AT90S8515 chip on the STK500 starter kit: Apply power-

>Information->Program.

ATMEGA8515

FEATURES:

High-performance, Low-power AVR® 8-bit Microcontroller

RISC Architecture

–130 Powerful Instructions – Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

– Up to 16 MIPS Throughput at 16 MHz

– On-chip 2-cycle Multiplier

Nonvolatile Program and Data Memories

– 8K Bytes of In-System Self-programmable Flash

Endurance: 10,000 Write/Erase Cycles

– Optional Boot Code Section with Independent Lock bits

In-System Programming by On-chip Boot Program

True Read-While-Write Operation

– 512 Bytes EEPROM

Endurance: 100,000 Write/Erase Cycles

– 512 Bytes Internal SRAM

– Up to 64K Bytes Optional External Memory Space

– Programming Lock for Software Security

Peripheral Features

– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode

– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and

Capture Mode

– Three PWM Channels

– Programmable Serial USART

– Master/Slave SPI Serial Interface

– Programmable Watchdog Timer with Separate On-chip Oscillator

–On-chip Analog Comparator

Special Microcontroller Features

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated RC Oscillator

– External and Internal Interrupt Sources

– Three Sleep Modes: Idle, Power-down and Standby

I/O and Packages

– 35 Programmable I/O Lines

– 40-pin PDIP, 44-lead TQFP, 44-lead PLCC, and 44-pad QFN/MLF

Operating Voltages

– 2.7 - 5.5V for ATmega8515L

– 4.5 - 5.5V for ATmega8515

Speed Grades

–0 - 8 MHz for ATmega8515L

–0 - 16 MHz for ATmega8515

PIN CONFIGURATIONS:

OVERVIEW:

The ATmega8515 is a low-power CMOS 8-bit microcontroller based on

the AVR enhanced RISC architecture. By executing powerful instructions in a single

clock cycle, the ATmega8515 achieves throughputs approaching 1 MIPS per MHz

allowing the system designer to optimize power consumption versus processing speed.

The AVR core combines a rich instruction set with 32 general purpose

working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit

(ALU), allowing two independent registers to be accessed in one single instruction

executed in one clock cycle. The resulting architecture is more code efficient while

achieving throughputs up to ten times faster than conventional CISC microcontrollers.

The ATmega8515 provides the following features: 8K bytes of In-System

Programmable Flash with Read-While-Write capabilities, 512 bytes EEPROM, 512 bytes

SRAM, an External memory interface, 35 general purpose I/O lines, 32 general purpose

working registers, two flexible Timer/Counters with compare modes, Internal and

External interrupts, a Serial Programmable USART, a programmable Watchdog Timer

with internal Oscillator, a SPI serial port, and three software selectable power saving

modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI

port, and Interrupt system to continue functioning. The Power-down mode saves the

Register contents but freezes the Oscillator, disabling all other chip functions until the

next interrupt or hardware reset. In Standby mode, the crystal/resonator Oscillator is

running while the rest of the device is sleeping. This allows very fast start-up combined

with low-power consumption.

The device is manufactured using Atmel’s high density nonvolatile

memory technology. The On-chip ISP Flash allows the Program memory to be

reprogrammed In-System through an SPI serial interface, by a conventional nonvolatile

memory programmer, or by an On-chip Boot program running on the AVR core. The

boot program can use any interface to download the application program in the

Application Flash memory. Software in the Boot Flash section will continue to run while

the Application Flash section is updated, providing true Read-While-Write operation. By

combining an 8-bit RISC CPU with In-System Self-programmable Flash on a monolithic

chip, the Atmel ATmega8515 is a powerful microcontroller that provides a highly

flexible and cost effective solution to many embedded control applications.

The ATmega8515 is supported with a full suite of program and system

development tools including: C Compilers, Macro assemblers, Program

debugger/simulators, In-circuit Emulators, and Evaluation kits.

Typical values contained in this datasheet are based on simulations and

characterization of other AVR microcontrollers manufactured on the same process

technology. Min and Max values will be available after the device is characterized.

PIN DESCRIPTIONS:

VCC:

Digital supply voltage

GND:

Ground

Port A (PA7...PA0):

Port A is an 8-bit bi-directional I/O port with internal pull-up resistors

(selected for each bit). The Port A output buffers have symmetrical drive characteristics

with both high sink and source capability. When pins PA0 to PA7 are used as inputs and

are externally pulled low, they will source current if the internal pull-up resistors are

activated. The PortA pins are tri-stated when a reset condition becomes active, even if the

clock is not running.

Port B (PB7...PB0):

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors

(selected for each bit). The Port B output buffers have symmetrical drive characteristics

with both high sink and source capability. As inputs, Port B pins that are externally

pulled low will source current if the pull-up resistors are activated. The Port B pins are

tri-stated when a reset condition becomes active, even if the clock is not running.

Port C (PC7...PC0):

Port C is an 8-bit bi-directional I/O port with internal pull-up resistors

(selected for each bit). The Port C output buffers have symmetrical drive characteristics

with both high sink and source capability. As inputs, Port C pins that are externally

pulled low will source current if the pull-up resistors are activated. The Port C pins are

tri-stated when a reset condition becomes active, even if the clock is not running.

Port D (PD7...PD0):

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors

(selected for each bit). The Port D output buffers have symmetrical drive characteristics

with both high sink and source capability. As inputs, Port D pins that are externally

pulled low will source current if the pull-up resistors are activated. The Port D pins are

tri-stated when a reset condition becomes active, even if the clock is not running.

Port E (PE2...PE0):

Port E is a 3-bit bi-directional I/O port with internal pull-up resistors

(selected for each bit). The Port E output buffers have symmetrical drive characteristics

with both high sink and source capability. As inputs, Port E pins that are externally pulled

low will source current if the pull-up resistors are activated. The Port E pins are tri-stated

when a reset condition becomes active, even if the clock is not running.

RESET Bar:

Reset input. A low level on this pin for longer than the minimum pulse

length will generate a reset, even if the clock is not running. The minimum pulse length is

given in Table 18 on page 46. Shorter pulses are not guaranteed to generate a reset.

XTAL1:

Input to the inverting Oscillator amplifier and input to the internal clock

operating circuit.

XTAL2:

Output from the inverting Oscillator amplifier

RFID READER

Radio frequency identification (RFID) in a variety of ways including

automatic identification and data capture (AIDC) solutions. We pride ourselves in

providing customers with inexpensive RFID solutions that integrate well with other

systems.

RFID Reader Module, are also called as interrogators. They convert radio

waves returned from the RFID tag into a form that can be passed on to Controllers, which

can make use of it. RFID tags and readers have to be tuned to the same frequency in

order to communicate. RFID systems use many different frequencies, but the most

common and widely used & supported by our Reader is 125 KHz.

The reader has been designed as a Plug & Play Module and can be

plugged on a Standard 300 MIL-28 Pin IC socket form factor.

FUNCTIONS:

1. Supports reading of 64 Bit Manchester Encoded cards

2. Pins for External Antenna connection

3. Serial Interface (TTL)

4. Wigand Interface also available

5. Customer application on request

TECHNICAL DATA:

Frequency : 125 kHzRead Range : up to 8 cm

Power supply : 5V DC ( ± 5 %)Current consumption max. : 60 mAOperating temperature : -20 ... +65° CStoring temperature : -40 ... +75° CInterface : RS232 ( TTL),Wiegand and others (on Demand)Dimensions (l x w x h) : 36 x 18 x 10 mmSerial Interface Format : 9600Baud, No Parity, 8 Data bits,1 Stop bit

Note: The TTL RS-232 Interface can not be connected directly to a PC COM port.

Therefore the signal must be converted to RS 232 level for PC connection.

This Firmware has the following Functions:

Read Tag-ID

Send Tag-ID in ASCII Format through the Serial/ Wiegand Interface.

Sequence starts with Tag ID follows from Carriage-Return/Line-Feed (0Dh 0Ah),

Example: '041201938C<CR><LF>'

RFID 125 Reader Module PIN Diagram:

PIN NO. SIGNAL DESCRIPTION

6  TxD Transmit data (TTL level) output from module to serial interface

4 Wiegand DATA HIGH ( available in Wiegand )

 It will give DATA HIGH signal.

8  RxD Receive data (TTL level) input to the module from serial interface

14  LED ( active low)  LED will glow for 280 ms when tag is

(available in RS 232 )

 Wiegand DATA LOW ( available in Wiegand )

detected

 It will give DATA LOW signal.

12  Buzzer (active low) Buzzer will buzz for 280 ms when tag is detected

Note:

1. Reader module has to be mounted on non-metallic surface, else it may affect the

operation of reader.

2. Buzzer & LED are Active low signals.

3. For Buzzer & LED current limiting Resister has to be mounted. MAX current is

20mA. (470 or 510 ohms for LED and 240 or 270 Ohms for Buzzer)

4. LED’s Anode and Buzzer’s Positive marked pin to be connected to Vcc.

5. Wiegand out put format is also available in select readers.

APPLICATIONS:

RFID readers can be used for Access control, Time & Attendance,

Vending machines, industrial and other applications where Reading the data from the

Card only is required.

AT24C08

FEATURES:

Low-voltage and Standard-voltage Operation

– 2.7 (VCC = 2.7V to 5.5V)

– 1.8 (VCC = 1.8V to 5.5V)

Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or

2048 x 8 (16K)

2-wire Serial Interface

Schmitt Trigger, Filtered Inputs for Noise Suppression

Bi-directional Data Transfer Protocol

100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility

Write Protect Pin for Hardware Data Protection

8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes

Partial Page Writes are Allowed

Self-timed Write Cycle (10 ms max)

High-reliability

– Endurance: 1 Million Write Cycles

– Data Retention: 100 Years

Automotive Grade and Extended Temperature Devices Available

8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP Packages.

DESCRIPTION:

The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of

serial electrically erasable and programmable read-only memory (EEPROM) organized

as 128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many

industrial and commercial applications where low-power and low-voltage operation are

essential. The AT24C01A/02/04/08/16 is available in space-saving 8-pin PDIP, 8-lead

JEDEC SOIC, 8-lead MAP and 8-lead TSSOP packages and is accessed via a 2-wire

serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V

(1.8V to 5.5V) versions.

PIN CONFIGURATION:

PIN DESCRIPTION:

SERIAL CLOCK (SCL):

The SCL input is used to positive edge clock data into each EEPROM device

and negative edge clock data out of each device.

SERIAL DATA (SDA):

The SDA pin is bi-directional for serial data transfer. This pin is open-drain

driven and may be wire-ORed with any number of other open-drain or open collector

devices.

DEVICE/PAGE ADDRESSES (A2, A1 and A0):

The A2, A1 and A0 pins are device address inputs that are hard wired for the

AT24C01A and the AT24C02. As many as eight 1K/2K devices may be addressed on a

single bus system. The AT24C04 uses the A2 and A1 inputs for hard wire addressing and

a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no

connect. The AT24C08 only uses the A2 input for hardwire addressing and a total of two

8K devices may be addressed on a single bus system. The A0 and A1 pins are no

connects. The AT24C16 does not use the device address pins, which limits the number of

devices on a single bus to one. The A0, A1 and A2 pins are no connects.

WRITE PROTECT (WP):

The AT24C01A/02/04/16 has a Write Protect pin that provides hardware

data protection. The Write Protect pin allows normal read/write operations when

connected to ground (GND).

DEVICE OPERATION CLOCK AND DATA TRANSITIONS:

The SDA pin is normally pulled high with an external device. Data on the SDA

pin may change only during SCL low time. Data changes during SCL high periods will

indicate a start or stop condition as defined below.

START CONDITION:

A high-to-low transition of SDA with SCL high is a start condition which must

precede any other command.

STOP CONDITION:

A low-to-high transition of SDA with SCL high is a stop condition. After a read

sequence, the stop command will place the EEPROM in a standby power mode.

ACKNOWLEDGE:

All addresses and data words are serially transmitted to and from the EEPROM

in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each

word. This happens during the ninth clock cycle.

STANDBY MODE:

The AT24C01A/02/04/08/16 features a low-power standby mode which is

enabled:

(a) Upon power-up

(b) After the receipt of the STOP bit and the completion of any internal operations.

MEMORY RESET:

After an interruption in protocol, power loss or system reset, any 2-wire part can

be reset by following these steps:

1. Clock up to 9 cycles.

2. Look for SDA high in each cycle while SCL is high.

3. Create a start condition.

BUS TIMING:

SCL: SERIAL CLOCK, SDA: SERIAL DATA I/O:

BUS TIMING:

SCL: SERIAL CLOCK, SDA: SERIAL DATA I/O:

DATA VALIDITY:

START AND STOP DEFINITION

OUTPUT ACKNOWLEDGE

DEVICE ADDRESSING:

The 1K, 2K, 4K, 8K and 16K EEPROM devices all require an 8-bit device

address word following a start condition to enable the chip for a read or write operation.

The device address word consists of a mandatory one, zero sequence for the first four

most significant bits as shown. This is common to all the EEPROM devices. The next 3

bits are the A2, A1 and A0 device address bits for the 1K/2K EEPROM. These 3 bits

must compare to their corresponding hard-wired input pins. The 4K EEPROM only uses

the A2 and A1 device address bits with the third bit being a memory page address bit.

The two device address bits must compare to their corresponding hard-wired input pins.

The A0 pin is no connecting. The 8K EEPROM only uses the A2 device address bit with

the next 2 bits being for memory page addressing. The A2 bit must compare to its

corresponding hard-wired input pin. The A1 and A0 pins are no connecting. The 16K

does not use any device address bits but instead the 3 bits are used for memory page

addressing. These page addressing bits on the 4K, 8K and 16K devices should be

considered the most significant bits of the data word address which follows.

The A0, A1 and A2 pins are no connecting. The eighth bit of the device address is the

read/write operation select bit. A read operation is initiated if this bit is high and a write

operation is initiated if this bit is low. Upon a compare of the device address, the

EEPROM will output a zero. If a compare is not made, the chip will return to a standby

state.

WRITE OPERATIONS:

BYTE WRITE:

A write operation requires an 8-bit data word address following the device

address word and acknowledgment. Upon receipt of this address, the EEPROM will

again respond with a zero and then clock in the first 8-bit data word. Following receipt of

the 8-bit data word, the EEPROM will output a zero and the addressing device, such as a

microcontroller, must terminate the write sequence with a stop condition. At this time the

EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All

inputs are disabled during this write cycle and the EEPROM will not respond until the

write is complete.

PAGE WRITE:

The 1K/2K EEPROM is capable of an 8-byte page write, and the 4K, 8K

and 16K devices are capable of 16-byte page writes. A page write is initiated the same as

a byte write, but the microcontroller does not send a stop condition after the first data

word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data

word, the microcontroller can transmit up to seven (1K/2K) or fifteen (4K, 8K, 16K)

more data words. The EEPROM will respond with a zero after each data word received.

The microcontroller must terminate the page write sequence with a stop condition. The

data word address lower three (1K/2K) or four (4K, 8K, 16K) bits are internally

incremented following the receipt of each data word. The higher data word address bits

are not incremented, retaining the memory page row location. When the word address,

internally generated, reaches the page boundary, the following byte is placed at the

beginning of the same page. If more than eight (1K/2K) or sixteen (4K, 8K, 16K) data

words are transmitted to the EEPROM, the data word address will “roll over” and

previous data will be overwritten.

ACKNOWLEDGE POLLING:

Once the internally timed write cycle has started and the EEPROM inputs are

disabled, acknowledge polling can be initiated. This involves sending a start condition

followed by the device address word. The read/write bit is representative of the operation

desired. Only if the internal write cycle has completed will the EEPROM respond with a

zero allowing the read or write sequence to continue.

READ OPERATIONS:

Read operations are initiated the same way as write operations with the exception

that the read/write select bit in the device address word is set to one. There are three read

operations: current address read, random address read and sequential read.

CURRENT ADDRESS READ:

The internal data word address counter maintains the last address accessed during

the last read or write operation, incremented by one. This address stays valid between

operations as long as the chip power is maintained. The address “roll over” during read is

from the last byte of the last memory page to the first byte of the first page. The address

“roll over” during write is from the last byte of the current page to the first byte of the

same page. Once the device address with the read/write select bit set to one is clocked in

and acknowledged by the EEPROM, the current address data word is serially clocked

out. The microcontroller does not respond with an input zero but does generate a

following stop condition.

RANDOM READ:

A random read requires a “dummy” byte write sequence to load in the data word

address. Once the device address word and data word address are clocked in and

acknowledged by the EEPROM, the microcontroller must generate another start

condition. The microcontroller now initiates a current address read by sending a device

address with the read/write select bit high. The EEPROM acknowledges the device

address and serially clocks out the data word. The microcontroller does not respond with

a zero but does generate a following stop condition.

SEQUENTIAL READ:

Sequential reads are initiated by either a current address read or a random

address read. After the microcontroller receives a data word, it responds with an

acknowledge. As long as the EEPROM receives an acknowledge, it will continue to

increment the data word address and serially clock out sequential data words. When the

memory address limit is reached, the data word address will “roll over” and the

sequential read will continue. The sequential read operation is terminated when the

microcontroller does not respond with a zero but does generate a following stop

condition.

DS1307

FEATURES :

Real-time clock (RTC) counts seconds, minutes, hours, date of the month, month,

day of the week, and year with leap-year compensation valid up to 2100.

56-byte, battery-backed, nonvolatile (NV) RAM for data storage.

Two-wire serial interface.

Programmable square wave output signal.

Automatic power-fail detects and switches circuitry.

Consumes less than 500nA in battery backup mode with oscillator running.

Optional industrial temperature range: 40°C to +85°C

Available in 8-pin DIP or SOIC.

Underwriters Laboratory (UL) recognized.

PIN ASSIGNMENT:

PIN DESCRIPTION:VCC : Primary Power Supply

X1 X 2 : 32.768 kHz Crystal Connection

VBAT : +3V Battery Input

GND : Ground

SDA : Serial Data

SCL : Serial Clock

SQW/OUT : Square Wave/Output Driver

DESCRIPTION:

The DS1307 Serial Real-Time Clock is a low-power; full binary-coded

decimal (BCD) clock/calendar plus 56 bytes of NV SRAM. Address and data are

transferred serially via a 2-wire, bi-directional bus. The clock/calendar provides seconds,

minutes, hours, day, date, month, and year information. The end of the month date is

automatically adjusted for months with fewer than 31 days, including corrections for leap

year. The clock operates in either the 24-hour or 12-hour format with AM/PM indicator.

The DS1307 has a built-in power sense circuit that detects power failures and

automatically switches to the battery supply.

TYPICAL OPERATING CIRCUIT:

OPERATION:

The DS1307 operates as a slave device on the serial bus. Access is

obtained by implementing a START condition and providing a device identification code

followed by a register address. Subsequent registers can be accessed sequentially until a

STOP condition is executed. When VCC falls below 1.25 x VBAT the device terminates

an access in progress and resets the device address counter. Inputs to the device will not

be recognized at this time to prevent erroneous data from being written to the device from

an out of tolerance system. When VCC falls below VBAT the device switches into a low-

current battery backup mode. Upon power-up, the device switches from battery to VCC

when VCC is greater than VBAT + 0.2V and recognizes inputs when VCC is greater than

1.25 x VBAT. The above diagram shows the main elements of the serial RTC.

DS1307 BLOCK DIAGRAM:

SIGNAL DESCRIPTIONS:

VCC, GND:

DC power is provided to the device on these pins. VCC is the +5V input.

When 5V is applied within normal limits, the device is fully accessible and data can be

written and read. When a 3V battery is connected to the device and VCC is below 1.25 x

VBAT, reads and writes are inhibited. However, the timekeeping function continues

unaffected by the lower input voltage. As VCC falls below VBAT the RAM and

timekeeper are switched over to the external power supply (nominal 3.0V DC) at VBAT.

VBAT:

Battery input for any standard 3V lithium cell or other energy source. Battery

voltage must be held between 2.0V and 3.5V for proper operation. The nominal write

protect trip point voltage at which access to the RTC and user RAM is denied is set by

the internal circuitry as 1.25 x VBAT nominal. A lithium battery with 48mAhr or greater

will back up the DS1307 for more than 10 years in the absence of power at 25ºC. UL

recognized to ensure against reverse charging current when used in conjunction with a

lithium battery.

SCL (Serial Clock Input):

SCL is used to synchronize data movement on the serial interface.

SDA (Serial Data Input/Output):

SDA is the input/output pin for the 2-wire serial interface. The SDA pin is

open drain which requires an external pull up resistor.

SQW/OUT (Square Wave/Output Driver):

When enabled, the SQWE bit set to 1, the SQW/OUT pin outputs one of

four square wave frequencies (1Hz, 4 kHz, 8 kHz, 32 kHz). The SQW/OUT pin is open

drain and requires an external pull-up resistor. SQW/OUT will operate with either Vcc or

Vbat applied.

X1, X2:

Connections for a standard 32.768 kHz quartz crystal. The internal oscillator

circuitry is designed for operation with a crystal having a specified load capacitance (CL)

of 12.5pF.

CLOCK ACCURACY:

The accuracy of the clock is dependent upon the accuracy of the crystal

and the accuracy of the match between the capacitive load of the oscillator circuit and the

capacitive load for which the crystal was trimmed. Additional error will be added by

crystal frequency drift caused by temperature shifts. External circuit noise coupled into

the oscillator circuit may result in the clock running fast.

RTC AND RAM ADDRESS MAP:

The address map for the RTC and RAM registers of the DS1307 is

shown below. The RTC registers are located in address locations 00h to 07h. The RAM

registers are located in address locations 08h to 3Fh. During a multi-byte access, when

the address pointer reaches 3Fh, the end of RAM space, it wraps around to location 0 the

beginning of the clock.

CLOCK AND CALENDAR:

The time and calendar information is obtained by reading the appropriate

register bytes.

The RTC registers are illustrated in the below figure. The time and calendar

are set or initialized by writing the appropriate register bytes. The contents of the time

and calendar registers are in the BCD format. Bit 7 of register 0 is the clock halt (CH) bit.

When this bit is set to a 1, the oscillator is disabled. When cleared to a 0, the oscillator is

enabled.

The DS1307 can be run in either 12-hour or 24-hour mode. Bit 6 of the hours

register is defined as the 12- or 24-hour mode select bit. When high, the 12-hour mode is

selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic high being PM. In the

24-hour mode, bit 5 is the second 10 hour bit (20- 23 hours).

On a 2-wire START, the current time is transferred to a second set of

registers. The time information is read from these secondary registers, while the clock

may continue to run. This eliminates the need to reread the registers in case of an update

of the main registers during a read.

DS1307 TIMEKEEPER REGISTERS:

CONTROL REGISTER:

The DS1307 control register is used to control the operation of the SQW/OUT

pin.

OUT (Output control):

This bit controls the output level of the SQW/OUT pin when the square wave

output is disabled. If SQWE = 0, the logic level on the SQW/OUT pin is 1 if OUT = 1

and is 0 if OUT = 0.

SQWE (Square Wave Enable):

This bit, when set to logic 1, will enable the oscillator output. The frequency of

the square wave output depends upon the value of the RS0 and RS1 bits. With the square

wave output set to 1Hz, the clock registers update on the falling edge of the square wave.

RS (Rate Select):

These bits control the frequency of the square wave output when the square wave

output has been enabled. Table below lists the square wave frequencies that can be

selected with the RS bits.

SQUAREWAVE OUTPUT FREQUENCY:

2-WIRE SERIAL DATA BUS:

The DS1307 supports a bi-directional, 2-wire bus and data transmission

protocol. A device that sends data onto the bus is defined as a transmitter and a device

receiving data as a receiver. The device that controls the message is called a master. The

devices that are controlled by the master are referred to as slaves. The bus must be

controlled by a master device that generates the serial clock (SCL), controls the bus

access, and generates the START and STOP conditions. The DS1307 operates as a slave

on the 2-wire bus. A typical bus configuration using this 2-wire protocol is show in

Figure below.

TYPICAL 2-WIRE BUS CONFIGURATION:

Data transfer may be initiated only when the bus is not busy.

During data transfer, the data line must remain stable whenever the clock line is

HIGH. Changes in the data line while the clock line is high will be interpreted as control

signals.

Accordingly, the following bus conditions have been defined:

BUS NOT BUSY:

Both data and clock lines remain HIGH.

START DATA TRANSFER:

A change in the state of the data line, from HIGH to LOW, while the clock is

HIGH, defines a START condition.

STOP DATA TRANSFER:

A change in the state of the data line, from LOW to HIGH, while the clock line

is HIGH, defines the STOP condition.

DATA VALID:

The state of the data line represents valid data when, after a START condition,

the data line is stable for the duration of the HIGH period of the clock signal. The data on

the line must be changed during the LOW period of the clock signal. There is one clock

pulse per bit of data.

Each data transfer is initiated with a START condition and terminated with a

STOP condition. The number of data bytes transferred between START and STOP

conditions is not limited, and is determined by the master device. The information is

transferred byte-wise and each receiver acknowledges with a ninth bit. Within the 2-wire

bus specifications a regular mode (100 kHz clock rate) and a fast mode (400 kHz clock

rate) are defined. The DS1307 operates in the regular mode (100 kHz) only.

ACKNOWLEDGE:

Each receiving device, when addressed, is obliged to generate acknowledge

after the reception of each byte. The master device must generate an extra clock pulse

which is associated with this acknowledge bit.

A device that acknowledges must pull down the SDA line during the

acknowledge clock pulse in such a way that the SDA line is stable LOW during the

HIGH period of the acknowledge related clock pulse. Of course, setup and hold times

must be taken into account. A master must signal an end of data to the slave by not

generating an acknowledge bit on the last byte that has been clocked out of the slave. In

this case, the slave must leave the data line HIGH to enable the master to generate the

STOP condition.

DATA TRANSFER ON 2-WIRE SERIAL BUS:

Depending upon the state of the R/W bit, two types of data transfer are possible:

Data transfer from a master transmitter to a slave receiver:

The first byte transmitted by the master is the slave address. Next follows a

number of data bytes. The slave returns an acknowledge bit after each received byte. Data

is transferred with the most significant bit (MSB) first.

Data transfer from a slave transmitter to a master receiver:

The first byte (the slave address) is transmitted by the master. The slave then

returns an acknowledge bit. This is followed by the slave transmitting a number of data

bytes. The master returns an acknowledge bit after all received bytes other than the last

byte. At the end of the last received byte, a “not acknowledge” is returned. The master

device generates all of the serial clock pulses and the START and STOP conditions. A

transfer is ended with a STOP condition or with a repeated START condition. Since a

repeated START condition is also the beginning of the next serial transfer, the bus will

not be released. Data is transferred with the most significant bit (MSB) first.

The DS1307 may operate in the following two modes:

Slave receiver mode (DS1307 write mode):

Serial data and clock are received through SDA and SCL. After each byte is

received an acknowledge bit is transmitted. START and STOP conditions are recognized

as the beginning and end of a serial transfer. Address recognition is performed by

hardware after reception of the slave address and *direction bit. The address byte is the

first byte received after the start condition is generated by the master. The address byte

contains the 7 bit DS1307 address, which is 1101000, followed by the *direction bit

(R/W) which, for a write, is a 0. After receiving and decoding the address byte the device

outputs an acknowledge on the SDA line. After the DS1307 acknowledges the slave

address + write bit, the master transmits a register address to the DS1307. This will set

the register pointer on the DS1307. The master will then begin transmitting each byte of

data with the DS1307 acknowledging each byte received. The master will generate a stop

condition to terminate the data write.

DATA WRITE – SLAVE RECEIVER MODE:

Slave transmitter mode (DS1307 read mode):

The first byte is received and handled as in the slave receiver mode. However,

in this mode, the *direction bit will indicate that the transfer direction is reversed. Serial

data is transmitted on SDA by the DS1307 while the serial clock is input on SCL.

START and STOP conditions are recognized as the beginning and end of a serial transfer

.The address byte is the first byte received after the start condition is generated by the

master. The address byte contains the 7-bit DS1307 address, which is 1101000, followed

by the *direction bit (R/W) which, for a read, is a 1. After receiving and decoding the

address byte the device inputs an acknowledge on the SDA line. The DS1307 then begins

to transmit data starting with the register address pointed to by the register pointer. If the

register pointer is not written to before the initiation of a read mode the first address that

is read is the last one stored in the register pointer. The DS1307 must receive a “not

acknowledge” to end a read.

DATA READ – SLAVE TRANSMITTER MODE:

SN74LS21

These devices contain two independent 4-input AND gates. The

SN74LS21 is characterized for operating over the full military temperature range of -

55degrees to 125degree Celsius. It is characterized for operating from 0degree centigrade

to 70 degree centigrade. This device contains two independent gates each of which

performs the logic AND function.

PIN DIAGRAM:

FUNCTION TABLE:

LOGIC SYMBOL:

OPERATING CONDITIONS:

ELECTRICAL CHARACTERISTICS:

MAX232

FEATURES:

Operates From a Single 5-V Power Supply With 1.0-_F Charge-Pump Capacitors

Operates Up To 120 kbit/s

Two Drivers and Two Receivers

±30-V Input Levels

Low Supply Current . . . 8 mA Typical

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

Upgrade With Improved ESD (15-kV HBM) and 0.1-_F Charge-Pump Capacitors

is Available With the MAX202

Applications

– TIA/EIA-232-F, Battery-Powered Systems, Terminals, Modems, and

Computers

PIN CONFIGURATION:

DESCRIPTION:

The MAX232 is a dual driver/receiver that includes a capacitive

voltage generator to supply TIA/EIA-232-F voltage levels from a single 5-V supply.

Each receiver converts TIA/EIA-232-F inputs to 5-V TTL/CMOS levels. These receivers

have a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept +/-30-V

inputs. Each driver converts TTL/CMOS input levels into TIA/EIA-232-F levels.

LOGIC DIAGRAM (POSITIVE LOGIC):

MAX232:

The MAX232 is an integrated circuit that converts signals from an RS-232

serial port to signals suitable for use in TTL compatible digital logic circuits. The

MAX232 is a dual driver/receiver and typically converts the RX, TX, CTS and RTS

signals.

The drivers provide RS-232 voltage level outputs (approx. ± 7.5 V) from a

single + 5 V supply via on-chip charge pumps and external capacitors. This makes it

useful for implementing RS-232 in devices that otherwise do not need any voltages

outside the 0 V to + 5 V range, as power supply design does not need to be made more

complicated just for driving the RS-232 in this case.

The receivers reduce RS-232 inputs (which may be as high as ± 25 V), to

standard 5 V TTL levels. These receivers have a typical threshold of 1.3 V, and a typical

hysteresis of 0.5 V.

The later MAX232A is backwards compatible with the original MAX232

but may operate at higher baud rates and can use smaller external capacitors – 0.1 μF in

place of the 1.0 μF capacitors used with the original device.

RS232:

In telecommunications, RS-232 (Recommended Standard 232) is a

standard for serial binary data signals connecting between a DTE (Data Terminal

Equipment) and a DCE (Data Circuit-terminating Equipment). It is commonly used in

computer serial ports.

A charge pump is a kind of DC to DC converter that uses capacitors as

energy storage elements to create either a higher or lower voltage power source. Charge

pump circuits are capable of high efficiencies, sometimes as high as 90-95% while being

electrically simple circuits.

Charge pumps use some form of switching device(s) to control the

connection of voltages to the capacitor. For instance, to generate a higher voltage, the

first stage involves the capacitor being connected across a voltage and charged up. In the

second stage, the capacitor is disconnected from the original charging voltage and

reconnected with its negative terminal to the original positive charging voltage. Because

the capacitor retains the voltage across it (ignoring leakage effects) the positive terminal

voltage is added to the original, effectively doubling the voltage. The pulsing nature of

the higher voltage output is typically smoothed by the use of an output capacitor.

This is the charge pumping action, which typically operates at tens of

kilohertz up to several megahertz to minimize the amount of capacitance required. The

capacitor used as the charge pump is typically known as the "flying capacitor".

Another way to explain the operation of a charge pump is to consider it as

the combination of a DC to AC converter (the switches) followed by a voltage multiplier.

The voltage is load-dependent; higher loads result in lower average

voltages. Charge pumps can double voltages, triple voltages, halve voltages, invert

voltages, fractionally multiply or scale voltages such as x3/2, x4/3, x2/3, etc. and generate

arbitrary voltages, depending on the controller and circuit topology.

The term 'charge pump' is also used in phase-locked loop (PLL) circuits.

This is a completely different application. In a PLL the phase difference between the

reference signal (often from a crystal oscillator) and the output signal is translated into

two signals - UP and DN. The two signals control switches to steer current into or out of

a capacitor, causing the voltage across the capacitor to increase or decrease. In each

cycle, the time during which the switch is turned on is proportional to the phase

difference, hence the charge delivered is dependent on the phase difference also. The

capacitor acts to smooth out abrupt changes on the voltage and to ensure the PLL's

closed-loop stability. The voltage on the capacitor is used to tune a voltage-controlled

oscillator (VCO), generating the desired output signal frequency. The charge pump in a

PLL design is constructed in integrated-circuit (IC) technology, consisting of pull-up,

pull-down transistors and on-chip capacitors and resistors.

CODING

BIBLIOGRAPHY

TEXT BOOKS REFERED:

1. “The 8051 Microcontroller and Embedded Systems” by Muhammad Ali Mazidi

and Janice Gillispie Mazidi, Pearson Education.

2. 8051 Microcontroller Architecture, programming and application by KENNETH JAYALA

3. ATMEL 89s52 Data sheets

4. Hand book for Digital IC’s from Analogic Devices

WEBSITES VIEWED:

www.atmel.com

www.beyondlogic.org

www.dallassemiconductors.com

www.maxim-ic.com

www.alldatasheets.com

www.howstuffworks.com

www.digi.com

www.wikipedia.com