Research Article Analysis of Power Transfer Efficiency of ... · : IC parameter extraction set-up. RC components were added to the netlist of the IC using Calibre xRC of Mentor graphics

Research ArticleAnalysis of Power Transfer Efficiency of Standard IntegratedCircuit Immunity Test Methods

Hai Au Huynh1 Hak-Tae Lee2 Wansoo Nah1 and SoYoung Kim1

1College of Information and Communication Engineering Sungkyunkwan University SuwonGyeonggi-Do 440-746 Republic of Korea2Department of Aerospace Engineering Inha University Incheon 402-751 Republic of Korea

Correspondence should be addressed to SoYoung Kim ksyoungskkuedu

Received 23 January 2015 Accepted 15 April 2015

Academic Editor Jiseong Kim

Copyright copy 2015 Hai Au Huynh et al This is an open access article distributed under the Creative Commons Attribution Licensewhich permits unrestricted use distribution and reproduction in any medium provided the original work is properly cited

Direct power injection (DPI) and bulk current injection (BCI) methods are defined in IEC 62132-3 and IEC 62132-4 as theelectromagnetic immunity test method of integrated circuits (IC) The forward power measured at the RF noise generator whenthe IC malfunctions is used as the measure of immunity level of the IC However the actual power that causes failure in ICs isdifferent from forward power measured at the noise source Power transfer efficiency is used as a measure of power loss of the noiseinjection path In this paper the power transfer efficiencies of DPI and BCI methods are derived and validated experimentally withimmunity test setup of a clock divider IC Power transfer efficiency varies significantly over the frequency range as a function ofthe test method used and the IC input impedance For the frequency range of 15 kHz to 1GHz power transfer efficiency of the BCItest was constantly higher than that of the DPI test In the DPI test power transfer efficiency is particularly low in the lower testfrequency range up to 10MHz When performing the IC immunity tests following the standards these characteristics of the testmethods need to be considered

1 Introduction

Advances in integrated circuit (IC) design technology haveincreased the density of transistors and made the structure ofICs more complex Furthermore the operating frequency ofICs has increasedThe increase in density and high operatingfrequency of ICs has made the influence of electromagneticfields on devices more complex and difficult to analyze Inaddition there are higher expectations for the performanceof ICs in terms of electromagnetic immunity because mostICs operate in environments with electromagnetic waves anddisturbance signalsTherefore themethodused to predict theelectromagnetic immunity level of an IC during the designstage is extremely important

IEC proposed standards for direct power injection (DPI)and bulk current injection (BCI) [1ndash3] methods to measurethe conductive immunity of ICs to radio-frequency (RF)current and power induced by electromagnetic disturbanceIn the DPI method the RF disturbance power is injected toports of the device under test (DUT) via a coupling capacitor

to cause failure in operation of the DUT In the BCI methodRF power is injected to cause failure of the DUT by theBCI probe The maximum forward power level where theDUT still operates correctly is the electromagnetic immunitylevel of the DUT Injected RF power is transferred to thechip through noise injection paths including cables injectioncapacitors injection probes and traces Some portion of theinjected noise power is therefore consumed in the injectionpathThe actual power that causes chip failure is thus differentfrom the forward power measured at the generator

In related work [4] the authors derived an equation forthe power transfer efficiency of the bulk current injectionmethod Power transfer efficiencywas determined as the ratioof power transferred to the chip and the forward power atthe RF generator This equation was confirmed by AgilentDesign Systems (ADS) [5] simulation and then applied toestimate the real injected power at the failure point of a DUToperation

In this paper the power transfer efficiency of theDPIBCImethods is derived and calculated based on equivalent circuit

Hindawi Publishing CorporationInternational Journal of Antennas and PropagationVolume 2015 Article ID 497647 11 pageshttpdxdoiorg1011552015497647

2 International Journal of Antennas and Propagation

IC

PCB

Ground plane

Injection port

Injection cap

RF generator Oscilloscope

DC supply

VSS

(a)

IC

PCB

Ground plane

Injection port

VSS


DC supply

IRF

(b)

Figure 1 The concept of IC immunity test (a) DPI test (b) BCI test

models of the noise injection path [6ndash9] Scattering param-eter measurements are used to validate the accuracy of theequivalent circuit models The immunity of a clock dividerIC is tested by DPI and BCI methods and the power transferefficiencies are obtained The immunity level of the clockdivided circuit is evaluated as the ratio of the powermeasuredat the RF source to the real injected power at the input ofthe DUTTheDPI power transfer efficiency is compared withthe BCI power transfer efficiency and differences betweenthe two methods were analyzed The analysis of the powertransfer efficiency of the DPI method suggests that there isa significant amount of injected noise power loss due to thereflection at the input port

The rest of this paper is structured as follows Deriva-tion of the power transfer efficiency equation is shown inSection 2 In Section 3 the DPI and BCI equivalent circuitmodels are explained Results and discussions are presentedin Section 4 Concluding remarks are provided in Section 5

2 Power Transfer Efficiency Derivation

Figure 1 shows the basic concept underlying the DPI and BCItest methods Noise power is generated from a RF generatorand injected to the DUT via a coupling capacitor in the DPImethod versus a BCI probe in the BCI method Noise powerflows through injection components and PCB traces beforeentering the chip The injection path from the RF generatorto the chip can be considered to be a two-port networkas shown in Figure 2 The two-port network can be dividedinto three main parts RF source injection path and load asshown in Figure 2(a) Figure 2(b) shows the RF power flowand the related scattering parametersThe RF generator has amatching output impedance of 119885

119904= 50Ω

The power transfer efficiency 119867119901 is defined as the ratio

of power at the load (119875119871) and forward power measured at

the RF source (119875119904) of the two-port network of Figure 2(b) as

expressed in the following equation

119867119901=119875119871

119875119904

(1)

The forward power reported from the RF generator isthe power transmitted to the load when the load impedancematches 119885

119904 and the forward power of the RF generator is

expressed as follows

119875119904=1

8

1198812

119904

119885119904

(2)

The relationship of 1198811 1198812 and the scattering parameters

is expressed in (3) from the signal flow graph shown inFigure 2(b) [10 11] Consider

119881minus

1= 11987811119881+

1+ 11987812119881+

2= 11987811119881+

1+ 11987812Γ119871119881minus

2

119881minus

2= 11987821119881+

1+ 11987822119881+

2= 11987821119881+

1+ 11987822Γ119871119881minus

2

(3)

Using (3) the power transferred to the test chip 119875119871 can

be expressed as follows [4]

119875119871=

1

21198850

(1003816100381610038161003816119881+

2

1003816100381610038161003816

2

minus1003816100381610038161003816119881minus

2

1003816100381610038161003816

2

) =1

21198850

1003816100381610038161003816119881minus

2

1003816100381610038161003816

2

(1 minus1003816100381610038161003816Γ119871

1003816100381610038161003816

2

)

=1198812

119904

81198850

10038161003816100381610038161003816100381610038161003816

11987821

1 minus 11987822Γ119871

1 minus Γ119904

1 minus Γ119904Γin

10038161003816100381610038161003816100381610038161003816

2

(1 minus1003816100381610038161003816Γ119871

1003816100381610038161003816

2

)

(4)

International Journal of Antennas and Propagation 3

IC and package

AC

+ +

Source Injection path Load

DPI capacitor or

BCI probePCB

Cable

Vs

PsZs

V1

Z1 Z2

minus minus

Γs Γin Γout ΓL

PLPin

V2

(a)

+

+

Tin RL

Γs

Rin TL

ΓLV1 V2

minus

minus

S(2 1)

S(1 1) S(2 2)

S(1 2)

(b)

Figure 2 (a) The 2-port circuit network diagram of the BCI test (b) The flow of RF power with the scattering parameters and the reflectioncoefficient

Γ119904 Γin and Γ119871 are the reflection coefficients at the source

input port and load respectively Consider

Γ119904=119885119904minus 1198850

119885119904+ 1198850

Γin =119881minus

1

119881+

1

= 11987811+ 11987812Γ119871

119881minus

2

119881+

1

Γ119871=119885119871minus 1198850

119885119871+ 1198850

(5)

Finally the equation for power transfer efficiency is derivedas follows

119867119901=119875119871

119875119904

=119885119904

1198850

10038161003816100381610038161003816100381610038161003816

11987821

1 minus 11987822Γ119871

1 minus Γ119904


10038161003816100381610038161003816100381610038161003816

2

(1 minus1003816100381610038161003816Γ119871

1003816100381610038161003816

2

) (6)

Practically the power at the injection port of the DPIBCItest which is measured at node 119881

1 is different from the

forward power due to impedance mismatch of the RF sourceand the rest of the DPIBCI network The power at the input

of the noise injection port (119875in) considering the reflections atthe injection equipment is calculated as follows

119875in =1

2

100381610038161003816100381611988511003816100381610038161003816

100381610038161003816100381610038161198682

1

10038161003816100381610038161003816

=1198812

119904

81198850

10038161003816100381610038161003816100381610038161003816

1


10038161003816100381610038161003816100381610038161003816

2

(1 minus Γ119904)2

(1 minus1003816100381610038161003816Γin

1003816100381610038161003816

2

)

(7)

3 Equivalent Circuit Model

To determine the DPIBCI power transfer efficiency accurateequivalent circuitmodels for the injection capacitor injectionprobe PCB package and IC are needed

31 Chip Model The chip model includes the equivalentcircuit model of the package and schematic netlist andparasitic interconnection of the IC The DUT package is a208-pin quad flat package (QFP)

The IC used in this work is a clock divider that dividesthe input clock into two lower frequency clocks by a factor offour and sixteen respectivelyThe clock divider was designedusing a 180 nm Magna process The block diagram andoperation of the clock divider are shown in Figure 3 Weevaluated the RF noise immunity of the clock divider whennoise was injected to the supply voltage VDD The parasitic


Qin

clkFF

Qin

clkFF

Qin

clkFF

Qin

clk

VSS

FF

CLK1

CLK2

CLK

CLK

CLK1 CLK2

VDD

Figure 3 Clock divider block and function

Clock divider

+Port1

VDD

VSSminus

S(1 1)

50Ω

Figure 4 IC parameter extraction set-up

RC components were added to the netlist of the IC usingCalibre xRC of Mentor graphics [12] based on the layoutcreated by Cadence [13]

To capture the IC reflection characteristics and to per-form simulations using ADS the reflection coefficient 119878(1 1)of the VDD pin of the clock divider design references to theVSS pin was extracted from the simulation setup shown inFigure 4 119878(1 1) was extracted and imported to ADS as thechip core model

The dimensional parameters of package pins lead framesand package bonding wires were determined by measuringX-ray pictures of the chip package as shown in Figure 5 Theequivalent circuit model was obtained using (8) derived from[14] In the equations119908 is the width 119905 is the thickness 119897 is thelength and ℎ is the height of the conductor Consider

119877 = 120588(119897

119908 times 119905)

119871 =1205830119897

2120587[ln( 8ℎ

119908 + 119905+ 1)]

119862

= 1205760120576119903119897 [113 (

119908

ℎ)

1

+ 144 (119908

ℎ)

011

+ 146 (119908

ℎ)

042

]

(8)

The package equivalent circuit model shown in Figure 6was connected to the IC core model The VDDVSS port

Pin

Lead

fram

e

Bond

ing

wire

Figure 5 X-ray picture of the chip package

impedance of IC is shown in Figure 7(a) The 119885(1 1) param-eter of the circuit including the package and IC core wassimulated by ADS and the simulation model is shown inFigure 7(b) The same 119885(1 1) parameter was determined bymeasuring the real chip and comparedwith simulation resultsto validate the package and IC core model The comparisonresults are shown in Figure 7(c)

32 DPI Capacitor and BCI Probe Circuit Models Accurateimpedance of the capacitor was obtained from its datasheetFor theHighQLowESR (equivalent serial resistor) capacitormodel the ESR value was specified in the product specifica-tions Using the capacitor value and the resonant frequencyspecified in the datasheet the equivalent serial inductancewas calculated using (9)

119871 =1

412058721198912res119862 (9)

where 119891res is the resonant frequency of the capacitorTheDPIcapacitor equivalent circuit is the combination of the ESRESL and capacitor connected in serial The mounting padparasitic of the DPI capacitor was part of the PCB thus itwill be considered in the PCB model Details of the structureof the DPI capacitor equivalent circuit and its impedance areprovided in Figure 8

An equivalent circuit model of the BCI probe was createdusing the method specified in related work [4 7] The BCIprobe model was F130-1 from Fisher Custom Communica-tions Inc The equivalent circuit model of the BCI probe andits insertion loss 119878(2 1) are shown in Figure 9

33 PCBModeling The PCB used in this paper was designedwith four layers as shown in Figure 10 The injection traceand the DPI capacitor were located in the top layer Thesecond and the third layers were the ground and VDDplane respectively The fourth layer was an additional traceto measure the output signal of the DUT The width of allthe traces on the PCB was designed so that the PCB hada characteristic impedance of 50Ω The total thickness of


0276 0142 nH

0136 pF

0736 0744 nH

404 fF

0225 0266 nH

16 fF

148 143 nH

0292 pF

192 151nH

0275 pF

204 157 nH

0263 pF

314 178 nH

019 pF

Pin Lead frame Bonding wire

Connect to PCB

Connect to IC

mΩ mΩ mΩ mΩ mΩ mΩ mΩ

Figure 6 Equivalent circuit model of the package

Mag

Z(1

1)

minus90

minus85

minus80

minus75

minus70

minus65

Phas

e Z(1

1)

Frequency (Hz)

106

104

102

100

10minus2

105 106 107 108 109

(a)

Package

Clock divider

VDD

Z(1 1)

VSS

S(1 1)

(b)

0

20

40

60

80

Z(1

1) (

dB)

MeasurementSimulation (package + IC model)

Frequency (Hz)105 106 107 108 109

(c)

Figure 7 Chip model validation (a) VDDVSS port impedance of IC (b) Package and IC simulation setup (c) Chip VDDVSS portimpedance 119885(1 1) comparison

Z (O

hm)

101

103

102

100

10minus1

Frequency (Hz)105 106 107 108 109

R = 011Ω L = 025nH C = 68nF

Figure 8 Impedance and equivalent circuit model of the DPI capacitor


minus35

minus30

minus25

minus20

minus15

minus10

minus5

S(2

1) (

dB)

Frequency (Hz)105 106 107 108 109

L = 0688120583H

M = 096

R = 171Ω

C = 072pF

C = 174pF

03ΩPort 1

Port 2

L = 0688120583H

R = 50Ω

Figure 9 Insertion loss and equivalent circuit model of the BCIprobe

011Thickness 0035

120576r = 411

Figure 10 PCB dimensional structure

the PCB was 08mm while the distance between the topand ground plane was 011mm and the copper thickness was0035mmThe dielectric layer was prepreg with 120576

119903= 411

Figure 11 shows the PCB used in the DPI test The SMAconnectorwas used at the injection port and the power supplyport A pad was located in the middle of the transmissiontrace tomount the DPI capacitorTheDPI transmission tracewas divided into segments PCB traces were located over aground plane in the second layer thus they are approximatelymodeled as a microstrip structure [15] Each segment wasmodeled as a RLCG 119871-network as shown in Figure 12(a) The119877 119871 119866 and 119862 values of the 119871-network are calculated usingthe following equation

119862 = 1205760120576119903

119886 times 119887

119889

119871 = 1205830119889119887

119886

119866 = 2120587119891119862 tan 120575

119877 = 119877119889119888+ 119877119886119888=

2

120590119888119905(119887

119886) + 2(

119887

119886)radic

1205871198911205830

120590119888

(10)

119886 is the trace length 119887 is the trace width 119889 is the dielectricthickness and 119905 is the conductor thickness Each trace shouldbe divided into a number of segments whose lengths areless than one-tenth of the wavelength at the maximum testfrequency A similar modeling methodology 120587-segment wasapplied to the vias used to mount the SMA connect on a PCB[16]

Injection port

Chip

Input PAD

Trace

Chip footprint

S1

S2

S3

S4

Figure 11 Overview of PCB trace used in DPI test

To experimentally validate the accuracy of the equivalentcircuit model of the noise injection path of the DPI whichincluded the PCB and DPI capacitor simulations were per-formed usingADS to generate the insertion loss between port1 which is the injection port and port 2 at the chip footprintas shown in Figure 11 119878(2 1) of the real PCB was measuredby VNA and compared with the simulation results to validatethe PCB equivalent circuit model as shown in Figure 12(b)

The overall equivalent circuit model of the DPI and BCItest method was constructed by combining all the circuitcomponents described above The final equivalent circuitmodel structures of DPI and BCI are shown in Figure 13Thecable used to connect from RF source to input port was 50Ωcoaxial cable but the power loss in those cables was neglectedin the simulation

4 Simulation and Measurement Results

The experimental set-up for the DPI test is specified in IEC62132 part 4 while the BCI test set-up is specified in part 3 asshown in Figure 14 In the standard the test frequency rangeis 150 kHzsim1 GHzTheoverall simulationmodel was specifiedin the previous section and the simulation was performedusing ADS

The normal operation output of CLK1 of the clock dividerchip which was used as the DUT of the immunity test isshown in Figure 15(a) RF disturbance power was injectedto the power pin (VDD) of the clock divider The functiongenerator provided the input clock and the period jitter ofthe clock output (CLK1) was measured by oscilloscope todetermine failureThe clock cycle of the input clock from thefunction generatorwas 100 ns and the period of theCLK1was400 ns in simulation The actual measurement results showthat the period of CLK1 signal varied in a range of 399 nssim401 ns (plusmn1 ns) in normal condition Therefore in DPIBCI


L

C

R

G

(a)

minus60

minus50

minus40

minus30

minus20

minus10

0

S(2

1) (

dB)

Equivalent circuit modelMeasurement

Frequency (Hz)105 106 107 108 109

(b)

Figure 12 Validation of PCB equivalent circuit model including DPI capacitor (a) Equivalent circuit model of a segment (b) 119878(2 1)comparison

DC

DPI capacitor or BCI probe

equivalent circuit

Clock divider

Cable and PCB trace PCB trace Chip

Cable and PCB trace

Delivered power

Forward power

+minus

RF

S(1 1)

IRF

Figure 13 Overall simulation model

(a) (b)

Figure 14 Chip immunity test setup (a) DPI test (b) BCI test

400 ns

(a)

900 ns 430 ns

(b)

Figure 15 Measurement results of clock divider operation (a) Operation under normal conditions (b) Operation under failure conditions


minus140

minus120

minus100

minus80

minus60

minus40

minus20

0

SimulationCalculation

Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)

minus100minus90minus80minus70minus60minus50minus40minus30minus20minus10

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(b)

Figure 16 Power transfer efficiency (119867119901) comparison (a) DPI method (b) BCI method

minus140

minus120

minus100

minus80

minus60

minus40

minus20

0

Clock divider impedance load50 Ohm load

Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0

Clock divider impedance load

Frequency (Hz)109 1010108107106105

50Ohm load

Hp

(dB)

(b)

Figure 17 Comparison of power transfer efficiency under different load conditions (a) DPI method (b) BCI method

test the clock divider was considered to have failed whenthe period of CLK1 was out-of-range by more than plusmn1 ns asshown in Figure 15(b)

The power transfer efficiencies (119867119901) of the BCI and DPI

methods were calculated using the equations proposed inSection 2 and compared with ADS simulations results tovalidate our model The overall equivalent circuit model forADS simulation is shown in Figure 13 A scattering parameterfor all components in the BCI and DPI two-port networkswas used to calculate the power transfer efficiency using theproposed equation Simulated and calculated BCI and DPIpower transfer efficiencies are compared in Figures 16(a) and16(b) The load condition of the result in Figure 16 is the chipimpedance which is the input impedance of the VDDVSSport of the clock divider chip as shown in Figure 7 Chipimpedance includes the package and chip core equivalentcircuitmodelThe power transfer efficiency (119867

119901) calculations

and ADS simulation results matched wellTo further understand DPIBCI power transfer efficiency

and analyze the effect of load condition on efficiency

DPIBCI power transfer efficiency was plotted for two loadconditions a 50Ω load and the chip impedance load Whenapplying chip impedance to the load power transfer hadcomplex fluctuations due to the complexity of the chipimpedance The results obtained for DPI and BCI withtwo different loads are shown in Figures 17(a) and 17(b)respectively Load condition did affect the power transferefficiency of both DPI and BCI methods

For a perfect 50Ω load the power transfer efficiencywas affected only by the injection path DPI and BCI powertransfer efficiencies were compared for the same 50Ω loadcondition as shown in Figure 18 At low frequencies the BCImethod had a higher efficiency than the DPI method Inparticular in the frequency range from 1MHz to 300MHzthe power transfer efficiency of the BCI method increasedsignificantly due to the design bandwidth of the BCI probemodel F130 The DPI power transfer efficiency crossedover the efficiency of BCI in frequency from 150MHz to6GHz The declination of power transfer efficiency of theDPI method was faster than that of the BCI method in


minus140

minus120

minus100

minus80

minus60

minus40

minus20

0

DPI power transfer efficiencyBCI power transfer efficiency

Frequency (Hz)109 1010108107106105

Hp

(dB)

(a)

minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(b)

Figure 18 Comparison of DPI and BCI power transfer efficiency (a) With 50Ω load (b) With chip VDDVSS port impedance load

minus70minus60minus50minus40minus30minus20minus10

01020

Pow

er (d

Bm)

DPI forward powerDPI real injected power

Frequency (Hz)109108107106105

(a)

minus60minus50minus40minus30minus20minus10

01020

Pow

er (d

Bm)

BCI forward powerBCI real injected power

Frequency (Hz)109108107106105

(b)

Figure 19 Measured forward power (119875119904) and calculated real injected power (119875

119871) by the power transfer efficiency (119867

119901(dB)) with chip load

(a) DPI (b) BCI

the frequency range higher than 4GHz due to the slope ofthe power transfer efficiency

The immunity of the clock divider chip was testedusing DPI and BCI test methods under the test conditionsspecified in the previous section The forward power (119875

119904)

was measured at each frequency when the chip operationfailed The proposed power transfer equation was applied tocalculate the actual delivered power to the chip which can beused as the actual immunity level of the chip Delivered powerto the chip 119875

119871 was calculated from (11) which is a result of

119867119901in (6) Consider

119875119871(dBm) = 119875

119904(dBm) + 119867

119901(dB) (11)

The DPIBCI immunity test results for the IC usingforward power (119875

119904) measured at the RF source and real

injected power (119875119871) calculated from power transfer efficiency

are compared in Figure 19To analyze the reason for the declination in power transfer

efficiency the forward power at source was set at 0 dBm and

the power at the input port of the DPI and BCI network(119875in) was calculated using (7) and plotted in Figure 20 Due toimpedance mismatch the forward power from the RF sourcewas reflected at the input of the DPIBCI test equipmentThe reflection coefficient 119878(1 1) parameter of DPI and BCImethod is plotted in Figure 21 At low frequencies up to1MHz the reflections of both DPI and BCI method aresignificantly high thusmost of the forward power is reflectedat the input port From 1MHz the reflections are reducedand the power entering DPI and BCI network increasesThe reflection coefficient of BCI was reduced significantlyat frequency range of 10sim100MHz and that of DPI wasreduced at 100MHzsim1 GHz These properties explain thedifferences of the power transfer efficiency between DPI andBCI methods as shown in Figure 18 At high frequencies asignificant amount of power was reflected at the input of theDPIBCI test equipment due to the increase of the reflectioncoefficient Therefore power transfer efficiency decreases athigh frequencies



minus50

Pow

er (d

Bm)

DPI input powerBCI input power

Frequency (Hz)109 1010108107106105

(a)


minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(b)

Figure 20 Comparison of DPI and BCI input power (119875in) (a) With 50Ω load (b) With chip VDDVSS port impedance load

minus15

minus10

minus5

0

S(1

1) (

dB)

DPIBCI

Frequency (Hz)109108107106105

Figure 21 Comparison of DPI and BCI input reflection 119878(1 1)withchip VDDVSS port impedance load

5 Conclusions

In this paper model based equations for the power transferefficiency of the DPI and BCImethods defined in IEC 62132-3 and IEC 62132-4 were derived In theDPI and BCI tests theRF noise power is delivered to the chip through an injectionpath including the DPI capacitor or BCI probe traces andwires From the power transfer efficiency the loss when RFpower passes through the injection path can be estimatedThe real injected power which reflects the actual immunitylevel of the device under test can be calculated using powertransfer efficiency equationTheDPI and BCI immunity testsare performed for the clock divider ICThemagnitudes of thereal power that reach the test IC at the chip failure point foreach standard immunity test methods are determined usingthe proposed model

The power transfer efficiencies and the reflected inputpower of theDPI and BCI testmethods are compared For thetest frequency range of 150 kHz to 1GHz which is defined inthe standard the power transfer efficiency of BCI method isconstantly high In the DPI test with a default capacitor value

of 68 nF the power transfer efficiency is particularly low inthe lower test frequency range up to 10MHzThis means thateven though the engineers perform the DPI test on the ICdue to the high loss in the noise injection path the RF noisewill not reach the IC If the value of the DPI capacitor isselected to be smaller than 68 nF the low frequency rangehaving small power transfer efficiency is expanded In futureIEC IC immunity test standards these aspects of the DPI testshould be considered

Conflict of Interests

The authors declare that there is no conflict of interestsregarding the publication of this paper

Acknowledgments

This work was supported by the National Research Founda-tion of Korea (NRF) grant funded by the Korea government(MSIP) (no NRF-2014R1A2A2A01006595) This work wassupported by the IC Design Education Center (IDEC)

References

[1] International Electrotechnical Commission IEC 62132-1 Ed1IntegratedCircuitsmdashMeasurements of Electromagnetic Immunity150 kHz to 1 GHzmdashPart1 General conditions and definitionsInternational Electrotechnical Commission Geneva Switzer-land 2006

[2] IEC ldquoEd1 integrated circuitmdashmeasurements of electromag-netic immunity 150 kHz to 1GHz part 3 Bulk Current Injection(BCI) methodrdquo IEC 62132-3 International ElectrotechnicalCommission 2002

[3] IEC 62132-4 ldquoEd1 Integrated CircuitmdashMeasurements of Elec-tromagnetic Immunitymdash150 kHz to 1 GHzrdquo Part 4 Direct RFPower Injection (DPI) Method

[4] N H Kim W S Nah and S Y Kim ldquoImmunity test forsemiconductor integrated circuits considering power transferefficiency of the bulk current injection methodrdquo Journal of


Semiconductor Technology and Science vol 14 no 2 pp 202ndash211 2014

[5] Advanced Design System (ADS) User Manual Keysight Tech-nology 2009 httpwwwkeysightcom

[6] F Grassi F Marliani and S A Pignari ldquoCircuit modeling ofinjection probes for bulk current injectionrdquo IEEE Transactionson Electromagnetic Compatibility vol 49 no 3 pp 563ndash5762007

[7] S Kwak W Nah and S Kim ldquoElectromagnetic susceptibilityanalysis of IO buffers using the bulk current injectionmethodrdquoJournal of Semiconductor Technology and Science vol 13 no 2pp 114ndash126 2013

[8] B Vrignon M Deobarro A Boyer and S ben Dhia ldquoBulkcurrent injection modeling and validation on passive loads andan active circuitrdquo in Proceedings of the Asia-Pacific Symposiumon Electromagnetic Compatibility pp 344ndash347 May 2011

[9] A Alaeldine R Perdriau M Ramdani J-L Levant and MDrissi ldquoA direct power injectionmodel for immunity predictionin integrated circuitsrdquo IEEE Transactions on ElectromagneticCompatibility vol 50 no 1 pp 52ndash62 2008

[10] D M Pozar Microwave Engineering John Wiley amp Sons NewYork NY USA 3rd edition 2005

[11] DM PozarMicrowave and RF Design ofWireless Systems JohnWiley amp Sons New York NY USA 2001

[12] Calibre xRC Calibre xRC Mentor Graphics 2010 httpwwwmentorcom

[13] Cadence Company Cadence 60 Cadence User Guide CadenceCompany 2011 httpsupportcadencecom

[14] H W Johnson and M Graham High-Speed Digital DesignmdashAHandbook of Black Magic Prentice Hall Englewood Cliffs NJUSA 1993

[15] M S Ghaffarian G Moradi and R Zaker ldquoHarmonicsuppressed slot antennas using rectangularcircular defectedground structuresrdquo International Journal of Antennas and Prop-agation vol 2012 Article ID 721565 7 pages 2012

[16] S Pan and J Fan ldquoCharacterization of via structures in mul-tilayer printed circuit boards with an equivalent transmission-line modelrdquo IEEE Transactions on Electromagnetic Compatibil-ity vol 54 no 5 pp 1077ndash1086 2012

International Journal of

AerospaceEngineeringHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

RoboticsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014


Active and Passive Electronic Components

Control Scienceand Engineering

Journal of



RotatingMachinery


Hindawi Publishing Corporation httpwwwhindawicom

Journal ofEngineeringVolume 2014

Submit your manuscripts athttpwwwhindawicom

VLSI Design



Shock and Vibration


Civil EngineeringAdvances in

Acoustics and VibrationAdvances in



Electrical and Computer Engineering

Journal of

Advances inOptoElectronics


Volume 2014

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

SensorsJournal of


Modelling amp Simulation in EngineeringHindawi Publishing Corporation httpwwwhindawicom Volume 2014


Chemical EngineeringInternational Journal of Antennas and

Propagation




Navigation and Observation



DistributedSensor Networks



IC

PCB

Ground plane

Injection port

Injection cap


DC supply

VSS

(a)

IC

PCB

Ground plane

Injection port

VSS


DC supply

IRF

(b)

Figure 1 The concept of IC immunity test (a) DPI test (b) BCI test

models of the noise injection path [6ndash9] Scattering param-eter measurements are used to validate the accuracy of theequivalent circuit models The immunity of a clock dividerIC is tested by DPI and BCI methods and the power transferefficiencies are obtained The immunity level of the clockdivided circuit is evaluated as the ratio of the powermeasuredat the RF source to the real injected power at the input ofthe DUTTheDPI power transfer efficiency is compared withthe BCI power transfer efficiency and differences betweenthe two methods were analyzed The analysis of the powertransfer efficiency of the DPI method suggests that there isa significant amount of injected noise power loss due to thereflection at the input port

The rest of this paper is structured as follows Deriva-tion of the power transfer efficiency equation is shown inSection 2 In Section 3 the DPI and BCI equivalent circuitmodels are explained Results and discussions are presentedin Section 4 Concluding remarks are provided in Section 5

2 Power Transfer Efficiency Derivation

Figure 1 shows the basic concept underlying the DPI and BCItest methods Noise power is generated from a RF generatorand injected to the DUT via a coupling capacitor in the DPImethod versus a BCI probe in the BCI method Noise powerflows through injection components and PCB traces beforeentering the chip The injection path from the RF generatorto the chip can be considered to be a two-port networkas shown in Figure 2 The two-port network can be dividedinto three main parts RF source injection path and load asshown in Figure 2(a) Figure 2(b) shows the RF power flowand the related scattering parametersThe RF generator has amatching output impedance of 119885

119904= 50Ω

The power transfer efficiency 119867119901 is defined as the ratio

of power at the load (119875119871) and forward power measured at

the RF source (119875119904) of the two-port network of Figure 2(b) as

expressed in the following equation

119867119901=119875119871

119875119904

(1)

The forward power reported from the RF generator isthe power transmitted to the load when the load impedancematches 119885

119904 and the forward power of the RF generator is

expressed as follows

119875119904=1

8

1198812

119904

119885119904

(2)

The relationship of 1198811 1198812 and the scattering parameters

is expressed in (3) from the signal flow graph shown inFigure 2(b) [10 11] Consider

119881minus

1= 11987811119881+

1+ 11987812119881+

2= 11987811119881+

1+ 11987812Γ119871119881minus

2

119881minus

2= 11987821119881+

1+ 11987822119881+

2= 11987821119881+

1+ 11987822Γ119871119881minus

2

(3)

Using (3) the power transferred to the test chip 119875119871 can

be expressed as follows [4]

119875119871=

1

21198850

(1003816100381610038161003816119881+

2

1003816100381610038161003816

2

minus1003816100381610038161003816119881minus

2

1003816100381610038161003816

2

) =1

21198850

1003816100381610038161003816119881minus

2

1003816100381610038161003816

2

(1 minus1003816100381610038161003816Γ119871

1003816100381610038161003816

2

)

=1198812

119904

81198850

10038161003816100381610038161003816100381610038161003816

11987821

1 minus 11987822Γ119871

1 minus Γ119904


10038161003816100381610038161003816100381610038161003816

2

(1 minus1003816100381610038161003816Γ119871

1003816100381610038161003816

2

)

(4)


IC and package

AC

+ +


DPI capacitor or

BCI probePCB

Cable

Vs

PsZs

V1

Z1 Z2

minus minus

Γs Γin Γout ΓL

PLPin

V2

(a)

+

+

Tin RL

Γs

Rin TL

ΓLV1 V2

minus

minus

S(2 1)

S(1 1) S(2 2)

S(1 2)

(b)




Γ119904=119885119904minus 1198850

119885119904+ 1198850

Γin =119881minus

1

119881+

1

= 11987811+ 11987812Γ119871

119881minus

2

119881+

1

Γ119871=119885119871minus 1198850

119885119871+ 1198850

(5)


119867119901=119875119871

119875119904

=119885119904

1198850

10038161003816100381610038161003816100381610038161003816

11987821

1 minus 11987822Γ119871

1 minus Γ119904


10038161003816100381610038161003816100381610038161003816

2

(1 minus1003816100381610038161003816Γ119871

1003816100381610038161003816

2

) (6)





119875in =1

2

100381610038161003816100381611988511003816100381610038161003816

100381610038161003816100381610038161198682

1

10038161003816100381610038161003816

=1198812

119904

81198850

10038161003816100381610038161003816100381610038161003816

1


10038161003816100381610038161003816100381610038161003816

2

(1 minus Γ119904)2

(1 minus1003816100381610038161003816Γin

1003816100381610038161003816

2

)

(7)






Qin

clkFF

Qin

clkFF

Qin

clkFF

Qin

clk

VSS

FF

CLK1

CLK2

CLK

CLK

CLK1 CLK2

VDD


Clock divider

+Port1

VDD

VSSminus

S(1 1)

50Ω





119877 = 120588(119897

119908 times 119905)

119871 =1205830119897

2120587[ln( 8ℎ

119908 + 119905+ 1)]

119862

= 1205760120576119903119897 [113 (

119908

ℎ)

1

+ 144 (119908

ℎ)

011

+ 146 (119908

ℎ)

042

]

(8)


Pin

Lead

fram

e

Bond

ing

wire




119871 =1

412058721198912res119862 (9)





0276 0142 nH

0136 pF

0736 0744 nH

404 fF

0225 0266 nH

16 fF

148 143 nH

0292 pF

192 151nH

0275 pF

204 157 nH

0263 pF

314 178 nH

019 pF


Connect to PCB

Connect to IC



Mag

Z(1

1)

minus90

minus85

minus80

minus75

minus70

minus65

Phas

e Z(1

1)

Frequency (Hz)

106

104

102

100

10minus2

105 106 107 108 109

(a)

Package

Clock divider

VDD

Z(1 1)

VSS

S(1 1)

(b)

0

20

40

60

80

Z(1

1) (

dB)


Frequency (Hz)105 106 107 108 109

(c)


Z (O

hm)

101

103

102

100

10minus1

Frequency (Hz)105 106 107 108 109

R = 011Ω L = 025nH C = 68nF



minus35

minus30

minus25

minus20

minus15

minus10

minus5

S(2

1) (

dB)

Frequency (Hz)105 106 107 108 109

L = 0688120583H

M = 096

R = 171Ω

C = 072pF

C = 174pF

03ΩPort 1

Port 2

L = 0688120583H

R = 50Ω


011Thickness 0035

120576r = 411



119903= 411


119862 = 1205760120576119903

119886 times 119887

119889

119871 = 1205830119889119887

119886

119866 = 2120587119891119862 tan 120575

119877 = 119877119889119888+ 119877119886119888=

2

120590119888119905(119887

119886) + 2(

119887

119886)radic

1205871198911205830

120590119888

(10)


Injection port

Chip

Input PAD

Trace

Chip footprint

S1

S2

S3

S4








L

C

R

G

(a)

minus60

minus50

minus40

minus30

minus20

minus10

0

S(2

1) (

dB)


Frequency (Hz)105 106 107 108 109

(b)


DC


equivalent circuit

Clock divider


Cable and PCB trace

Delivered power

Forward power

+minus

RF

S(1 1)

IRF


(a) (b)


400 ns

(a)

900 ns 430 ns

(b)



minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(b)


minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)109 1010108107106105

50Ohm load

Hp

(dB)

(b)











minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(a)

minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(b)



01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(a)


01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(b)




(a) DPI (b) BCI



119904)



119867119901in (6) Consider

119875119871(dBm) = 119875

119904(dBm) + 119867

119901(dB) (11)









minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(a)


minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(b)


minus15

minus10

minus5

0

S(1

1) (

dB)

DPIBCI

Frequency (Hz)109108107106105


5 Conclusions






Acknowledgments


References





















RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










IC and package

AC

+ +


DPI capacitor or

BCI probePCB

Cable

Vs

PsZs

V1

Z1 Z2

minus minus

Γs Γin Γout ΓL

PLPin

V2

(a)

+

+

Tin RL

Γs

Rin TL

ΓLV1 V2

minus

minus

S(2 1)

S(1 1) S(2 2)

S(1 2)

(b)




Γ119904=119885119904minus 1198850

119885119904+ 1198850

Γin =119881minus

1

119881+

1

= 11987811+ 11987812Γ119871

119881minus

2

119881+

1

Γ119871=119885119871minus 1198850

119885119871+ 1198850

(5)


119867119901=119875119871

119875119904

=119885119904

1198850

10038161003816100381610038161003816100381610038161003816

11987821

1 minus 11987822Γ119871

1 minus Γ119904


10038161003816100381610038161003816100381610038161003816

2

(1 minus1003816100381610038161003816Γ119871

1003816100381610038161003816

2

) (6)





119875in =1

2

100381610038161003816100381611988511003816100381610038161003816

100381610038161003816100381610038161198682

1

10038161003816100381610038161003816

=1198812

119904

81198850

10038161003816100381610038161003816100381610038161003816

1


10038161003816100381610038161003816100381610038161003816

2

(1 minus Γ119904)2

(1 minus1003816100381610038161003816Γin

1003816100381610038161003816

2

)

(7)






Qin

clkFF

Qin

clkFF

Qin

clkFF

Qin

clk

VSS

FF

CLK1

CLK2

CLK

CLK

CLK1 CLK2

VDD


Clock divider

+Port1

VDD

VSSminus

S(1 1)

50Ω





119877 = 120588(119897

119908 times 119905)

119871 =1205830119897

2120587[ln( 8ℎ

119908 + 119905+ 1)]

119862

= 1205760120576119903119897 [113 (

119908

ℎ)

1

+ 144 (119908

ℎ)

011

+ 146 (119908

ℎ)

042

]

(8)


Pin

Lead

fram

e

Bond

ing

wire




119871 =1

412058721198912res119862 (9)





0276 0142 nH

0136 pF

0736 0744 nH

404 fF

0225 0266 nH

16 fF

148 143 nH

0292 pF

192 151nH

0275 pF

204 157 nH

0263 pF

314 178 nH

019 pF


Connect to PCB

Connect to IC



Mag

Z(1

1)

minus90

minus85

minus80

minus75

minus70

minus65

Phas

e Z(1

1)

Frequency (Hz)

106

104

102

100

10minus2

105 106 107 108 109

(a)

Package

Clock divider

VDD

Z(1 1)

VSS

S(1 1)

(b)

0

20

40

60

80

Z(1

1) (

dB)


Frequency (Hz)105 106 107 108 109

(c)


Z (O

hm)

101

103

102

100

10minus1

Frequency (Hz)105 106 107 108 109

R = 011Ω L = 025nH C = 68nF



minus35

minus30

minus25

minus20

minus15

minus10

minus5

S(2

1) (

dB)

Frequency (Hz)105 106 107 108 109

L = 0688120583H

M = 096

R = 171Ω

C = 072pF

C = 174pF

03ΩPort 1

Port 2

L = 0688120583H

R = 50Ω


011Thickness 0035

120576r = 411



119903= 411


119862 = 1205760120576119903

119886 times 119887

119889

119871 = 1205830119889119887

119886

119866 = 2120587119891119862 tan 120575

119877 = 119877119889119888+ 119877119886119888=

2

120590119888119905(119887

119886) + 2(

119887

119886)radic

1205871198911205830

120590119888

(10)


Injection port

Chip

Input PAD

Trace

Chip footprint

S1

S2

S3

S4








L

C

R

G

(a)

minus60

minus50

minus40

minus30

minus20

minus10

0

S(2

1) (

dB)


Frequency (Hz)105 106 107 108 109

(b)


DC


equivalent circuit

Clock divider


Cable and PCB trace

Delivered power

Forward power

+minus

RF

S(1 1)

IRF


(a) (b)


400 ns

(a)

900 ns 430 ns

(b)



minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(b)


minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)109 1010108107106105

50Ohm load

Hp

(dB)

(b)











minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(a)

minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(b)



01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(a)


01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(b)




(a) DPI (b) BCI



119904)



119867119901in (6) Consider

119875119871(dBm) = 119875

119904(dBm) + 119867

119901(dB) (11)









minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(a)


minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(b)


minus15

minus10

minus5

0

S(1

1) (

dB)

DPIBCI

Frequency (Hz)109108107106105


5 Conclusions






Acknowledgments


References





















RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










Qin

clkFF

Qin

clkFF

Qin

clkFF

Qin

clk

VSS

FF

CLK1

CLK2

CLK

CLK

CLK1 CLK2

VDD


Clock divider

+Port1

VDD

VSSminus

S(1 1)

50Ω





119877 = 120588(119897

119908 times 119905)

119871 =1205830119897

2120587[ln( 8ℎ

119908 + 119905+ 1)]

119862

= 1205760120576119903119897 [113 (

119908

ℎ)

1

+ 144 (119908

ℎ)

011

+ 146 (119908

ℎ)

042

]

(8)


Pin

Lead

fram

e

Bond

ing

wire




119871 =1

412058721198912res119862 (9)





0276 0142 nH

0136 pF

0736 0744 nH

404 fF

0225 0266 nH

16 fF

148 143 nH

0292 pF

192 151nH

0275 pF

204 157 nH

0263 pF

314 178 nH

019 pF


Connect to PCB

Connect to IC



Mag

Z(1

1)

minus90

minus85

minus80

minus75

minus70

minus65

Phas

e Z(1

1)

Frequency (Hz)

106

104

102

100

10minus2

105 106 107 108 109

(a)

Package

Clock divider

VDD

Z(1 1)

VSS

S(1 1)

(b)

0

20

40

60

80

Z(1

1) (

dB)


Frequency (Hz)105 106 107 108 109

(c)


Z (O

hm)

101

103

102

100

10minus1

Frequency (Hz)105 106 107 108 109

R = 011Ω L = 025nH C = 68nF



minus35

minus30

minus25

minus20

minus15

minus10

minus5

S(2

1) (

dB)

Frequency (Hz)105 106 107 108 109

L = 0688120583H

M = 096

R = 171Ω

C = 072pF

C = 174pF

03ΩPort 1

Port 2

L = 0688120583H

R = 50Ω


011Thickness 0035

120576r = 411



119903= 411


119862 = 1205760120576119903

119886 times 119887

119889

119871 = 1205830119889119887

119886

119866 = 2120587119891119862 tan 120575

119877 = 119877119889119888+ 119877119886119888=

2

120590119888119905(119887

119886) + 2(

119887

119886)radic

1205871198911205830

120590119888

(10)


Injection port

Chip

Input PAD

Trace

Chip footprint

S1

S2

S3

S4








L

C

R

G

(a)

minus60

minus50

minus40

minus30

minus20

minus10

0

S(2

1) (

dB)


Frequency (Hz)105 106 107 108 109

(b)


DC


equivalent circuit

Clock divider


Cable and PCB trace

Delivered power

Forward power

+minus

RF

S(1 1)

IRF


(a) (b)


400 ns

(a)

900 ns 430 ns

(b)



minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(b)


minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)109 1010108107106105

50Ohm load

Hp

(dB)

(b)











minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(a)

minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(b)



01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(a)


01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(b)




(a) DPI (b) BCI



119904)



119867119901in (6) Consider

119875119871(dBm) = 119875

119904(dBm) + 119867

119901(dB) (11)









minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(a)


minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(b)


minus15

minus10

minus5

0

S(1

1) (

dB)

DPIBCI

Frequency (Hz)109108107106105


5 Conclusions






Acknowledgments


References





















RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










0276 0142 nH

0136 pF

0736 0744 nH

404 fF

0225 0266 nH

16 fF

148 143 nH

0292 pF

192 151nH

0275 pF

204 157 nH

0263 pF

314 178 nH

019 pF


Connect to PCB

Connect to IC



Mag

Z(1

1)

minus90

minus85

minus80

minus75

minus70

minus65

Phas

e Z(1

1)

Frequency (Hz)

106

104

102

100

10minus2

105 106 107 108 109

(a)

Package

Clock divider

VDD

Z(1 1)

VSS

S(1 1)

(b)

0

20

40

60

80

Z(1

1) (

dB)


Frequency (Hz)105 106 107 108 109

(c)


Z (O

hm)

101

103

102

100

10minus1

Frequency (Hz)105 106 107 108 109

R = 011Ω L = 025nH C = 68nF



minus35

minus30

minus25

minus20

minus15

minus10

minus5

S(2

1) (

dB)

Frequency (Hz)105 106 107 108 109

L = 0688120583H

M = 096

R = 171Ω

C = 072pF

C = 174pF

03ΩPort 1

Port 2

L = 0688120583H

R = 50Ω


011Thickness 0035

120576r = 411



119903= 411


119862 = 1205760120576119903

119886 times 119887

119889

119871 = 1205830119889119887

119886

119866 = 2120587119891119862 tan 120575

119877 = 119877119889119888+ 119877119886119888=

2

120590119888119905(119887

119886) + 2(

119887

119886)radic

1205871198911205830

120590119888

(10)


Injection port

Chip

Input PAD

Trace

Chip footprint

S1

S2

S3

S4








L

C

R

G

(a)

minus60

minus50

minus40

minus30

minus20

minus10

0

S(2

1) (

dB)


Frequency (Hz)105 106 107 108 109

(b)


DC


equivalent circuit

Clock divider


Cable and PCB trace

Delivered power

Forward power

+minus

RF

S(1 1)

IRF


(a) (b)


400 ns

(a)

900 ns 430 ns

(b)



minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(b)


minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)109 1010108107106105

50Ohm load

Hp

(dB)

(b)











minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(a)

minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(b)



01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(a)


01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(b)




(a) DPI (b) BCI



119904)



119867119901in (6) Consider

119875119871(dBm) = 119875

119904(dBm) + 119867

119901(dB) (11)









minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(a)


minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(b)


minus15

minus10

minus5

0

S(1

1) (

dB)

DPIBCI

Frequency (Hz)109108107106105


5 Conclusions






Acknowledgments


References





















RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










minus35

minus30

minus25

minus20

minus15

minus10

minus5

S(2

1) (

dB)

Frequency (Hz)105 106 107 108 109

L = 0688120583H

M = 096

R = 171Ω

C = 072pF

C = 174pF

03ΩPort 1

Port 2

L = 0688120583H

R = 50Ω


011Thickness 0035

120576r = 411



119903= 411


119862 = 1205760120576119903

119886 times 119887

119889

119871 = 1205830119889119887

119886

119866 = 2120587119891119862 tan 120575

119877 = 119877119889119888+ 119877119886119888=

2

120590119888119905(119887

119886) + 2(

119887

119886)radic

1205871198911205830

120590119888

(10)


Injection port

Chip

Input PAD

Trace

Chip footprint

S1

S2

S3

S4








L

C

R

G

(a)

minus60

minus50

minus40

minus30

minus20

minus10

0

S(2

1) (

dB)


Frequency (Hz)105 106 107 108 109

(b)


DC


equivalent circuit

Clock divider


Cable and PCB trace

Delivered power

Forward power

+minus

RF

S(1 1)

IRF


(a) (b)


400 ns

(a)

900 ns 430 ns

(b)



minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(b)


minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)109 1010108107106105

50Ohm load

Hp

(dB)

(b)











minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(a)

minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(b)



01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(a)


01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(b)




(a) DPI (b) BCI



119904)



119867119901in (6) Consider

119875119871(dBm) = 119875

119904(dBm) + 119867

119901(dB) (11)









minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(a)


minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(b)


minus15

minus10

minus5

0

S(1

1) (

dB)

DPIBCI

Frequency (Hz)109108107106105


5 Conclusions






Acknowledgments


References





















RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










L

C

R

G

(a)

minus60

minus50

minus40

minus30

minus20

minus10

0

S(2

1) (

dB)


Frequency (Hz)105 106 107 108 109

(b)


DC


equivalent circuit

Clock divider


Cable and PCB trace

Delivered power

Forward power

+minus

RF

S(1 1)

IRF


(a) (b)


400 ns

(a)

900 ns 430 ns

(b)



minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(b)


minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)109 1010108107106105

50Ohm load

Hp

(dB)

(b)











minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(a)

minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(b)



01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(a)


01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(b)




(a) DPI (b) BCI



119904)



119867119901in (6) Consider

119875119871(dBm) = 119875

119904(dBm) + 119867

119901(dB) (11)









minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(a)


minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(b)


minus15

minus10

minus5

0

S(1

1) (

dB)

DPIBCI

Frequency (Hz)109108107106105


5 Conclusions






Acknowledgments


References





















RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(b)


minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)105 106 107 108 109 1010

Hp

(dB)

(a)


0


Frequency (Hz)109 1010108107106105

50Ohm load

Hp

(dB)

(b)











minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(a)

minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(b)



01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(a)


01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(b)




(a) DPI (b) BCI



119904)



119867119901in (6) Consider

119875119871(dBm) = 119875

119904(dBm) + 119867

119901(dB) (11)









minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(a)


minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(b)


minus15

minus10

minus5

0

S(1

1) (

dB)

DPIBCI

Frequency (Hz)109108107106105


5 Conclusions






Acknowledgments


References





















RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(a)

minus140

minus120

minus100

minus80

minus60

minus40

minus20

0


Frequency (Hz)109 1010108107106105

Hp

(dB)

(b)



01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(a)


01020

Pow

er (d

Bm)


Frequency (Hz)109108107106105

(b)




(a) DPI (b) BCI



119904)



119867119901in (6) Consider

119875119871(dBm) = 119875

119904(dBm) + 119867

119901(dB) (11)









minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(a)


minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(b)


minus15

minus10

minus5

0

S(1

1) (

dB)

DPIBCI

Frequency (Hz)109108107106105


5 Conclusions






Acknowledgments


References





















RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation











minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(a)


minus50

Pow

er (d

Bm)


Frequency (Hz)109 1010108107106105

(b)


minus15

minus10

minus5

0

S(1

1) (

dB)

DPIBCI

Frequency (Hz)109108107106105


5 Conclusions






Acknowledgments


References





















RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation

























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation











RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation









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