Protection of distributed generation interfaced networkseprints.qut.edu.au/43681/1/Jalthotage_Dewadasa_Thesis.pdf · Protection of distributed generation interfaced networks Manjula

Protection of distributed generation interfaced networks

Manjula Dewadasa

B.Sc (Hons) in Electrical Engineering

A Thesis submitted in partial fulfilment of the requirements for the degree of

Doctor of Philosophy

Faculty of Built Environment and Engineering

School of Engineering Systems

Queensland University of Technology

Queensland, Australia

July 2010

i

Keywords

Distributed generation, Microgrids, Distributed generator protection, Converter

interfaced distributed generators, Protective relays, Inverse time admittance relay,

Relay coordination, Relay Grading, Islanded operation, Re-synchronisation,

Reclosing, Fold back current control, Fault detection, Fault isolation, Arc extinction,

System restoration.

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Abstract

With the rapid increase in electrical energy demand, power generation in the

form of distributed generation is becoming more important. However, the

connections of distributed generators (DGs) to a distribution network or a microgrid

can create several protection issues. The protection of these networks using

protective devices based only on current is a challenging task due to the change in

fault current levels and fault current direction. The isolation of a faulted segment

from such networks will be difficult if converter interfaced DGs are connected as

these DGs limit their output currents during the fault. Furthermore, if DG sources are

intermittent, the current sensing protective relays are difficult to set since fault

current changes with time depending on the availability of DG sources. The system

restoration after a fault occurs is also a challenging protection issue in a converter

interfaced DG connected distribution network or a microgrid. Usually, all the DGs

will be disconnected immediately after a fault in the network. The safety of

personnel and equipment of the distribution network, reclosing with DGs and arc

extinction are the major reasons for these DG disconnections.

In this thesis, an inverse time admittance (ITA) relay is proposed to protect a

distribution network or a microgrid which has several converter interfaced DG

connections. The ITA relay is capable of detecting faults and isolating a faulted

segment from the network, allowing unfaulted segments to operate either in grid

connected or islanded mode operations. The relay does not make the tripping

decision based on only the fault current. It also uses the voltage at the relay location.

Therefore, the ITA relay can be used effectively in a DG connected network in which

fault current level is low or fault current level changes with time. Different case

studies are considered to evaluate the performance of the ITA relays in comparison

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to some of the existing protection schemes. The relay performance is evaluated in

different types of distribution networks: radial, the IEEE 34 node test feeder and a

mesh network. The results are validated through PSCAD simulations and MATLAB

calculations. Several experimental tests are carried out to validate the numerical

results in a laboratory test feeder by implementing the ITA relay in LabVIEW.

Furthermore, a novel control strategy based on fold back current control is

proposed for a converter interfaced DG to overcome the problems associated with

the system restoration. The control strategy enables the self extinction of arc if the

fault is a temporary arc fault. This also helps in self system restoration if DG

capacity is sufficient to supply the load. The coordination with reclosers without

disconnecting the DGs from the network is discussed. This results in increased

reliability in the network by reduction of customer outages.

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Table of Contents

List of figures ix

List of tables xiii

List of appendices xv

List of symbols and abbreviations xvii

Chapter 1: Introduction ............................................. 1

1.1 Background .............................................................................................. 1

1.2 Aims and objectives of the thesis ............................................................. 3

1.3 Significance of research ........................................................................... 3

1.4 The original contributions of the research ............................................... 4

1.4.1 A novel relay characteristic for DG connected networks ................. 4

1.4.2 A new DG control strategy for fast system restoration ..................... 4

1.5 Structure of the thesis ............................................................................... 5

Chapter 2: Literature review ..................................... 7

2.1 Introduction .............................................................................................. 7

2.2 Protection issues and solutions ................................................................ 8

2.2.1 Islanding operation and anti-islanding protection ............................. 9

2.2.2 Coordination between protective devices ....................................... 12

2.2.3 Protection in the presence of current limited converters ................. 17

2.2.4 Reclosing, re-synchronization and arc faults .................................. 21

2.2.5 Communication based protection .................................................... 23

2.3 Summary ................................................................................................ 25

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Chapter 3: Protective relay for DG connected

networks ................................................. 27

3.1 Introduction ............................................................................................ 27

3.2 ITA relay characteristics ........................................................................ 28

3.3 ITA relay reach settings ......................................................................... 30

3.4 Different ITA relay elements ................................................................. 34

3.4.1 Earth elements ................................................................................. 34

3.4.2 Phase elements ................................................................................. 34

3.4.3 Directional elements ........................................................................ 35

3.5 Connection of ITA relays to a network .................................................. 35

3.6 Settings of ITA relays to detect resistive faults ..................................... 37

3.6.1 Zone-1 settings ................................................................................ 38

3.6.2 Zone-2 settings ................................................................................ 39

3.6.3 Zone-3 settings ................................................................................ 39

3.7 Practical issues for admittance calculation ............................................ 41

3.8 Summary ................................................................................................ 43

Chapter 4: Evaluation of ITA relay performance . 45

4.1 Introduction ............................................................................................ 45

4.2 Inverse time overcurrent relays .............................................................. 46

4.3 Distance relays ....................................................................................... 48

4.4 ITA relays ............................................................................................... 51

4.5 ITA relay performance ........................................................................... 54

4.5.1 A radial feeder with DGs ................................................................. 54

4.5.2 Effect of source impedance on relay response ................................ 61

4.5.3 ITA relay response for different DG and load distribution profiles 62

4.5.4 An application of ITA relays to IEEE 34 node test feeder .............. 66

4.5.5 ITA relays for mesh network protection ......................................... 70

4.6 Limitations of ITA relays ....................................................................... 74

4.7 Summary ................................................................................................ 77

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Chapter 5: Fold back current control and system

restoration .............................................. 79

5.1 Introduction ............................................................................................ 79

5.2 Fold back current control characteristics ............................................... 80

5.2.1 Fold back during contingency ......................................................... 80

5.2.2 Restoration process .......................................................................... 83

5.2.3 Coordination with reclosers ............................................................ 86

5.2.4 DG protection .................................................................................. 87

5.3 Arc fault model selection for simulation ............................................... 88

5.3.1 Primary arc fault .............................................................................. 89

5.3.2 Secondary arc fault .......................................................................... 90

5.3.3 Arc extinction .................................................................................. 91

5.4 Simulation studies .................................................................................. 91

5.4.1 Results for permanent faults ............................................................ 93

5.4.2 Results for Arc Faults ...................................................................... 97

5.4.3 Auto reclosing ............................................................................... 100

5.5 Summary .............................................................................................. 104

Chapter 6: Experimental results ........................... 105

6.1 Introduction .......................................................................................... 105

6.2 Test feeder arrangement ....................................................................... 105

6.3 Relay performance evaluation ............................................................. 109

6.4 Relay response for different fault locations ......................................... 111

6.4.1 Fault at BUS-2 ............................................................................... 112

6.4.2 Fault at BUS-3 ............................................................................... 113

6.4.3 Fault at BUS-4 ............................................................................... 115

6.4.4 Fault at BUS-5 ............................................................................... 116

6.4.5 Relay response for source impedance change ............................... 117

6.5 Analysis of ITA relay degradation factors ........................................... 120

6.5.1 The effect of fault resistance and infeed ....................................... 120

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6.5.2 The effect of fundamental extraction ............................................ 124

6.6 Summary .............................................................................................. 130

Chapter 7: Conclusions and recommendations ... 131

7.1 Conclusions .......................................................................................... 131

7.2 Recommendations for future research ................................................. 134

7.2.1 Consideration of rotary type DGs for protection........................... 134

7.2.2 Fold back type current control for rotary type DGs ...................... 134

7.2.3 The effect of single phase converters ............................................ 134

References 135

Publications arising from the thesis 143

Appendix-A 145

Appendix-B 147

Appendix-C 153

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List of Figures Fig. 2.1 Different types of communication networks (Adapted from [55]) .... 24

Fig. 3.1 A radial distribution feeder ................................................................. 28

Fig. 3.2 The variation of normalised admittance ............................................. 29

Fig. 3.3 Relay tripping characteristic curve ..................................................... 30

Fig. 3.4 A radial distribution feeder with relays .............................................. 31

Fig. 3.5 Relay protection zones and relay coordination .................................. 32

Fig. 3.6 Relay settings based on different forward and reverse reach ............. 33

Fig. 3.7 Relay connection diagram to the system ............................................ 36

Fig. 3.8 Process of relay tripping decision making ......................................... 36

Fig. 3.9 Relay tripping characteristics of different zones ................................ 41

Fig. 4.1 A radial distribution feeder with relays .............................................. 47

Fig. 4.2 Inverse time overcurrent relay grading .............................................. 47

Fig. 4.3 MHO relay characteristic ................................................................... 50

Fig. 4.4 MHO relay zone settings and timing diagram ................................... 50

Fig. 4.5 ITA relay grading ............................................................................... 52

Fig. 4.6 Faulted line with a relay ..................................................................... 52

Fig. 4.7 ITA relay characteristic in R-X diagram ............................................ 54

Fig. 4.8 Radial distribution feeder with DGs ................................................... 55

Fig. 4.9 OC and ITA relay grading .................................................................. 57

Fig. 4.10 OC and ITA relay response when DG1 is connected ....................... 58

Fig. 4.11 Distance and ITA relay response when DG1 is connected .............. 58

Fig. 4.12 OC and ITA relay time-current characteristic .................................. 59

Fig. 4.13 ITA relay response in grid connected mode ..................................... 60

Fig. 4.14 ITA relay response in islanded mode ............................................... 61

Fig. 4.15 ITA relay response for SLG fault in islanded operation .................. 61

Fig. 4.16 System with two parallel transformers ............................................. 62

Fig. 4.17 Relay response for impedance change ............................................. 62

Fig. 4.18 Distribution feeder with DGs and loads ........................................... 63

Fig. 4.19 ITA relay response when fault resistance is 0.05 Ω ......................... 64

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Fig. 4.20 Fault current seen by each ITA relay along the feeder ..................... 65

Fig. 4.21 Random load and DG distribution profiles along the feeder ............ 66

Fig. 4.22 ITA relay response for random load and DG distribution profiles .. 66

Fig. 4.23 IEEE 34 node test feeder with ITA relays ........................................ 67

Fig. 4.24 ITA relay response for SLG fault at node 858 ................................. 69



Fig. 4.27 Mesh network under study ............................................................... 71

Fig. 4.28 Equivalent representation of the faulted network ............................. 74

Fig. 4.29 ITA relay response for different values of fault resistances and DG

currents ............................................................................................ 76

Fig. 5.1 Proposed fold back characteristics ..................................................... 82

Fig. 5.2 System restoration .............................................................................. 85

Fig. 5.3 Simulated radial feeder with DGs ...................................................... 92

Fig. 5.4 Calculated ITA relay response for a three phase fault ....................... 94

Fig. 5.5 DG1 response (a) output voltage (b) output current (c) real power

output ................................................................................................. 95

Fig. 5.6 DG1 response (a) output voltage (b) output current (c) real power

output ................................................................................................. 97

Fig. 5.7 System behaviour for an arc fault (a) arc voltage (b) arc current (c) arc

resistance (d) relay response ............................................................... 99

Fig. 5.8 DG1 behaviour for an arc fault (a) output voltage (b) output current 99

Fig. 5.9 DG1 behaviour when downstream relay fails (a) output voltage (b)

output current .................................................................................. 100

Fig. 5.10 DG1 response during fault and system restoration ........................ 102

Fig. 5.11 DG1 terminal voltage and output current ....................................... 103

Fig. 6.1 Experimental test feeder ................................................................... 106

Fig. 6.2 Single line diagram of experimental setup ....................................... 106

Fig. 6.3 NI PXI-1042Q chassis ...................................................................... 107

Fig. 6.4 ITA relay implementation on LabVIEW .......................................... 108

Fig. 6.5 Simplified single line diagram of the test feeder .............................. 109

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Fig. 6.6 Calculated relay response in different zones for bolted faults ......... 111

Fig. 6.7 The variation of voltage and current for SLG faults at BUS-2 ........ 113



Fig. 6.10 The variation of voltage and current for SLG faults at BUS-5 ...... 117

Fig. 6.11 Voltage and current for a fault at BUS-2 ....................................... 118




Fig. 6.15 Change of parameters during a resistive fault at BUS-2 ................ 122

Fig. 6.16 Test feeder with an infeed .............................................................. 123

Fig. 6.17 Change of parameters for a fault at BUS-2 with fault resistance and

infeed ............................................................................................. 124

Fig. 6.18 A SLG fault at synchronous generator connected feeder ............... 125

Fig. 6.19 Current and voltage during a SLG fault ......................................... 126

Fig. 6.20 Values of relay parameters during a SLG fault .............................. 127

Fig. 6.21 Faulted current and voltage during a SLG fault ............................. 128

Fig. 6.22 Values of calculated relay parameters during a SLG fault ............. 129

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List of Tables Table 3.1 Selection criterion of a directional element ..................................... 35

Table 4.1 System parameters ........................................................................... 55

Table 4.2 OC relay settings ............................................................................. 56

Table 4.3 Zone characteristics of ITA relay .................................................... 56


Table 4.5 ITA relay forward and reverse reach settings .................................. 68


Table 4.7 Zone-3 grading of ITA relays .......................................................... 72

Table 4.8 Fault clearing time of ITA relays .................................................... 73

Table 5.1 Simulated system data ..................................................................... 92

Table 5.2 Arc model parameters ...................................................................... 97

Table 6.1 System parameters of the experimental setup ............................... 108

Table 6.2 Relay reach setting and tripping characteristic in each zone ......... 110

Table 6.3 ITA relay response for faults at BUS-2 ......................................... 113




Table 6.7 ITA relay response for SLG faults with higher source impedance 118

Table 6.8 Relay parameters during a resistive fault ...................................... 121

Table 6.9 Change of relay parameters due to fault resistance and infeed ..... 123

xv

List of Appendices Appendix-A Positive sequence admittance seen by ITA relay………….....145

Appendix-B Converter structure and control………………………………147

Appendix-C LabVIEW program…………………………………………...153

xvii

List of principle symbols and abbreviations

A, ρ, k Relay tripping constants

CB Circuit breaker

CT Current transformer

DFT Discrete Fourier transform

DG Distributed generator

FFT Fast Fourier transform

IDG Distributed generator current

Ip Pickup current

IRa, IRb Current in faulted phases A and B

Ir Rated current of converter

ITA Inverse time admittance

lp Primary arc length

ls Secondary arc length

MI Multiple of pickup current

OC Overcurrent

PCC Point of common coupling

R1, R2, R3 Protective relays

Rf Fault resistance

SLG Single line to ground

TDS Time dial settings

tp Tripping time

VSC Voltage source converter

Vs Source voltage

xviii

VT Voltage transformer

Ym Measured admittance

Yr Normalised admittance

YRK1 Positive sequence measured admittance

Yt Total admittance

Zdg Source impedance of distributed generator

ZLG Apparent impedance

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Statement of original authorship

The work contained in this thesis has not been previously submitted to meet

requirements for an award at this or any other higher education institution. To the

best of my knowledge and belief, this thesis contains no material previously

published or written by another person except where due reference is made.

Signature:………………………. Date:…………………………….

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Acknowledgements

First and foremost, I would like to convey my sincerest and deepest thanks to

my supervisors, Prof. Gerard Ledwich and Prof. Arindam Ghosh, for their

incomparable guidance and endless encouragement throughout my doctoral research.

It has been a great privilege for me to work under this supervision.

I wish to express my thanks to the Faculty of Built Environment and

Engineering, Queensland University of Technology (QUT) for providing me with

financial support during my research candidature.

I would also like to thank staff in the research portfolio office in QUT for their

generous support and assistance throughout the candidature, and the staff in the

School of Engineering Systems for providing such a helpful environment. Further, I

am thankful to staff in the Power Engineering Group for their valuable advice.

I would like to extend my appreciation to all the technical staff who supported

me during the laboratory experiments. Without this support, experimental work

would not have been successful.

I would further like to thank to all of my friends for sharing valuables ideas, for

supporting me during the experimental work, and for making the research period an

enjoyable one. Also, I am grateful to my parents for encouraging me to pursue higher

studies, and I thank them and my relatives for their constant support.

Last but not least, I would like to express my heartiest appreciation to my

beloved wife for her encouragement and support during the period of research in

Australia. Also, I cannot forget my son who brings joy and happiness to our small

nest.

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Chapter 1: Introduction

1.1 Background

With the rapid increase in electrical energy demand, power utilities are seeking

for more power generation capacity. However, environmental and right-of-way

concerns make the addition of central generating stations and the erection of power

transmission lines more difficult. Thus, newer technologies based on renewable

energy are becoming more acceptable as alternative energy generators. This

renewable energy push is starting to spread power generation over distribution

networks in the form of distributed generation and will lead to a significant increase

in the penetration level of distributed generation in the near future. It is expected that

20% of power generation will be through renewable sources by the year 2020 [1].

However, by that time, the penetration level of DGs is expected to be higher in many

countries which are seeking accelerated deployment of renewable technologies. The

DGs based on renewable energy sources will help in reducing greenhouse gas

emissions. Moreover, these DGs can provide benefits for both utilities and

consumers since they can reduce power loss, improve voltage profile and reduce

transmission and distribution costs due to their location close to customers [2, 3].

A microgrid can be considered as an entirely DG based grid that contains both

generators and loads. It is usually connected to the utility grid through a single point:

the point of common coupling (PCC). To the utility grid, the microgrid behaves as a


2

fully controllable load which at peak hours can even supply power back to the utility

grid. A microgrid can operate in either (utility) grid connected mode or islanded

mode and can seamlessly change between these modes. In an islanded mode, the

DGs connected to the microgrid supply its loads, where a provision for load shedding

exists if the load demand is higher than the total DG generation.

Most of the existing distribution systems are radial where power flows from

substation to the customers in a unidirectional manner. Overcurrent protection is

used for such systems because of its simplicity and low cost [1, 4]. However, once a

DG or a microgrid is connected within the main utility system, this pure radial nature

is lost [2, 5, 6] and the existing protection devices may not respond in the fashion for

which they were initially designed [4]. This change in response may be due to the

change in parameters, such as source impedance, short circuit capacity level and

change of fault currents and fault current directions at various locations.

Solar photovoltaic cells produce power at dc voltage. Similarly, fuel cells and

batteries also produce dc output power. These are then converted into ac voltage

through dc-ac converters. Also, other sources such as wind and microturbines use a

converter stage for grid interconnection. All the converters try to protect themselves

by limiting their output currents. This becomes more crucial during faults. In general,

fault current is usually limited to a value that is twice the converter rated current [7,

8]. As a result of current limiting, the overcurrent devices may not respond or may

operate slowly. This is specifically true when an islanded system is supplied by

current limited converters. The aim of this research was to identify and address the

protection issues of distribution networks in the presence of the DGs and microgrids.

New protection strategies are proposed to overcome the difficulties of the existing

protection schemes.


3

1.2 Aims and objectives of the thesis

The main objective of this thesis was to design and develop efficient protection

strategies to achieve the fault detection, faulted segment isolation, system restoration

and reclosing for both grid connected and islanded operations of a microgrid or a

distribution network which mainly consists of current limited DGs. To achieve this

goal, the aims of the research project were identified as:

analysing the protection issues related to a microgrid and a distribution network

in the presence of DGs

determining the applicability of the existing protection strategies

determining the new protection strategies that are required to achieve

appropriate fault detection and protection of a network

addressing the protection issues associated with system restoration, arc

extinction and reclosing in the presence of converter interfaced DGs in a

network

While the main objective of the thesis was to propose a generic protection

solution for DG connected distribution networks, the focus was limited to converter

interfaced DGs. Moreover, the protection of DG connected distribution networks

without communication was considered for a simple and cost effective solution.

1.3 Significance of research

The penetration level of DGs in the power distribution network is expected to

be very high in the near future. In the current climate change scenario, many

renewable energy sources such as wind and solar are being connected very rapidly to

the utility network. This research will help to identify the protection problems related

to a distribution network or microgrid which consists of distributed generators and


4

minimize the protection issues in implementation with the use of the proposed

strategies.

1.4 The original contributions of the research

The main objective of this research was to propose protection strategies to

incorporate DGs into a micro grid or a distribution network by overcoming the

identified protection issues. The main contributions of this research can be listed as

follows.

1.4.1 A novel relay characteristic for DG connected networks

An inverse time admittance (ITA) relay characteristic is proposed to overcome

the deficiencies of the existing overcurrent relays. The ITA relay has the capability

of detecting faults under different fault current levels which is the usual scenario that

can be seen in a distribution network when several DGs are present. These relays can

isolate the faulted segments and allow the unfaulted segments to operate either in

grid connected or islanded mode. Moreover, the relay is capable of providing

adequate protection for the islanded system which has several converter interfaced

DGs.

1.4.2 A new DG control strategy for fast system restoration

The arc extinction during an arc fault, reclosing for temporary faults and the

system restoration after a fault is cleared are major protection issues in a DG

connected distribution network. Therefore, to overcome these problems, a control

strategy based on fold back current control is proposed for converter interfaced DGs.

The proposed control has the capability to restore the system automatically if the

generation is sufficient to supply the load demand in an islanded section. Self


5

extinction of arc is achieved by reducing the output current of DGs. Furthermore, an

effective method is proposed to coordinate the operations of reclosers and converter

interfaced DGs in a network. The fold back control provides maximum benefits to

customers by reducing outages since the DGs are not disconnected immediately

when there is a fault in the system.

The proposed ITA relay and fold back current control strategy for a converter

interfaced DG provide a complete protection solution for a DG connected network.

The relays detect and isolate faults effectively while the fold back current control

helps in arc extinction, system restoration and recloser coordination with DGs.

1.5 Structure of the thesis

This thesis is organised in seven chapters and three appendices. The research

aims and objectives are outlined in Chapter 1. The need and justification for the

research in this field are identified in Chapter 2. In this chapter, a literature review is

carried out to identify the protection issues related to DG connected distribution

networks and microgrids. Moreover, the deficiencies of the existing protection

schemes are identified and some of the already proposed solutions to overcome these

protection issues are analysed.

As a result of identification of the protection issues and the deficiencies of the

existing protection schemes in Chapter 2, a new ITA relay is proposed for DG

connected networks in Chapter 3. The ITA relay characteristics and its features,

which include relay reach settings and different relay elements, are discussed in this

chapter. Moreover, practical implementation issues of ITA relays are also discussed.

The proposed ITA relay performance is then evaluated in Chapter 4. The

fundamentals of the existing overcurrent and distance relays are discussed and their


6

features are then compared with the ITA relays. Different case studies are carried out

to show the efficacy of the ITA relays. Moreover, simulation studies related to the

ITA relays are also presented in this chapter. Applications of ITA relays for both

radial and mesh networks are examined and their limitations are identified.

A fold back current control characteristic for a converter interfaced DG is

proposed in Chapter 5. The protection issues related to the system restoration, arc

extinction and reclosing are also addressed in this chapter. Different case studies of

both permanent and temporary faults were carried out and are presented here to show

the efficacy of proposed fold back converter control.

Chapter 6 presents the hardware results obtained through the experimental

laboratory tests. The ITA relay characteristic is modelled using LabVIEW software

and the relay performance is investigated for different fault locations and different

system configurations.

Conclusions drawn from this research and recommendations for future research

are given in Chapter 7. The list of references and a list of publications arsing from

the thesis are provided at the end of the last chapter. In Appendix-A, different types

of relay elements are discussed, while Appendix-B give a detailed description of the

converter structure and control used in simulation studies. The LabVIEW program

used in ITA relay implementation is presented in Appendix-C.

7

Chapter 2: Literature review

2.1 Introduction

The cost of transmission and distribution is rising with the rapid increases in

the load demand. However, the costs of distribution generation technologies are

falling [2]. So from a costing point of view, it is becoming more worthwhile to

increase the generation at the distribution level by connecting a distributed generator

(DG) to meet the load requirement without expanding the transmission and

distribution infrastructure. In addition, there are several advantages of having DGs;

short construction time, lower capital costs, reduction in gaseous emissions, reduced

transmission power loss since generation is now closer to the load, improving voltage

profile, enhancing reliability and diversification of energy sources [9-11].

A microgrid can be considered as a small grid based on DGs. Generally, the

microgrid consists of renewable energy based DGs and combined heat and power

plants. It can operate either grid connected or islanded mode. Most of the DGs are

connected to the microgrid through power electronic based power converters which

pose operational challenges [12]. The protection system of a microgrid should

respond to faults within the microgrid irrespective of its grid connected and islanded

operation. For a fault in the utility grid, the microgrid should disconnect immediately

from PCC to maintain a continuous supply to the microgrid loads. On the other hand,


8

the smallest possible set of faulted lines of the microgrid must be isolated for a fault

within this grid.

However, protection of a distribution network becomes more complicated and

challenging once several DGs are connected (as in a microgrid). In this chapter, the

complications in system protection arising due to the connection of DGs to a

distribution network are discussed. Also some of the already proposed solutions are

mentioned.

2.2 Protection issues and solutions

The present practice is to disconnect the DGs from the network using an

islanding detection method when there is a fault in the system [13, 14]. This is as per

the IEEE recommended practice, standard 1547 [15]. This may work satisfactorily

when the penetration of DGs in a distribution system is low. However, as the

penetration levels increase or in the case of micro or mini-grid, the DGs will be

expected to supply power even when the supply from the utility is lost and the DGs

form a small island. This will prevent unnecessary customer power interruption.

Thus, the benefits of DG installations can be maximized allowing the DGs to operate

in both grid connected and islanded modes of operation, especially when the DG

penetration level is high.

Some of the issues in DG connected distribution networks or microgrids that

need attention are bi-directional power flow, change of relay reach, coordination

between protective devices, islanding, reclosing, protection in the presence of current

limited converters and temporary arc faults. These are discussed below.


9

2.2.1 Islanding operation and anti-islanding protection

Islanding occurs when the main supply is disconnected and at least one

generator in the disconnected system continues to operate. If a DG is allowed to

operate in this islanding condition, it will bring benefits to customers by reducing

outages [16]. However, if DGs are not designed to operate in islanded operation, this

can cause a number of safety issues [17]. The point where the islanded system is

created after the disconnection of the utility for a fault cannot be identified exactly.

Therefore at the moment of islanding, the generation and load capacity may not be

equal.

When synchronous generators are present in the islanded region and if loads

are larger than the generation then the generators tend to slow down which can lead

to under frequency tripping of generators. In this case, a load shedding scheme

should be implemented to maintain the stability in the islanded system. On the other

hand if load capacity is less than the generation, generators could experience over

frequency tripping and require a fast governor controller to respond and balance the

power [18]. Thus there is a need to identify the islanding condition in an expanded

islanded system which has the loads beyond the PCC. The type of prime mover and

controller mode (i.e. droop control, constant power, etc) affect the response of the

system at the event of the islanding. These responses have been described according

to the type of generation in [18].

Also islanding may increase the risk for the user equipment and utility power

apparatus due to the potential reduction in performance standards for voltage and

frequency and the issues relating to phase mismatching when reconnecting the DG

and utility [1]. It also can be a potential hazard to utility personnel working to rectify

the faulted segment as some portion of it can be live due to power supplied by DGs.


10

Power quality may not be guaranteed within the island and there could be abnormal

conditions in voltage and frequency [19, 20]. In the islanded mode, short circuit

levels may drop significantly upon disconnection from the utility [1, 4, 19]. These

factors are the reason why anti-islanding protection is traditionally applied to achieve

the safety of personnel and equipment of the distribution system. Under and over

voltage relays, under and over frequency relays, vector shift and relays for detecting

rate of change of frequency (ROCOF) can be used as devices to detect islanding [10,

19, 21]. The common practice is to disconnect the DGs before the first reclosing

occurs after a fault in the system. Therefore anti-islanding protection devices should

be appropriately coordinated with other protective devices such as reclosers in the

system. From the reliability point of view, applying the anti-islanding protection to a

microgrid is disadvantageous.

An anti-islanding protection relay should detect the islanding condition within

the required time (typically 200 to 400 ms) and should trip all the generators. On the

other hand, it should not trip for small frequency variations in the system. A micro-

processor based line tracking system is suggested for detecting islanding condition of

a hydro power distributed generator (HPDG) using the changes of voltage,

frequency, active power and reactive power [10]. This method can be used to detect

the islanding condition of HPDG quickly and to isolate it from the main grid.

ROCOF relay needs very sensitive settings for the fast islanding detection under a

small imbalance of active power. However, it may cause to trip the anti-islanding

relay for the small frequency variations. Usually frequency tripping requirements

(i.e. under and over frequency) of a relay and islanding detection relay settings are

analysed separately. As a result, two relays are required to perform the task; one for

the under/over frequency protection of the generator and another for the islanding


11

detection. However, these two relays are operated based on the system frequency.

Reference [21] has proposed a graphical method based on application region of the

frequency relay to determine the islanding requirements without disturbing the

frequency tripping requirements. Further this paper outlines how to coordinate the

operation of the islanding detection relay and standard frequency tripping relay.

Reference [20] also provides a mathematical development to determine the

application region of a frequency relay which satisfies both the islanding detection

and frequency tripping requirements. It has been shown that the frequency relay can

be replaced by an islanding detection vector shift relay if the proper settings are

selected. Similarly, a method is suggested to find out the application region of a

voltage relay to satisfy both the anti-islanding and voltage variation protection in

[22]. After disconnecting the main utility, the loading effect on DG is suddenly

changed. As a result, balance condition of loads and harmonic currents will change.

Therefore Total Harmonic Distortion (THD) of current and voltage unbalance at the

DG terminal have been introduced as two new monitoring parameters to detect the

islanding condition with voltage magnitude in [23]. Test results have shown that this

method can be used efficiently for improved performance.

The DGs are expected to supply either an increase of load at grid connected

operation or emergency loads at the islanding operation. Thus the islanding operation

is important to ensure supply continuity to customers. Therefore, implementing an

anti islanding operation every time a fault occurs reduces the reliability of the

system. The authors in [6] proposed a method for a distribution network with high

penetration of DGs to use the conventional protective devices without disconnecting

the DGs from the system when a fault occurs. In this case, each DG should be

connected to two feeders which operate in a loop. The DG is required to be isolated


12

from the faulted feeder after the fault occurs and a micro-processor based line

protection relay is used to implement the scheme. However this scheme may increase

the fault clearing time which can affect the dynamic condition of the system. Voltage

and frequency should be maintained in the desired range, in the presence of

disturbances in the islanding system. Control strategies should be implemented

considering over-generated and under-generated islanding conditions [10].

It has been mentioned that the only way to maintain the existing coordination

system in the presence of arbitrary DG penetration level is to disconnect all DGs

instantly in the case of a fault [2]. It would result in the DG disconnection for a

temporary fault as well. Therefore it is clear that new protection strategies are

required to investigate with the DG penetration to the utility. In addition, if the DG is

not disconnected from the system at the event of a fault, the fault arc would not

extinguish during an automatic recloser open time, since the source feeding the fault

still remains. Thus a compromise solution between islanding operation and anti-

islanding protection needs to evolve.

2.2.2 Coordination between protective devices

The coordination of protective devices based on current is relatively easy when

the distribution network is radial. However, with the connection of microgrids or

DGs to the utility, the radial nature no longer exists and it permits the power flow to

be bi-directional rather than uni-directional [14, 24]. This may create a number of

protection coordination issues. On the other hand, the protective devices should be

coordinated in the distribution network considering reliability (correct operation),

selectivity (minimum system disconnection), speed of operation (minimum fault

duration), simplicity (having minimum protective equipment) and economics

(maximum protection under minimum cost). These coordinated actions should be


13

implemented fast enough to prevent personal hazards and equipment damage [25].

Generally, the protection of the distribution network is done using the current

measurement based on the coordination of fuses, overcurrent relays, reclosers and

sectionalisers [26]. It should consist of a primary and backup protection system

which has proper time grading between each devices. As an example, tripping time

increases towards the main utility source from the fault location and operation device

sequences for a fault in a DG may be the first low voltage breaker, then the fuse,

after that the line recloser, finally if fault still exits it should be cleared by the

substation circuit breaker.

The coordination based on the current is relatively easy in the unidirectional

power flow networks, because the fault current reduces along the feeder [26].

However, with the growth of distributed generators, the system permits the power

flow to be bi-directional rather than uni-directional [5, 27]. This may create a number

of feeder protection issues. It causes relays to under-reach or over-reach [28]. The

DG location in the distribution network influences the relay reach to reduce or

increase. It has been shown that the reach of an overcurrent relay will reduce in the

presence of a DG [29]. Among the protective devices currently used, reclosers and

fuses usually do not have the directional sensing feature but a relay can easily be

made to have that feature [2]. In addition to that, the DG can contribute by suppling

short circuit currents to the neighbouring faulted feeder and operating the protective

device in the healthy feeder [30]. The only possible way to coordinate the existing

protection schemes is to disconnect all the DGs for every fault even for the

temporary faults [2]. However, it has been mentioned before that this is not a

desirable solution to this problem.


14

An adaptive protection method is proposed for the distribution system with

high DG penetration level in [2]. In this approach, several zones are formed with a

reasonable balance of loads and DGs. Each breaker and recloser should have

communication capability and each individual zone breaker should be available to

check the synchronization function. At the beginning, load flow and short circuit

analysis for all types of faults need to be carried out. After the changes of system

configuration due to the loads or DGs , the load flow and short circuit analysis again

have to be repeated. This will not be feasible when a larger number of plug and play

DGs is connected /disconnected. Moreover, this adaptive method is complex as it is

not easy to define zones with the fluctuation of loads and DG generation. However,

protection is independent of DG size and location. The impact of DG capacity on

relay operation and coordination in a radial distribution system has been studied in

[31]. It has been shown that for a downstream fault from the connection point of a

DG, the relay selectivity remains unchanged and sensitivity improves due to the

increase in fault current. But there is a maximum capacity for the DG to keep the

relay coordination. Further a method was suggested to find out the maximum value

for the DG capacity. On the other hand for an upstream fault from the DG connection

point, it has been shown that the misoperation can occur for a low capacity DG.

Problems of protective devices coordination in a distribution network have

been addressed in [5]. To achieve the coordination among fuses, total clearing (TC)

time of a fuse should be less than the minimum melting (MM) time of the other fuse

for a particular value of fault current. After a DG penetrates into the system, the fault

current magnitude and direction can change and this initiates the problems in the

coordination. Usually a recloser has a sequence of operations as it employs two

operating characteristics curves called fast and slow. Most of the faults, which are


15

around 80% of the total faults in the distribution system, are temporary. Therefore

protective devices coordination should be done in an appropriate way when recloser

and fuse are present in a distribution system. Moreover the recloser should operate

fast enough to give a chance to clear the fault before the fuse [2, 5]. To achieve this

fast characteristic, the recloser should lie below the MM curve of the fuse. The fuse

should only operate for a permanent fault. This operation is obtained if the slow

characteristic of recloser lies above the TC curve of the fuse within the considered

minimum and maximum fault currents region. If DG is connected upstream to a

recloser, the fault current seen by the recloser and further downstream fuses will

increase. As a result the required margin between the fast characteristic of recloser

and minimum melting curve will tend to reduce. Thus there is a probability of losing

the coordination with any fuse further down to the recloser [32]. On the other hand, if

a DG is connected between a recloser and a fuse, the fault current seen by a fuse

increases and this may cause it to lose coordination. Before the DG connection, the

recloser and fuse see the same fault current. However, after the connection, the fuse

will see more current than the recloser and it responds before the recloser in the event

of a fault downstream to the fuse location. The effect on coordination increases with

DG capacity. Studies in [33] have shown that traditional reclosers are unable to keep

the coordination with fuses in the presence of high DG penetration. Further this

paper has proposed a microprocessor based recloser to perform the task under this

system condition.

When relays are present in the distribution system, time of operation of each

relay and among relays is called “Coordination time interval” for the faults should be

coordinated appropriately [5]. Overcurrent relays are the simplest and widely used in

protection applications. They are used in the distribution system as the primary


16

protection and in transmission as backup protection [34]. There are several types of

overcurrent relays available to select from depending on the application.

Instantaneous overcurrent relays are mostly used to protect sub-transmission lines

while definite time relays are used in ungrounded or high impedance grounded

systems. Moreover inverse time relays can easily coordinate with other protective

devices and they are usually employed to protect distribution networks. A software

model of a inverse time overcurrent relay has been developed to simulate in PSCAD

[34].

High backup time for the minimum fault currents is a disadvantage of

overcurrent relays. A method which proposes to find the time element function for an

overcurrent relay to reduce the back-up time to a constant value independent of the

fault current magnitude rather than in the conventional overcurrent relay is given in

[35]. References [36] and [37] present the IEEE standard analytical equation for the

different types of overcurrent relays (i.e. moderately inverse, very inverse, and

extremely inverse) and operating and reset characteristics that can be taken for

coordination purposes. Relays employed in the radial networks have both inverse

time and instantaneous elements to achieve a quick response for the severe faults as

well as the coordination among relays [26].

Also in the case of the islanded microgrid, the ratio between the source

impedance and protected line is relatively high compared to the utility and this

initiates a coordination problem since discrimination among relays are difficult at

this time [26]. When the network with a large number of lines is fed by a single

source station, the ground overcurrent relays have to be set with a large time delay

period such as five seconds to maintain a good coordination in the system. As a

result existing protection systems are upgraded with digital ground impedance


17

elements to achieve high speed fault clearing [38]. Reference [39] shows a method

to calculate directional overcurrent relays setting for both grid connected and

microgrid which consists of synchronous generator based DGs. In this method, the

Particle Swarm Optimization algorithm is used in the relay coordination problem to

obtain the optimal settings for the directional overcurrent relays while maintaining

the minimum operating time and coordination among relays. It has been shown that

it is not possible to calculate a setting time for the relays in both the grid connected

and islanded modes of operation. Hence a central control protection unit is required

to change the setting according to the system configuration. However fault current

seen by each device may change according to the location of microgrid connected to

the utility and fault location. Hence attention to coordinate protective devices is

essential.

There are numerous papers which address the coordination issues with the

presence of DGs in the distribution network. However, so far there is little attention

to the coordination analysis of the current limited converter interfaced DGs.

2.2.3 Protection in the presence of current limited converters

The fault current may change due to the presence of DGs in the network [2, 16,

19, 39, 40]. Its impact depends on the size, type, number of the DG, location of the

DG [5, 31]. Basically three types of DGs exist with different properties; synchronous

generators, induction generators and converter interface DGs [4]. Transient

behaviour and short circuit current levels vary based on the type of the generation

[41]. Microgrids which consist of synchronous generators tend to contribute an

additional fault level in the system [31]. However generators can increase or decrease

the fault current seen by protective devices depending on the location. The impact of

synchronous DGs on coordination between voltage sag and overcurrent protection


18

are studied in [40] considering the sensitive equipment response. Fault current

behaviour and fault detection in a distribution network for different types of faults in

the presence of an induction generator has been studied in [4]. The system which is

not designed with DGs may not work properly with existing protective devices once

several DGs are connected to the system [6]. In the presence of a generator within

the network, the fault current detected by a protective device located at the beginning

of the feeder can be reduced due to the rise of voltage drop over the feeder section

between the generator and the fault [4]. Therefore the faults previously cleared in a

very short time may now require a significant time to clear.

Most of the distribution resources in the microgrid are connected through the

power electronic converters [12]. For example, the dc power is generated by using

the sources such as fuel cell, micro turbine, or a photovoltaic and converters are

utilised to alter the dc power into ac power. These converter interface generators

supplies the currents not much greater than the nominal load currents [26]. Basically

the controller of the converter mainly consists of two control schemes named voltage

control and current control and it regulates the output active and reactive power [42].

In the voltage control mode, the converter produces a three phase balanced ac

voltage at the terminal. The current control scheme, which is explained in [42], uses

two control loops, an inner loop for the current output and outer loop for the power

output. It has been shown that the current control scheme responds slowly due to the

outer power loop.

However, converters do not supply sufficient current to operate current sensing

devices in a fault condition because they have been designed to limit the fault current

at a value that is not more than twice the rated current. As a result, overcurrent

devices may not respond or take a long time to respond [8, 26, 43, 44]. Therefore


19

protecting a converter dominated microgrid is a challenging technical issue under the

current limited environment [25]. Moreover there is a requirement to find other

protection techniques to solve this problem [7, 26, 27]. One possible approach which

facilitates using the existing overcurrent protection is up-rating of converters to

supply the required fault current. However this will be a costly process. Another

approach that is proposed to overcome this problem is to use a flywheel energy

storage system to obtain the necessary fault current in the event of a fault [44]. The

flywheel supplies the required fault current to operate the overcurrent protective

devices in the islanding operation.

A stand-alone three phase four leg voltage source converter model has been

studied to observe the fault behaviour of an islanded microgrid for different types of

faults in [7]. During a fault, the converter works as a constant current source

supplying the positive sequence current to the system. There are no active sources in

the negative or zero sequence networks. So it has been shown that the microgrid is

equivalent to a current source with parallel impedance which depends on the fault

type. In this converter topology, large voltages can be seen in healthy phases for

unbalanced faults. In [25], fault behaviour in a converter supplied microgrid has been

presented considering different types of converter topologies and microgrid earthing

systems. The paper concludes that the fault response strongly depends on the

converter control strategy.

Reference [26] suggests a voltage based fault detection scheme as a solution

for the converter dominated microgrid which operates on low fault current levels. It

describes three types of methods to detect the voltage in the faulted phase and

compares the detection time of the methods. The paper concludes that the neutral

grounding configuration affects fault detection. In addition, the paper further


20

proposes an adaptive overcurrent scheme which selects the lower current threshold to

operate the overcurrent device based on the value of voltage detection. In reference

[45], abc-dq transformation of the voltage waveforms is used to identify if the short

circuit condition is inside or outside a set zone in a microgrid. Voltage disturbance at

each relay location is calculated by comparing the reference value with the obtained

dc values in the d-q synchronous rotating frame. The tripping decision is made by

selecting the location which has the highest mean average disturbance value with the

help of a communication link among relays.

A differential relay based protection scheme is proposed to protect a microgrid

in either grid connected or islanded mode in [16]. In this, a central control unit is

used to make decisions on control and protection devices. Line parameters of the two

ends of a protected line have to be monitored by means of a wire connection if the

line is short or by a pilot wire communication if the line is long. The need for

communication channel is a disadvantage of the differential protection scheme.

Moreover, the response of DGs places between two relays will affect their

performance. Another approach for the protection of microgrid with converters in

both islanded and grid connected operation is presented in [8]. A static switch has

been designed to open the microgrid for all types of faults and faults should be

cleared using techniques which do not rely on high fault currents within the

microgrid.

In [29], simulation results show that a converter based DG has a considerable

effect on the detection of the fault current as seen by an overcurrent relay. The relay

reach will be reduced with the DG connection due to the reduction in the fault

current. An adaptive technique is proposed to set the pickup current of the

overcurrent relay based on the amount of DG power injected to the system. The


21

minimum pickup current of the relay is update depending on the fault type and

location. Further, the response of an converter interfaced fuel cell under a fault

conditions has been investigated and it has been shown that the fault will cause the

voltage to drop below to a value such that the undervoltage relay would operate to

trip the DG if the fault occurs near the DG. Therefore undervoltage relay can be used

under a fault condition to determine the status of the DG. Furthermore, IEEE

standard 929-2000 states that converters will sense a short circuit by voltage drop

rather than sensing the short circuit current. Another option is to design the

protective devices to operate for small fault currents. However, this may cause

nuisance tripping [16, 19, 46]. Thus there is a need to assure that for both the

microgrid itself and for the grid connected modes, the protection system is operating

in an adequate fast, selective and reliable way to clear the faults [39].

2.2.4 Reclosing, re-synchronization and arc faults

Most of the faults (around 90%) in the power system are temporary arc faults

(such as insulator failures, conductors clashing due to strong wind, animal contacts,

lightning strikes, etc). These faults can be successfully cleared by de-energizing the

line long enough such that the arc self extinguishes. Usually reclosers which open

and close a few times successively are used to clear such faults without any large

scale power interruption [47]. Maximum dead time of single phase reclosing in

transmission lines are decided by the system stability requirements, where time

exceeding 1.5-2 s is not permissible [48]. While the consumers experience a shorter

outage time due to automatic reclosing, these breakers cannot be used for permanent

faults [47]. Reclosing a circuit in which the fault still exists can be harmful to the

system components such as generators, transformers, etc. A proposal has been made


22

based on artificial neural network algorithms to solve this problem by analysing the

voltage of the open phase conductor during the recloser dead time interval [47].

Usually three phase reclosers are used in distribution networks. In a DG or

microgrid connected distribution network, the reclosing should be done with proper

synchronization since this will join two live systems. The maximum time available

for automatic reclosing without losing synchronism should be considered. During the

auto recloser open time, if the island and main grid undergo a phase mismatch, then

it may lead to damage to the equipment and DGs in the microgrid [5]. However, if

the DG is connected using a converter, the risk of damage to the DG is low as it has

its own protection [49]. Dead line voltage relay and sync-check relay can be used to

prevent out of phase reclosing [19]. In general, a DG is disconnected before the first

reclosing occurs in the system. This requires that any anti-islanding protection should

operate very quickly. As a result, the recloser should coordinate with the anti-

islanding protection, which is a challenging task [19]. A communication link can be

established between the line recloser and the DG to transfer trip signal to disconnect

the DG quickly [50]. An automatic synchronizing or synchronism check relay should

be used at the PCC breaker when restoring the system after disconnection [18]. Re-

synchronizing can be done manually or automatically using synchronism check relay

with a synchronous generator based DG. However for a converter interfaced DG,

automatic re-synchronizing is preferred [46].

In the case of arc faults, sufficient time should be given to de-ionize the gas

path during the recloser open condition. Otherwise the arc may reignite again and

fault will not be clear [49]. Also, if DGs are kept connected to the system during

recloser open time, they can sustain the arc. The arc self-extinction action depends

not only on the fault current magnitude, but also on the transient recovery voltage


23

rate after successful arc extinction at the current zero crossing [51]. Also the arc

extinction time is proportional to the arc time constant [52]. On the other hand, the

fault current magnitude of an arc fault is limited by the arc resistance. Sometimes it

results in difficulties of detecting the fault [53]. Moreover, the arc voltage at the fault

point is a source of errors in the fault locating process [54]. Therefore protection of

distribution network and restoration under arc fault is a challenging task.

2.2.5 Communication based protection

The distribution system protection will be complicated when the DGs are

spread throughout the network. As a result new protection issues will arise for the

traditional distribution networks. To address some of the issues, a protection based

on a communication medium has been developed. Communication media including

power line carrier (PLC), microwave and optical fibre have long been used for the

transmission line applications. However, in nature, the distribution lines are different

from transmission lines. These lines are shorter and they have numerous tapped

loads. Therefore a particular communication method for a distribution system

protection should be fast and reliable. Basically three types of communication

networks can be identified as shown in the Fig. 2.1 [55]. In centralised networks, all

nodes are connected to a central point, which is the acting agent for all

communications. A network distributed across many nodes rather than centralized

around a central point is known as a decentralised network. On the other hand, in a

distributed network, if nodes are located on scattered way, they may still be capable

of working either independently or jointly as required. The increase of

implementation of renewable energy sources to the distribution system has changed

the configuration from centralised to decentralised network.


24

Fig. 2.1 Different types of communication networks (Adapted from [55])

The installation of a larger number of DGs can cause the loss of protection

selectivity. Communication media may be the internet, PLC, wireless

communication, etc. In [56], PLC based methods are proposed for the coordination

of voltage control, islanding detection for a DG and controlling the interface devices

at the PCC. The Islanding detection method is introduced to minimize the problems

of traditional methods based on frequency and voltage measurements. High

attenuation levels can be expected in distribution lines when their structure is

complex and lines are long. To avoid such problems, repeaters need to be installed in

this implementation. Application considerations of internet as the real time

communication medium for providing the loss of mains protection of a DG has been

studied in [55].

The distribution system becomes a multi-source when one after another DG

gets connected at different locations. This change in system configuration will cause

false tripping and relay coordination problems. As a solution for these problems,

reference [57] has proposed a new current protection scheme based on

communication to a multi-source distribution system. Wide area measurement is

used to decide the appropriate protection actions to locate the fault with the use of

communication channel. An adaptive method is proposed in [58] to set the relay

settings in real time using wide area measurements based on communication. A multi


25

agent approach based on communication is proposed in [17] to provide protection of

the power system and coordination between the protective devices in the presence of

DGs. A new method is proposed in [13] based on analysing the sign of wavelet

coefficients of the fault current transient to locate and isolate a faulted segment. In

this, relay agents are proposed to implant the proposed protection scheme. A fault

location and fault isolation technique of a DG connected distribution network using

neural networks is presented in [59]. In this, the system has different zones and the

relay at substation communicates with zone breakers to take appropriate actions.

With the use of communication, relay coordination has the ability to rapidly

select the faulted region. However, installation of extensive communication will

require time. Once the power system is smart grid ready, various smart relays can be

installed. Till that time, protection without any or low levels of communication will

be the most cost effective solution.

2.3 Summary

In this chapter, a brief summary is presented based on the review of the

previous published research work on the protection issues which arise after the

connections of DGs and microgrids to distribution networks. There are several

benefits available for both the network operator and customer by utilising DGs or

DG based Microgrids. Reliability can increase if the islanded system can continue

the supply to the loads rather than disconnecting all the DGs by anti-islanding

protection schemes. Therefore within the islanded system, a protection scheme

should work satisfactorily. Different types of protection issues have been addressed

in the literatures and different solutions have also been proposed to overcome these

issues.


26

The proposed protection scheme should isolate the faulted segment as quickly

as possible from the network. The DGs can then supply the power to unfaulted

segments in the network if they have been designed to operate in islanded mode. To

achieve that solution, several protection solutions have been proposed based on

communication for DG connected networks. However, most of them need reliable

communication medium for fast operation.

Most of the time, current sensing protective devices have been used to detect

the faults in the network. However, with the high penetration level of converter based

DGs, protection of the system has been identified as a key challenging issue.

Although different solutions have been proposed to solve this problem, further

studies are still required to identify and improve the efficient fault detection methods.

In the near future, when more DGs come into operation, protection will be a

challenging task due to the network complexity.

27

Chapter 3: Protective relay for DG connected networks

3.1 Introduction

In a high penetrative DG network, a small possible portion should be isolated

during a fault allowing unfaulted segments to operate in either grid connected or

islanded mode to increase the system reliability by maximizing the DG benefits. To

achieve the faulted segment isolation, both upstream and downstream protective

devices should detect and isolate the fault. However, with the connection of DGs to a

distribution network or within a microgrid, fault current level can vary depending on

the DG connectivity, DG type and DG location. It results in difficulty of coordinating

existing overcurrent protective devices since network configuration changes.

Moreover, settings of these overcurrent relays to incorporate DGs are not possible if

DG power output changes with time or their connectivity is not consistent.

Furthermore, protection will be a challenging task when using converter

interfaced DGs because of the output current limiting during a fault in the network.

As a result of current limiting and intermittent nature of DGs, the fault isolation from

downstream side will be very difficult using the existing overcurrent relay which

normally operates depending on the fault current levels. Therefore new protection

schemes, which are not dependent on the fault current level of the network, are

required to accomplish the protection challenges in the DG context. In this chapter, a


28

novel Inverse Time Admittance (ITA) protective relay is proposed based on the

measured admittance of the protected line to avoid deficiencies of existing protection

schemes. The fundamentals of ITA relays are explained in this chapter.

3.2 ITA relay characteristics

A radial distribution feeder as shown in Fig. 3.1 is considered to explain the

ITA relay characteristics. It is assumed that the relay is located at node R and node K

is an arbitrary point on the feeder. The total admittance of the protected line segment

is denoted by Yt while the measured admittance between the nodes R and K is

denoted by Ym. Then the normalised admittance (Yr) can be defined in terms of Yt and

Ym as

t

mr Y

YY = (3.1)

Fig. 3.1 A radial distribution feeder

The variation of normalised admittance along a radial feeder is shown in Fig.

3.2 by assuming the feeder has a length of 3000m while the total feeder impedance is

(0.195 + j 1.4451) Ω. It can be seen that normalised admittance decreases when

measured point moves away from the relay location.


29

Fig. 3.2 The variation of normalised admittance

The change of normalised admittance along the feeder is used to obtain an

inverse time tripping characteristic for the relay. The general form for the inverse

time characteristic of the relay can be expressed as

kY

At

rp +

−=

1ρ (3.2)

where A, ρ and k are constants, while the tripping time is denoted by tp. The values

for these constants can be selected based on the relay location in a feeder and the

protection requirements. The shape of the proposed inverse time tripping

characteristic can be changed by varying the constants to obtain the required fault

clearing time. When a network consists of different types of protective devices, these

constants can be selected appropriately for coordination purpose. For example, the

coordination between the relay and a fuse can be considered. In this case, these

constants should be selected properly according to the tripping characteristic of the

fuse. The relay tripping characteristic for A = 0.0047, ρ = 0.08 and k = 0 is shown in

Fig. 3.3. The magnitude of the normalized admittance (i.e. Yr) becomes higher as the

fault point moves towards the relay location. As a result, the relay gives a lower


30

tripping time for a fault near to the relay. On the other hand, higher fault clearing

time can be obtained when the fault is further away from the relay location.

Fig. 3.3 Relay tripping characteristic curve

It is to be noted that the normalized admittance in (3.2) should be greater than

1.0 for relay tripping. This implies that the measured admittance is greater than the

total admittance as shown in (3.3). This constraint is used by the relay algorithm to

detect a faulted condition in the network. Moreover, the relay algorithm checks this

constraint continuously during the faulted condition until relay issues the trip

command to avoid any unnecessary tripping due to the effect of transients. The

tripping time is decided depending on the calculated value of measured admittance.

tmt

mr YY

Y

YY >⇒>⇒> 11 (3.3)

3.3 ITA relay reach settings

The ITA relay reach settings can be implemented by choosing a suitable value

for the Yt. This is totally dependent on the protection requirements such as primary

and backup protections. For a particular relay, different values of Yt can be assigned


31

to generate a number of required zones of protection. In each zone, the relay has a

unique tripping characteristic. It checks whether the measured admittance is greater

than the total admittance of that particular zone before starting the relay tripping time

calculation. A large coverage and minimum tripping time can be achieved by

increasing the number of zones. It also leads to a good coordination amongst the

relays in a feeder. Any upstream relay always provides the back up protection for the

immediate downstream relay in the feeder.

The radial feeder shown in Fig. 3.4 is considered to explain the relay reach

settings. The relays are located at BUS-1, BUS-2 and BUS-3. It is assumed that each

relay has two zones of protection. Zone-1 of each relay is selected to cover the whole

line segment between two adjacent relays, while Zone-2 is selected to cover twice

the length of the first line segment. The reach setting is set based on the positive

sequence admittance of the considered line segments. Zone-1 and Zone-2 tripping

characteristics are the same for all the relays. For example, relay tripping

characteristic curves for two adjacent relays R1 and R2 are illustrated in Fig. 3.5. The

locations of relays R1 and R2 and the tripping time of these relays against the distance

to the fault from the relay locations are shown in the figure. Each zone has different

values for the constants in (3.2) resulting different relay tripping characteristic

curves. It can be seen from Fig. 3.5, Zone-2 of R1 will provide a backup for the relay

R2. Another zone can be assigned with a different tripping characteristic, if required.

Fig. 3.4 A radial distribution feeder with relays


32

Fig. 3.5 Relay protection zones and relay coordination

The proposed new relay does have the ability to isolate the faults occurring at

either side of the relay in a radial feeder. This is because the absolute value is taken

into consideration in admittance normalizing process. However, for the relay to

operate for reverse faults there must be an infeed that is located downstream from the

relay. If the distribution network consists of these relays located at equal distances,

the same forward and reverse reach can be used to isolate forward and reverse faults.

The value for the reach of a particular zone should be selected according to the

requirement.

However, the reach setting should be different for forward and reverse faults,

when the relays are not placed equidistant from one another. In this case, each relay

has the capability such that the forward and reverse reach settings can be set

appropriately. For example, the reach setting of Zone-1 of the relay R3 in Fig. 3.4 is

considered. It is assumed that the lengths of the line segments 2-3 and 3-4 are not

equal. The forward reach of R3 is selected as 120% of line 3-4, while the reverse

reach of R3 is chosen as 100% of line 2-3 and 20 % of line 1-2. In this case, both the

reverse and the forward reach should have different values since line length between


33

relays are not equal. To accomplish forward and reverse reach in relays, the relay

should sense the fault direction. Moreover, the relay has the capability to identify

whether the fault is in the forward or reverse direction. Any method which will

determine the fault direction can be used for this purpose.

One possibility is to measure the relative difference of angle between the

current and bus voltage. The fault current lags the bus voltage for a forward fault

while for a reverse fault the fault current leads the bus voltage. In [60], relative phase

angle between fault current and pre-fault voltage is used to determine the fault

direction. Another possibility is to calculate the negative sequence impedance seen

by the relay. Based on the calculated value, the relay identifies the fault direction to

select the appropriate reach setting. This approach is only valid if the fault is

unsymmetrical since negative sequence will not be present for symmetrical faults.

The negative sequence impedance is always positive for the reverse faults and it is

negative for the forward faults [61]. The positive sequence directional element

proposed in [62] can be also used to identify the fault direction. After identifying the

fault direction, the process of tripping time calculation can be implemented as shown

in Fig. 3.6.

Fig. 3.6 Relay settings based on different forward and reverse reach


34

3.4 Different ITA relay elements

The ITA relay has different types of protection elements to detect different

faults. All elements are designed to operate based on measured admittance of the

protected line. These elements are explained below.

3.4.1 Earth elements

These elements will respond for the line to ground faults. The number of

elements varies depending on whether protection has been configured as directional

or non-directional. If protection is directional, then there are two independent earth

elements per phase. The positive sequence measured admittance; YRK1 seen by this

relay element is given by (3.4). The derivation of this formula is given in Appendix-

A.

Ra

RK

RKRaR

RK V

Y

YIaI

Y

−+

=1

0

10

1 (3.4)

where IRa is the rms line fault current through the relay while IRa0 is the zero

sequence fault current seen by relay and VRa is the faulted phase rms voltage. The

line parameters are used to calculate the ratio of YRK1/ YRK0. The relay reach is set

based on the positive sequence admittance of the protected line segment. This relay

reach and calculated measured admittance in (3.4) are utilized to make the tripping

decision and tripping time calculation.

3.4.2 Phase elements

These elements will respond for the line to line faults in the network. Similar to

the earth elements, the number of phase elements per phase varies depending on

whether protection has been configured as directional or non-directional. For


35

example, for phase A, two phase elements are employed, if protection is non-

directional, one for the faults between phase A and phase B and another for the faults

between phase A and phase C. Measured admittance seen by a phase element for a

line to line fault, between phase A and phase B, can be expressed as,

RbRa

RbRRK VV

IaIY

−−=1 (3.5)

where IRa and IRb are rms phase currents in faulted phases and VRa and VRb are faulted

phase rms voltages. This measured admittance in (3.5) is used by relay logic to detect

a line to line fault in the network.

3.4.3 Directional elements

The directional elements can be used to identify whether the fault is in forward

or reverse direction from the relay. This will help to implement separate reach

settings for each direction especially when a relay protects non-equidistant zones.

The user has been given the facility to select the preference as listed in Table 3.1.

Table 3.1 Selection criterion of a directional element

Setting Operation

Directional Each element has two settings to cover both forward

and reverse direction faults

Non-directional Each element operates regardless of the fault direction

Directional blocking Each element only operate either forward or reverse

direction (user can select the direction)

3.5 Connection of ITA relays to a network

The basic connection diagram of the ITA relay is shown in Fig. 3.7. Voltage

and current at the relay location are obtained using a voltage transformer (VT) and a


36

current transformer (CT) respectively. The relay output is linked to the tripping coil

of the circuit breaker (CB). The relay continuously monitors the input parameters and

executes the relay logic to identify a faulted condition in the network. The process of

making the tripping decision is shown in the Fig. 3.8. Based on the fundamental

voltage and current, the admittance is calculated, which is the measured admittance

of the relay point at a given time. The measured admittance and values for the relay

reach settings are the inputs to the relay logic. This logic consists of normalized

admittance calculation, relay characteristic equations, relay tripping time

calculations, identification of fault direction and defined relay constraints. The

faulted condition is detected by using the constraint in (3.3). Once fault is detected,

the calculated tripping time based on measured admittance is fed through an

integrator to obtain the tripping signal for the CB. Also relay checks whether the

fault detection signal exists until relay issues the tripping command to avoid any

nuisance tripping.

Fig. 3.7 Relay connection diagram to the system

Fig. 3.8 Process of relay tripping decision making


37

3.6 Settings of ITA relays to detect resistive faults

Higher fault resistance can affect the operation of ITA relays. Therefore a

method of relay settings is described to achieve successful relay operation in the

presence of fault resistance. The relay carefully checks the constraint in (3.3)

continuously, which is the comparison between the measured admittance (Ym) and

the total admittance (Yt) setting of a particular zone. The relay detects a fault in the

network when Ym becomes higher than Yt. For a fault within a particular zone, Ym is

always greater than Yt, if fault resistance is zero. However, with the increase of .fault

resistance, Ym can become less than Yt. Also the maximum fault resistance which

allows the relay to operate depends on the fault location of the line. For example, the

relay can operate for a higher resistive fault, if the fault is near the relay than when it

is further away from the relay since a higher value of fault resistance can be

compensated by each zone for near faults.

Another protective zone is introduced to achieve the tripping operation of the

relays under resistive faults. The maximum fault resistance which can be tolerated by

the relay is decided based on the loads of the feeder. In this case, the relay operation

can be obtained up to a pre-defined value of fault resistance. This method will not

work for higher resistive faults, where fault currents are in same levels as load

currents. The minimum equivalent impedance of loads (i.e. the maximum load

condition in the system) is calculated based on the known system parameters under

the normal operation. That will be the corresponding maximum fault resistance

which can be tolerated by the relay under the faulted condition. If the relay reach

settings are below the minimum equivalent impedance of the loads, the relay may

trip under normal operation as identifying the load as a high resistive fault. However,

a safety factor is introduced to avoid unnecessary relay operations. For example,


38

effect of cold load inrush can be considered. Therefore, it is proposed to select one

third of minimum equivalent impedance of loads as the fault resistance setting.

A relay, if it has two zones, has two tripping characteristic curves. In this case,

total admittance, Yt should be set separately for each zone depending on protection

requirements. Instead of these two zone characteristics, another characteristic will be

introduced to discriminate the high resistive faults as mentioned above. Hereinafter,

this zone is denoted by Zone-3. In this case Yt consists of corresponding line

impedance and the maximum fault resistance which is determined based on loading

condition. A coordination time interval should be kept between adjacent two Zone-3s

of relays to obtain the correct relay grading. Otherwise relay characteristic of Zone-3

in each relay will not show a considerable time difference for the faults with low

fault resistance. Also the tripping time is set to a little higher value than the settings

in the normal zone operations, since there is no requirement to isolate the faults with

lower fault currents faster than the faults with higher fault currents. The radial

network shown in Fig. 3.4 is considered again to illustrate the relay settings for all

the zones.

3.6.1 Zone-1 settings

Zone-1 reach setting is similar for all the relays if they are located equidistant.

Therefore, Yt is set by assuming the Zone-1 will protect 120% of the first line, Z12

being the impedance between two adjacent buses.

)2.1(

1

121_ Z

Y Zonet ×= (3.6)

Tripping characteristic for Zone-1 can be given by,

05.01

0037.008.0

+−

=r

pY

t (3.7)


39


Yt is set by assuming Zone-2 will protect 200% of the first line. This setting is

also similar for all the relays. The reach setting and tripping characteristic can be

given by

)2(

1

122_ Z

Y Zonet ×= (3.8)

15.01

0037.01.0

+−

=r

pY

t (3.9)


This zone represents a broader coverage of the protected line including the

compensation for fault resistance. The value of Yt can be set using the allowable

maximum fault resistance. The allowable maximum fault resistance is denoted by Zf

after calculating the maximum load and adjusting it using the safety margin. It

should be noted that Zf is the maximum fault resistance that can be handled by the

relay when fault occurs in the far end of the protected zone. It is not the fault

resistance in a particular fault condition. In this case, Yt for the Zone-3 can be set as,

)(

1

123_

fZonet ZZ

Y+

= (3.10)

Zone-1 and Zone-2 tripping characteristics are same for all the relays.

However, setting of Zone-3 will be different for each relay since coordination time

margin should be kept among the relays. If relays are designed to operate for both

forward and reverse faults, then the relay will have two different tripping

characteristics in Zone-3; one for forward faults which can be denoted by Zone-3F

and other one for reverse faults which can be given by Zone-3R. In this case, the

directional feature should be added to the relay for differentiation of forward and


40

reverse faults. If the relay detects the fault as forward, then forward tripping

characteristic, t_Zone3F is activated. On the other hand, reverse tripping characteristics,

t_Zone3R is activated if fault is detected by the relay as reverse.

The Zone-3 tripping characteristic of each relay can be modified by assigning

different constant values. A minimum tripping time characteristic should be selected

for the furthest downstream relay to discriminate the forward faults. It can be then

increased according to the coordination time interval between two adjacent relays.

This Zone-3 grading is similar to the TDS setting of an overcurrent relay in a radial

feeder. On the other hand, the minimum tripping time characteristic for reverse fault

is selected to the furthest upstream relay. The settings of Zone-3 for the relays R1, R2,

and R3 in the radial feeder of Fig. 3.4 can be given as shown in (3.11)-(3.13)

respectively. These settings can be changed according to the protection requirements.

15.11

0037.01.01_3 +

−=

rRFZone

Yt

45.01

0037.01.01_3 +

−=

rRRZone

Yt

(3.11)

85.01

0037.01.02_3 +

−=

rRFZone

Yt

75.01

0037.01.02_3 +

−=

rRRZone

Yt

(3.12)

55.01

0037.01.03_3 +

−=

rRFZone

Yt

05.11

0037.01.03_3 +

−=

rRRZone

Yt

(3.13)

The tripping characteristics of relays R2 and R3 in radial feeder of Fig. 3.4 are

considered to illustrate the Zone-3 operation. The relay characteristics are shown in

Fig. 3.9. In this case, only two relays are considered for clear illustration. Zone-3


41

tripping characteristics of R2 and R3 are calculated using (3.12) and (3.13)

respectively. The figure also shows the combined forward relay characteristics of

Zone-1 and Zone-2. It can be seen that forward Zone-3 as well as reverse Zone-3

characteristics of each relay have been graded appropriately to achieve the backup

protection. For example, it is assumed that a fault between BUS-1 and BUS-2 in the

system cannot be detected by the primary zones (i.e., Zone-1 and Zone-2) of R1 and

R2. Then, in this case, R2 detects the fault in reverse Zone-3 to isolate the fault from

downstream side while R3 provides the backup protection as shown in Fig. 3.9.

Fig. 3.9 Relay tripping characteristics of different zones

3.7 Practical issues for admittance calculation

The process of fundamental voltage and current extraction is very important on

tripping time calculation since the tripping time is decided based on the calculated

measured admittance. Therefore the fundamental extraction methods and the factors

which can influence on the fundamental extraction should be considered. Harmonics,

current transients and decaying dc magnitude and time constant can be identified as

the major challenges on fundamental extraction. The decaying dc component can


42

usually appear in current signal. However, the decaying dc magnitude and time

constant cannot be calculated before a fault occurs since it depends on the system

configuration (X/R ratio), fault location and the value of fault resistance.

Fast Fourier Transform (FFT) or Discrete Fourier Transform (DFT) can be

used to extract the fundamental component from a sampled waveform. FFT is a fast

way of calculating the DFT. FFT can accurately calculate the fundamental in the

presence of harmonics and signal noises. However, it is not immune to decaying dc

component.

DFT is widely used in digital protective relays. DFT can extract the

fundamental in the presence of harmonics, however it is also not immune to decaying

dc component [63]. Some previous studies propose some interesting techniques to

calculate the fundamental component accurately in the presence of decaying dc

component. A method is proposed in [63] to eliminate the effect of decaying dc

component by calculating the time constant of the faulted current waveform. In this

algorithm, the dc magnitude is then calculated based on the calculated time constant

for a cycle and subtract the dc magnitude from samples to obtain the DFT without

decaying dc component. A DFT based filter algorithm is presented in [64] for digital

distance relays to extract the fundamental accurately. In [65], a method is described

to remove the decaying dc component for an application of protective relays. It can

be applied either half cycle or full cycle of the sampled waveform to calculate the

fundamental.

In proposed ITA relays, the measured admittance is calculated using the faulted

phase fundamental voltage and current in the relay location. The first coefficient is

only sufficient for this calculation. One of the dc decaying removal algorithms as

mentioned above can be used in ITA relay application to minimise the error in


43

tripping time calculation. However, the speed of the calculation and burden on the

processor should be carefully considered when selecting a particular algorithm to

avoid the errors coming form decaying dc component on tripping time calculations.

3.8 Summary

In this chapter, the basic features of the proposed ITA relay to protect a

distribution network or a microgrid which has several DGs are discussed. The relay

inverse time characteristic and relay reach setting have been explained. Furthermore,

different relay elements and a method of relay setting to achieve fault detection under

higher resistive faults have been explained. Finally, the challenges of implementing

ITA relays and possible solutions to avoid them are identified.

45

Chapter 4: Evaluation of ITA relay performance

4.1 Introduction

Faults can be usually identified by sensing the current level in an electrical

power system since high currents can be seen during the faults. Overcurrent (OC)

relays, fuses and moulded case circuit breakers (MCCBs) are the common type of

current sensing protective devices used in distribution networks. The OC relays can

be classified as definite current or instantaneous, definite time and inverse time based

on the operating characteristics. In this chapter, features of inverse time OC relays

are briefly considered since they are commonly used in distribution networks. On the

other hand, distance type relays are commonly used to protect the transmission

networks where speed of operation and reliability are very important. Fundamentally,

MHO type distance relay are considered in this chapter. These existing OC and

distance relay protection schemes are compared with the proposed ITA relay to

demonstrate the performance of the ITA relay. The grading and coordination of

relays are explained. Furthermore, the effects of DGs on relay operation are

considered. The relay performances are validated by PSCAD/EMTDC simulations

and MATLAB calculations.


46

4.2 Inverse time overcurrent relays

Most of the existing distribution networks are radial and they are employed

with OC protective devices because of their simplicity and low cost [4, 30].

Coordination of such protective devices based on current is relatively easy in the

radial networks. The IEEE Standard inverse time relay tripping characteristic is

given by [37]

TDSBM

At

pp ×

+−

=1

(4.1)

where the constants A, B and p are used to select the relay characteristic curve and

time dial setting (i.e. TDS) is used for the coordination between several OC relays. M

is the multiple of pickup current and it is defined by

=

p

f

I

IM (4.2)

where I f is the fault current seen by the relay and Ip is the relay set current (i.e. pickup

current). Three inverse time OC relay characteristic equations are given in the IEEE

report [37]. They are moderately inverse, very inverse and extremely inverse. Each

relay curve has different constants values in (4.1).

To illustrate the grading of inverse time OC relays, a four bus bar radial feeder

is considered as shown in Fig. 4.1. Relays are located at BUS-1, BUS-2 and BUS-3

and are denoted by R1, R2 and R3 respectively. An upstream relay will provide the

backup protection for the adjacent downstream relay. A time margin, called

coordination time interval (discrimination), is kept between relays to achieve the

relay coordination by setting the TDS of each relay. Inverse time tripping

characteristic of the graded inverse OC relays for this radial system is shown in Fig.


47

4.2. The relay tripping time tp is shown with the fault location. Coordination time

intervals for R1-R2 and R2-R3 are denoted by t12 and t23 respectively. Lowest TDS

value is set to the furthest downstream relay R3. Then TDS for R2 is selected

appropriately such that coordination time interval between R2 and R3 to be t23.

Similarly TDS for R1 is selected. The relay nearest to the source (i.e. R1) will see the

highest fault current in the feeder. However, as a result of grading, this relay (R1) has

a higher TDS compared to the relays R2 and R3. Therefore R1 will take longer time to

clear faults near BUS-1. This is a disadvantage of OC relay grading, because faults

which have higher fault currents cannot not be cleared quickly.

Fig. 4.1 A radial distribution feeder with relays

Fig. 4.2 Inverse time overcurrent relay grading

The effect on OC protection is considered once a DG or DGs are connected to

a radial network. The fault behavior of the network will change considerably with the

change of fault current and fault current direction. As a result, several protection

issues can arise. Some of these issues are relay coordination, relay reach and relay


48

response in islanding operation. A DG can initiate problems related to the relay

coordination in a distribution feeder depending on the DG size, type, and location

[5]. Fault current seen by a relay at the beginning of a feeder will be reduced in the

presence of DGs in the system. As a result, a fault can remain uncleared for a longer

time. It has been shown that the OC relay reach can be reduced in the presence of

DGs in the feeder [29]. The adverse effects on the reach increase when the

penetration level of DGs increases. If the DGs are plug-and-play and may not be

connected to the system at all times, then their power output fluctuates. As a result,

the OC relays will respond differently. Moreover, in an islanded condition, the fault

current levels will be low if the supply is from current limited converters. The OC

relays may not operate satisfactorily under such a scenario. Therefore the protection

of a distribution network with OC relays is a difficult task, especially when several

DGs are connected to the system. The numerical comparison of performance

between OC and ITA relays is given in Section 4.5.

4.3 Distance relays

The basic operation and coordination of MHO type distance relay are

explained in this sub-section. The reach setting of this relay is carried out based on

the positive sequence impedance of the protected line. Each relay has a number of

protection zones, where it measures the impedance to a fault and checks whether the

measured value lies inside or outside the defined zones in order to make a tripping

decision. The apparent impedance seen by an earth element of the relay for ground

faults is calculated by using the standard equation [66]

0IKI

VZ

phase

phaseLG +

= (4.3)


49

where I0 is the zero sequence current, K is the residual compensation factor for

apparent impedance (ZLG) calculation and Vphase and Iphase are the respective phase

voltage and current. Even though positive sequence impedance for a fault can be

calculated using (4.3), in most of the real distance relay applications, comparison of

two quantities called operating and polarizing are carried out to determine whether

the fault exists inside or outside a particular zone.

The MHO characteristic in R-X plane is shown in Fig. 4.3 assuming, for

illustration purpose, the relay has two zones of protection. The reach setting for the

zones can be established following the procedure described in [66]. For R1 settings,

Zone-1 covers 80 percent of the first protected line length and Zone-2 covers the

whole first line plus 50 percent of the adjacent line length. A 20 percent portion is

kept as a safety margin to mitigate errors caused by current and voltage transformers

and impedance calculations when selecting the Zone-1 reach. Similarly, zone settings

for the other relays can be performed. Zone-2 of R1 provides the back up protection

for R2. Time delay is set between Zone-1 and zone-2 to enable correct discrimination

as shown in the timing diagram in Fig. 4.4. As can be seen from the figure, the relay

tripping is the same if the fault is in a particular zone. For example, if the fault is

within the Zone-1, the relay will trip after a time period of t1. It does not consider the

distance to the fault for tripping within a particular zone (for example point A and B

in Fig. 4.4). Unlike an OC relay, the distance relay does not follow any inverse time

characteristic. The lack of inverse time characteristic is disadvantageous from the

point of view of coordinating with other inverse time protective devices such as

reclosers, fuses etc.


50

Fig. 4.3 MHO relay characteristic

Fig. 4.4 MHO relay zone settings and timing diagram

As mentioned before, distance relays are used primarily for transmission line

protection. Distribution networks are different from transmission networks. Most of

the distribution networks are radial and they have distributed three phase as well as

single phase loads. Moreover, it is expected that different types of DGs may be

connected at different locations along a radial distribution network. Therefore the

suitability of protecting such a network using the conventional distance relays has to

be analyzed.

The preliminary investigation of distribution network protection using distance

relays has been reported in [67]. It has been shown that distance relays having

negative sequence directional feature can be used to protect a distribution feeder that

has a single current limited converter connected DG at the beginning of the feeder.


51

This observation is valid both when this DG is operating either in islanded or grid-

connected mode. However further studies are required to confirm the validity when

feeder is operated with several current limited DGs at different locations. A

numerical performance comparison between distance relay with proposed ITA relay

is given in Section 4.5.

4.4 ITA relays

The ITA relay characteristic is given in (3.2) and it is reproduced below.

kY

At

rp +

−=

1ρ (4.4)

where A, ρ and k are constants, while the tripping time is denoted by tp. To illustrate

the grading of ITA relays, the same four bus bar radial system shown in Fig. 4.1 is

considered. The ITA relays do not have a TDS setting as in the case of OC relays to

achieve coordination. These relays will make the tripping decision based on the

measured admittance to the fault location. The tripping characteristics of graded ITA

relays for the radial system are shown in Fig. 4.5. It has been assumed that each relay

has two zones of protection. The combined tripping characteristic of Zone-1 and

Zone-2 is shown in the figure. Coordination time intervals are denoted by t12 and t23.

In OC protection, the relay near to the source takes longer time to operate. However

in the case of ITA relays, the relay near to the source will take the same time to

operate as other relays do. The measured admittance is the only parameter that will

decide the relay tripping time. This is an advantage of the ITA relay over an OC

relay.


52

Fig. 4.5 ITA relay grading

To compare how the OC relay and ITA relay are different, a line segment as

shown in Fig. 4.6 is considered. The node R represents the relay location, while fault

point is denoted by node F, which is at a distance X from the relay. The current and

voltage seen by the relay for the fault is given by Ix and Vx respectively.

Fig. 4.6 Faulted line with a relay

The pick up current setting of an OC relay for this feeder protection is usually

calculated by taking the one third of minimum fault current at the end of feeder. The

calculated pick up current is denoted by Ip, while corresponding voltage at the relay

point for the current of Ip is represented by Vp. For the fault at point F, the multiple of

pick up current for the OC relay tripping characteristic can be calculated similar to

(4.2) by using

p

xI I

IM = (4.5)


53

To obtain the same sensitivity for the ITA relay, the total line admittance

should be set corresponding to the admittance which is given by Ip and Vp. Therefore,

the normalized admittance, which is the ratio between the measured admittance and

total admittance, can be given for the fault at point F as

)/(

)/(

)/(

)/(

px

px

pp

xx

t

mr VV

II

VI

VI

Y

YY === (4.6)

From (4.5) and (4.6), normalised admittance Yr can be given by

pV

V

Ir V

VxMwhere

M

MY == (4.7)

Note that while MI is the multiple of the pick up current and MV can be defined as the

multiple of pick up voltage since it is the ratio between faulted voltage to the pick up

voltage. For a fault in the network, MI is greater than one. However, the magnitude of

MV is less than one when a fault occurs in the network. It can be seen from (4.7) that

ITA relay uses both current and voltage multiples instead of only current based

multiple in the OC relay. As a result, the ITA relay has the ability to detect the faults

effectively irrespective of the available fault current level in a network. This may

also result in fault detection under low fault current level environment, specially the

cases where current limited DGs are connected to the network.

To show how the ITA relay can be related to a distance type relay, real

imaginary (R-X) plane representation is considered with the relay tripping curve.

Zone-1 of the ITA relay is considered for this illustration. The ITA relay

characteristic can be represented in both distance-tripping time and R-X plane as

shown in Fig. 4.7. The tripping time characteristic curve of ITA relay can be mapped

into circles in R-X plane, in which each circle has a unique tripping time. For

example, point D on tripping time curve is considered. This point is corresponding to


54

a fault with tripping time t4. When the point D is mapped into R-X plane, the point

becomes a circle which gives the same tripping time of t4. In a similar manner, four

more circles are shown in R-X plane corresponding to fault points A, B, C and E on

tripping time curve of the relay. It can be concluded that infinite number of

concentric constant tripping time circles exist for Zone-1 of the ITA relay. Therefore,

the ITA relay can be identified as similar to a distance relay with infinite number of

zones to give different tripping times depending on the location of the fault point.

Fig. 4.7 ITA relay characteristic in R-X diagram

4.5 ITA relay performance

4.5.1 A radial feeder with DGs

In this section, the ITA relay performance is compared with the existing

protection schemes in a radial distribution feeder considering DG connections. The

major expectations of this study are to


55

show the relay grading performances

show the effect of a DG or DGs on relay sensitivity

illustrate the possibility of coordination with other protective devices

investigate the relay response under converter connected DGs in grid connected

and islanded mode operations.

Fig. 4.8 shows a radial distribution network with DG1, DG2 and DG3

connected at BUS-2, BUS-3 and BUS-4 respectively. The relays are located at BUS-

1, BUS-2 and BUS-3. The parameters of the considered system are given in Table

4.1. Several case studies are considered depending on the system configuration and

the type of protective devices employed.

The OC relay settings for the given system are calculated based on the

maximum and minimum fault current levels at each bus as illustrated in [68],

assuming the relays have moderately inverse OC characteristic [37]. The

discrimination time for the OC relays is chosen as 0.3 s. The calculated OC relay

settings are listed in Table 4.2.

Fig. 4.8 Radial distribution feeder with DGs

Table 4.1 System parameters

System data Value

System frequency 50 Hz

Source voltage (Vs) 11 kV rms (L-L)

Source impedance Zs = 0.078 + j 0.7854 Ω

Feeder impedance Z12 = Z23 = Z34 = 1.47 + j 3.0159 Ω


56

Table 4.2 OC relay settings

Parameter R1 R2 R3

CT ratio 200:5 150:5 150:5

Pick-up current (A) 4.5 4 4

TDS 0.65 0.35 0.1

The constants for the ITA relay characteristic, given in (4.4), are chosen

assuming that the relays have two zones of protection in which Zone-1 covers 120%

of the first line length and Zone-2 covers twice the length of the first line. The

selected constant values for Zone-1 and Zone-2 are given in Table 4.3.

Table 4.3 Zone characteristics of ITA relay

Zone number A p k

Zone-1 0.0037 0.08 0.05

Zone-2 0.0037 0.1 0.1

The relay response is observed by creating three phase faults at different

locations along the feeder. Results are obtained through MATLAB calculation while

PSCAD simulation results are used to validate the calculations.

Case Study-1: Relay grading in a radial feeder

The grading of OC relays and ITA relays for the radial network of Fig. 4.8 is

shown in Fig. 4.9 without considering the DGs. It is clear that in the case of OC

relays, the relay near to the source takes long time to trip due to the discrimination

time and higher TDS values whereas ITA relays clear the fault quickly by

considering the distance to the fault (i.e. measured admittance). Therefore proposed

ITA relay grading is superior compared to the OC relay.


57

Fig. 4.9 OC and ITA relay grading

Case Study-2: Relay sensitivity

For this case, it is assumed that only DG1 is connected to the radial feeder of

Fig. 4.8. The ratio between utility (source) fault current to DG1 fault current is

chosen as 5 (i.e. Is/IDG1=5). The OC and ITA relay responses are shown in Fig. 4.10.

In the case of OC relay, the sensitivity of R2 and R3 has increased while coordination

time interval between the relays has reduced due to the fault current contribution of

DG1. However for the ITA relays, the sensitivity of R2 and R3 remains the same with

or without the DG. The two curves, for both these ITA relays, overlap and therefore

they cannot be differentiated in Fig. 4.10. The only noticeable change for the ITA

relay is for R1 and this is due to the infeed from DG1. It can therefore be concluded

that the ITA relay coordination between downstream relays from DG1 remains as

same, irrespective of the fault current levels of the DG.

The same system is considered to compare the ITA relays with conventional

distance relays. It is considered here that distance relays have three zones which

Zone-1 covers 80% of the protected line length while Zone-2 and Zone-3 cover

120% and 200% of the protected line length respectively. The relay response is


58

shown in Fig. 4.11. The sensitivity of R2 and R3 remain the same for both the relay

types. However, the ITA relay shows an inverse time characteristic and it is an

advantage when coordination aspects are concerned.

Fig. 4.10 OC and ITA relay response when DG1 is connected

Fig. 4.11 Distance and ITA relay response when DG1 is connected

Case Study-3: Time-current relay characteristic

The relay operating time for different levels of fault current is important when

the relay is used for the coordination with other current sensing protective devices.

Relay R3 is considered in the system of Fig. 4.8 assuming that no DGs are present.


59

Fig. 4.12 shows the time-current characteristic for both OC and ITA relays. It is

evident that the ITA relay also has an inverse time characteristic curve. Since the OC

relays can be used for coordinating with other current sensing protective devices in

the network, this result confirms that the ITA relay can also be used for the same

purpose.

Case Study-4: Grid protection with converter interfaced DGs

In this study, it is considered that all the three DGs (DG1, DG2 and DG3) are

connected and are current limited during faults. The ITA relay response is shown in

Fig. 4.13. The fault current contribution of each DG is one 40th of the source fault

current (i.e. Is/IDG = 40). Let there be a fault at point A, which is between buses 2 and

3. Both relays R2 (in forward direction) and R3 (in reverse direction due to DG3) will

isolate the fault. Relay R1 provides a backup for R2. In this case, the protection

system of DG2 will disconnect it after a defined time if the fault persists. In this

manner, it can be seen that the ITA relays have the capability to isolate the faulted

segment from both the sides allowing both grid connected and islanded operations.

Fig. 4.12 OC and ITA relay time-current characteristic


60

Fig. 4.13 ITA relay response in grid connected mode

Case Study-5: Islanded protection with converter interfaced DGs

To investigate the relay response in islanded mode of operation, it is assumed

that the utility source is isolated from the rest of the system (upstream from BUS-1)

and the DGs together have the capability to supply the total load demand. All the

DGs are considered to be converter interfaced. To discuss the results, two terms are

introduced – relay response and relay tripping characteristic. The latter is defined by

(4.4) using only the line parameters. It does not consider that DGs are present in the

system or the presence of any fault resistance. The relay response is calculated using

(4.4) considering all loads, fault resistance and DGs present in the system.

The relay response and the relay tripping characteristics are shown in Fig. 4.14

when all the DGs are connected to the system. The solid lines represent the forward

relay tripping characteristic, while dotted lines indicate the relay response to faults.

The relay response shows the capability of detecting the faults in islanded system

under low fault current levels. Fig. 4.15 shows the relay response obtained from

PSCAD simulation for a single line to ground fault (SLG) between BUS-2 and BUS-

3. The fault is created at 0.1 s and R2 (forward isolation) and R3 (reverse isolation)


61

operate after 0.111 s and 0.160 s respectively. It is to be noted that if OC relays are

used, they will fail to detect this fault in islanded condition due to the low current

level produced by the converters.

Fig. 4.14 ITA relay response in islanded mode

Fig. 4.15 ITA relay response for SLG fault in islanded operation

4.5.2 Effect of source impedance on relay response

In this study, the behavior of OC and ITA relays is compared when the source

impedance changes. For this purpose, a system with two parallel transformers

connected between buses A and B is considered as shown in Fig. 4.16. The supply

feeder starts at BUS-B. The impedance of each transformer is taken as 0.3 p.u., while

feeder impedance is chosen as 0.1 p.u. The relay response for faults between BUS-B


62

and BUS-C when only one transformer is connected and both transformers are

connected is shown in Fig. 4.17. The impedance between buses A and B is 0.15 p.u.

when both transformers are on, while it is 0.3 p.u. when only one is operating.

Therefore the fault current level is higher when both transformers are one. Since an

OC relay response time depends on the fault current levels, there are two different

curves for OC relay in Fig. 4.17. However, the ITA relay shows the same response

irrespective of the impedance change caused by transformer connections.

Fig. 4.16 System with two parallel transformers

Fig. 4.17 Relay response for impedance change

4.5.3 ITA relay response for different DG and load distribution profiles

A radial distribution feeder which has n number of buses as shown in Fig. 4.18

is considered. In this system, utility is connected at BUS-1 which does not have a

load or a DG. Either a DG or a load or their combination is connected to each of the

other buses. All the DGs considered in this study are connected through the current


63

limited converters. The ITA relays can be employed at different locations according

to the protection requirements. Three phase faults are considered under this study at

different locations. The DG penetration level is said to be 100% when the load

demand is equal to the DG generation at normal operating condition. Moreover, it is

assumed that DGs supply twice of their rated current in constant current control

mode during a fault. Two types of load and DG distribution profiles are considered to

investigate the relay response. These are uniform load and DG distribution and

random load and DG distribution.

Fig. 4.18 Distribution feeder with DGs and loads

To demonstrate the operation of the ITA relays, a 45 bus radial feeder is

considered. In this system, the ITA relays R1, R2, R3 and R4 are located at buses 1,

12, 23 and 34 respectively. It is to be noted that load demand is selected such that the

voltage at the end of the feeder is slightly higher than 0.95 p.u. when all the loads are

connected without any DG. This will be the maximum loading in the system. Results

are obtained using MATLAB for different values of fault resistance.

The parameters of the study system are listed in Table 4.4 assuming the DGs

and loads are distributed uniformly along the feeder and DGs can supply the whole

load demand (i.e. 100% of DG penetration).


64


System data Value



Source impedance Zs = 0.078 + j 0.7854 Ω

Feeder impedance Z12 = Z23 = Zk(k+1)= 0.585 + j 4.3353 Ω

Each load impedance Load1 =Load2= 4798.7 + j 3599.2 Ω

Each DG power output DG1=DG2=0.0388 MVA

A. Uniform load and DG distribution

It is assumed that DGs and loads are distributed uniformly along the feeder.

Therefore, 44 DGs and 44 loads are connected from BUS-2 to BUS-45, which

implies a DG penetration level of 100%. The ITA relay response for three phase

faults along the feeder is shown in Fig. 4.19 for fault resistance of 0.05 Ω. The relays

respond to isolate both the forward and reverse faults effectively by allowing

unfaulted segments to operate in islanded operation.

Fig. 4.19 ITA relay response when fault resistance is 0.05 Ω

The fault current seen by each relay for faults along the feeder is shown in Fig.

4.20. It can be seen that reverse fault current is significantly smaller compared to the


65

forward fault current. This is because the utility also feeds the fault current in the

forward direction, while the DGs, which operate in current limit mode, only feed the

reverse fault current. However, the ITA relays still have the ability to detect the

faults under this lower fault current level.

Fig. 4.20 Fault current seen by each ITA relay along the feeder

B. Random load and DG distribution

In this study, it is considered that the distribution of DGs and loads along the

feeder is not uniform. They are connected randomly while maintaining the total DG

penetration level as 100%. Different random distribution profiles are considered.

However, results are presented for only one study. The considered random DG and

load distribution profiles are shown in Fig. 4.21. The ITA relay response under these

distribution profiles is shown in Fig. 4.22. It can be seen that the relays will respond

both in the forward and reverse directions to isolate the faulted segment, thereby

increasing the system reliability.


66

Fig. 4.21 Random load and DG distribution profiles along the feeder

Fig. 4.22 ITA relay response for random load and DG distribution profiles

4.5.4 An application of ITA relays to IEEE 34 node test feeder

To illustrate the ITA relay reach settings, relay grading and relay performance

on a realistic system, the IEEE 34 node test feeder is considered [69]. The test feeder,

shown in Fig. 4.23, is modified by connecting three converter interfaced DGs at

nodes 838,840 and 862. Three ITA relays R1, R2 and R3 are assigned to the nodes

832, 834 and 860 respectively. In this example, two regions, Region-A and Region-

B, are selected assuming that these regions have the capability to operate in islanded


67

mode with the aid of DGs. In the islanded mode, DG1 supplies the load demand of

Region-A, while DG2 and DG3 supply the load demand of Region-B. Each DG

capacity is chosen appropriately to enable the autonomous operation of each of these

regions. Furthermore, it is assumed that all the DG converters operate in a current

limited mode during the faults. Relay R1 provides the primary protection up to the

node 860 (covering nodes 858 and 864), while R2 and R3 provide the primary

protection for the Region-A and Region-B respectively. This protection example

(i.e., the protection downstream from node 832) is considered to illustrate the

efficacy of the ITA relays. The test system is modeled and simulated in PSCAD,

where the DGs are assumed to be ideal dc voltage sources. The converter structure

and control is given in Appendix-B. The converters are switched in output feedback

voltage control mode during normal operations and output feedback current control

mode [70] during the faults to limit the faults currents.

Fig. 4.23 IEEE 34 node test feeder with ITA relays

The forward and reverse reach settings of ITA relays are calculated using the

given system parameters of the IEEE 34 feeder and they are given in Table 4.5, in

which the lengths and impedance values are given. The forward and reverse relay


68

reach are different since lines have different lengths. The relay tripping

characteristics and zone settings are similar to those given in Sub-section 4.5.1.

Different types of fault are created at different locations to study the efficacy of

proposed scheme. However, a few cases are presented here. It is to be noted that a

DG should go into the current limiting mode as soon as a fault is detected to supply

the fault current such that the ITA relays can detect and isolate the fault. However, if

the fault persists for a longer period of time, the DG should isolate itself from the

supply in order to protect its power electronic switches. Therefore, a time interval is

defined for each DG for which it will supply the fault current.

Table 4.5 ITA relay forward and reverse reach settings

Relay

Parameters for forward reach settings

Primary protection Length (m) Z1 (Ω)

R1 Node 832-860 3825 10.4013+j5.1767

R2 Node 834-848 1740 4.7316 +j 2.3549

R3 Node 860-838 2346 3.9174 + j2.3131

Parameters for reverse reach settings

Primary protection Length (m) Z1 (Ω)

R1 Not considered

R2 Node 834-832 3219 8.7535+j4.3565

R3 Node 860-832 3825 10.4013+j5.1767

Z1 - positive sequence impedance

A. Fault at Node 858

A SLG fault is created at 0.3 s. The relays R1, R2 and R3 operate at 0.410 s,

0.472 s and 0.458 s respectively to isolate the faulted segment. Note that R2 and R3

see this as a reverse fault. The ITA relay response is shown in Fig. 4.24. Note that,

once the fault is cleared, DG1 in the Regions-A and DG2 and DG3 in Region-B

continue to supply the loads, thereby increasing the reliability of the system.


69

Fig. 4.24 ITA relay response for SLG fault at node 858

B. Fault at Node 842

A SLG fault is initiated at 0.3 s. The relay R2 responds at 0.401 s as shown in

Fig. 4.25 to isolate the fault. The rest of the system except Region-A operates in grid

connected mode. Since there are no other protection devices between DG1 and the

fault point, DG1 is disconnected after the defined time interval.


C. Fault at Node 862

A SLG fault is initiated at 0.3 s and relay R3 operates at 0.490 s to isolate the

fault. The ITA relay response for this fault is shown Fig. 4.26. The rest of the system

except Region-B operates in grid connected mode.


70


The above results verify that the ITA relays have the ability to respond under

low fault current levels. These relays isolate the faulted segment from the network

allowing unfaulted segments to operate either in grid connected or islanded mode

operations. Also it is to be noted that proposed ITA relays have the ability to detect

the faults in islanded conditions as well. For example, if an islanded system is

created by opening the circuit breaker at Node 832, the rest of system operates with

adequate protection. However the fault current level will be significantly lower in

such a case.

4.5.5 ITA relays for mesh network protection

To demonstrate an application of ITA relays to a mesh network protection, a

system shown in Fig. 4.27 is considered. This system has a partly mesh network

containing BUS-1, BUS-2 and BUS-5. There are three DGs and three loads in this

system. All the DGs are connected through voltage source converters (VSCs). As

before, these VSCs limit their output current to twice of the rated current during a

fault. Eight ITA relays are employed for secure and reliable operation of the system.

The relay locations are shown in the figure. The one of the main aims of the ITA

relays is to isolate the faulted segment quickly in the event of a fault allowing

unfaulted sections to operate either in grid connected or islanded mode depending on


71

the fault location. In the case of an islanded mode operation, each DG or DGs in the

islanded section can operate in autonomous mode if there is sufficient generation to

supply the load demand. The system parameters are listed in Table 4.6. In this study,

no communication between relays is considered for a simple and cost effective

solution.

Fig. 4.27 Mesh network under study


System parameter Value

Voltage 11 kV L-L rms

Frequency 50 HZ

Source impedance (0.078 + j 0.7854) Ω

Each feeder impedance (0.585 + j 4.335) Ω

The relays R12, R21, R15, R51, R52 and R25 which are located in the mesh

network have the directional blocking feature in which these relays only respond to

forward faults. This results in proper relay coordination within the mesh network.

For example, consider relay R15. It protects the line segment between BUS-1 and

BUS-5. Also it provides the backup protection for the line segment between BUS-5


72

and BUS-2. However, R15 is blocked for the reverse faults since R12 should operate

for the faults between BUS-1 and BUS-2. The relays R12 and R52 cover the line

segment between BUS-2 and BUS-3 in forward direction. On the other hand, the

relay R32 has the directional feature and thus it can detect faults in either sides of

BUS-3. The relay R43 is also a directional blocking relay which only responds for

reverse faults since it is located at the end of the feeder.

The relay reach settings and tripping characteristics of Zone-1 and Zone-2 are

the same as given in Sub-Section 4.5.1. The reach setting of Zone-3 is selected to

cover fault resistance of 50 Ω. However, the grading of relays for Zone-3 is different

as explained in Chapter 3. In this system, R32, R52, R15 and R12 in the forward

direction and R51, R25, R21, R32 and R43 in the reverse direction should be coordinated

separately. When performing the ITA relay grading in Zone-3, tripping time for

forward faults should be increased, while it should be decreased for reverse faults

from downstream to upstream relays in the network. The graded Zone-3 tripping

characteristics of ITA relays are given in Table 4.7.

Table 4.7 Zone-3 grading of ITA relays

Relay grading for forward faults Relay grading for reverse faults

3.01

0037.01.032_3 +

−=

rRFZone

Yt 5.0

1

0037.01.043_3 +

−=

rRRZone

Yt

4.01

0037.01.012_3 +

−=

rRFZone

Yt 4.0

1

0037.01.032_3 +

−=

rRRZone

Yt

4.01

0037.01.052_3 +

−=

rRFZone

Yt 3.0

1

0037.01.021_3 +

−=

rRRZone

Yt

5.01

0037.01.015_3 +

−=

rRFZone

Yt 3.0

1

0037.01.025_3 +

−=

rRRZone

Yt

2.01

0037.01.051_3 +

−=

rRRZone

Yt


73

The system is simulated in PSCAD. A SLG fault is created at different

locations with different values of fault resistances at 0.2 s. The ITA relay fault

clearing times are listed in Table 4.8. In each line segment, two fault locations are

considered. As can be seen from the results, the relays respond to isolate the faulted

segment effectively. For example, in the event of a fault between BUS-1 and BUS-2,

the both relays R12 and R21 respond to isolate the faulted segment. In this case, the

rest of the system operates in grid connected mode after the successful isolation of

the faulted segment.

Table 4.8 Fault clearing time of ITA relays

Fault location

(between)

Fault clearing time of respective relay (seconds)

Rf = 0.05 Ω Rf = 20 Ω

BUS-1 and

BUS-2

10% from BUS-1 R12=0.071,R21=0.137 R12=0.438,R21=0.774

90% from BUS-1 R12=0.137,R21=0.072 R12=0.443,R21=0.359

All the loads are supplied in grid connected mode without line Z12

BUS-1 and

BUS-5

10% from BUS-1 R15=0.071,R51=0.137 R15=0.540,R51=0.774

90% from BUS-1 R15=0.136,R51=0.073 R15=0.544,R51=0.251

All loads are supplied in grid connected mode without line Z15

BUS-2 and

BUS-5

10% from BUS-2 R25=0.072,R52=0.137 R25=0.348,R52=0.445

90% from BUS-2 R25=0.137,R52=0.073 R25=0.458,R52=0.443

All loads are supplied in grid connected mode without line Z25

BUS-2 and

BUS-3

10% from BUS-2 R12=0.150,R52=0.158,

R32=0.082

R12=0.459,R52=0.472

R32=0.480

90% from BUS-2 R12=0.410,R52=0.427,

R32=0.075

R12=0.481,R52=0.494

R32=0.509

Load3 is supplied in grid connected mode while Load1 and Load2

supplied in islanded mode without line Z23

BUS-3 and

BUS-4

10% from BUS-3 R32=0.074,R43=0.137 R32=0.345,R43=0.615

90% from BUS-3 R32=0.139,R43=0.072 R32=0.349,R43=0.913

Load1 and Load3 are supplied in grid connected mode while Load2 is

supplied in islanded mode without line Z34


74

Higher fault clearing time can be experienced for resistive faults due to the

relay grading and infeed effect of DGs. Within the mesh configuration, fault current

seen by relays are coming from different directions. Limitations of relay operation

due to the fault resistance and DG infeed are discussed in next sub-section.

4.6 Limitations of ITA relays

The limitations of ITA relay operation due to the fault resistance and DG

infeed are discussed in this sub-section. To explain the change of relay response with

the increase of fault resistance, a fault between relays R1 and R2 is considered in the

network shown in Fig. 4.28. The Thevenin equivalent line impedance between R1

and fault point is denoted by Zf, while that between R2 and fault point is denoted by

Zr. The fault current that is fed from the source be denoted by IS, while the fault

current fed from the downstream side DGs is denoted by IDG.

Fig. 4.28 Equivalent representation of the faulted network

The measured admittances seen by relays R1 and R2 in the presence of fault

resistance and DGs can be respectively given by

++

=++

=

s

DGff

DGsfsf

sRm

I

IRZ

IIRIZ

IY

1

1

)()1( (4.8)

++

=++

=

DG

sfr

DGsfDGr

DGRm

I

IRZ

IIRIZ

IY

1

1

)()2( (4.9)


75

As per (4.8) and (4.9), an error occurs in the measured admittances due to the

fault resistance. This is the second part of the impedance (one which is multiplied by

Rf). If fault resistance is zero, the error becomes zero and relays can effectively detect

the faults. When fault resistance is present, the ratio between source current and DG

current (IS/IDG) also affect the measured admittance. For fault detection, the

measured admittance (Ym) should be greater than the total admittance (Yt). Generally,

IS >Idg since IS is fed by a utility with higher capacity than a DG. Therefore, for a

particular DG penetration level and a particular value of fault resistance, the error on

the measured admittance R2 (Ym(R2)) is greater than that of R1 (Ym(R1)). Thus it can be

seen that fault resistance will affect the downstream relay more than the upstream

relay. However, once the forward relay isolates the fault, source current Is becomes

zero and this will allow reverse relay to operate. As can be seen from (4.9), the error

due to the source current will become zero. However, the error due to Rf will remain.

The ability of the ITA relay fault detection depends on the system

configuration. The maximum value for a fault resistance which relay can reliably

respond can be calculated based on the relay settings, line parameters and DG

connections. One such study is carried out considering different fault resistance

values and source current to DG current ratios (denoted by IS/DG). The line

impedance between two relays in Fig. 4.28 is taken as 0.585+ j 4.335 Ω. The results

are shown in Fig. 4.29. The total admittance setting of each relay (i.e. Yt) is shown

assuming this zone covers three times the length of the line segment. The measured

admittances seen by relays R1 and R2 are denoted by Ym(R1) and Ym(R2) respectively.

The measured admittance change of R2 due to the fault isolation by the forward relay

R1 is also shown in the figure. If the measured admittance of a relay is greater than

total admittance, that relay can successfully detect the fault.


76

It can be seen from Fig. 4.29 that when fault resistance becomes higher, the

measured admittance decreases reducing the relay ability of detecting faults. On the

other hand, when IS/DG becomes higher (i.e. DGs have less capacity), the fault

detection capability of forward relay has improved. The measured admittance of

reverse relay R2 is always below the total admittance. As can be seen from the figure,

the measured admittance of R2 becomes higher than Yt once forward relay isolates

the fault in the forward direction. Therefore the reverse relay does not detect the

faults until the forward relay operates.

Fig. 4.29 ITA relay response for different values of fault resistances and DG currents

The operation of the ITA relay may be affected by fault resistance and infeed

of DGs located downstream. As a result, the relay may take more time to trip than

expected. The values of line parameters, total admittance setting, fault location, fault


77

resistance and DG capacity will determine the amount of error on the measured

admittance and hence the tripping time of the ITA relay.

4.7 Summary

In this chapter, the ITA relay performances have been compared with the

existing relays. The relay grading and coordination, the effect of DGs on the relay

response and the effect of source impedance on the relay response for both ITA and

OC relays are considered. The ITA relay performances are evaluated in a radial

distribution feeder with DGs considering different DG and load distribution profiles.

Moreover, an application of these relays to IEEE 34 test node feeder has been

demonstrated. The protection of a mesh network which has several converter

interfaced DGs and loads are considered using the ITA relays. Both resistive and

non-resistive faults are simulated to see the efficacy of ITA relays. Finally, the

limitations of ITA relay protection due to the fault resistance and DG connections

have been addressed.

According to the relay performance analysis, it is clear that ITA relays have the

capability to isolate a faulted segment in a DG connected network allowing unfaulted

segments to operate either in grid connected or islanded mode operations. This

results in improving the reliability of a network since customer outages are reduced.

79

Chapter 5: Fold back current control and system restoration

5.1 Introduction

Most of the faults around 80-90% in the power system are temporary and they

can be successfully removed by performing reclosing [47]. However, when DGs are

connected to the network, reclosing becomes more complicated. The current

approach is to disconnect all the DGs as soon as a fault occurs. However, the

disconnection of DGs even for temporary faults will reduce the system reliability.

Again, most of the temporary faults are arcing type. As long as current is supplied to

the fault, the arc is sustained. If a network contains DGs and these DGs are not

disconnected during these arc faults, then the DGs will supply fault current thereby

not allowing the arc to extinguish. Thus, reclosing and arc extinction can be

identified as two major protection issues in a DG connected network.

To overcome these problems, specifically in a converter based DG connected

network, a novel control strategy for a converter interfaced DG is proposed using

fold back current control characteristic. The main aim of this work is to restore the

system after a temporary fault without disconnecting the converter interfaced DGs

from the system while facilitating the reclosing effectively. Furthermore, DGs can

restore the unfaulted segments even for permanent faults if employed line protection

scheme can isolate the faulted segment effectively. The proposed fold back converter


80

control will be explained in this chapter. Arc model selection for system simulation

with a DG is then considered. Simulation results of proposed converter control for

temporary arc faults and permanent faults will be presented considering automatic

reclosing.

5.2 Fold back current control characteristics

A fold back current control for a converter interfaced DG is proposed in this

section. This control strategy helps in the arc extinction and self restoration while

facilitating reclosing effectively. Moreover, the converter control can maintain

sufficient current level to aid fault detection if the protective devices in the network

are designed to respond to a limited fault current level. The converter nominally

operates in voltage control mode. Once a fault is detected, it switches to fold back

current control mode discussed in Section 5.2.1. The mode of operation is decided

based on the value of converter terminal voltage. The description of the converter

control characteristic is given below.

5.2.1 Fold back during contingency

The converter control contains two separate characteristics; one for normal

operation and contingency (faulted) conditions and the other one for system

restoration. The voltage-current relation of the converter for normal and contingency

operation is shown in Fig. 5.1(a). During normal operating condition, the VSC

operates along the line segment AB under a voltage control mode. It is assumed that

when the VSC output voltage reaches V2, its output current reaches 2Ir, Ir being the

rated current. The operation of the VSC shifts to current control mode once the

output voltage falls below V2. This is shown in Fig. 5.1 (b), in which the output

current is gradually reduced with time along the line segment DE. This gradual


81

decrease of current can help to trigger the protective devices for isolating the faulted

segment from the network. Especially, the protective devices which are located

downstream from the fault location can respond due to this fault current. If the

current is suddenly reduced, the protective devices may not have any information

about the fault. From point E, the current is reduced rapidly along the segment EF

until it reaches a value nIr, where n is a very small number. The number n is selected

to be very small since terminal voltage of the VSC is maintained to a very lower

value for a defined time period after the point F reaches.

It is to be noted that the line segment BC cannot be represented exactly in Fig.

5.1 (a) since converter voltage, in current control mode, may change with the system

parameters such as fault location and fault resistance. This is why the voltage current

relation in this case is shown with a dotted line in the figure. The time period t12 and

t23, shown in Fig. 5.1 (b), can be selected according to the protective devices

employed and their requirements. Especially, the time, t12 allows relays to detect the

faults. Therefore it should be long enough for successful fault isolation. The selection

can be done by calculating the maximum fault clearing time of a known relay

characteristic.

The VSC checks the terminal voltage continuously to identify whether the fault

is cleared or still persists. If the fault is cleared during the current fold back period,

the VSC will restore the system to its pre-faulted state by changing back to the

voltage control mode. For example, if the fault is cleared during fold back at the

point P shown in Fig. 5.1 (c), then the VSC restores through point M to the operating

point O. The load line is shown assuming the DG capacity is sufficient to supply the

load demand.


82

(a) During voltage control mode

(b) During current control mode

(c) During fault clearing

Fig. 5.1 Proposed fold back characteristics

After the fold back current time periods of t12 and t23, the VSC output current

has reached to nIr. The DG is then kept connected to the network for a pre-defined

time period in which it injects a very small current. This mode of converter operation


83

can be called sleep mode and it allows for the arc faults to self-extinguish. The

required time period for sleep mode can be calculated based on the arc de-ionization

time which is given by [71].

cycleskV

t 5.105.34

+= (5.1)

where kV is the line to line rated voltage and the unit of time t is cycles. During this

sleep time period, self extinction of arc faults is achieved without disconnecting DGs

from the network.

5.2.2 Restoration process

The self-recovery process of the DG starts after the defined de-ionization time

for the network. In the restoration process, a VSC is not allowed to exceed the rated

current Ir. Recovery characteristic of the VSC is along the points CKL as shown in

Fig. 5.2. The voltage-current characteristic of the VSC for the line segment CK can

be given by

)2()2(22

n

nVi

nI

Vv

r −−

−= (5.2)

where v and i are the rms voltage and current magnitudes, Ir is the rated current, V2 is

the converter output voltage when it injects 2Ir and n is a small number. It is to be

noted that the rms magnitude is calculated by a moving average filter with a window

of one cycle. During transients, the filter will produce a time-varying output.

Therefore, from knowledge of the value of i at any instant, v can be calculated or

vice versa.

The VSC controller can calculate corresponding voltage/current for a particular

value of current/voltage using (5.2) during the restoration process through the line

CK. Three different cases are considered to explain the restoration process depending


84

on the network conditions. Fig. 5.2(a) shows the restoration process when the load

demand is less than the DG capacity. At the start of the restoration process, the VSC

controller calculates the voltage using (5.2) for current at point C. The operating

point then shifts to point M on the load line based on the calculated value. At this

instant, the controller calculates the amount of current corresponding to the voltage at

point M. Then the rated current at point N is injected which will take the voltage to

point L. Thereafter the controller switches to voltage control mode and the system

operation will shift to point O on the load line. In this case, the DG has restored the

system successfully thereby increasing the reliability.

Next, the unsuccessful restoration processes of the DG are considered. These

can occur if the fault is not cleared or if the load demand becomes higher due to

some DG/utility tripping. Two such cases are considered to show the VSC response

to safeguard the system. A possible fault line for a ground fault with a fault

resistance is shown in Fig. 5.2(b), in which the voltage cannot rise above point O

until the fault is cleared. In the case of higher load demand, the load line will shift as

shown in Fig. 5.2(c). It is obvious that the operating point will reach point O through

the path as shown in this figure. The VSC will still remain in the current control

mode since the load demand is more than that the DG can supply. The restoration

process is carried out by the VSC for a defined time interval. If the VSC has not been

restored successfully within this time period, the DG will be disconnected from the

system by tripping the circuit breaker connected at the output of the DG.


85

(a) For low load demand

(b) For a fault

(c) For high load demand

Fig. 5.2 System restoration

It is to be noted that only constant impedance type loads are considered for the

illustration. For the low inertial loads, it is expected that loads such as induction

motors have reached zero speed during the sleep time of the DG and they behave like


86

constant impedance loads once the restoration process is started. The effect of load

mainly influences the recovery characteristic of the converter interfaced DG. The

control strategy checks the possibility of automatic system restoration by checking

the terminal voltage of the DG for particular injected current as mentioned. The rms

value of the DG terminal voltage at that current is the measure which determines the

possibility of system restoration. For example, if the load demand is high compared

to the DG generation then restoration will be unsuccessful due to the inadequate

terminal voltage level. Therefore, the shape of the load curve in voltage current graph

only changes the restoration path and ultimate operating point.

5.2.3 Coordination with reclosers

The total restoration time can be used to coordinate with the reclosers in the

system. Two methods can be introduced to synchronise a DG with a recloser. In the

first method, the DG takes the opportunity to restore the system before the operation

of any auto recloser. This method is advantageous, if DG penetration level is

significant and DGs have the ability to supply the load demand in autonomous

operation. The restoration process of DGs can be successful or unsuccessful

depending on the load demand and fault status as discussed earlier. After the defined

time interval of the restoration process, the auto recloser activates and this can result

in a live to live or live to dead reclosing depending on the result of DG restoration.

The auto recloser should be capable of checking for synchronism and make sure that

there is no phase mismatch, if it performs live to live reclosing. There is less

possibility to have a phase mismatch since DGs are not fully shutdown and they

maintain the original phases during the fault and after the restoration. However, the

DG is safeguarded during network contingency conditions and it is discussed in the

next sub-section.


87

In the second method, an opportunity is given to the recloser to restore the

system before the DG start to restore the system. This method can be used for a

system when the DG capacity is not enough to supply the load demand. In this case,

the sleep time of the DG should be adjusted according to the recloser operating time.

The recloser may restore the system depending on whether the fault still exists or it is

cleared. If the system is successfully restored, then DG can start restoration process

which will then be successful. This results in maximising the DG benefits to the

customer. On the other hand, if reclosing fails to restore the system, then DG can

start the restoration process. Again, depending on the fault status and load demand,

the self restoration can be successful or unsuccessful. The DG will restore the

system, if fault clears and load demand is less than the DG capacity. However, DG

will disconnect from the network if restoration is unsuccessful due to higher load

demand or uncleared fault. A load shedding scheme can be implemented to restore

the system when load demand is high, however it is out of scope of this thesis.

5.2.4 DG protection

It is important to consider the consequences of out of phase reclosing when

DGs are not disconnected during the auto recloser open time. The risk of DG damage

due to the out of phase reclosing is lower, if DG is connected through a converter

[49]. In the proposed reclosing scheme, the recloser is capable of checking the

synchronisation which ensures there is no phase mismatch when it performs live to

live reclosing.

From the point of DG protection, the DG should be protected itself. To achieve

basic DG protection requirements, in the proposed method, a DG is employed with

several protective elements; fold back current control, reverse power flow, over

voltage and synchronism check. The proposed fold back control protects the DG


88

from excessive current injection and unsuccessful system restoration. The reverse

power flow protection is activated to trip the DG when current flows towards the

DG. The over voltage element responds when terminal voltage of the DG rises above

a pre-defined limit. However, under voltage protection is incorporated with the

proposed fold back current control since the DG is usually allowed to operate under

the rated voltage in current control mode. The synchronised relay ensures a trouble

free connection to the feeder when it is being reconnected after any disconnection.

These protection schemes will minimise the DG safety risks associated with

reclosing.

5.3 Arc fault model selection for simulation

An accurate representation of an arc in simulation is difficult due to its random

nature. However, for studying the effects of DG on arc faults, a realistic arc model is

needed. The selected arc model should indicate whether the arc is sustained or

extinguished. One possibility is to choose a current dependent arc resistance model,

which represents the arc with a time varying resistance or a square wave voltage

source in phase with the arc current [54]. This model is valid when the fault current

level is high, i.e., when the utility is connected. However, once the utility is

disconnected and fault current is supplied by the DGs, the arc parameters change.

The new parameters are difficult to define accurately. Therefore, this model has not

been used.

Another possibility is to use both primary and secondary arc models for

simulation in the presence of DGs in the network. Most line faults are single phase to

ground and they are temporary arc faults. Therefore, the arc fault can be successfully

removed by performing the single-pole reclosing in high voltage (HV) lines [72].


89

The primary arc exists in HV lines before the circuit breaker opens and a secondary

arc occurs due to hot plasma remaining from the primary arc after the circuit breaker

opens. The secondary arc is sustained by the mutual coupling (capacitive and

inductive) between the faulted phase and un-faulted phases [51]. However, reclosing

is usually three-pole in medium and low voltage systems. Therefore, in a way similar

to HV arcs, a secondary arc model can be used in the presence of the DGs to

simulate arc faults after the disconnection of the utility supply, where the DGs will

sustain the secondary arc. In [49], a similar arc fault study has been performed with a

wind power plant, where the measured arc voltage waveforms are compared with the

simulation results to validate the arc model.

The primary and secondary arc models are used for the simulation studies to

investigate the effect of DG on arc faults. The selected arc models are discussed in

detail below. These models indicate the arc behaviour during the fault. However, a

criterion to determine the arc extinction should be known and the selected criterion is

also given.

5.3.1 Primary arc fault

The theory of switching arc was recently proposed to model the long fault arcs

in air, both primary and secondary [73]. Heavy fault current flows during the primary

arc period. The arc column has a large cross sectional area since the system provides

a high input electrical power to the arc. It can be assumed that there is no elongation

of the arc length during this period. The dynamic arc characteristics can be written as

[51, 52, 73],

( )ppp

pgG

Tdt

dg−= 1

(5.3)


90

where, Tp is the arc time constant, Gp and gp are the stationary arc conductance and

the instantaneous arc conductance respectively. Gp and Tp can be expressed as,

plpI

ppp

p TlV

iG

α== ; (5.4)

where, |i| is the absolute value of the primary arc current, Vp is the arc voltage

gradient, lp is the primary arc length, Ip is the peak value of primary arc current and α

is a constant.

5.3.2 Secondary arc fault

The secondary arc is usually self extinguishing, however its duration can

depend on many factors and it is mainly dependent on the secondary arc current [72].

The secondary arc length will vary over time. Wind velocity and the magnitude and

duration of the primary arc current are the two factors which effect the elongation of

the arc length. However, the total secondary arc voltage is practically proportional to

the arc length [73]. The low current secondary arcs can be expressed as [51]

( )sss

s gGTdt

dg −= 1 (5.5)

where, Ts is the secondary arc time constant, Gs is the stationary arc conductance and

gs is the instantaneous secondary arc conductance. Gs and Ts can be given by

)(

4.1;

)( rtslsI

srss

s TtlV

iG

β== (5.6)

where |i| is the absolute value of the secondary arc current, tr is the time from

initiation of secondary arc, ls(tr) is the time varying arc length, Is is the steady state

peak secondary arc current and β is a constant.


91

5.3.3 Arc extinction

Defining the arc extinction condition is a challenging task in arc modelling.

The arc self-extinction action depends not only on the fault current magnitude, but

also on the transient recovery voltage rate after successful arc extinction at current

zero crossing. Furthermore, the arc extinction time is proportional to the arc time

constant. In [51], the arc extinction is proposed based on dielectric breakdown. The

arc model in (5.5) only considers the thermal re-ignition, while dielectric re-strikes

are not considered. In [72], the secondary arc extinction is determined, if the

derivative of arc resistance is higher than the value in (5.7) and the instantaneous

conductance is lower than the value in (5.8).

)/(20'

msMdt

dr arc ⋅Ω= (5.7)

mSg ⋅= µ50'min (5.8)

However, this criterion only considers the thermal extinction of the arc and

there is a probability of dielectric re-ignition of the arc. This has not been considered

in this study.

5.4 Simulation studies

Several case studies have been carried out to investigate the effect of DGs on

both permanent and transient arc faults. For this purpose, a four bus radial

distribution feeder is considered as shown in Fig. 5.3. All the DGs considered in this

study are connected to the feeder through the converters and they all are employed

with the proposed fold back current control strategy. The converter structure and

basic control used in this simulation is given in Appendix-B. DG1, DG2 and DG3

are connected to the feeder at BUS-2, BUS-3 and BUS-4 respectively. Load1, Load2

and Load3 have the same power consumption. The System parameters of the


92

simulated system are given in Table 5.1. The capacity of each DG is selected such

that it can supply the load connected to its bus in autonomous mode.

Fig. 5.3 Simulated radial feeder with DGs

Table 5.1 Simulated system data

System data Value



Sbase 10 MVA

Vbase 11 kV

Utility source impedance (Zs) 0.00645 + j 0.06491 p.u.

DG source impedance (Zdg) 0.03223 + j 0.32455 p.u.

Feeder impedance (Z12=Z23 =Z34) 0.09669 + j 0.35830 p.u.

Load impedance (ZL) 18.59 + j 12.39 p.u.

DG power output 0.5 MW

The performance of proposed ITA relays in the presence of fold back current

control DGs are also investigated for both permanent and arc faults. Therefore the

ITA relays R1, R2 and R3 are employed to protect the feeder as shown in the figure.

The relays are assumed to have two zones of protection in which Zone-1 covers

120% of the first line and Zone-2 covers twice the length of the first line. The

following constants are chosen for the tripping characteristics of the relays.

For Zone-1: A = 0.0037, p = 0.08, k = 0.005


93

For Zone-2: A = 0.0037, p = 0.1, k = 0.01

The relays are located just before the BUS-1, BUS-2 and BUS-3. With this

arrangement, the infeed effect on relays which are located downstream from the fault

can be minimised. All the circuit breakers connected to the relays are considered to

have reclosing capability, since part of this study is to demonstrate the compatibility

of proposed protection and control strategy on reclosing.

5.4.1 Results for permanent faults

Three phase permanent faults are simulated along the feeder of Fig. 5.3 to

evaluate the relay response. Fig. 5.4 shows the ITA relay characteristic curves and

relay response which have been obtained by MATLAB calculation. The combined

Zone-1 and Zone-2 forward characteristics are shown for each relay in Fig. 5.4. It is

assumed that each DG injects a constant current of 0.06 kA during the fault and there

is 0.05 ohm of fault resistance at the fault point.

Results show that ITA relays can respond to isolate faults from both the

upstream and downstream sides of the feeder effectively. Each relay also provides

backup protection for the adjacent relay. For example, for a fault at point A shown in

the figure between BUS-2 and BUS-3, R2 will trip first to isolate the fault from the

upstream side while R3 responds next to isolate the fault from downstream side.

However, if R2 fails to trip, R1 will trip by providing the backup protection. Further

backup protection for relay R2 can be provided, if a 3-zone protection scheme is

chosen for R1.


94

Fig. 5.4 Calculated ITA relay response for a three phase fault

The system shown in Fig. 5.3 is simulated in PSCAD for different system

configurations since all the DGs and loads may not be connected at all the time. A

SLG fault is created at 0.305 s at different locations. Different case studies are

considered by changing the DG and load connectivity to the network.

Case study-1: When DG generation is more than load demand

In this study, it is considered that all three DGs and three loads are connected

to the feeder of Fig. 5.3. A SLG fault is created between BUS-1 and BUS-2, at a

point that is 10% of the line length away from BUS-1. The DGs switches from

voltage control mode to current control mode soon after the fault. The DGs then start

to reduce the current gradually in current control mode according to the fold back

characteristic. Relays R1 and R2 respond to isolate the faulted segment at 26 ms and

51 ms respectively after the initiation of fault (i.e. R1 operates at 0.331 s and R2

operates at 0.356 s). As a result of successful faulted segment isolation, the islanded

system, beyond BUS-2, can operate in autonomous mode. The voltage, output


95

current and output real power of DG1 is shown in Fig. 5.5. Once R2 opens at 0.356 s,

the DGs are switched back into the voltage control mode before they reach the sleep

mode. This results in fast system restoration without disconnection of any of the DGs

from the network. The response of the other two DGs is similar and is not shown

here. In this case, faulted segment isolation and fast system restoration have been

achieved by using the proposed ITA relay protection scheme and fold back current

control of the DGs. These result in maximising the DG benefits to the customers by

increasing the system reliability. On the other hand, if DGs are disconnected after the

fault, customers beyond BUS-2 experience a power outage since this is a permanent

fault.

Fig. 5.5 DG1 response (a) output voltage (b) output current (c) real power output

Case study-2: When DG generation is less than load demand

To simulate this scenario, only DG1 and DG3 are assumed to be connected to

the system with three loads. A fault is created at the same time mentioned in the case

study-1. The relays R1 and R2 respond 26 ms and 51 ms respectively to isolate the


96

faulted segment. Once the relay R2 responds to isolate the faulted segment, DG1 and

DG2 supply the power to the loads in the islanded section beyond BUS-2. The output

voltage, output current and real power of DG1 are shown in Fig. 5.6. At the moment

R2 opens, the DGs try to restore the system, which can be seen from the voltage

transient at 0.360 s. However, since load demand is higher than the power generation

from DGs, the system restoration is not possible. Therefore, the system does not

recover at the instant of fault clearing and DGs further decrease the output current

until it reaches the sleep mode. The DGs remain in sleep mode for a defined time

period (note that it is 100 ms in this simulation) without disconnecting from the

system. After this time duration, the DG restoration process starts, during which the

controller calculates the output voltage as per Fig. 5.2(c). This causes an increase in

voltage as evident from Fig. 5.6(a). However, this voltage is insufficient to restore

the system and after a further 50 ms, the DGs are disconnected due to unsuccessful

restoration. The DG circuit breakers then open to isolate the DGs from the system.

Load shedding on the basis of the restoration attempt is not addressed in this study.

Moreover, only one attempt of DG restoration is considered. However, several

attempts can be considered to restore the system since it may increase the system

reliability for temporary faults.

In Fig. 5.6, it can be seen that the voltage and current becomes zero at 0.554 s,

while the power exponentially reduces to zero. This apparently strange behaviour is

caused due to the low-pass filter used in the power measuring circuit. This prevents

power measurement to become zero instantaneously. However, since both voltage

and current become zero at 0.554 s, the DG output power also becomes zero at the

same instant.


97

Fig. 5.6 DG1 response (a) output voltage (b) output current (c) real power output

5.4.2 Results for Arc Faults

The radial feeder of Fig. 5.3 is again considered to investigate the effect of fold

back current on arc faults and the response of ITA relays. The simulated arc

parameters are shown in Table 5.2.

Table 5.2 Arc model parameters

Arc parameters Value

Primary arc model

(including numerical values)

−

×= − p

pp

ppg

l

i

I

l

dt

dg

151085.2 5

Secondary arc model

(including numerical values)

−

×= −− s

rsss

rss gtlI

i

I

tl

dt

dg

)(751051.2

)(4.04.13

primary arc length (lp) 0.5m

secondary arc length (ls) 10×lp×t (t is time)

The arc fault is initiated at the peak of a voltage waveform. A high fault current

flows in the beginning since both utility source and DGs feed the fault. At this stage,

the arc is modelled as a primary arc. Once the relay responds to isolate the fault from


98

the utility side, the rest of the system becomes islanded and the fault current reduces

due to the current limit applied by the VSC controllers. During the islanded

operation, the arc is modelled as secondary arc. The simulated results are shown in

the following sub-sections.

Case study-3: Arc fault on the line between BUS-1 and BUS-2

An arc fault is created at 0.305 s. The primary arc has high arc current, low arc

voltage and low arc resistance as can be seen from Fig. 5.7. The relay R1 responds at

0.332 s as shown in Fig. 5.7(d) to isolate the arc fault from upstream (i.e. utility

side). After the response of R1, the arc resistance increases due to the secondary

arcing, as evident from Fig. 5.7(c). The DGs start to reduce the output current

gradually with the initiation of the fault. The response of DG1 is shown in Fig. 5.8.

The relay R2 responds at 0.349 s to isolate the fault from the downstream side. The

isolation of the faulted segment results in the islanded mode of operation containing

all the three DGs. Thereafter, the system recovers successfully when DGs are

switched to the voltage control mode. Fig. 5.8(b) verifies the sinusoidal current

limiting and gradual current decrease in fold back characteristic. It is to be noted that

a hardware current limiter is employed for the VSCs to limit the instantaneous peak

output current to the value 100 A. The fold back current limit is applied once the

hardware limit is reached.

The results reveal that the proposed ITA relay scheme can isolate the faulted

segment from the feeder. It leads to fast restoration of the system. The DGs restore

the system without disconnecting from the feeder thereby increasing the reliability

for even temporary faults.


99

Fig. 5.7 System behaviour for an arc fault (a) arc voltage (b) arc current (c) arc resistance (d) relay response

Fig. 5.8 DG1 behaviour for an arc fault (a) output voltage (b) output current

Case study-4: Arc fault on the line between BUS-1 and BUS-2, assuming relay R2

fails to operate

The same scenario as Case study-3 is considered here to illustrate the effect of

DGs on arc extinction. However, in this case, it is assumed that the downstream relay

R2 fails to detect the fault. Once R1 responds to the fault, DGs feed the arc in


100

secondary stage. The output voltage and current of DG1 are shown in Fig. 5.9. The

DGs decrease the output currents according to the fold back characteristic as can be

seen in the figure. Then DGs reach to sleep mode and inject very small currents. As a

result of low current injection during the sleep mode, the arc extinguishes at 0.412 s.

The DGs then start to self-restore the system at 0.490 s after remaining in the sleep

mode for 100 ms. The system is restored completely at 0.520 s since arc fault is

cleared by the time DGs starts the restoration process. This study confirms that the

DGs can self-restore the system without sustaining the arc. It is to be noted that only

thermal arc extinction is considered in this case. However the DGs are kept in the

sleep mode for 100 ms, a sufficient time required for dielectric arc extinction.

Fig. 5.9 DG1 behaviour when downstream relay fails (a) output voltage (b) output current

5.4.3 Auto reclosing

Reclosing can be considered as one of the major protection issues when DGs

are connected to distribution networks. Therefore an effective method is proposed to

coordinate a recloser with a converter connected DG in the feeder. It is assumed that


101

the feeder is protected by either ITA relays or conventional overcurrent relays.

Therefore two separate cases are considered to explain the reclosing possibilities

based on the employed protection scheme. The radial feeder as shown in Fig. 5.3 is

considered here as well. The circuit breakers associated with the relays have the

reclosing capability. Moreover, synchronism check element is incorporated.

Therefore the recloser element senses the voltages on the two sides of a breaker in

exact synchronism before performing the reclosing operation.

A. With proposed fold back current control and ITA relays

The restoration of the faulted segment by coordinating the DGs and the

reclosers in the system is performed based on the identification of fault direction.

Reclosing opportunity is given to the relay which sees the fault as forward. For

example, a temporary arc fault is considered on the line between BUS-1 and BUS-2.

The fault occurs at 0.305 s, which is subsequently cleared by relays R1 and R2 at

0.332 s and 0.349 s respectively. After the faulted segment isolation, DGs operates in

autonomous mode supplying the load power.

Now R1 tries to close the circuit breaker first (live to dead reclosing) by

identifying this fault as forward after a pre-defined delay-time period 0.3 s (this pre-

defined time is denoted by Td). The relay R2 waits till the upstream side is restored

before performing the reclosing operation. Therefore in this case, R2 performs live to

live reclosing after further time delay of 0.1 s. The DG1 response is shown in Fig.

5.10. The smooth transfer between utility and islanded feeder section at 0.732 s

validates the suitability of proposed reclosing scheme. The DG supplies the increase

of real power demand during the islanded operation and after successful reclosing the

real power output has reduced to the value before the fault as shown in Fig. 5.10(c).


102

Fig. 5.10 DG1 response during fault and system restoration

If the fault is between BUS-2 and BUS-3, the relays R2 and R3 respond to clear

the fault. Since DG1, still supplies the fault, it is disconnected from the system after a

time period (this includes current fold-back time, sleep mode time and self-

restoration time of DG1), which is less than the delay-time period Td. Then, R2 will

try to reclose and if that is successful, R3 will be connected once the system settles

down. Note that, in this case, DG1 needs to be manually reconnected after fault is

cleared since no automatic procedure is proposed for the DGs that are totally

disconnected.

B. With proposed fold back current control and conventional protection scheme

In this sub-section, the coordination of reclosers and converter interfaced DGs

are discussed assuming the relays employed in the radial feeder shown in Fig. 5.3 are

overcurrent type. Therefore these relays only clear the forward faults from the feeder.

To explain the sequence of operation, a fault on the line between BUS-1 and BUS-2

at 0.305 s is considered. The forward relay R1 detects the fault and isolates it from


103

utility side at 0.332 s. However, in this case, DGs feed the arc fault since R2 has not

responded. As a result of fold back current control, DGs reduce the output current

gradually and reach to the sleep mode at 0.39 s as shown in Fig. 5.11. It results in arc

extinction at 0.41 s. The DGs then restore the system and supply the loads in

autonomous mode. The reclosing of R1 starts after the restoration time. The recloser

successfully connects the utility and islanded section at 0.632 s. The response of

DG1 terminal voltage verifies the smooth transfer between islanded and grid

connected mode operation. The output current of DG1 is more during the islanding

mode than the grid connected mode since total load demand is supplied by the DGs.

Fig. 5.11 DG1 terminal voltage and output current

If there are motors and generators in the system, the first recloser may be time

delayed. Circuit checking is needed before any time delayed recloser action to ensure

that either synchronism exists or one circuit is dead.


104

5.5 Summary

A novel control strategy based on fold back current control is proposed for a

converter interfaced DG to overcome the challenging protection issues in a DG

connected distribution feeder. The control strategy enables the fast arc extinction,

system restoration, and reclosing without disconnecting the DGs. The arc extinction

is achieved by reducing the DG output current to a small value, while automatic

system restoration is obtained if DG power generation is sufficient enough to supply

the load demand. Recloser coordination with DGs is considered without any explicit

communication. It can be seen that the reclosing is possible with converter connected

DGs. The only requirement is to determine a sequence of operations with appropriate

time delays between each recloser and DG depending on the system configuration.

The results reveal that the DG benefits can be maximised by increasing the reliability

of the system if fold back current control is employed with converter interfaced DGs.

105

Chapter 6: Experimental results

6.1 Introduction

In the previous three chapters, the proposed ITA relay characteristic and its

application on DG connected distribution networks are discussed. The discussions

are presented in these chapters with the help of numerical results. However, practical

implementation of the relay should be considered to verify the suitability of the relay

for realistic protection applications. Therefore the main aim of this chapter is to

present the experimental work which involves building a software prototype of the

ITA relay to evaluate the performance in a distribution test feeder. The experimental

results are then used to validate the calculated and simulated results. This chapter

begins with a brief description of the test feeder arrangement used in the laboratory.

Then relay performance is examined by changing the source impedance to illustrate

the robust operation of the relay. Furthermore, relay deterioration factors are

analysed.

6.2 Test feeder arrangement

The ITA relay characteristic is examined in a laboratory test feeder to compare

the experimental relay performance with the calculated and simulated results. A

photograph of the test feeder is shown in Fig. 6.1 where each line segment consists of

a resistor and inductor. A single line diagram of the experimental setup is given in


106

Fig. 6.2. In this test feeder, the source voltage can be controlled according to the

requirement. The circuit breaker CB1 provides the protection for the entire circuit.

Fig. 6.1 Experimental test feeder

Fig. 6.2 Single line diagram of experimental setup

The NI PXI-1042Q chassis shown in Fig. 6.3 is used to implement the relay

algorithm and to acquire data. The NI chassis has a PXI-8187 windows XP

Embedded card, two analog input cards and an output relay card. The voltage and

current signals at the relay location are acquired to analog cards using the voltage

and current transducers respectively. One of the switches in the output relay card is

used to create faults. One typical fault location is shown in Fig. 6.2. The fault


107

location however is changed to study the relay performance. This switch can be fully

controlled by the LabVIEW software. A SLG fault is created at different locations

along the test feeder. The fault is created at a random time by closing the switch of

the output relay card, while the ITA relay sends fault clearing signal to the same

switch. It is to be noted that CB1 provides back up protection in case the switch does

not operate to clear a fault. The system parameters of the test system are given in

Table 6.1.

Fig. 6.3 NI PXI-1042Q chassis

The ITA relay characteristic is implemented on LabVIEW software. The

detailed LabVIEW program is given in Appendix-C. A block diagram of the

software model is shown in Fig. 6.4. The voltage and current signals are sampled and

these samples are held in data buffers. The samples of one cycle are used to extract

the fundamental component. Fast Fourier Transform (FFT) is used for this purpose.

The measured admittance is then calculated using the extracted fundamental voltage

and current. The measurement and control blocks used to calculate measured

admittance on LabVIEW software is shown in Fig. C.1, Appendix-C. The relay reach

setting is manually entered according to the line parameters. The relay algorithm

issues the fault detection signal and calculates the tripping time when a fault occurs


108

in the network based on the measured admittance. Fault clearing signal is then

obtained through an integrator. The LabVIEW implementation of ITA relay

algorithm is shown in Fig. C.2, Appendix-C.

Table 6.1 System parameters of the experimental setup

System parameter Value

Source 0 - 230 V rms (L-G), 50Hz

Feeder impedance R = 1.12 Ω

L = 0.01H ( j 3.15 Ω)

Load impedance (ZL) 125 Ω

CB1 rated current 1 A

Hardware specifications

NI chassis PXI-1042Q

NI controller PXI-8187 windows XP Embedded

Transducers

Voltage Differential amplifier

Current LEM LTSR 6-NP

Data acquisition

Analog inputs PXI-4070 FlexDMM

Digital outputs PXI-2565 relay switches

Sampling rate 3200 samples per seconds

Fig. 6.4 ITA relay implementation on LabVIEW


109

6.3 Relay performance evaluation

A simplified single line diagram of the test feeder is shown in Fig. 6.5. The test

feeder has five buses. A resistive load is connected at BUS-5. The ITA relay is

located at BUS-1 and it has three zones of protection. In the experiment, it is

assumed that the relay will protect the line segment from BUS-1 to BUS-5. Zone-1

covers the 120% of the line length between buses 1 and 5 while Zone-2 covers twice

the line length. Zone-3 has been employed to achieve the relay operation in the

presence of resistive faults. Therefore, the relay reach setting of Zone-3 is set to

cover three times of the line length. The selected relay tripping characteristics and

reach settings of each zone are given in Table 6.2.

SLG faults are created at different buses to observe the ITA relay response. A

digital oscilloscope is used to capture the faulted phase voltage at relay location and

the current flowing through the relay. It is to be noted that two differential probes are

used for the isolation purposes when measuring the voltages and currents by the

oscilloscope.

Fig. 6.5 Simplified single line diagram of the test feeder


110

Table 6.2 Relay reach setting and tripping characteristic in each zone

Relay zone Tripping characteristic and reach

Zone-1

)6.1248.4(2.1

11 j

Yt +×=

02.01

0037.02.0

+−

=rY

t

Zone-2

)6.1248.4(2

11 j

Yt +×=

02.01

003.004.0

+−

=rY

t

Zone-3

)6.1248.4(31

1 jYt +×

=

02.01

0025.002.0

+−

=rY

t

The calculated relay response using MATLAB for SLG faults along the feeder

is shown in Fig. 6.6. In this calculation, the fault resistance is considered as zero. The

calculated theoretical tripping times are used to validate the experimental results. As

can be seen from Fig. 6.6, the relay tripping characteristics are selected appropriately

for different zones. For example, consider Zone-1 and Zone-3 tripping

characteristics. Zone-3 should always give higher tripping time than Zone-1 for

faults if tripping characteristics of the zones are properly selected. Otherwise, Zone-3

can give lower tripping time than Zone-1 for bolted faults (i.e. zero resistive faults) if

same tripping characteristics are selected for these zones, since reach setting of Zone-

3 is higher.


111

Fig. 6.6 Calculated relay response in different zones for bolted faults

The ITA relay has been designed to operate for different fault current levels in

a network. Specifically, when a converter interfaced DG is connected to the network,

different voltage levels can be seen during the faulted condition. However, the ITA

relay response should be same irrespective of the network fault current level/fault

voltage level. Therefore, a number of test runs are carried out under different test

feeder configurations to evaluate the relay performance.

6.4 Relay response for different fault locations

In this sub-section, the ITA relay response for faults is investigated by

changing the fault location and the source impedance to demonstrate the robustness

of the relay operation. The relay should give higher tripping time when the fault

point moves away from the relay location due to the inverse time characteristic. Also,

the relay should respond in the same manner irrespective of source impedance, since

the ITA relay tripping time does not change with the fault current level. To observe

these features, several tests are carried out. The source rms voltage is adjusted to 30


112

V. Then SLG faults are created at different buses using the software control switch as

mentioned earlier. The fault is initiated at a random time. Relay response time, which

is the time relay algorithm calculates based on the measured admittance, is observed.

The voltage and current seen by the relay are captured and actual fault clearing time

is obtained using these two captured waveforms. It is to be noted that actual fault

clearing time is longer than the relay response time. Once the relay issues the trip

command, the hardware switch can take up to 10 ms to open [74]. The theoretical

tripping time of the relay is calculated using Fig. 6.6 for comparison purposes. The

test results are discussed in the subsequent sub-sections.

6.4.1 Fault at BUS-2

The relay response time for a SLG fault at BUS-2 is shown in Table 6.3.

Several tests are carried out for the same fault location. However, the results of only

three tests are shown here. Comparing the data listed in Table 6.3, it can be seen that

the relay response time is close to the calculated theoretical values. The actual fault

clearing time is slightly higher than the relay response time values due to the fault

clearing time taken by the hardware switch.

The captured voltage and current signals at relay location during the fault for

test runs 1 and 2 using the digital oscilloscope are shown in Fig. 6.7. The source

current lags the voltage before the fault. The current increases rapidly after the

initiation of the fault while the voltage reduces. During the fault, the normalised

admittance becomes higher than 1.0 and it causes the relay to initiate the trip signal.

The tripping time is decided based on the value of the measured admittance. It is

obvious from Fig. 6.7 (a) and (b) that the points on the voltage (or current) cycle at

the faults occur are different. However, the relay response time is the same for test

runs 1 and 2 (Table 6.3).


113

Table 6.3 ITA relay response for faults at BUS-2

Test

run

Theoretical

tripping time (ms)

Relay response

time (ms)

Actual fault

clearing time (ms)

1 30 29 30

2 30 29 29.2

3 30 30 32

(a) Test run-1

(b) Test run-2

Fig. 6.7 The variation of voltage and current for SLG faults at BUS-2


The relay response time and the actual fault clearing time for a SLG fault at

BUS-3 are given in Table 6.4. According to the theoretical fault calculations, the

relay should clear the fault after 40 ms. The relay response time is very close to the


114

theoretical value as can be seen in the table. The variation of voltage and current for

Test run-1 and Test run-2 is also shown in Fig. 6.8 to demonstrate the actual fault

clearing time. The fault has created at different points on the current waveform and

the relay isolates the fault approximately within two cycles.


Test

run

Theoretical

tripping time (ms)

Relay response

time (ms)

Actual fault

clearing time (ms)

1 40 38 39.2

2 40 37 38

3 40 39 41

(a) Test run-1

(b) Test run-2



115


The fault point is further moved to downstream side along the feeder. A SLG

fault is created at BUS-4. The main aim of changing the fault location is to check

whether the tripping time follows the ITA tripping curve. For this fault location,

calculated theoretical tripping time is 58 ms. The relay response time and fault

clearing time are listed in Table 6.5. The variation of voltage and current for two of

the tests is shown in Fig. 6.9. As can be seen from the figure, the fault current has

reduced compared to the fault currents at BUS-2 and BUS-3. On the other hand, the

faulted voltage has risen. However, the ITA relay response is accurate as expected

from the calculation.


Test

run

Theoretical

tripping time (ms)

Relay response

time (ms)

Actual fault

clearing time (ms)

1 58 57 62.4

2 58 58 64

3 58 59 64.2

(a) Test run-1


116

(b) Test run-2



The fault is created at the end of the feeder. According to the calculations, the

relay should issue the trip commend after 120 ms after the fault initiation. Table 6.6

shows the relay response results for this fault. Since the line impedance is

significantly high between the relay location and fault location, the fault current is

comparably low while the voltage is significantly high during the fault as shown in

Fig. 6.10. However, the relay isolates the fault effectively. The results show the

ability of ITA relay to detect and isolate the faults according to the designed inverse

time tripping characteristic.


Test

run

Theoretical

tripping time (ms)

Relay response

time (ms)

Actual fault

clearing time (ms)

1 120 119 122

2 120 118 121

3 120 116 118


117

(a) Test run-1

(b) Test run-2


It can be seen that in all the cases presented above, the relay response time for

the faults is lower than the theoretical tripping time. This error may be due to the

voltage and current transducers. These transducers give an output which has a dc

offset and lower magnitude compared to the input signals. Therefore, the relevant

mathematical operations have been performed on acquired signals to match the

values with original signals.

6.4.5 Relay response for source impedance change

The source impedance of the existing line model has been changed by adding a

series impedance of (4.6+ j 3.14). The main aim of increasing the source impedance


118

is to weaken the source which will result in lower fault current levels in the feeder.

Therefore this study can be considered similar to the case where a DG is connected

to the feeder.

The experimental results for this study are shown Table 6.7. The actual fault

clearing time for randomly selected tests at different fault locations is shown from

Fig. 6.11 to Fig. 6.14. According to the figures, the fault inception angle is different

for different fault locations. However, the fault clearing times are within the

acceptable limits and they are very similar to the values which are obtained before

adding the additional source impedance. The results reveal that the relay response is

not affected by the value of the source impedance. Therefore it can be concluded that

the ITA relay response is not sensitive to source impedance.

Table 6.7 ITA relay response for SLG faults with higher source impedance

Fault

location

Theoretical

tripping time

Relay response

time (ms)

Actual fault

clearing time (ms)

BUS-2 30 30 34

BUS-3 40 39 42

BUS-4 58 60 61.6

BUS-5 120 118 120

Fig. 6.11 Voltage and current for a fault at BUS-2


119





120

6.5 Analysis of ITA relay degradation factors

The ITA relay detects a fault in a feeder if the value of calculated normalised

admittance of a particular zone increases beyond the value 1.0. The required tripping

time is then decided based on the value of the normalised admittance. In the case of a

three zone protection relay, all the zones of the relay may detect the fault. However,

in such a case, the tripping time of each zone is different and the minimum tripping

time is selected to issue the trip command. The calculated value of the normalised

admittance for a particular zone will depend on the measured admittance since the

total admittance setting for that zone is constant. Therefore, the calculated relay

tripping time based on normalised admittance can deviate from the expected value if

the calculated measured admittance is not accurate. Thus, the factors which can

affect the measured admittance should be considered and they should be minimised

to improve the relay performance. Typically, two types of errors which can affect the

measured admittance are identified. The first type of error occurs due to the fault

resistance and downstream sources (infeed). This is due to the network configuration

and the nature of the fault. The maximum DG penetration level of a particular

network can be known in advance. However, the fault resistance cannot be predicted.

The calculated measured admittance errors due to the fundamental extraction can be

considered as the second type of error. Current transients, harmonics, and decaying

dc magnitude and time constant can cause errors in the fundamental extraction. Both

the error types will be explained in following two sub-sections.

6.5.1 The effect of fault resistance and infeed

The same experimental setup as shown in Fig. 6.2 is used to test the relay

performance in the presence of fault resistance and infeed. Zone-3 has been


121

introduced into the ITA relay to compensate the fault resistance. The selected Zone-3

reach setting and tripping characteristic are the same as those shown in Table 6.2.

In the first phase of the test, the resistive faults are considered without any

infeed source. The ITA relay performance is tested for faults at different locations by

inserting a 10 Ω resistor between the fault point and the ground. Both the calculated

and the experimental results are given in Table 6.8 where measured admittance and

normalised admittance are given by Ym and Yr respectively. The tripping time of the

ITA relay is shown by tp. This table also includes these values calculated for a bolted

fault (Rf=0). According to the data in Table 6.8, the normalised admittance is always

greater than 1.0. Also, the measured admittance decreases when fault point moves

downstream along the feeder. The normalised admittance values for resistive faults

are lower compared to the zero resistive faults. This results in higher relay tripping

times for resistive faults as can be seen from Table 6.8. However, it can be concluded

that experimental test results are very similar to that of the calculation results

obtained from MATLAB.

Table 6.8 Relay parameters during a resistive fault

Fault

location

Calculated results Experimental results

Rf=0 Ω Rf=10 Ω Rf=10 Ω

Ym Yr tp (ms) Ym Yr tp (ms) Ym Yr tp (ms)

BUS-1 0.299 12.0 0.069 0.086 3.471 119 0.087 3.49 117

BUS-2 0.149 6.0 0.088 0.072 2.914 135 0.072 2.88 136

BUS-3 0.099 4.0 0.108 0.061 2.451 158 0.059 2.37 162

BUS-4 0.075 3.0 0.132 0.052 2.090 188 0.050 2.01 197

The variation of the measured admittance and the normalised admittance

during the fault at BUS-2 is shown in Fig. 6.15. The measured admittance has

increased with the initiation of the fault. It results in an increase of the normalised

admittance during the fault as can be seen from Fig. 6.15(b). The value of the


122

normalised admittance will determine the relay tripping time. The calculated tripping

time by the ITA relay algorithm for this fault is shown in Fig. 6.15(c), where the

tripping time is 117 ms.

(a) measured admittance

(b) normalised admittance

(c) tripping time

Fig. 6.15 Change of parameters during a resistive fault at BUS-2

In the second phase of the test, the effect of both the fault resistance and infeed

on relay operation is considered. The test feeder is modified by connecting another

source at BUS-5 to represent the infeed as shown in Fig. 6.16. The source impedance

(Zs2) of infeed is selected as 14 times greater than the main source impedance (Zs1).


123

This test feeder configuration is similar to a system where a DG is connected at

BUS-5. The ITA relay response is obtained for the faults at BUS-2, BUS-3 and BUS-

4 with a fault resistance of 10 Ω. The calculated and the experimental relay

parameters during the faults are given in Table 6.9. It can be seen that experimental

results are close to the calculated results. However, the relay tripping time has further

increased compared to Table 6.8 due to the infeed effect.

Fig. 6.16 Test feeder with an infeed

Table 6.9 Change of relay parameters due to fault resistance and infeed

Fault

location

Calculated results Experimental results

Ym Yr tp (ms) Ym Yr tp (ms)

BUS-2 0.0709 2.8442 138 0.07 2.8 138

BUS-3 0.0500 2.0071 198 0.049 1.97 201

BUS-4 0.0354 1.4218 374 0.035 1.41 380

The variations of measured admittance and normalised admittance, and

calculated tripping time during the fault at BUS-2 are shown in Fig. 6.17. The

measured admittance increases during the fault resulting normalised admittance to

rise beyond the value 1.0. The relay algorithm calculates the tripping time as 138 ms

based on the value of normalised admittance.


124

(a) measured admittance

(b) normalised admittance

(c) tripping time

Fig. 6.17 Change of parameters for a fault at BUS-2 with fault resistance and infeed

6.5.2 The effect of fundamental extraction

In this sub-section, practical issues related to the admittance calculation are

experimentally investigated. The ITA relay calculates the measured admittance based

on the fundamental voltage and current at the relay location. Therefore, the process

of fundamental extraction from the voltage and the current signals is very important


125

in the presence of transients, noises, harmonics and decaying dc component. In this

experiment, FFT is used to calculate the fundamental rms magnitudes of sampled

voltage and current signals.

A 415 V three phase synchronous generator connected test feeder as shown in

Fig. 6.18 is considered for this analysis. A SLG fault is created at the end of line

segment as shown in the figure. Several tests are conducted to investigate the ITA

relay behaviour during the fault. However, two results are presented below.

Fig. 6.18 A SLG fault at synchronous generator connected feeder

The faulted voltage and current captured during a SLG fault is shown in Fig.

6.19. It can be seen that the current waveform has decaying dc component during the

transient period. Also the voltage has harmonics during the faulted period. The

values of extracted current and voltage using FFT during each cycle are shown in

Fig. 6.20 (a) and (b) respectively. The extracted rms current is higher than the steady

state fault current during the first three cycles. It can be seen that the current has a

decaying dc component that lasts for three cycles. However, the extracted rms

voltage almost reaches the steady state within two cycles. Also note that depending

on the instant at which a fault occurs, the first cycle of the rms calculation may

contain a part of unfaulted voltage/current samples. Therefore it is always expected

that the first cycle will have transient data.

The measured admittance and the tripping time calculated in each cycle are

shown in Fig. 6.20(c) and (d) respectively. It can be seen from Fig. 6.20(d) that the

tripping time reduces slightly with the change of measured admittance. However, in


126

these tests, the fault duration is intentionally maintained for a defined time period to

observe the relay parameters for few cycles. Otherwise, if relay is allowed to clear

the fault, the change of parameters for few cycles cannot be investigated. For

example, consider the test results shown in Fig. 6.20. The relay issues the trip

command around 43ms after the fault. If relay clears the fault, approximately two

cycles of fault period can be only seen.

Fig. 6.19 Current and voltage during a SLG fault


127

Fig. 6.20 Values of relay parameters during a SLG fault


128

Fig. 6.21 shows another test results captured during a SLG fault. This test has a

different fault inception angle compared to the previous test. The decaying dc

component of the current can be seen clearly from the figure while harmonics

associated with the faulted voltage can be also visible. The calculated fundamental

components of current and voltage using LabVIEW FFT blocks and the measured

admittance and the tripping time calculation in each cycle are shown in Fig. 6.22.

The results show that the relay tripping time is slightly higher at the beginning of the

fault while it reduces with the time. The FFT has successfully extracted the voltage

fundamental in the presence of harmonics.

Fig. 6.21 Faulted current and voltage during a SLG fault


129

Fig. 6.22 Values of calculated relay parameters during a SLG fault


130

According to the results, the FFT can extract fundamental in the presence of

harmonics and signal noises. However, the FFT is not immune to the decaying dc

component. Therefore, the calculated tripping time of the relay can vary slightly. The

amount of error on fundamental extraction depends on the network configuration

since the magnitude and time constant of the decaying dc component can vary. To

improve the accuracy of the relay tripping time, one of the methods mentioned in

Section 3.7, Chapter 3 can be used to accurately calculate the fundamental

components. However, the speed of the calculation and burden on the processor

should be considered when selecting a particular algorithm.

6.6 Summary

Several experimental tests are carried out at different fault locations and

different system configurations. The results demonstrate that the ITA relay follows

the inverse time characteristic curve as designed based on the measured admittance.

The relay response time closely matches the calculated results. The source voltage

and source impedance do not affect the relay operation. Moreover, the relay can

respond in the same manner with different fault current levels in the feeder. The fault

resistance and infeed may cause delay in the relay operation. The decaying dc

component can also change the relay tripping time slightly during the transient

period of the fault.

131

Chapter 7: Conclusions and recommendations

In this chapter, the general conclusions of the thesis and recommendations for

future research are presented.

7.1 Conclusions

The general conclusions of the thesis are:

(1) The connections of DGs or microgrids to a distribution network are gaining

importance with the increase of electrical power requirements and

environmental concerns. However, these DG connections can create challenging

protection issues. It is identified that new protection strategies are required to

overcome these challenges.

(2) Protective devices based on current sensing are usually used to detect the faults

in distribution networks. The connections of DGs change the fault current level

and fault current direction. Moreover, if DGs are connected through intermittent

sources, the fault current contribution from DGs cannot be exactly identified to

set the tripping parameters of current sensing protective devices. Furthermore,

protection with converter interfaced DGs in islanded operation is difficult with

current sensing protective devices due to the lower fault current levels. Unless

viable solutions can be found for the protection issues, DGs have to be

disconnected from the grid after a fault, thereby affecting reliability.


132

(3) DGs should be kept connected to the unfaulted segments of a network once a

fault occurs since they can supply the loads in unfaulted segments either in grid

connected or islanded mode operations. This results in maximising DG benefits.

However, the protection system should be capable of isolating the faulted

segment and providing adequate protection for the islanded network.

(4) A new relay - the ITA relay - has been designed to provide protection to a DG

connected distribution network or microgrid. The relay is employed with

different fault detection elements, such as earth element, phase element and

directional element, to respond to different faults. The ITA relay senses both the

current and voltage at the relay location. This results in effective fault detection

irrespective of the network fault current level. The relay is also capable of

isolating the faulted segment, thus allowing the unfaulted segments to operate

either in grid connected or islanded mode operations supplying the load

demand. In the islanded operation, these relays provide the adequate protection

for the network even when current limited converters are connected. The fault

resistance and infeed may affect the relay operation. However, the system

configuration and relay settings will determine the maximum fault resistance for

which the relay can effectively detect faults.

(5) The reclosing can be identified as one of the major protection challenges in a

DG connected distribution network. The DGs are usually disconnected before

performing the reclosing in the network. The fault arc will not extinguish if DGs

remain connected to the network. Also, the coordination of the recloser with

DGs is a challenging task. Therefore, new control and protection strategies are

required to overcome these problems.


133

(6) In this thesis, a novel control strategy based on fold back current control has

been proposed for a converter interfaced DG. The control strategy has the

ability to extinguish the fault arc, to restore the system quickly if possible, and

to perform the reclosing in a converter interfaced DG connected network. In this

proposition, DGs are not required to disconnect immediately after a fault. The

DGs are allowed to supply the load demand either in grid connected or islanded

mode operations. The self extinction of arc is achieved by reducing the DG

output current to a small value, while automatic system restoration is obtained if

DG power generation is sufficient to supply the load demand. The coordination

between reclosers and DGs in the network is obtained by appropriately defining

a sequence of operations with suitable time delays.

(7) In this research, implementation of protection and control strategies for DG

connected distribution networks without communication is considered since the

solutions based on communication are still expensive. However, with the

development and spread out of cheaper communication methods in future,

communication can be used to improve the protection of the DG connected

distribution networks. The use of communication between DGs and protective

devices in the network either centralized or decentralized manner can improve

the efficacy of protection and control strategies. For example, if a relay has the

DG connectivity information, it can then detect the faults minimising the error

coming from infeed effect. Also, system reclosing can be performed much faster

having the information of DG status.


134

7.2 Recommendations for future research

The scope for future research are:

7.2.1 Consideration of rotary type DGs for protection

In this research, all the DGs are considered as converter interfaced DGs for the

protection analysis. However both rotary and converter type DGs can be considered

for fault detection, fault isolation and system restoration in future research.

7.2.2 Fold back type current control for rotary type DGs

The fold back current control strategy is implemented for a converter

interfaced DG in this research. This fold back strategy cannot be easily implemented

for rotary type DGs which will continuously supply large fault currents. Therefore,

suitable fold back type control strategies are required for these rotary DGs to achieve

fast arc extinction and system restoration and will be the subject of future research

and development.

7.2.3 The effect of single phase converters

In this research, DGs connected to the network through three phase converters

are considered. However, there may be single phase converter connected DGs which

can cause system unbalance. The effect of these single phase converters on network

protection and system restoration can be considered in future works.

135

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Publications arising from the thesis Conference papers

(1) M. Dewadasa, A. Ghosh and G. Ledwich, “Line protection in inverter

supplied networks,” Australian Universities Power Engineering Conference,

Sydney, Australia, 2008

(2) M. Dewadasa, A. Ghosh and G. Ledwich, “Distance protection solution for a

converter controlled microgrid,” National Power Systems Conference,

Mumbai, India, 2008

(3) M. Dewadasa, A. Ghosh and G. Ledwich, “Foldback current control for a

DG to achieve fast arc extinction in a distribution network,” 3rd biennial

Smart Systems Postgraduate Student Conference, Queensland University of

Technology, Brisbane, 2009

(4) M. Dewadasa, A. Ghosh and G. Ledwich, “An inverse time admittance relay

for fault detection in distribution networks containing DGs,” IEEE Asia-

Pacific Region-10 Conference TENCON’09, Singapore, 2009.

(5) M. Dewadasa, R. Majumder, A. Ghosh and G. Ledwich, “Control and

protection of a microgrid with converter interfaced micro sources,” Third

International Conference on Power Systems, Kharagpur, India, 2009.

Journal papers

(1) M. Dewadasa, A. Ghosh and G. Ledwich, “Fold back current control and

admittance protection scheme for a distribution network containing DGs,”

IET Generation, Transmission and Distribution, Vol. 4, pp 952-962, 2010.

145

Appendix-A

Positive sequence admittance seen by ITA relay

The faulted network for single line to ground (SLG) fault shown in Fig. A.1 is

considered. The relay location is denoted by node R while fault point is at node k.

The fault impedance is represented by Zf. The admittance between the relay and fault

point is denoted by YRK. The voltage and current seen by the relay in faulted phase A

are taken as VRa and I fa respectively. Negative and zero sequence source voltages are

also considered assuming the source is unsymmetrical during the fault. Moreover, the

zero, positive and negative sequence Thevenin admittances between the relay point

and faulted point are considered as YRk0, YRk1 and YRk2 respectively. The sequence

network for this SLG fault can be represented as shown in Fig. A.1(b).

(a) (b)

Fig. A.1 SLG fault representation (a) faulted network (b) sequence network

146

The sequence voltages at the relay point can be expressed as,

( )( )( )0000

1222

1111

/

/

/

RKRaRa

RKRaRa

RKRaIRa

YIvV

YIvV

YvV

+=+=

+= (A.1)

Voltage seen by relay is given by

021 RaRaRR VVaVaV ++= (A.2)

Assuming fault resistance to be zero,

03 1021 ==++ faf IZvvv (A.3)

From (A.1), (A.2) and (A.3),

( ) ( ) ( )001211 /// RKRaRKRaRKRaIRa YIYIYV ++= (A.4)

Also it can be written,

RaRaRaRa

RKRK

IIII

YY

=++=

021

21

(A.5)

Using (A.4) and (A.5), positive sequence measured admittance YRK1 can be written as,

Ra

RK

RKRaR

Rk V

Y

YIaI

Y

−+

=1

0

10

1 (A.6)

where IRa is the line fault current through the relay while IRa0 is the zero sequence

fault current seen by the relay and VRa is the faulted phase rms voltage.

147

Appendix-B

Converter structure and control

(A). Converter structure

The three phase structure of the converter which is used in PSCAD simulation

is shown in Fig. B.1. It contains three single phase H-bridge converters that are

supplied a common dc bus containing the DG. Three single-phase transformers are

connected to the three converters to provide isolation and voltage boosting. In this

figure, Lf is the leakage reactance of the transformer, Rf is the transformer losses and

L0 is the output inductance of the DG-converter system. The filter capacitor Cf is

used to bypass the switching harmonics. The advantage of the converter structure

shown in Fig. B.1 is that each phase of the converter can be controlled

independently.

Fig. B.1 The converter structure (B) Converter control

The converter has two control loops. It can either operate in voltage control or

current control modes depending on the network operating conditions. During the

normal operating condition, the converter is controlled using output feedback of the

148

converter output voltage maintaining the rated voltages at the terminals. The voltage

reference is chosen such that the power demand can be met. The converter switches

into output feedback current control mode during a fault in the network. In this case,

the reference current is chosen to have a magnitude that is twice the rated current of

the converter. Also in current control mode, the magnitude of the output current can

be changed with time according to the user requirement. However, the defined

currents are only injected in faulted phases. The voltage control mode of the

converter is explained in detail below.

The equivalent circuit of one phase of the converter is shown in Fig. B.2. In

this, u⋅Vdc represents the converter output voltage, where u = ± 1. The main aim of

the converter control is to generate u.

Fig. B.2 Equivalent circuit of one phase of the converter

From the circuit of Fig. B.2, the state space description of the system can be

given as,

cBuAxx +=& (B.1)

where uc is the continuous time control input, based on which the switching function

u is determined. The discrete-time equivalent of (B.1) can be given by

)()()1( kGukFxkx c+=+ (B.2)

149

Let the output of the system given in (B.2) be vcf. The reference for this voltage is

given by the instantaneous peak and phase angle of each phase. Let this be denoted

by v*. The input-output relationship of the system in (B.2) can be written as,

)(

)()(

)(1

1

−

−=

zN

zM

zu

zv

c

cf (B.3)

The control is computed from

)()()(

)()( *

1

1zvzv

zR

zSzu cfc −= −

− (B.4)

The closed-loop transfer function of the system is then

)()()()(

)()(

)(

)(1111

11

* −−−−

−−

+=

zSzMzRzN

zSzM

zv

zvcf (B.5)

The coefficients of the polynomials S and R can be chosen based on a pole

placement strategy [B.1]. Once uc is computed from (B.5), the switching function u

can be generated as

1

1

−=−<+=>uthenhuelseif

uthenhuif

c

c (B.6)

where h is a small number. The control in (B. 4) is computed based on the reference

voltage v∗ and the feedback of the capacitor voltage vcf. The reference voltages are

given by

)120sin(

)120sin(

)sin(

*

*

*

o

o

+=

−=

=

tVv

tVv

tVv

nc

nb

na

ω

ω

ω

(B.7)

where Vn is the peak voltage magnitude.

150

A similar control strategy is also used for current control. The control in (B.4)

is calculated based on the output current ioa and reference currents. The reference

currents for faulted phases are chosen based on the converter rating.

To illustrate how the switching pulses are selected in each mode of operation,

Fig. B.3 is considered. The converter in both voltage and current modes is operated

in output feedback pole shift voltage/current control mode to select R1, S1, R2 and

S2 [B.2] as explained above. Each phase is controlled according to its output voltage

(vcf) or current (ioa). These signals are sampled at 10 µs. The output sampled signals

are then used in the discrete-time output feedback controllers shown in this figure.

The controller mode change operations are also indicated in this figure. The

switching pulses are generated either in voltage control mode or current control

mode depending on the selected mode of operations.

Fig. B.3 Single line diagram of the converter structure and control

151

[B.1] A. Ghosh, “Performance study of two different compensating devices in a

custom power park,” Proc. IEE − Generation, Transmission & Distribution,

Vol. 152, No. 4, pp. 521-528, 2005.

[B.2] A. Ghosh, K. Jindal and A. Joshi, “Inverter control using output feedback for

power compensating devices,” Proc. IEEE Asia-Pacific Region-10 Conference

TENCON, Bangalore, 2003, pp. 49-52.

152

Appendix-C

LabVIE

W P

rogram

Fig. C.1 Measured admittance calculation on LabVIEW

153

Fig. C.2 ITA relay implementation on LabVIEW

155

Documents

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