30
May 2015 DocID026206 Rev 1 1/30 AN4473 Application note PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD converter based on the PM8803 controller Antonio Rotta Introduction This document describes a reference design for a POE+, high efficiency, 5 V - 4 A flyback converter based on the PM8803 PoE controller. The PM8803 is a highly integrated device embedding an IEEE802.3at compliant “Powered Device” (PD) interface together with a PWM controller and support for auxiliary sources. The STEVAL-TSP004V2 reference design is based on an isolated flyback topology CCM converter with synchronous rectification with a gate driver transformer. The same PCB can be populated in different ways to support various configurations and topologies (the flyback with diode rectification, synchronous flyback with or without an active clamp, self-driven synchronous flyback). Figure 1. STEVAL-TSP004V2 evaluation board photo www.st.com

PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

  • Upload
    others

  • View
    8

  • Download
    0

Embed Size (px)

Citation preview

Page 1: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

May 2015 DocID026206 Rev 1 1/30

AN4473Application note

PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PDconverter based on the PM8803 controller

Antonio Rotta

IntroductionThis document describes a reference design for a POE+, high efficiency, 5 V - 4 A flyback converter based on the PM8803 PoE controller.

The PM8803 is a highly integrated device embedding an IEEE802.3at compliant “Powered Device” (PD) interface together with a PWM controller and support for auxiliary sources.

The STEVAL-TSP004V2 reference design is based on an isolated flyback topology CCM converter with synchronous rectification with a gate driver transformer. The same PCB can be populated in different ways to support various configurations and topologies (the flyback with diode rectification, synchronous flyback with or without an active clamp, self-driven synchronous flyback).

Figure 1. STEVAL-TSP004V2 evaluation board photo

www.st.com

Page 2: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Contents AN4473

2/30 DocID026206 Rev 1

Contents

1 Main characteristics and circuit description . . . . . . . . . . . . . . . . . . . . . 3

2 Schematics for 5 V at 4 A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.2 Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3 Measurements results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.1 Efficiency comparison with three rectification bridge options . . . . . . . . . . 13

3.2 Converter efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.3 Voltage ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.4 Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.5 Primary side waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.6 Secondary side waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.7 Load transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.8 PoE to auxiliary switchover . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.9 Gloop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4 Supporting material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.1 PCB layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5 Electrical diagram general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Page 3: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 3/30

AN4473 Main characteristics and circuit description

30

1 Main characteristics and circuit description

The main characteristics (reference and electrical specifications) of the converter are listed inTable 1 and Table 2.

This document details the characteristics and performances of the PM8803 evaluation kit STEVAL-TSP004V2, which has been designed to cover a broad range of Power over Ethernet (PoE) applications.

The PM8803 is a highly integrated device embedding an IEEE802.3af/at compliant powered device (PD) interface together with a PWM controller and support for auxiliary sources.

Even though the PM8803 device can be configured to work in several isolated topologies, self-driven or a transformer gate driven; this application note focuses on a high efficiency isolated flyback converter topology with synchronous rectification, 5 V output voltage with a 4 A output current capability.

Auxiliary sources can be connected to the board on 2 different input connectors. One input (AUX II) allows prevalence of the auxiliary sources with respect to the PoE, while the other input (AUX I) allows the usage of a wall adaptor with voltage lower than the internal PoE UVLO threshold and still benefits from the inherent inrush and DC current limit.

Table 1. Reference

Reference code

Device PM8803

Evaluation board STEVAL-TSP004V2

Table 2. Electrical specification

Parameter Specifications

Input voltage supplies VIN [VDC] From 40 to 60 V

Auxiliary input voltage range From 30 to 60 V

Output voltage Vout [VDC] 5 VDC ± 5% at 4 A

Peak-to-peak output ripple < 30 mVpp

Efficiency DC-DC at full load > 92%

Efficiency overall at full load > 89%

Transient response ΔVoutpk to 50% load step < 180 mV

ΔVout in load line case < 0.5%

GLOOP bandwidth > 3 kHz

GLOOP phase margin at 0dB > 70 deg.

GLOOP dB margin at 0 deg. > 10 dB

Page 4: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Main characteristics and circuit description AN4473

4/30 DocID026206 Rev 1

The possible configurations supported by the PM8803 demonstration kit as options on the same PCB are:

• Alternative input bridge rectification: 4 possible options including standard diode bridges, discrete schottky diode bridges, half active bridges and full active bridges; schottky diode bridges are mounted on this eval board.

• Optional 4 pairs detection circuit, to detect if power is provided on 2 pairs or on 4 pairs by a high power PSE source; this circuit is not used on this eval board.

• Optional booster circuit, to increase the max. input current over 1 A; this circuit is not used on this eval board.

• Diode or synchronous rectification; 4 package options for the diode and 2 package options for the MOSFET.

• Primary side snubber; 3 options included an active clamp: a simple R-C snubber is used on this eval board.

• Power transformer; 3 size options for transformer gate driven solutions and 2 size options for self-driven applications.

The bill of material (BOM) in Table 3 provides the list of components to be mounted to obtain a flyback CCM converter with a gate transformer driven synchronous rectifier, with 5 V output at a 4 A evaluation board.

Page 5: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 5/30

AN4473 Schematics for 5 V at 4 A

30

2 Schematics for 5 V at 4 A

2.1 Schematic

Figure 2. STEVAL-TSP004V2 evaluation board: electrical schematic (1/2)

D1

STTH

30

2S

SMC

R1

3

75

R

06

03

R7

75

R

06

03

C5

10

nF

10

%

06

03

10

0V

D1

7

STP

S2H

10

0A

SMA

R2

75

R

06

03

D1

2

STP

S2H

10

0A

SMA

J4

DA

TA O

UTP

UT

1 2 3 4 5 6 7 8

910

D8

STP

S2H

10

0A

SMA

C6

10

nF

10

%

06

03

10

0V

J2 SP

1 2 3

D1

3

STP

S2H

10

0A

SMA

C1

41

nF

10

%

06

03

10

0V

D1

1

SMA

J58

ASM

A

R5

75

R

06

03

D1

4

STP

S2H

10

0A

SMA

R3

2

15

K

08

05

R4

3

0R

01

20

6

D9

STP

S2H

10

0A

SMA

D4 ST

PS2

H1

00

ASM

A

C7

10

nF

10

%

06

03

10

0V

T1

ETH

1-4

60

23

22

24

21

20

19

6 5 47 3 1289

10

18

17

16

15

14

13

11

12

TP2

2

Re

d

R3

7

0R

01

20

6

R1

0

75

R

06

03

R1

25

0R

0

12

06

C9

2.2

nF

18

12

2K

V

R1

1

75

R

06

03

C1

2

2.2

nF

18

12

2K

V

TP3

BLA

CK

C8

10

nF

10

%

06

03

10

0V

R2

6

0R

01

20

6

C2

1

1n

F 1

0%

06

03

10

0V

R1

7

0R

01

20

6

J3

DA

TA &

PO

WER

INP

UT1 2 3 4 5 6 7 8

910

R1

2

75

R

06

03

TP2

4

BLA

CK

C1

6

1n

F 1

0%

08

05

10

0V

D7

STP

S2H

10

0A

SMA

TP2

3

BLA

CK

R1

75

R

06

03

TP2

Re

d

C1

8

0.1

uF

10

%

08

05

10

0V

PO

E+F

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

Ch

assi

s

Ch

assi

s

Ch

assi

s

Ch

assi

sC

has

sis

Ch

assi

s

RTN

PO

E+F

VSS

SP

AU

X 1

Au

xilia

ry in

pu

t fr

on

tal o

r A

UX

I

Page 6: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Schematics for 5 V at 4 A AN4473

6/30 DocID026206 Rev 1

Figure 3. STEVAL-TSP004V2 evaluation board: electrical schematic (2/2)

R2

3

10

0R

12

06

D3

2

MM

3Z

15

VT1

SOD

32

3

R9

0

1k5

R9

4

21

K 1

%

1%

TP5

Re

d

C5

3

1u

F

C4

40

.1u

F

Q1

7

Si4

84

8D

Y

SO8

4

5 1

2

3

6

7

8

TP4

Re

d

R9

3

1K

R5

1

15

K

08

05

D5

7

BA

T46

J

SOD

32

3

JM1

Jum

per

-do

pp

io

1

2

3

C6

01

nF

08

05

10

0V

R5

8

27

K

C3

6

0.1

u

D3

4

BA

T46

J

SOD

32

3

C2

7

22

uF

12

06

16

V

C3

0

68

pF

08

05

10

0V

R4

4

3K

3

C3

5

22

uF

12

06

16

V

D3

9

BA

T46

JSO

D3

23

Q1

8

MM

BT3

90

4LT

1

SOT2

3

TP6

Re

d

C5

9

1u

F

25

V

06

03

C6

7

22

uF

12

06

16

V

TP9

Re

d

D2

8

BA

T46

J

SOD

32

3

C2

8

2.2

u

12

10

10

0V

R9

1

10

R

J5

11

22

C5

0

47

nF

R1

07

10

K

R6

6

10

R

TP8

BLA

CK

R8

4 0R

0

C3

3

22

uF

12

06

16

V

D3

6

BA

T46

J

SOD

32

3

TP1

0

Re

d

TP1

4

Re

d

R1

22 0R

0

C5

5

10

0p

F

R7

2

12

0K

1%

1%

R1

31

30

R9

1%

R0

80

5

C6

12

.2n 1

81

2

2K

V

U1

PM

88

03

HTS

SOP

20

-LA

RG

E

VD

D1

2

DE

T1

3

SP1

4

CLS

15

GA

T15

RTN

4

CS

3

AR

TN8

DC

CL

16

SA1

7

DT

18

T2P

20

RTN

9

GA

T27

VC

6

Ex Pad21

VSS

10

VB

2

CTL

1

FRS

19

VD

D1

1

TP1

1

BLA

CK

C4

1

1u

F

25

V

06

03

U3

Fair

child

FO

D8

17

AS

41 2

3

D2

0

Au

x d

et

C2

9

2.2

u

12

10

10

0V

R1

01

24

.9K

1%

1%

TP1

5

Re

d

R6

2

10

R

C4

8

1u

F

25

V

06

03

R4

52

4.9

K

C1

9

10

nF

TP1

9

BLA

CK

R9

6

0R

0

C3

4

33

0u

F

8x1

0.2

16

V

T8

CO

ILC

RA

FT D

A2

31

9-A

L

4 631

TP1

8

Re

d

R8

9

3.3

K

C6

9

10

nF

C5

64

7n

F

U4

TS4

31

AIL

T

SOT2

3-5

3 5

4 12

U7

Fair

child

FO

D8

17

AS 4

1 23

R1

09

0.3

0 o

hm

1%

12

06

C3

9

1u

F

25

V

06

03

R1

03

51

0R

TP1

2

BLA

CK

D2

1

STTH

30

2S

SMC

Q1

2

Po

wer

FLA

T™ 5

x6

STL6

0N

3LL

H5

4

5123

678

TP2

1

Re

d

R2

7

27

k

R1

17

5.1

K

C3

8

10

nF

C6

4

2.2

u

12

10

10

0V

J1 SA

1 2 3

D2

6

Out det

L51

0u

H

MSS

73

41

-10

3M

L

12

C4

5

0.1

uF

R1

08

0.3

0 o

hm

1%

12

06

U2

Fair

child

FO

D8

17

AS

41 2

3

R1

11

12

.4K

1%

1%

R8

3

10

K

D4

4

T2P

det

R1

04

4.7

K 1

%

1%

R8

0

20

R

C3

7

22

uF

12

06

16

V

TP2

0

Re

d

Q1

6

MM

BT3

90

6LT

1

SOT2

3

D5

2

BA

T46

J

SOD

32

3

R6

5

1K

R4

9

0R

0

12

06

R5

3

5R

08

05

R3

8

1k

C6

8

22

uF

12

06

16

V

C2

6

33

uF

20

%

10

0V

10

x10

.2

R7

0

10

K 1

%

1%

TP1

3

Re

d

C2

2TB

D

18

12

2K

V

R6

4

0R

0

C5

4

47

0p

C4

9

3.3

nF

R2

1

22

0R

12

06

R9

5

24

.9K

1%

1%

R1

19

3.3

K

R9

9

47

K

T5

CO

ILC

RA

FT H

A3

69

1-A

L

4 516 9

2

7 10

R5

4

0R

0

12

06

C4

0

1u

F

25

V

12

06

C2

3

47

0n

F 1

0% 50

V

06

03

R9

2

10

R

R0

80

5

L60

.33

uH

DO

18

13

-33

1M

L

12

TP1

6

Re

d

R5

2

3K

3

TP7

Re

d

C3

1

1.5

nF

08

05

R1

12

15

K 1

%

1%

JM2

Jum

per

-do

pp

io

1

2

3

R9

1K

1%

R0

60

3

D4

0

BA

T46

J

SOD

32

3

RTN

AR

TN

AR

TN

RTN

AR

TN

RTN

RTN

RTN

RTN

AR

TN

RTN

VSS

PO

E+F SP

SA

T2P

SP

VC

T2P

VC

SA

VSS

Po

wer

cir

cuit

Ou

tpu

t Fi

lter Fe

edb

ack

circ

uit

48

V A

UX

2

Inp

ut

Filt

er

NO

TE fo

r R

esis

tors

Wh

ere

no

t in

dic

ated

th

e b

od

y is

06

03

an

d t

ole

ran

ce 5

% N

OTE

for

Cap

acit

ors

Wh

ere

no

t in

dic

ated

th

e b

od

y is

06

03

an

d t

he

volt

age

is 5

0V

NO

TE

The

AR

TN is

a d

edic

ated

pla

ne

of

sig

nal

gro

un

d t

hat

will

be

con

nec

ted

to

th

e R

TN p

ow

er g

rou

nd

pla

ne

clo

se t

o p

in 4

an

d 9

of

PM

88

03

NO

TE fo

r Ju

mp

ers

JM1

an

d J

M2

Mo

ve t

he

sho

rt o

n b

oth

jum

per

s at

th

e sa

me

tim

e: -

sho

rt b

etw

een

pin

1 a

nd

2 w

hen

use

d A

UX

2 in

pu

t -

sho

rt b

etw

een

pin

2 a

nd

3 w

hen

use

d A

UX

1 in

pu

t.

Au

xilia

ry p

rese

nt

T2P

pre

sen

t

Page 7: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 7/30

AN4473 Schematics for 5 V at 4 A

30

2.2 Bill of material

Table 3. Bill of material

Item Ref. Description Value PCB footprint Supplier Voltage

1 C5 Ceramic Capacitor 10 nF 10% C0603 TDK 100 V

2 C6 Ceramic Capacitor 10 nF 10% C0603 TDK 100 V

3 C7 Ceramic Capacitor 10 nF 10% C0603 TDK 100 V

4 C8 Ceramic Capacitor 10 nF 10% C0603 TDK 100 V

5 C9 Ceramic Capacitor 2.2 nF C1812 AVX 2 kV

6 C12 Ceramic Capacitor 2.2 nF C1812 AVX 2 kV

7 C14 Ceramic Capacitor 1 nF 10% C0603 TDK 100 V

8 C16 Ceramic Capacitor 1 nF 10% C0805 TDK 100 V

9 C18 Ceramic Capacitor 0.1 µF 10% C0805 TDK 100 V

10 C19 Ceramic Capacitor 10 nF C0603 Several 50 V

11 C21 Ceramic Capacitor 1 nF 10% C0603 TDK 100 V

12 C22 Ceramic Capacitor TBD C1812 AVX 2 kV

13 C23 Ceramic Capacitor 470 nF 10% C0603 Several 50 V

14 C26 Aluminium capacitor 33 µF 20% C-POL8-10 Panasonic -

EEEFK2A330P100 V

15 C27 Ceramic Capacitor 22 µF C1206Murata -

GRM31CR61C226ME15L

16 V

16 C28 Ceramic Capacitor 2.2 µF C1210Murata -

GRM32ER72A225KA35L

100 V

17 C29 Ceramic Capacitor 2.2 µF C1210Murata -

GRM32ER72A225KA35L

100V

18 C30 Ceramic Capacitor 68 pF C0805 TDK 100 V

19 C31 Ceramic Capacitor 1.5 nF C0805 Several 50 V

20 C33 Ceramic Capacitor 22 µF C1206Murata -

GRM31CR61C226ME15L

16 V

21 C34 Aluminium capacitor 330 µF C-POL8-10 Panasonic -

EEEFK1C331P16 V

22 C35 Ceramic Capacitor 22 µF C1206Murata -

GRM31CR61C226ME15L

16 V

23 C36 Ceramic Capacitor 0.1 µF C0603 Several 50 V

24 C37 Ceramic Capacitor 22 µF C1206Murata -

GRM31CR61C226ME15L

16 V

Page 8: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Schematics for 5 V at 4 A AN4473

8/30 DocID026206 Rev 1

25 C38 Ceramic Capacitor 10 nF C0603 Several 50 V

26 C39 Ceramic Capacitor 1 µF C0603 KEMET 25 V

27 C40 Ceramic Capacitor 1 µF C1206 KEMET 25 V

28 C41 Ceramic Capacitor 1 µF C0603 KEMET 25 V

29 C44 Ceramic Capacitor 0.1 µF C0603 Several 50 V

30 C45 Ceramic Capacitor 0.1 µF C0603 Several 50 V

31 C48 Ceramic Capacitor 1 µF C0603 KEMET 25 V

32 C49 Ceramic Capacitor 3.3 nF C0603 Several 50 V

33 C50 Ceramic Capacitor 47 nF C0603 Several 50 V

34 C53 Ceramic Capacitor 1 µF C0603 KEMET 25 V

35 C54 Ceramic Capacitor 470 pF C0603 Several 50 V

36 C55 Ceramic Capacitor 100 pF C0603 Several 50 V

37 C56 Ceramic Capacitor 47 nF C0603 Several 50 V

38 C59 Ceramic Capacitor 1 µF C0603 KEMET 25 V

39 C60 Ceramic Capacitor 1 nF C0805 TDK 100 V

40 C61 Ceramic Capacitor 2.2 nF C1812 AVX 2 kV

41 C64 Ceramic Capacitor 2.2 µF C1210MURATA -

GRM32ER72A225KA35L

100 V

42 C67 Ceramic Capacitor 22 µF C1206Murata -

GRM31CR61C226ME15L

16 V

43 C68 Ceramic Capacitor 22 µF C1206Murata -

GRM31CR61C226ME15L

16 V

44 C69 Ceramic Capacitor 10 nF C0603 Several 50 V

45 D1 Diode STTH302S SMC STMicroelectronics

46 D4 Schottky Diode STPS2H100A SMA STMicroelectronics

47 D7 Schottky Diode STPS2H100A SMA STMicroelectronics

48 D8 Schottky Diode STPS2H100A SMA STMicroelectronics

49 D9 Schottky Diode STPS2H100A SMA STMicroelectronics

50 D11 TVS diode SMAJ58A SMA STMicroelectronics

51 D12 Schottky Diode STPS2H100A SMA STMicroelectronics

52 D13 Schottky Diode STPS2H100A SMA STMicroelectronics

53 D14 Schottky Diode STPS2H100A SMA STMicroelectronics

54 D17 Schottky Diode STPS2H100A SMA STMicroelectronics

55 D20 Diode LED Aux det KA-3528SGT Kingbright

Table 3. Bill of material (continued)

Item Ref. Description Value PCB footprint Supplier Voltage

Page 9: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 9/30

AN4473 Schematics for 5 V at 4 A

30

56 D21 Diode STTH302S SMC STMicroelectronics

57 D26 Diode LED Out det KA-3528SGT Kingbright

58 D28 Schottky Diode BAT46J SOD323 STMicroelectronics

59 D32 Zenere Diode MM3Z15VT1 SOD323 Onsemi

60 D34 Schottky Diode BAT46J SOD323 STMicroelectronics

61 D36 Schottky Diode BAT46J SOD323 STMicroelectronics

62 D39 Schottky Diode BAT46J SOD323 STMicroelectronics

63 D40 Schottky Diode BAT46J SOD323 STMicroelectronics

64 D44 Diode LED T2P det KA-3528SGT Kingbright

65 D52 Schottky Diode BAT46J SOD323 STMicroelectronics

66 D57 Schottky Diode BAT46J SOD323 STMicroelectronics

67 JM1 Connector Jumper-doppio 3PIN-P254 Several

68 JM2 Connector Jumper-doppio 3PIN-P254 Several

69 J1 Connector SA P-JACK-RAPC722 Several

70 J2 Connector SP P-JACK-RAPC722 Several

71 J3 Connector DATA & POWER INPUT RJ45-8PIN Molex

72 J4 Connector DATA OUTPUT RJ45-8PIN Molex

73 J5 Connector MOR-10X10.5-P5-2PIN MOR-2POLI-508 Several

74 L5 Inductor 10uH MSS7341-103ML Coilcraft

75 L6 Inductor 0.33uH DO1813H Coilcraft

76 Q12 Mosfet STL60N3LLH5 PowerFLAT™ 5x6 STMicroelectronics

77 Q16 Mosfet MMBT3906LT1 SOT23 Several

78 Q17 Mosfet Si4848DY so8pwrpak-SO8 VISHAY

79 Q18 Mosfet MMBT3904LT1 SOT23 Several

80 R1 Resistor 75R R0603 Several

81 R2 Resistor 75R R0603 Several

82 R5 Resistor 75R R0603 Several

83 R7 Resistor 75R R0603 Several

84 R9 Resistor 1K 1% R0603 Several

85 R10 Resistor 75R R0603 Several

86 R11 Resistor 75R R0603 Several

87 R12 Resistor 75R R0603 Several

88 R13 Resistor 75R R0603 Several

89 R17 Resistor 0R0 R0805 Several

90 R21 Resistor 220R R1206 Several

Table 3. Bill of material (continued)

Item Ref. Description Value PCB footprint Supplier Voltage

Page 10: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Schematics for 5 V at 4 A AN4473

10/30 DocID026206 Rev 1

91 R23 Resistor 100R R1206 Several

92 R26 Resistor 0R0 R1206 Several

93 R27 Resistor 27k R0603 Several

94 R32 Resistor 15K R0805 Several

95 R37 Resistor 0R0 R1206 Several

96 R38 Resistor 1k R0603 Several

97 R43 Resistor 0R0 R0805 Several

98 R44 Resistor 3K3 R0603 Several

99 R45 Resistor 24.9K R0603 Several

100 R49 Resistor 0R0 R1206 Several

101 R51 Resistor 15K R0805 Several

102 R52 Resistor 3K3 R0603 Several

103 R53 Resistor 5R R1206 Several

104 R54 Resistor 0R0 R1206 Several

105 R58 Resistor 27K R0603 Several

106 R62 Resistor 10R R0603 Several

107 R64 Resistor 0R0 R0603 Several

108 R65 Resistor 1K R0603 Several

109 R66 Resistor 10R R0603 Several

110 R70 Resistor 10K 1% R0603 Several

111 R72 Resistor 120K 1% R0603 Several

112 R80 Resistor 20R R0805 Several

113 R83 Resistor 10K R0603 Several

114 R84 Resistor 0R0 R0603 Several

115 R89 Resistor 3.3K R0603 Several

116 R90 Resistor 1k5 R0603 Several

117 R91 Resistor 10R R0603 Several

118 R92 Resistor 10R R0805 Several

119 R93 Resistor 1K R0603 Several

120 R94 Resistor 21K 1% R0603 Several

121 R95 Resistor 24.9K 1% R0603 Several

122 R96 Resistor 0R0 R0603 Several

123 R99 Resistor 47K R0603 Several

124 R101 Resistor 24.9K 1% R0603 Several

125 R103 Resistor 510R R0603 Several

Table 3. Bill of material (continued)

Item Ref. Description Value PCB footprint Supplier Voltage

Page 11: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 11/30

AN4473 Schematics for 5 V at 4 A

30

126 R104 Resistor 4.7K 1% R0603 Several

127 R107 Resistor 10K R0603 Several

128 R108 Resistor 0.30 ohm 1% R1206 Bourns

129 R109 Resistor 0.30 ohm 1% R1206 Bourns

130 R111 Resistor 12.4K 1% R0603 Several

131 R112 Resistor 15K 1% R0603 Several

132 R117 Resistor 5.1K R0603 Several

133 R119 Resistor 3.3K R0603 Several

134 R122 Resistor 0R0 R0603 Several

135 R125 Resistor 0R0 R1206 Several

136 R131 Resistor 30R9 1% R0805 Several

137 TP2 Test Point Red TH-5013 Keystone

138 TP3 Test Point BLACK TH-5013 Keystone

139 TP4 Test Point Red TH-5013 Keystone

140 TP5 Test Point Red TH-5013 Keystone

141 TP6 Test Point Red TH-5013 Keystone

142 TP7 Test Point Red TH-5013 Keystone

143 TP8 Test Point BLACK TH-5013 Keystone

144 TP9 Test Point Red TH-5013 Keystone

145 TP10 Test Point Red TH-5013 Keystone

146 TP11 Test Point BLACK TH-5013 Keystone

147 TP12 Test Point BLACK TH-5013 Keystone

148 TP13 Test Point Red TH-5013 Keystone

149 TP14 Test Point Red TH-5013 Keystone

150 TP15 Test Point Red TH-5013 Keystone

151 TP16 Test Point Red TH-5013 Keystone

152 TP18 Test Point Red TH-5013 Keystone

153 TP19 Test Point BLACK TH-5013 Keystone

154 TP20 Test Point Red TH-5013 Keystone

155 TP21 Test Point Red TH-5013 Keystone

156 TP22 Test Point Red TH-5013 Keystone

157 TP23 Test Point BLACK TH-5013 Keystone

158 TP24 Test Point BLACK TH-5013 Keystone

159 T1 Data Transfo ETH1-460 ETH1-460 Coilcraft

160 T5 Power Transfo COILCRAFT HA3691-AL PA2328NL Coilcraft

Table 3. Bill of material (continued)

Item Ref. Description Value PCB footprint Supplier Voltage

Page 12: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Schematics for 5 V at 4 A AN4473

12/30 DocID026206 Rev 1

161 T8 Power Transfo COILCRAFT DA2319-AL DA2318-AL Coilcraft

162 U1 Controller IC PM8803 HTSSOP20-LARGE STMicroelectronics

163 U2 Optocoupler Fairchild FOD817AS FOD817 Fairchild

164 U3 Optocoupler Fairchild FOD817AS FOD817 Fairchild

165 U4 Voltage Reference TS431AILT SOT23-5L STMicroelectronics

166 U7 Optocoupler Fairchild FOD817AS FOD817 Fairchild

Table 3. Bill of material (continued)

Item Ref. Description Value PCB footprint Supplier Voltage

Page 13: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 13/30

AN4473 Measurements results

30

3 Measurements results

3.1 Efficiency comparison with three rectification bridge optionsSTEVAL-TSP004V2 provides different rectification bridge options: single Schottky diode, half active bridge, full active bridge and diode bridge. They are alternatively usable thanks the options available on the STEVAL-TSP004V2 demo’s PCB. Efficiency measurements have been executed to compare the different characteristics cost/efficiency through three different rectification bridge options. Here below the schematics:

Figure 4. Schematic Schottky bridge

Figure 5. Schematic full active bridge

R37

0R01206

R3215K0805

D13

STPS2H100ASMA

R26

0R01206

D8

STPS2H100ASMA

TP2

Red

C15NM

0805

TP3

BLACK

D12

STPS2H100ASMA

D14

STPS2H100ASMA

D17

STPS2H100ASMA

D9

STPS2H100ASMA

D4

STPS2H100ASMA

D1

STTH302SSMC

J2

SP

1

2

3

D7STPS2H100ASMA

T1 pin.4 T1 pin.10T1 pin.1 T1 pin.7SP

POE+F

VSS

AUX 1

C77

NM

R291M

0603

Q4

P-Ch. 100VSO8

4

51

6 7 8

2 3

R37

0R01206

R20

200K

0603

C75NM

R19200K0603

D3

MM3Z15VT1SOD323

R34

1M

0603

R281M

0603R31

1M0603

R26

0R01206

R32

15K

0805

Q7

N-Ch. 100VSO8

4

51 2 3

6 7 8

R40

200K

0603

R25200K0603

R39

200K0603

C79NM

D6MM3Z15VT1

SOD323

R30

1M0603

R361M

0603

D2

MM3Z15VT1SOD323

Q1

P-Ch. 100VSO8

4

51

6 7 8

2 3

C73NM

D15

MM3Z15VT1SOD323

C15

NM

0805

R42200K0603

C78NM

D18

MM3Z15VT1SOD323

D19

MM3Z15VT1SOD323

D5

MM3Z15VT1SOD323

C72NM

Q5N-Ch. 100V

SO8

4

51 2 3

6 7 8

TP3

BLACK

Q6

N-Ch. 100VSO8

4

51 2 3

6 7 8

D16

MM3Z15VT1SOD323

R41200K0603

R351M0603

R33

1M

0603

C76

NM

C74NM

TP2

Red

D1

STTH302SSMC

Q2

P-Ch. 100VSO8

4

51

6 7 8

2 3

J2

SP

1

2

3

Q3P-Ch. 100V

SO8

4

51

6 7 8

2 3

R22

200K0603

Q8N-Ch. 100V

SO8

4

51 2 3

6 7 8

SP

T1 pin.4 T1 pin.10

T1 pin.1 T1 pin.7

POE+F

VSS

AUX 1

Page 14: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Measurements results AN4473

14/30 DocID026206 Rev 1

Figure 6. Schematic half active bridge

The measurement has been executed providing a 48V on the RJ45 connector and connecting the Poe+/Vss (TP22 vs TP23) with external electronic load with different current values to cover around 40W of input power.

Figure 7. Comparison efficiency bridge

Figure 7 shows the input stage efficiency comparison with three different bridge rectification type. The green line shows the efficiency of the Schottky diode bridge option, the cheaper of them, populated with four Schottky diodes STPS2H100A of each bridge. The yellow line shows the efficiency of the full active bridge, the most efficient, using two 100 V- 240 mΩ P-channel MOSFET on high side and two 100V 65 mΩ N-channel MOSFET on low side of each bridge. The red line shows the half active bridge solution, which represent a right compromise in term of cost vs. efficiency.

R26

0R01206

R331M

0603

C76NM

D7

STPS2H100ASMA

C15NM

0805

R40

200K0603

R42

200K0603

C78NM

TP2

Red

R39200K0603

Q6

N-Ch. 100VSO8

4

51 2 3

6 7 8 Q8

N-Ch. 100VSO8

4

51 2 3

6 7 8

R41200K0603

J2

SP

1

2

3

R34

1M

0603

R361M

0603

D1

STTH302SSMC

D16MM3Z15VT1SOD323

D18

MM3Z15VT1SOD323

Q5N-Ch. 100V

SO8

4

51 2 3

6 7 8

C79NM

D8

STPS2H100ASMA

D15

MM3Z15VT1SOD323

R37

0R01206

C77NM

D4

STPS2H100ASMA

TP3

BLACK

R32

15K

0805

R35

1M0603

D19

MM3Z15VT1SOD323

D9

STPS2H100ASMA

Q7N-Ch. 100V

SO8

4

51 2 3

6 7 8

SP

T1 pin.4 T1 pin.10T1 pin.1 T1 pin.7

VSS

POE+F

AUX 1

96.0%

96.5%

97.0%

97.5%

98.0%

98.5%

99.0%

99.5%

100.0%

0

100

200

300

400

500

600

700

800

Efficiency [%]

Input Current [mA]

Efficiency Data Transfo + Bridge

Schottky Diode Bridge

Full Active Bridge

Half Active Bridge

Page 15: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 15/30

AN4473 Measurements results

30

Changing the input bridge it is possible to gain up to 2% about on the overall converter efficiency.

3.2 Converter efficiency

Figure 8. Overall and DC/DC efficiency

Figure 8 shows overall and DC/DC efficiencies for the converter at 48Vindc.

The dotted green line is the STEVAL-TSP004V2 DC-DC efficiency. The measurement has been executed supplying 48 V to the input RJ45 connector J1 and measuring the input voltage by TP22/TP23, input voltage of DC-DC converter stage. Figure 8 shows also the overall efficiency comparison measured with the same DC-DC converter stage connected to the three different rectification bridge stages previously mentioned.

Please note that:

• Overall efficiency includes all loss from RJ45 to the output voltage rail.

• DC/DC efficiency is a figure of merit of the converter standalone and typically does not include the losses associated to the PoE interface section that are: the RJ45 connector, data transformer, bridges, power consumption of the I/F of the PM8803 device.

On the STEVAL-TSP004V2 evaluation board is mounted the simple Schottky diodes bridge solution (green line).

Thanks to the bridge rectification options foreseen on the pcb it is then possible to select the best compromise cost/efficiency depending on the target request.

86%

87%

88%

89%

90%

91%

92%

93%

94%

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

Efficiency

Iout [mA]

5 Vout Overall and DC/DC Efficiency

Overall with Schottky

Overall FAB

Overall HAB

DC-DC

Page 16: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Measurements results AN4473

16/30 DocID026206 Rev 1

Figure 9. Output voltage drift

5.155

5.160

5.165

5.170

0.0 1.0 2.0 3.0 4.0

Output Voltage

Iout [mA]

5 Vout changhe with load

drift 5V at 48V

Page 17: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 17/30

AN4473 Measurements results

30

3.3 Voltage ripple

Above measurements are referred at the output voltage ripple.

In Figure 12 and Figure 13 a measure of the ripple on the input voltage has been done, to give an indication of the noise at the input of the converter.

Figure 10. Ripple on 5 V at 0.4 A Figure 11. Ripple on 5 V at 4 A

CH2: output currentCH4: output voltage

CH2: output currentCH4: output voltage

Figure 12. Ripple before and after input filter with 5 V at 0.4 A (measured on C26 and C28)

Figure 13. Ripple before and after input filter with 5 V at 4 A (measured on C26 and C28)

CH1: ripple after input filter

CH2: input currentCH3: ripple before input filter

CH4: primary Vgate

CH1: ripple after input filter

CH2: input currentCH3: ripple before input filter

CH4: primary Vgate

Page 18: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Measurements results AN4473

18/30 DocID026206 Rev 1

3.4 Startup

Figure 14. Startup from Microsemi 9001G injector - 5 V at 0.4 A

Figure 15. Startup from Microsemi 9001G injector - 5 V at 4 A

CH1: VCCCH2: input current

CH3: VSS - RTNCH4: output voltage

CH1: VCCCH2: input current

CH3: VSS - RTNCH4: output voltage

Figure 16. Startup from Microsemi 9501G injector- 5 V at 0.4 A

Figure 17. Startup from Microsemi 9501G injector- 5 V at 4 A

CH1: Tx Rx input currentCH2: spare input current

CH3: VSS - RTNCH4: output voltage

CH1: Tx Rx input currentCH2: spare input current

CH3: VSS - RTNCH4: output voltage

Page 19: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 19/30

AN4473 Measurements results

30

Figure 18. Detail of the output voltage at startup with no load

Figure 19. Detail of the output voltage at startup with 4 A load

CH2: input currentCH4: output voltage

CH2: input currentCH4: output voltage

Page 20: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Measurements results AN4473

20/30 DocID026206 Rev 1

3.5 Primary side waveforms

Figure 20. Primary steady state 0.4 A Figure 21. Primary steady state 4 A

CH1: primary MOSFET drain

CH2: input currentCH4: primary MOSFET gate

CH1: primary MOSFET drain

CH2: input currentCH4: primary MOSFET gate

Figure 22. Detail of primary drain at 4 A load

CH1: primary MOSFET drainCH2: input current

CH4: primary MOSFET gate

Page 21: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 21/30

AN4473 Measurements results

30

3.6 Secondary side waveforms

Figure 23. Secondary steady state 0.4 A Figure 24. Secondary steady state 4 A

CH1: secondary MOSFET drainCH2: input current

CH4: secondary MOSFET gate

CH1: secondary MOSFET drainCH2: input current

CH4: secondary MOSFET gate

Figure 25. Detail of secondary drain at 4 A load

CH1: secondary MOSFET drainCH2: input current

CH4: secondary MOSFET gate

Page 22: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Measurements results AN4473

22/30 DocID026206 Rev 1

3.7 Load transients

3.8 PoE to auxiliary switchover

In Figure 28 is shown a smooth transition from a PoE line set to 54 V toward an auxiliary adapter at 44 V; the output voltage is maintained stable during the transition.

Figure 26. 2 A - 4 A load transient Figure 27. 0.4 A - 4 A load transient

CH2: output currentCH4: output voltage

CH2: output currentCH4: output voltage

Figure 28. PoE to auxiliary switchover

CH1:converter input voltage

CH2: PoE input currentCH3: T2P signal

CH4: output voltage

Page 23: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 23/30

AN4473 Measurements results

30

3.9 Gloop

Figure 29. Gloop 48 V at 4 A Figure 30. Gloop 48 V at no load

Bw: 3.2 KHzGM:10.6 dBPM: 70 deg.

Bw: 4.0 KHzGM:12.2 dBPM: 77 deg.

Figure 31. Gloop 40 V at 4 A Figure 32. Gloop 57 V at no load

Bw: 3.2 KHz

GM:10.6 dBPM: 70 deg.

Bw: 4.2 KHz

GM:11.7 dBPM: 78 deg.

Page 24: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Supporting material AN4473

24/30 DocID026206 Rev 1

4 Supporting material

4.1 PCB layers

Figure 33. PCB top assembly

Figure 34. PCB bottom assembly

Page 25: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 25/30

AN4473 Supporting material

30

Figure 35. PCB layer 1 top

Figure 36. PCB layer 2

Page 26: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Supporting material AN4473

26/30 DocID026206 Rev 1

Figure 37. PCB layer 3

Figure 38. PCB layer 4 bottom

Page 27: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 27/30

AN4473 Electrical diagram general

30

5 Electrical diagram general

Figure 39. Schematic 1 of 2 (general)

Q3

SO

8

4

51678

23

D1

STT

H30

2SS

MC

D25

<Des

crip

tion>

4

1

3

2-+

Q22

2N70

02

D6

SO

D32

3

R13 75R

0603

R7

75R

0603

C5

10nF

0603

100V

D33

BAT

46J

SO

D32

3

R41

0603

C73

D5

SO

D32

3

D13

SM

AS

TPS

2H10

0A

R2

75R

0603

R31

0603

Q6

SO

8 4

5 123

678

D14

SM

AS

TPS

2H10

0A

J4

DAT

A O

UTP

UT

1 2 3 4 5 6 7 8

910

R29

0603

Q2

SO

8

4

51678

23

C74

C13

NM

0603

100V

D8

SM

AS

TPS

2H10

0A

D47

BAT

46J

SO

D32

3

R36

0603

R30

0603

U12

Sha

rp P

C3H

7 - N

M41 2

3

C6

10nF

0603

100V

Q7

SO

8

4

5 123

678

J2 SP

1 2 3

D56

MM

3Z15

VT1

SO

D32

3

Q5

SO

8

4

5 123

678

C14

1nF

0603

100V

R6

1M 0603

D11

SM

AJ5

8AS

MA

R5

75R

0603

D18

SO

D32

3

D12

SM

AS

TPS

2H10

0A

R24

1M 0603

D48

BAT

46J

SO

D32

3

T11

Puls

e P

E65

855N

L - N

M

4

3 2

1

R19

0603

R28

0603

Q1

SO

84

51678

23

R32

15K

0805

D50

4P d

et

R43

0R12

06

C79

R34

0603

R35

0603

D9

SM

AS

TPS

2H10

0A

C77

C72

D3

SO

D32

3

D15

SO

D32

3

D4

SM

AS

TPS

2H10

0A

D19

SO

D32

3D49

BAT

46J

SO

D32

3

U6

Fairc

hild

FO

D81

7AS

41 2

3

C7

10nF

0603

100V

T2

Wur

th 7

4422

6S -

NM

2

34

1

R55

1M 0603

T1

ETH

1-46

0

2322 242120196 5 47 3 128910

181716151413

1112

R20

0603

R16

NM

0805

TP22

Red

R37

0R0

1206

R10 75R

0603

C20

NM

0603

100V

Q4

SO

84

51678

23

D10 NM

SM

AR12

50R

1206

C9

2.2n

F

1812

2KV

C17

NM

0805

100V

R46 47K

D17

SM

AS

TPS

2H10

0A

R8

1M 0603

R25

0603

R10

00N

M

0603

R11 75R

0603

C15

NM

0805

C76

R15

NM

0805

C12

2.2n

F

1812

2KV

TP3

BLA

CK

C8

10nF

0603

100V

D24

<Des

crip

tion>

4

1

3

2

-+

R47

3K3

R26

0R0

1206

C21

1nF

0603

100V

R14

NM

1206

R42

0603

D29

BAT

46J

SO

D32

3

R17

0R12

06

J3

DAT

A &

PO

WE

R IN

PU

T

1 2 3 4 5 6 7 8

910

R33

0603

C75

R12 75R

0603

R40

0603

TP24

BLA

CK

C78

C16

1nF

0805

100V

D7

SM

AS

TPS

2H10

0A

D30

BAT

46J

SO

D32

3

TP23

BLA

CK

Q8

SO

8 4

5 123

678

R1

75R

0603

TP2

Red

D16

SO

D32

3

C18

0.1u

F08

0510

0V

D2

SO

D32

3

R22

0603

TP25

Red

R39

0603

SS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS V

F+EOP

F+EOP

F+EOP

Cha

ssis

Cha

ssis

Cha

ssis

Cha

ssis

Cha

ssis

Cha

ssis

RTN

RTN

PO

E+F

VS

S

Vout

SP

PO

E+F

VS

S

Inpu

t Com

mon

Mod

e Fi

lter

Opt

iona

l 4

pairs

det

ectio

n ci

rcui

t

AUX

1

Auxi

liary

inpu

t fro

ntal

or A

UX

I

4 pa

irs d

etec

tion

sign

al

Page 28: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

Electrical diagram general AN4473

28/30 DocID026206 Rev 1

Figure 40. Schematic 2 of 2 (general)

Q1

9

MM

BT3

90

4LT

1

SOT2

3

TP9

Re

d

C4

2

NM

16

V

06

03

TP1

1

BLA

CK

R9

6

0R

Q2

5

TSSO

P6

3

5

6

1

4

2

D4

6ST

PS8

L30

DEE

Po

wer

FLA

T 3

x3

D2

2ST

PS1

5L4

5C

B

DPA

K

A1 K

A2

R1

17

5.1

K

R1

30

10

0K

R1

27

1M

C6

2

NM

08

05

10

0V

R6

00

R

R1

12

15

K

1%

T5

Co

ilcra

ft H

A3

69

1-A

L

4 516 9

2

7 10

C2

8

2.2

u

12

10

10

0V

D4

2N

M

SMA

T8C

OIL

CR

AFT

DA

23

19

-AL

4 631

L70

.33

uH

DO

33

16

P-1

03

ML

12

R5

6

NM

D5

2

BA

T46

J

SOD

32

3

C2

6

33

uF

10

0V

10

x10

.2

R7

0

21

K

1%

C4

9

10

nF

D3

2

MM

3Z

15

VT1

SOD

32

3

U1

1Sh

arp

PC

3H

7

41 2

3

U5

TS2

43

1A

ILT

SOT2

3

1 3

2

R8

4 0R

C6

12

.2n 1

81

2

2K

V

U3

Fair

child

FO

D8

17

AS

41 2

3

D2

0

Au

x d

et

R6

2

10

R

U1

0Sh

arp

PC

3H

7

41 2

3

TP5

Re

d

D2

8

BA

T46

J

SOD

32

3

R1

07

10

k

R1

22 0R

D4

5

STP

S15

L30

CD

JF

Po

wer

FLA

T 5

x6

A1 K

A2

Q9

MM

BT3

90

6LT

1

NM

SOT2

3

C3

9

1u

F

16

V

06

03

R1

08

0.3

0 o

hm

12

06

TP1

3

Re

d

R9

22

2R

R0

80

5

R4

80

R

R0

80

5

R9

3

1K

R5

1

15

K

08

05

R5

8

27

K

R4

4

1K

R9

11

0

R6

7

NM 1%

R8

93

.3K

C6

9

10

nF

C4

5

0.1

uF

T4

PA0

18

4-P

uls

e

1 854

TP2

0

Re

d

D2

3

NM

SMA

C4

3

NM

4x6

25

V

R2

3

22

01

20

6

C6

01

nF 0

80

510

0V

Q1

8

MM

BT3

90

4LT

1

SOT2

3

C7

1

47

0p

F

50

V

Q1

1TB

D

SOT2

31

3 2

T9

CO

ILC

RA

FT G

A3

27

8-B

L

4 125

711

812

10

9

3 6

TP1

5

Re

d

C3

2

NM

08

05

TP1

2

BLA

CK

R1

00

NM

C6

8

10

uF

12

06

16

V

R2

1 22

01

20

6

TP4

Re

d

T7

CO

ILC

RA

FT P

OE1

3P

4 123

987 10

D3

9

BA

T46

J

SOD

32

3

TP8

BLA

CK

C3

8

10

nF

R8

01

0R

R7

3N

M

132

R5

31

0R

08

05

C4

7

NM

R5

2

1K

D5

5

MM

3Z

15

VT1

SOD

32

3

Q1

7

Si4

84

8D

Y

SO8

4

5 1

2

3

6

7

8

J5

11

22

C4

1

1u

F

16

V

06

03

R1

29

10

0K

R1

09

0.3

0 o

hm

12

06

D2

1

STTH

30

2S

SMC

C2

4

NM

08

05

L51

0u

H

MSS

73

41

-10

3M

L

12

D4

4

T2P

det

C3

7

10

uF

12

06

16

V

R4

90

R

12

06

R3

8

1k

R9

97

NM

1%

R9

98

NM

1%

C5

9

1u

F

16

V

06

03

C6

3

2.2

u

12

10

10

0V

TP1

0

Re

d

T6

CO

ILC

RA

FT P

OE3

00

F-5

0L

4 12 5

711

812

10

9

3 6

R4

53

3K

R2

7

27

k

Q1

6

MM

BT3

90

6LT

1

SOT2

3

C2

2TB

D

18

12

2K

V

R9

9

47

K

R5

40

R

12

06

C4

0

NM

16

V

08

05

D3

8

BA

T46

J

SOD

32

3

JM2

Jum

per

-do

pp

io

1

2

3

R9

1K

1%

r06

03

D4

0

BA

T46

J

SOD

32

3

R5

90

R

12

06

R1

02

NM

08

05

1%

C5

51

00

pF

R1

31

30

R9

1%

r08

05

R1

01

24

.9K

1%

C1

9

NM

R5

7

NM

L60

.33

uH

DO

18

13

-33

1M

L

12

TP1

6

Re

d

C5

1

47

nF

12

06

20

0V

C4

40

.1u

F

Q1

0

TBD

DP

ack

13

3

2

2

JM1

Jum

per

-do

pp

io

1

2

3

Q1

4

MM

BT3

90

4LT

1

SOT2

3

C2

5

NM

R9

80

R

U7

Fair

child

FO

D8

17

AS 4

1 23

TP2

1

Re

d

C6

4

2.2

u

12

10

10

0V

C5

4

47

0p

R1

19

1K

R9

0

68

0R

D4

1

BA

T46

J

SOD

32

3

TP1

4

Re

d

U1

PM

88

03

HTS

SOP

20

-LA

RG

E

VD

D1

2

DE

T1

3

SP1

4

CLS

15

GA

T15

RTN

4

CS

3

AR

TN8

DC

CL

16

SA1

7

DT

18

T2P

20

RTN

9

GA

T27

VC

6

Ex Pad21

VSS

10

VB

2

CTL

1

FRS

19

VD

D1

1

C4

8

1u

F

16

V

06

03

TP1

9

BLA

CK

D3

1

BA

T46

J N

M

SOD

32

3

U9

Shar

p P

C3

H7

41 2

3

R1

11

12

.4k

1%

R8

3

10

K

C3

11

nF

08

05

D5

7

BA

T46

JSO

D3

23

C6

7

10

uF

12

06

16

V

D5

1

BA

T46

J

SOD

32

3

Q2

1

IRF6

21

6P

bF

SO8

4

5 1

2

3

6

7

8

R9

99

NM

1%

U4

TS4

31

AIL

T

SOT2

3-5

3 5

4 12

D2

6

Out det

R9

7 NM

TP7

Re

d

R9

4

21

k

1%

C5

3

1u

F

C3

0

10

0p

F

08

05

10

0V

D3

6

BA

T46

J

SOD

32

3

D5

4

BA

T46

J

SOD

32

3

C2

9

2.2

u

12

10

10

0V

R1

06

10

K

T10

CO

ILC

RA

FT F

A2

70

6-B

L

NM

4 125

711

812

10

9

3 6

Q1

2

STL6

6N

3LL

H5

Po

wer

Fla

t 5

x6

4

5123

678

J1 SA

1 2 3

R6

5

1K

R9

5

24

.9K

1%

C5

7

0.1

uF

R1

28

NM

D3

4

BA

T46

J

SOD

32

3

C2

7

10

uF

12

06

16

V

C3

5

10

uF

12

06

16

V

R7

1N

M

TP6

Re

d

C5

0

0.1

uF

R6

6

10

R

R1

8

NM

12

06

C7

0

1 n

F

50

V

06

03

C3

4

33

0u

F

8x1

0.2

6.3

V

C6

6

NM

C5

64

7n

F

C4

6N

M

Q1

5

MM

BT3

90

4LT

1

NM

SOT2

3

C3

6

0.1

u

D3

5

BA

T46

J N

M

SOD

32

3

D4

3

STP

S2L3

0U

FSM

B

Q2

0

Si2

32

5D

S

SOT2

3

1

3 2

Q1

3

TBD

SOT2

23

13

3

2

2

R7

2

10

0k

1%

Q2

4

STS4

NF1

00

SO8

4

51

6 7 8

2 3

U2

Fair

child

FO

D8

17

AS

41 2

3

R1

04

4.7

K

1%

TP1

7

Re

d

R6

4 0R

C2

3

47

0n

F 1

0% 50

V

06

03

C3

3

10

uF

12

06

16

V

Q2

3

MM

BTA

92

SOT2

3

TP1

8

Re

d

R1

03

51

0R

D5

3B

AT4

6J

SOD

32

3

R1

26

10

0K

D3

7

BA

T46

JSO

D3

23

RTN

AR

TN

AR

TN

RTN

AR

TN

RTN

RTN

RTN

RTN

AR

TN

RTN

VSS

PO

E+F SP

SA

T2P

SP

VAU

X

VAU

X

SA

VC

T2P

P_d

rain

P_s

ou

rce

P_g

ate

P_d

rain

P_s

ou

rce

P_g

ate

VC

An

od

eK

ath

od

e

Kat

ho

de

An

od

e

Vau

x P

RTN

Vin

Vin

P_d

rain

Vau

x P

RTN

Kat

ho

de

Vo V

gat

e

Vg

ate

SA

VSS

Vo

VSS

PO

E+F

Vo

ut

Po

wer

cir

cuit

Ou

tpu

t Fi

lter Fe

edb

ack

circ

uit

48

V A

UX

2

Inp

ut

Filt

er

Bo

ost

er

NO

TE fo

r R

esis

tors

Wh

ere

no

t in

dic

ated

th

e b

od

y is

06

03

an

d t

ole

ran

ce 5

% N

OTE

for

Cap

acit

ors

Wh

ere

no

t in

dic

ated

th

e b

od

y is

06

03

an

d t

he

volt

age

is 5

0V

NO

TE

The

AR

TN is

a d

edic

ated

pla

ne

of

sig

nal

gro

un

d t

hat

will

be

con

nec

ted

to

th

e R

TN p

ow

er g

rou

nd

pla

ne

clo

se t

o p

in 4

an

d 9

of

PM

88

03

Op

tio

n A

ctiv

e C

lam

p

Pre

ved

ere

foo

tpri

nt

12

06

,08

05

p

er C

40

I fo

otp

rin

t d

evo

no

ess

sere

il p

iu' p

oss

ibile

so

vrap

po

sti,

al fi

ne

di m

inim

izza

re lo

sp

azio

usa

to.

Op

to :u

n fo

otp

rin

t n

ell'a

ltro

SOT2

3-6

L

Alt

ern

ativ

e m

osf

et p

acka

ges

Alt

ern

ativ

e d

iod

e p

acka

ges

NO

TE fo

r Ju

mp

ers

JM1

an

d J

M2

Mo

ve t

he

sho

rt o

n b

oth

jum

per

s at

th

e sa

me

tim

e: -

sho

rt b

etw

een

pin

1 a

nd

3 w

hen

use

d A

UX

2 in

pu

t -

sho

rt b

etw

een

pin

2 a

nd

3 w

hen

use

d A

UX

1 in

pu

t.

For

PM

88

03

C o

nly

Pre

ved

ere

foo

tpri

nt

12

06

e 1

21

0 p

er C

51

NM

NM

Au

xilia

ry p

rese

nt

T2P

pre

sen

t

Op

tio

n B

oo

ster

Op

tio

n S

elf

Dri

ven

2 a

lter

nat

ive

po

wer

tra

nsf

orm

er

NM

NM

Page 29: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

DocID026206 Rev 1 29/30

AN4473 Revision history

30

6 Revision history

Table 4. Document revision history

Date Revision Changes

25-May-2015 1 Initial release.

Page 30: PoE synchronous flyback, IEEE802.3at compliant, 5V - 4A PD ... · GLOOP bandwidth > 3 kHz GLOOP phase margin at 0dB > 70 deg. GLOOP dB margin at 0 deg. > 10 dB. Main characteristics

AN4473

30/30 DocID026206 Rev 1

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.

No license, express or implied, to any intellectual property right is granted by ST herein.

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

© 2015 STMicroelectronics – All rights reserved