PCB Baking Webinar 180314 v2 - NPL - impact from science

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NPL Management Ltd - Internal

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Effectiveness of Baking to Remove Moisture from Between PCB Ground Planes

Martin Wickham & Owen Thomas

18th March 2014

NPL Management Ltd - Commercial

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http://www.new-expo.co.uk/newuk/conformalcoating


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18th March 2014



NPL & Electronics Interconnection

[email protected]/ei


About NPL …

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The UK’s national standards laboratory

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EI Group Research Areas

Tuesday, 18 March 2014 8

SIR testing

CAF

PCB Reliability

PCB Delamination

TinWhiskers

Plastic electronics& WEEE

InterconnectReliability

TinPest

Smart Textiles

MWCNTInterconnect

Conformal Coatings



Introduction

Baking removes moisture from PCB and reduces risk of delamination during the reflow stage.

Since going Pb-free, higher reflow temperature has increased risk of delamination

Moisture content usually determined from measurement of mass increase which does not determine where moisture is present.

This presentation covers delamination detection and measurement of moisture with capacitance sensors, experimental results for removing moisture from under ground planes and modelling to discuss further the effectiveness of baking in various situations.

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Moisture in PCBs

Four phase project

Detecting delamination

RIE measurements

Capacitance measurements

Modelling moisture diffusion behaviour

Project Partners

Aero Engine Controls

Artetch

BAe Systems

ESA

GE Fanuc

MBDA

Hansatech

Polar Instruments

Rolls Royce Marine

Selex Galileo



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Detecting delamination

Scanning Acoustic Microscopy Interesting results indicating delamination in areas not visually apparent System needs “tuning” for each PCB design Unable to image areas underneath components Capital cost relatively high


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Detecting delamination Principle of Pulsed Thermography

Fast sy stem but results require interpretation

Cannot v iew underneath components

Some promise in comparing test board to golden board

Possible to use digitial image correlation with this technique but set-up can be time consuming



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RIE Measurement

Route Impulse Energy

Uses Time Domain Reflectometry (TDR) to measure the difference in loss between two identically constructed PCB transmission lines of different lengths

Longer test line & shorter reference line, both with far ends open circuited

Identical step pulses are injected into each line and reflected step pulses captured

Ratio between the energies contained in reflected step pulses is proportional to extra loss introduced by additional length of test line


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1.8

1.9

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2.1

2.2

2.3

RIE Value

RIE for 2116 before and after reflow

RIE Measurement

Results show good correlation between RIE and moisture ingression Test pattern relatively large Opportunities for size reduction (50%)

Use of existing structures within PCB? Possible use for delamination measurement if delam occurs

between signal line and ground plane



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Capacitance Measurement

Moisture ingress changes the dielectric constant and hence also the capacitance between two electrodes separated by the PCB material.

Boards initially in 85ºC & 85% R.H. damp heat oven for 2 months.

Agilent 4263B LCR Meter

Cp @ 100kHz


Baking Temperature

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3 Bake Temperatures : 80oC, 110oC and 125oC

• Moisture diffuses out faster at higher bake temperatures

• Moisture diffuses out from smaller parallel plate capacitor fastest.



Capacitor Design - Size

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• Slotted design to allow water ingress

• 5 Capacitor Areas: 28, 60, 105, 180 & 410 mm2

28 mm2

All capacitor sizes tested proved to be capable to detect moisture content

410 mm2


Capacitor Design – Pattern

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• Grid design with gaps for holes

• 5 different designs:

No Holes

25 non PTH

25 PTH

13 PTH

4 PTH

Patterns not affecting abil ity to detect moisture content.

These patterns can be used to detect moisture under ground planes.



Effect of Resist on Mass and Capacitance Measurements

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• Capacitance change correlates well to mass change.• With resist, capacitance lags mass due to unable to accurately reflect

the initial decrease in mass from moisture exiting the resist layer.


Test Board C

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• 4 hole densities. 4 mm, 5.5 mm and 8 mm pitch between holes

• PTH and nonPTH



Water removal from under ground planes (1)

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Moisture diffuses out faster for nonPTH boards and for greater hole density due to greater surface area.


Water removal from under ground planes (2)

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Moisture diffuses out of corners of 3 by 3 array faster than at the center due to the edges contributing to moisture removal



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Non-PTH density- Experimental Results

Effect of non-PTH hole density on average capacitance (of the 9 capacitors) decrease for the test boards baked at:(a) 80°C, (b) 110°C and (c) 125°C.


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PTH vs non-PTH, 125°C

Non-PTH faster desorption

Comparison of bake time at 125C for three capacitor hole densities, corresponding to (a) 25 holes, (b) 13 holes and (c) 4 holes



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Experiment to modelling

Experimental data can be fitted from simple diffusion models.

Diffusion coefficient fitted to data at 80, 110 & 125 °C.

Using an Arrhenius relationship, the diffusion coefficient can be extrapolated to 20 °C.

With this material property, three scenarios have been studied to illustrate the effect of baking, and moisture desorption.

Plated and non plated through holes

Meshed ground planes

Simple ground plane which has been exposed to moisture but has not had time to fully equilibrate.


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PTH and non-PTH model

Cross section of through holes for a) non-PTH with copper plane on outer layers, b) PTH with copper plane on outer layers and c) PTH with internal copper planes (dimensions in

mm).



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PTH and non-PTH model

Equivalent baking at 125°C

Clearly the non-plated area is key to desorption

As the desorption path becomes more tortuous and restricted, so does

the bake time increase

Hole density, and

copper plane mesh open area have a significant impact

Non-PTH PTH outer ground planes PTH inner ground planes


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Modelling desorption in meshed ground planes

Initially saturated with moisture

Dif fusion coefficient of 33 mm2s-2 (simulate 125C baking of FR4)



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Mesh Ground Plane Example Time Lapse

2 hours 1 second


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Mesh Ground Plane Example Time Lapse

1 day 1 second

(12 faster)

~26 days to reduce to <5% initial moisture



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Mesh Examples

Snap shots showing loss of moisture during 125°C bake


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Mesh pitches & track width

For different mesh pitches, the bake time increases

as the track width increases due to the decrease in

the open surface area from which moisture can

escape.

The bake time is also seen to increase as the pitch

increases because moisture must travel a longer

horizontal distance before it can escape through one

of the open areas in the mesh.



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Baking can increase local moisture content

Simulation runs for equivalent of 120 days at 20oC

Shows the uptake of moisture

Dif fusion Coefficient 0.25 mm2s-2


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Baking at 125oC Diffusion Coefficient 33 mm2s-2



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Simplified double sided PCB with copper plane


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It takes a long time to drive moisture in between ground planes

Baking initially increases the moisture level at the centre of the ground plane



Store in a cool dry place

If the external water vapour pressure is greater than that in the PCB, then moisture will diffuse into the PCB. Similarly, if the internal vapour pressure is greater than that externally, then moisture will diffuse out of the PCB.

The saturation water vapour pressure increases with temperature, such that boards that are stored in high temperature and humidity environments absorb greater amounts of moisture than those stored in cooler environments making them more prone to delamination during the reflow process.

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Store in a cool dry place (2)

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Conclusions

Capacitance suitable for measuring moisture change in PCBs, 10% change in capacitance compared to 0.35% change in mass.

Capacitance sensors as small as 28 mm2 have been shown to be adequate in moisture detection.

Resist has little effect on the moisture uptake. Measurements under ground planes has shown PTH

and lower hole density both increase bake times. Variation in board thickness, composition and

measurement conditions also effect capacitance such that capacitance can only really be used for looking at moisture change. E.g. comparison between ‘as received’, pre bake and post bake.


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Conclusions

Modelling faster than experimental measurements Modelling allows visualisation of moisture diffusion

process under ground planes within a PCB Complicated ground plane structures can be

modelled and bake out times predicted. If a board is left in the environment, moisture will

ingress up to the external vapour density. This may take weeks/years/decades depending on the design of a PCB.

If the PCB is kept in a dry environment it won’t need to be baked!

24 hour baking is not a panacea for removing moisture


http://www.new-expo.co.uk/newuk/conformalcoating

Coating & Cleaning Seminar April 8-10th

Tuesday 8th April10.30 Design Rules for Conformal Coating and Cleaning11.30 Clean or No Clean for Conformal Coating Reliability1.30 Selecting a Coating Based on Product and Environment2.30 Reworking Conformal Coating and Component Damage3.30 Process and Field Failures with Coatings

Wednesday 9th April10.30 Dip or Spray Coating Advantages and Disadvantages

11.30 IPC, ESA and NASA Inspection Requirements for Coating1.30 In Process Quality Control for Conformal Coating PCBs2.30 Cleaning Printed Board Assemblies for Coating3.30 Confirming Component Compatibility with Cleaning Materials

Thursday 10th April10.30 In House or Contract Coating – Cost and Implementation11.30 PCB Contamination Testing Options for Coated Boards1.30 Test Methods for Conformal Coating Reliability2.30 Conformal Coating Defects Causes and Cures

Presentations are 15-20 mins maximum during the show http://www.new-ex po.co.uk/newuk/conformalcoating


The coating & cleaning posters have been used in Europe by Lars Wallin [email protected] and yourpresenter on cleaningworkshops. Free IPCcolour poster guide oncleaning standards andcoating plus yourchance to win a set of IPC standards at NEW

NPL Webinars

Tues 10 June 2014

Solderability Assessment ‐ Testing, Ageing and Practical Impact on Assembly Yield

Wed 10 September 2014

Using Surface Insulation Resistance (SIR) to Qualify Production Processes & Materials



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18th March 2014

[email protected]/ei

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PCB Baking Webinar 180314 v2 - NPL - impact from science