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Operating Systems: Components and Duties Ref: & Silberschatz, Gagne, & Galvin, Operating

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  • Operating Systems:Components and Duties

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)NOTE: this lecture and the next two lectures are intended to provide an overview of OS concepts important to the study of embedded systems. For more comprehensive information, please visit the website listed at the bottom of the slides and the material accessible there.

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • What is an Operating System?A program that acts as an intermediary between a user of a computer and the computer hardware.

    Operating system goals:Execute user programs and make solving user problems easier.Make the computer system convenient to use.

    Use the computer hardware in an efficient manner.Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • System ComponentsThe operating system runs in kernel or supervisor mode - protected from user tamperingCompilers, editors and application programs run in user modeInstruction Set ArchitecturePhysical devices grouped together to form functional unitsIntegrated circuit chips, power supply, CRTHides the complexity of machine language from programmerRef: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • Functions of an OSUser Environment - OS layer transforms bare hardware machine into higher level abstractionsExecution environment - process management, file manipulation, interrupt handling, I/O operations, language.Error detection and handlingProtection and securityFault tolerance and failure recovery

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • Functions of an OS (continued)Resource ManagementTime managementCPU and disk transfer schedulingSpace management main and secondary storage allocationSynchronization and deadlock handlingIPC, critical section, coordinationAccounting and status informationresource usage tracking

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • Typical memory layoutSeveral jobs are kept in main memory at the same time, and the CPU is multiplexed among them. OS tasks:Memory management the system must allocate the memory to several jobs.CPU scheduling the system must choose among several jobs ready to run.Allocation of devices.

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • Real-Time SystemsDesigned for a dedicated application such as scientific experiments or industrial processes, medical imaging and devices, consumer products, avionics, and automobilesResponsibilities have well-defined, fixed time constraintsHard real-time:MISSED DEADLINE IS A SYSTEM FAILURESecondary storage limited or absent, data stored in short term memory, or read-only memory (ROM)Not supported by general-purpose operating systems.Firm real-timeOCCASIONAL MISSED DEADLINES ARE TOLERABLE but quality of service may degradea result is useless if it is provided after the deadlineSoft real-timeThe usefulness of a result and the quality of service degrade if the result is provided after the deadline System may attempt to maximize the number of deadlines met or the number of high-priority tasks meeting their schedules or to minimize the lateness of tasks, for example Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • Computer-System OperationStarting up a computerInitial program, or bootstrap program, is runStored in ROM or EPROM within the computer hardwareInitializes all aspects of the computer (registers, controllers, memory etc.)Loads the operating system and executes itLocates and loads the OS kernelOnce loaded, the OS waits for an event to occurEvents usually signaled by an interrupt from either the hardware or softwareHardware sends a signal to the CPU via the system busSoftware triggers an interrupt by executing a system call

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • Device ControllerA computer system typically consists of a CPU and multiple device controllers connected through a common bus

    Each device controller is in charge of a specific device or multiple devices (e.g. SCSI controller)

    Device controller maintains local buffer storage and a set of special purpose registers

    The device controller moves data between the device it controls and its local buffer storageRef: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • InterruptsInterrupts enable software to respond to signals from hardwareMay be initiated by a running processInterrupt is called a trap software generated caused by error or user request for an OS serviceDividing by zero or referencing protected memoryMay be initiated by some event that may or may not be related to the running processKey is pressed on a keyboard or a mouse is movedLow overheadPolling is an alternative approachProcessor repeatedly requests the status of each deviceIncreases in overhead as the complexity of the system increasesRef: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • Handling Interrupts

    After receiving an interrupt, the processor completes execution of the current instruction, then pauses the current processThe processor will then transfer to a fixed location and executes the service routine for the interruptThe interrupt handler determines how the system should respondInterrupt handlers are stored in an array of pointers called the interrupt vectorTo handle the interrupt quickly, a table of pointers is generally stored in low memory which hold the addresses of the ISR for the various devicesThis array, or interrupt vector, of addresses is then indexed by a unique device number to provide the address of the ISR for the interrupting deviceAfter the interrupt handler completes, the interrupted process is restored and execution continues from the address of the interrupted instruction (stored on stack) or the next process is executed

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • Interrupt ClassesRef: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)EXAMPLE: Intel IA-32 exception classes

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • EXAMPLE: Intel IA-32 exception classes (continued)Interrupt Classes Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

    Ref: http://userhome.brooklyn.cuny.edu/irudowdky/OperatingSystems.htm & Silberschatz, Gagne, & Galvin, Operating Systems Concepts, 7th ed, Wiley (ch 1-3)

  • I/O InterruptsTo start an I/O operation, the CPU loads the appropriate registers within the device controllerThe device controller examines the values and determines what action to take (e.g. read, write)When