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7/27/2019 m.tech Final Ized Syllabus
1/24
M.Tech. Syllabus
InSignal Processing and VLSI
7/27/2019 m.tech Final Ized Syllabus
2/24
I semester
Semester I
Subject : Linear Algebra Hours Per Week : 04
Subject Code : 10MECS101 Credits : 04
Chapter1
Linear Models in Economics and Engineering, Systems of Linear Equations, Row Reduction
and Echelon Forms, Vector Equations, The Matrix Equations, The Matrix Equation Ax=b,
Solution Sets of Linear Systems, Application of Linear Systems, Linear Independence,
Introduction to Linear Transformations, The Matrix of a Linear Transformation, Linear
Models in Business, Science, and Engineering Supplement Exercises.
Chapter2
Computer Models in Aircraft Design, Matrix Operations, The Inverse of Matrix,
Characterizations of Invertible Matrices, Partitioned Matrices, Matrix Factorizations, The
Leontief Input-Output Model, Applications to Computer Graphics, Subspaces of R,Dimension and Rank, Supplementary Exercise.
Chapter3
Determinants in Analytic Geometry, Introduction Determents, Properties of Determinants,
Cramers Rule Volume, and Liner Transformations, Supplementary Exercises.
Chapter4
Space Flight and Control Systems, Vector Space Column Spaces, and Linear
Transformations, Linearly Independent Sets, Bases, Coordinate Systems, The Dimension of
Vector Space, Rank, Change of Basis, Applications to Difference Equations, Applications to
Markov Chains, Supplementary Exercise.
Chapter5
Dynamical Systems, and Spotted Owls, Eigen vectors and Eigen values, The Characteristic
Equation, Diagonalization, Eigen vectors and Linear Transformations, Complex Eigenvales,
Discrete Dynamical Systems, Applications to Differential Equations, Iterative Estimates for
Eigen values, Supplementary Exercise.
Chapter6
Readjusting the North American Datum, Inner Product, Length and Orthogonality,
Orthogonal Sets, Orthogonal Projections, The Gram-Schmidt Process, Least-Squares
Problems, Applications to Linear Models, Inner Product Spaces, Applications of InnerProduct Spaces Supplementary Exercises.
Text Books:
1. David Lay, Linear Algebra and its Applications, Pearson Education, 3/e.
Reference:
1. Hoffman and Kauze, Linear Algebra, Pearson Education, 2/e.
Subject : Fault Tolerant circuits: Analysis & Design Hours Per Week : 04
7/27/2019 m.tech Final Ized Syllabus
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Subject Code : 10MECS102 Credits : 04
Chapter1
Threshold Logic, Introductory Concepts, Synthesis of Threshold Networks.
Chapter2
Reliable Design and Fault Diagnosis,Hazards, Fault Detection in Combinational Circuits,
Fault-Location Experiments, Boolean Differences, Fault Detection by Path Sensitizing,
Detection of Multiple Faults, Failure-Tolerant Design, Quadded Logic.
Chapter3
Capabilities, Minimization, and Transformation of Sequential Machines, The Finite- State
Model- Further Definitions, Capabilities and Limitations of Finite State Machines, State
Equivalence and Machine Minimization, Simplification of Incompletely Specified Machines.
Chapter4
Structure of Sequential Machines, Introductory Example, State Assignments Using Partitions,
The Lattice of closed Partitions, Reductions of the Output Dependency, Input Independence
and Autonomous Clocks, Covers and Generation of closed Partitions by state splitting,
Information Flow in Sequential Machines, Decompositions.
Chapter5
StateIdentifications and Fault-Detection Experiments, Experiments, Homing Experiments,
Distinguishing Experiments, Machine Identification, Fault-Detection Experiments.
Text Books:
1) Switching and Finite Automata Theory By Zvi Kohavi 2nd Edition. Tata McGraw
Hill Edition.
Reference books:
1) Digital Circuits and logic Design: By Charles Roth Jr.
Subject : CMOS VLSI DESIGN Hours Per Week : 04
7/27/2019 m.tech Final Ized Syllabus
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Subject Code : 10MECS103 Credits : 04
Chapter1
Introduction, MOS device design equations, Complementary CMOS Inverter-DCcharacteristics, Static Load MOS Inverters, Differential Inverter, Transmission Gate, Tri-state
Inverter, Bipolar devices; CMOS Processing Technology
Silicon semiconductor technology: An overview, basic CMOS technology, CMOS process
enhancements, Layout Design rules, Latch-up, Technology related CAD issues; Circuit
Characterization and performance Estimation
Resistance Estimation, Capacitance Estimation, Inductance, Switching Characteristics,
CMOS gate transistor sizing, Power dissipation, sizing routing conductors, charge sharing;
Scaling of MOS circuits Scaling principles, Interconnect layer scaling, Scaling models and
scaling factors, scaling factors for device parameters, some discussion on scaling, and
limitations of scaling.
Chapter 2
Introduction, CMOS Logic Gate Design, Basic Physical Design of Simple Logic Gates,
CMOS Logic Structures; Sequential circuit design: Sequencing static circuits, circuit design
of latches and flip-flops, static sequencing element methodology, sequencing dynamic
circuits, synchronizers; Clocking Strategies, I/O Structures, Low power Design
Chapter 3
Introduction, Data path operations- Addition/ subtraction, Parity Generators, Comparators,
Zero/one detectors, Binary counters, Boolean operations-ALUs, Multiplication, Shifters,
Memory Elements, Control-FSM, Control Logic Implementation
Chapter 4
VLSI System design: IP-Based design, Low power gates, Gates as IP, Combinational logic
networks: standard cell based layout, Combinational network delay, Logic and interconnect
design, Power optimization, FPGAs, Programmable logic arrays,
Reference books:
1. PRINCIPLES OF CMOS VLSI DESIGN NEIL WESTE & KAMARAN
ESHRAGHIAN
2. CMOS DIGITAL INTEGRATED CIRCUTIS Analysis and Design- SUNG-MO-
KANG & YUSUF LEBLEBICI
3. CMOS VLSI DESIGN- NEIL WESTE & DAVID HARRIS & AYAN BANERJEE
4. MODERN VLSI DESIGN (IP BASED DESIGN)- WAYNE WOLF
5. MODERN VLSI DESIGN (SOC DESIGN)-WAYNE WOLF
Subject : Low Power VLSI Design Hours Per Week : 04
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Subject Code : 10MECS104 Credits : 05
Chapter1
Introduction, Low power Design: An overview, Low Voltage, Low-Power Design
Limitations, Silicon-On-Insulator (SOI),From Devices to Circuits.
Chapter2
Isolation in BiCMOS, Typical Analog/Digital BiCMOS Process, Deep Submicron Process.
(Excluding 2.4.2.3, 2.4.2.4, 2.4.3, 2.6.2 to 2.6.4)
Chapter3
Device & Technology Impact on Low Power: Dynamic dissipation in CMOS, Transistor
sizing & gate oxide thickness, Impact of technology Scaling, Technology & Device
innovation.
Power estimation, Simulation Power analysis: SPICE circuit simulators, gate level logic
simulation, capacitive power estimation, static state power, gate level capacitance estimation,architecture level analysis, data correlation analysis in DSP systems, Monte Carlo simulation.
Probabilistic power analysis: Random logic signals, probability & frequency, probabilistic
power analysis techniques, signal entropy.
Chapter4
Low Power Design
Low-Power CMOS Logic Circuits: Introduction, Low-Power Deign Through Voltage
Scaling, Estimation and Optimization of Switching Activity, Reduction of Switched
Capacitance.
Circuit level: Power consumption in circuits. Flip Flops & Latches design.Logic level: Gate reorganization, signal gating, logic encoding, state machine encoding, pre-
computation logic
Chapter 5
Low power Architecture & Systems: Power & performance management, switching
activity reduction, parallel architecture with voltage reduction, flow graph transformation,
low power arithmetic components, introduction to low power memory design.
Low power Clock Distribution: Power dissipation in clock distribution, single driver Vs
distributed buffers, Zero skew Vs tolerable skew, chip & package co design of clock network.
Algorithm & Architectural Level Methodologies: Introduction, design flow, Algorithmic
level analysis & optimization, Architectural level estimation & synthesis.
Reference Books:
1) CMOS/BiCMOS ULSI Low Voltage, Low Power by Kiat-Seng Yeo/ Samir S.
Rofail/Wang-Ling Goh.
2) Kaushik Roy, Sharat Prasad, Low-Power CMOS VLSI Circuit Design Wiley, 2000
3) Gary K. Yeap, Practical Low Power Digital VLSI Design, KAP, 2002
4) Rabaey, Pedram, Low Power Design Methodologies Kluwer Academic, 1997
ELECTIVE I
7/27/2019 m.tech Final Ized Syllabus
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Subject : Testing and Testability Hours Per Week : 04
Subject Code : 10MECS151 Credits : 04
Chapter1Introduction: Problem of testing, necessity and complexity. Fault-classifications,
Classifications of faults based on their locality and period, shorts, opens, and bridging fault,
Logical Fault Models Fault detection Fault Location Fault dominance, fault-modeling,
stuck at fault model, single stuck fault model and multiple stuck fault model.
Chapter2Types of testing, Elementary testing concepts and techniques, Test Algorithms-pathsensitization method, Boolean differences method, D-algorithm, PODEM and FAN
Chapter3
Testing of sequential circuits, Testing of PLAs: Stuck-at vs. cross-point fault model.TestablePLA Designs
Chapter4Fault simulation: Need and techniques for fault-simulation. Concept of even drivensimulation. Serial fault-simulation. Parallel fault simulation. Parallel pattern fault simulation.Deductive fault simulation. Concurrent fault simulation.
Chapter5Delay models, Effect of delays on the logic of the circuit. Delay modeling for Gates, delaymodeling for functional elements, gate-level event-driven simulation.
Chapter6
Memory testing: Classification of memory faults. Testable Memory Design - Various
memory testing techniques.
Chapter7Built-in-self-test: Need and associated problems, test pattern generation for BIST, CircularBIST BIST Architectures , built-in-logic-block observation, self testing using MISR and
parallel SRSG, concurrent BIST architecture, Theory of LFSRs and their uses in testing.Signature analysis techniques, Exhaustive and pseudo-exhaustive testing.
Chapter8Design for testability: Need and problems, Adhoc techniques, controllability andobervability, LSSD techniques,Generic scan based designs- Full serial integrated scan,isolated serial scan, nonserial scan.
Text Books1) Digital system testing and testable design, Abramovici, Breuer, Frieddman Digital
circuit testing and testability, PK LalaReference Books
1) Digital logic testing and simulation By Miczo2) Fault-tolerant computing, Ed.D.K. Pradhan
3) Boundary Scan Test: A practical approach, Blecker, Eijinden, Jang.Subject : System Modeling and Simulation Hours Per Week : 04
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Subject Code : 10MECS152 Credits : 04
Chapter1The nature of Simulation, definition of system models and simulation, structure of simulation
models, advantages of simulation, steps on a simulation study, classification of simulationmodels, examples of discrete event simulation, continuous simulation and Monte Carlosimulation- simulation queuing, system inventory control and forecasting.
Chapter2Selecting input probability distributions, random number generators, testing of randomnumber generator, generating random varieties for standard distributions, output analysis fora single system, Comparing alternative system Configuration, experimental design andoptimization, design and evaluation of simulation experiments.Chapter3GPSS General description, facilities, storages, queues, transfer blocks, control statements,
varieties logic switches, Boolean variables, functions, concept of user chains facilitypreemption, matching.
Chapter4Introduction to SIMSSCRIPT and MODSIM III
Text Books:1) Simulation Modeling and Analysis Averill M Law, W. David Keltron,
McGraw Hill.2) System Simulation Geoffray Gorden PHI3) Systems Simulation, the Art and Science Robert E Shannon PHI.
4) An Introduction to Simulation using GPSS/H Thomas J Schriber, John Wiley.
Reference Books:5) Digital Computer Simulation Fred Maryaski CBS6) System Simulation with Digital Computer N Deo PHI7) System Simulation Payne McGrew Hill- Kogakusha8) Computer Simulation Waston and John H Blackstone John Wiley.9) Discrete Event System Simulation Banks, Carson and Nelson PHI
Subject : Digital Control Systems Hours Per Week : 04
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Subject Code : 10MECS153 Credits : 04
Chapter1Introduction
Chapter2Sampling and data Reconstruction, effect of quantization
Chapter3Z-Transforms
Chapter4Analysis of Linear sample data
Chapter5Sate variable techniques
Chapter6Stability Criteria (RH, BT, Jurys, Raibles & Root locus for DCS)
Chapter7Application to Computer control systems
Text Books:1)Digital Control Systems by B.C. Kuo, MGH
Reference Books:
1) Digital Control by R Iserman2) Digital Control Using Microprocessors by Paul Katz.
Subject : Probability Theory & Random Variables Hours Per Week : 04
7/27/2019 m.tech Final Ized Syllabus
9/24
Subject Code : 10MECS154 Credits : 04
Chapter1
Sample space, Field or Algebra, Events, Axioms of Probability, Elementary Properties ofProbability, Problems on Elementary Probability Theory, Conditional Probability, Relative
frequency Interpretation, Properties of conditional probability, Product Rule, Problems on
Product Rule.
Chapter2
Total Probability, Bays Theorem, Problems on Total Probability and Bayes Rules.
Independent Events, Properties of Independent Events, Problems on Independent Events.
Chapter3
The Probability Distribution Function, Examples of CDF, Relative frequency interpretation
of CDF, Properties of CDF, Classification of Random Variables, Tis Dirac Delta Function.The Density Function, Properties of PDF, Relative frequency interpretation of PDF, Problems
on CDF and PDF.
Chapter4
Distribution function of y=g(x), Density function of Y=g(x), Problems on finding CDF &
PDF of Y=g(x), Mean value and Variance of an R.V, Mean value of an R.V, Properties of
expected value, Variance of a random variable, Properties of variance, Problems on man and
variance, Moments of R.V, Relation between mk and k, Two inequalities, Further
Characterization of an R.V, Characteristic functions, Moment generating functions, Problems
on moment generating functions.
Chapter5
Binomial Distribution, Mean and variance of Binomial r.v, MGF of Binomial
R.V.Problems on Binomial distribution, Poisson Distribution, Mean and variance of problem
R.V, MGF of Poisson R.V., Problems on Poisson Distribution, Negative Binomial
Distribution, Geometric Distribution, Mean and variance of Geometric R.V,MGF of
Geometric R.V, Problems on Geometric Distribution.
Text Book:
1. Dr.P.S. Sathyanarayana, Probability, Information and Coding Theory, Dynaram
Publications.
Reference Book:
Mayer, Statistical Probability Theory and Applications.
Semester II
7/27/2019 m.tech Final Ized Syllabus
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Subject: Advanced Digital Signal Processing Hours Per Week: 04
Subject Code: 10MECS201 Credits: 05
Chapter1
Review of digital Filters
Chapter2Basic multirate operations, polyphase representation, multistage implementations.Lab excersice on the above topics
Chapter3A Simple alias free QMF system, Power symmetric QMF banks, perfect reconstruction(PR) systems, tree structured filter banks.Lab excersice on the above topics
Chapter4
Two channel FIR paraunitary QMF banks, M-Channel FIR paraunitary filter banks.
Chapter5Lattice structure for linear phase FIR PR QMF banks.Lab excersice on the above topics
Chapter6Cosine modulated filter banks, design of psuedo QMF bank, efficient polyphasestructures.
Chapter7The Wavelet transform and its relations to multirate filter banks.Lab excersice on the above topics
Text Books:1)Multirate Systems and Filter Banks By Vaidyanathan PP2)Multirate Digital Signal Processing By Filege N.J & Johan Wiley,
Subject : Analog and Mixed VLSI design Hours Per Week : 04
7/27/2019 m.tech Final Ized Syllabus
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Subject Code : 10MECS202 Credits : 04
Chapter1Introduction to CMOS Analog Circuits : MOS transistor DC and AC small signalparameters from large signal model,Single stage amplifier: Common Source Amplifier, Common drain and Commongate amplifiers : with resistive load, diode load and current source load, Sourcefollower, Common gate amplifier, Cascode amplifier, Folded Cascode, Frequencyresponse of amplifiers, Current source/sink/mirror, Matching, Wilson current source andRegulated Cascode current source, Band gap reference,
Chapter2Analysis of analog circuits: Stability and Frequency response, Nonlinear andmismatching, noise analysis, band gap reference.
Chapter3
Differential Amplifier, Gilbert cell, Op-Amp, Design of 2 stage Op-Amp,DC and ACresponse, Frequency compensation, slew rate, Offset effects, PSRR, Noise, Comparator
Chapter4Sense Amplifier, Sample and Hold, Sampled data circuits, Switched capacitor filters,DAC, ADC, RF amplifier, Oscillator, PLL, Mixer.
Chapter5Short channel effects and Submicron process flow
1. Razavi B., Design of Analog CMOS Integrated Circuits, McGraw Hill, 20012. R. Jacob Baker,CMOS: Mixed-Signal Circuit Design, John Wiley, 2008
3. Baker, Li, Boyce, CMOS: Circuit Design, Layout and Simulation, Prentice Hall ofIndia, 20004. E. Allen, Douglas R. Holberg, CMOS Analog circuit Design5. Grey and Meyer, Analog Circuit Design6. R. Jacob Baker,CMOS: Mixed-Signal Circuit Dedsign; Volume II.
Subject : Adaptive Signal Processing Hours Per Week : 04
7/27/2019 m.tech Final Ized Syllabus
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Subject Code : 10MECS203 Credits : 05
Chapter1Linear estimation of Signals Predication, Filtering, Smoothing, co-relation cancellation,wiener filter, recursive LMS estimation, Kalman filter. Lab excersice on theabove topics
Chapter2Adaptive filtering, delay line structure, Least Mean Squares (LMS) & Recursive LeastSquares (RLS) algorithms and their convergence performance.
Chapter3IIR Adaptive filtering & transform domain filtering.Lab excersice on the above topics
Chapter4
Applications- Noise & Echo cancellation, Side lobe nulling in Antennas, Channelidentification & Equalization.Lab excersice on the above topics
Text Books:1)Adaptive Filters Theory & Applications By B. Farhang Boroujeny, PHI, 19982) Adaptive filter Theory By Haykins S. PH USA, 1996.
Subject : Digital Signal Compression Hours Per Week : 04
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Subject Code : 10MECS251 Credits : 04
Chapter1
Algorithms for VLSI Design Automation: Introduction to Design Methodologies, The VLSI
Design problem, The Design Domains, Design Actions, Design methods and technologies.
A quick tour of VLSI Design Automation Tools, Algorithmic and System Design,
Structural and Logic Design, Transistor level design, Layout Design, Verificationmethods, Design Management Tools. Algorithmic graph theory and computational
complexity, Terminology, Data structures for the representation of graphs,
Computational complexity, Examples of graph algorithms, Depth first search, Breadth
first search, Dijkstras shortest path algorithm, Frims algorithm for minimum spanning
trees.
Chapter2
Tractable and Intractable problems, Combinatorial optimization problems, Decision
problems, Complexity classes, NP completeness and NP hardness, Consequences.
Layout Compaction, Design rules, Symbolic layout, Problem formulation, Application of
compaction, Informal problem formulation, Graph theoretical formulation, Maximum
distance constraints, Algorithms for constraint graph compaction, A longest pathalgorithm for DAGS, The longest path in graph with cycles, The Liao wong algorithm,
The Bellman Ford Algorithm, Discussion shortest paths, longest paths and time
complexity, Other Issues.
Chapter3
Partitioning for Synthesis, Software versus Hardware, General Guidelines, TechnologyIndependence, Clock Related Logic, No Glue Logic at the Top, Module Name Same as FileName, Pads Separate from Core Logic, Minimize Unnecessary Hierarchy, Register AllOutputs, Guidelines for FSM Synthesis, Logic Inference, Incomplete Sensitivity Lists,Memory Element Inference, Multiplexer Inference, Three-State Inference, OrderDependency, Environment and Constraints, Design Environment, Design Constraints,Advanced Constraints, Clocking Issues, Pre-Layout, Post-Layout, Generated Clocks,
Design Space Exploration, Total Negative Slack, Compilation Strategies, Top-DownHierarchical Compile, Time-Budgeting Compile, Compile-Characterize-Write-Script-Recompile, Design Budgeting, Resolving Multiple Instances, Optimization Techniques,Compiling the Design, Flattening and Structuring, Removing Hierarchy, Optimizing ClockNetworks, Optimizing for Area; Physical synthesis: Initial Setup, Important Variables,Modes of Operation, RTL 2 Placed Gates, Gates to Placed Gates, Other PhyC Commands,Physical Compiler Issues, Back-End Flow.
Chapter4
Placement and partitioning, Circuit representation, Wire length estimation, Types of
placement problem, Placement Algorithms, Constructive placement, Iterative
improvement, Partitioning, The Kernighan Lin partitioning Algorithm. Floor planning,
Floor planning concepts, Terminology and floor plan representation, Optimization
problems in floor planning, Shape functions and floor plan sizing. Routing, Types oflocal routing problems, Area routing, Channel routing, Channel routing models, The
vertical constraints graph, Horizontal constraints and the left-edge algorithm Channel
routing algorithm, Introduction to global routing, Standard cell layout, Building lock
layout and channel ordering, Algorithms for global routing, Problem definition and
discussion, Efficient rectilinear Steiner tree construction, Local transformations for global
routing.
Text Book:
1) ASIC By Michael John Sebistion Smith2) ADVANCED ASIC CHIP SYNTHESIS by Himanshu Bhatnagar
ELECTIVE IISubject : Operating System and RTOS Hours Per Week : 04
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Subject Code : 10MECS252 Credits : 04
Chapter1
Introduction to process and CPU scheduling; Fundamental concepts of multi-programmed OS, Implementation techniques, Microkernel architecture of OS. Basic
concepts of threads, Types of threads, Multithreading and Thread implementation.
Chapter2
Interprocess synchronization and communication (critical section problem,
Sema-phore monitor) Dead Locks. Interrupt Service routines, device drivers, Protection
and security.
Chapter3
Introduction to parallel processing. Pipeline processing and distributed system and
computing.
Chapter4
Introduction RTOS, comparison between general OS and RTOS, design concepts of
RTOS.
Chapter5
Case studies: Windows 2000-Server, Linux, RT linux, Vx-Works, etc...
Text Books:
1) Operating System Concepts By Silberschatz & Galvin 6th / 7th Edition.
2) Parallel Computer Architecture By David Culler.
3) Modern Operating Systems By Andrew S Tanenbaum.
4) Real time systems By CM Krishna
5) Embedded Systems By Rajkamal
ELECTIVE IISubject : Artificial Neural Networks Hours Per Week : 04
7/27/2019 m.tech Final Ized Syllabus
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Subject Code : 10MECS253 Credits : 04
Chapter1Introduction: Models of a Neuron, Neural Networks viewed as directed graphs, Feedback,Networks Architectures, knowledge representation, Artificial intelligence and Neural
Networks.
Chapter2
Learning Processes:Error Correction, Memory based, Hebbian, Competitive, Boltzmannlearning methods. Learning with a teacher and without a teacher, memory, Adaptation,Statistical nature of the learning process, Statistical Learning theory.
Chapter3Supervised learning: Single Layer Networks, Perceptions, Linear separability, perceptrontraining algorithm, Guarantee of success modifications. -Multilayer Networks I, Multileveldiscrimination, preliminaries, back propagation algorithm, Setting parameter values,Theoretical results, Acceleration of learning process and Applications.
Chapter4Multilayer Networks II: Madalines, Adaptive multilayer networks, prediction networks,RBF, polynomial networks and regularization.
Chapter5Unsupervised Learning: Winner-Take-All Networks, Learning Vector quantities, Counterpropagation networks, Adaptive resonance theory, Topologically organized networks,Distance based learning neocognition, principal component analysis networks.
Chapter6Associative Models: Non-iterative procedure for Association, Hopfield Networks, Brain-
State-in-a-Box Network, Boltzmann Machines and Hetero associators.
Chapter7
Optimization Methods: Optimization using Hopfield Networks, Iterated gradient descent,simulated annealing, Random search, Evolutionary Computation.
Text Books:1) Neural Networks: A Comprehensive Foundation by Simon Haykin Prentice Hall, NJ2nd Edition.
2) Elements of Artificial Neural Networks by Kishan Mehrotra, Chilukuri K Mohan &Sanjay Ranka, Penram International Publisher (India) Pvt.Ltd.
Reference Books:1) Artificial Neural Networks by B. Yagnanarayana, PHI,2) Artificial Neural Networks by Robort J. Schalkoff MGH international edition.
ELECTIVE II
Subject : Pattern Recognition Hours Per Week : 04
7/27/2019 m.tech Final Ized Syllabus
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Subject Code : 10MECS254 Credits : 04
Chapter1
Introduction: Applications of pattern recognition, statistical decision theory, imageprocessing and analysis.
Chapter2
Probability: Introduction, probability of events, random variables, Joint distributions and
densities, moments of random variables, estimation of parameters from samples,
minimum risk estimators.
Chapter3
Statistical Decision Making: Introduction, Bays Theorem, multiple features, conditionally
independent features, decision boundaries, unequal costs of error, estimation of error
rates, the leaving-one-out technique, characteristic curves, estimating the composition
of populations.
Chapter4
Nonparametric Decision Making: Introduction, histograms, Kernel and window
estimators, nearest neighbor classification techniques, adaptive decision boundaries,
adaptive discriminant functions, minimum squared error discriminant functions, choosing
a decision making technique.
Chapter5
Clustering: Introduction, hierarchical clustering, partitional clustering.
Chapter6Artificial Neural Networks: Introduction, nets without hidden layers, nets with hidden
layers, the back propagation algorithms, Hopfield nets, an application.
Chapter7
Processing of Waveforms and Images: Introduction, gray level scaling transformations,
equalization, geometric image and interpolation, smoothing transformations, edge
detection, Laplacian and sharpening operators, line detection and template matching,
logarithmic gray level scaling, the statistical significance of image features.
Text Books:
1) Pattern Recognition and Image Analysis Eart Gose, Richard Jonsonbaugh and
Steve Jost Prentice-Hall of India-2003.
Semester III
Subject : DSP algorithm implementation in VLSI Hours Per Week : 04
7/27/2019 m.tech Final Ized Syllabus
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Subject Code : 10MECS301 Credits : 05
Chapter1Introduction to Digital Signal Processing Systems, Behavior and Architecture:Dedicated and Programmable VLSI architectures, Instruction sets and throughenhancement techniques (Parallelism, pipelining, cache, etc.)
Chapter 2DSP Architecture Concepts: Typical DSP instruction set and its VLSI implementation
Dedicated Hardware Architecture Concepts: Example and Case studies. Dedicated
DSP architecture Concepts: Synthesis, Scheduling and Resource allocation,
Conventional Residue number, distributed arithmetic architecture
Chapter 3Iteration Bound, Pipelining and Parallel Processing, Retiming, Unfolding, Folding, SystolicArchitecture Design, Fast Convolution, Algorithmic Strength Reduction in Filters and
Transforms, Pipelined and Parallel Recursive and Adaptive Filters, Scaling and Round offNoise, Digital Lattice Filter Structures, Bit-Level Arithmetic Architectures, RedundantArithmetic, Numerical Strength Reduction, Synchronous, Wave, and AsynchronousPipelines, Low-Power Design, Programmable Digital Signal Processors.Lab excersice on the above topics
Chapter 4
DSP kernels implementation architecture, Hardware multiplier-based and multiplex-lessarchitectures Different implementation styles, several algorithmic and architecturaltransformations, implement weighted-sum based DSP kernels. Programmable DSP-basedimplementation; Programmable processors with no dedicated hardware multiplier;Implementation using hardware multiplier(s) and adder(s); Distributed Arithmetic (DA)-based implementation; Residue Number System (RNS)-based implementation; andMultiplier-less implementation (using adders and shifters), fixed coefficient DSP kernels.Analysis of several algorithmic and architectural transformations, Classification of thetransformations based on the properties that they exploit and their encapsulation.Lab excersice on the above topics
Chapter 5Data converter modeling, SNR, Noise shaping, implementation of data converters,integrator based CMOS filters.Lab excersice on the above topics
Reference Books:1. VLSI Synthesis of DSP Kernels: Algorithmic and Architectural Transformations by
Mahesh Mehendale, Sunil D. Sherlekar.2.VLSI Digital Signal Processing Systems: Design and Implementation by Keshab K.Parhi
3. Lars Wanhammar, DSP Integrated Circuits, Academic Press 1999.
4. Mixed-signal and DSP Design Techniques (Analog Devices) byWalt Kester5. CMOS Mixed Signal Circuit Design Volume II by R. Jacob Baker
Subject : STATISTICAL SIGNAL PROCESSING Hours Per Week : 04
Subject Code : 10MECS302 Credits : 04
http://www.amazon.com/exec/obidos/search-handle-url/ref=ntt_athr_dp_sr_1?_encoding=UTF8&sort=relevancerank&search-type=ss&index=books&field-author=Walt%20Kesterhttp://www.amazon.com/exec/obidos/search-handle-url/ref=ntt_athr_dp_sr_1?_encoding=UTF8&sort=relevancerank&search-type=ss&index=books&field-author=Walt%20Kesterhttp://www.amazon.com/exec/obidos/search-handle-url/ref=ntt_athr_dp_sr_1?_encoding=UTF8&sort=relevancerank&search-type=ss&index=books&field-author=Walt%20Kester7/27/2019 m.tech Final Ized Syllabus
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Chapter1
Random Processes: Random variables, random processes, white noise, filteringrandom processes, spectral factorization, ARMA, AR and MA processes.
Chapter2
Signal Modeling: Least squares method, Pad approximation, Prony's method, finitedata records, stochastic models, Levinson-Durbin recursion; Schur recursion; Levinsonrecursion.
Chapter3Spectrum Estimation: Nonparametric methods, minimum-variance spectrumestimation, maximum entropy method, parametric methods, frequency estimation,principal components spectrum estimation.
Chapter4
Optimal and Adaptive Filtering: FIR and IIR Wiener filters, Discrete Kalman filter, FIRAdaptive filters: Steepest descent, LMS, LMS-based algorithms, adaptive recursive
filters, RLS algorithm.
Chapter4Array Processing: Array fundamentals, beam-forming, optimum array processing,performance considerations, adaptive beam-forming, linearly constrained minimum-variance beam-formers, side-lobe cancellers, spacetime adaptive processing.
REFERENCE BOOKS:1. Monson H. Hayes, Statistical Digital Signal Processing and Modeling, JohnWiley & Sons (Asia) Pte. Ltd., 2002.2. Dimitris G. Manolakis, Vinay K. Ingle, and Stephen M. Kogon, "Statistical andAdaptive Signal Processing: Spectral Estimation, Signal Modeling, Adaptive
Filtering and Array Processing, McGraw-Hill International Edition, 2000.3. Bernard Widrow and Samuel D. Stearns, "Adaptive Signal Processing, PearsonEducation (Asia) Pte. Ltd., 2001.4. Simon Haykin, "Adaptive Filters, Pearson Education (Asia) Pte. Ltd, 4th edition,2002
Elective III
Subject : Embedded System Design Hours Per Week : 04
Subject Code : 10MECS331 Credits : 04
7/27/2019 m.tech Final Ized Syllabus
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Chapter 1Introduction to Embedded System: An embedded system, processor, hardware unit,soft ware embedded into a system, Example of an embedded system, OS services, I/O,N/W, O/S, Real time and embedded OS. Processor and Memory Organization, DevicesAnd Buses for Device Networks: I/O devices, serial communication using FC, CAN
devices, device drivers, parallel port device driver in a system, serial port device driverin a system, device driver for internal programmable timing devices, interrupt servicingmechanism, V context and periods for switching networked I/O devices using ISA, PCIdeadline and interrupt latency and advanced buses. Process Communication andSynchronization of Processors Tasks
Chapter 2Introduction to ASIC: Full Custom with ASIC, Semi custom ASICS, Standard Cellbased ASIC, Gate array based ASIC, Channeled gate array, Channel less gate array,structured get array, Programmable logic device, FPGA design flow, ASIC cell librariesData Logic Cells:Data Path Elements, Adders, Multiplier, Arithmetic Operator, I/O cell,Cell Compilers. Programmable ASIC: programmable ASIC logic cell, ASIC I/O cell.
(Programming using Verilog)
Chapter 3Introduction to FPGA: Logic block, Interconnection resources, Economy of FPGA,Applications of FPGA, Implementation Process, Concluding remarks, Programmingtechnology, Static RAM programming technology, Anti-fuse programming technology,EPROM and EEPROM technology, Commercially available FPGAs, FPGA design flowexample. Technology mapping of FPGA, Logic synthesis and optimization, Register-transfer level systems, Execution Graph, Organization of System, Implementation of RTLSystems, Analysis of RTL Systems, and Design of RTL Systems. Data Subsystems,Storage Modules, Functional Modules, Data paths, Control Subsystems, Microprogrammed Controller, Structure of a micro programmed controller, Micro instruction
Format, Micro instruction sequencing, Micro instruction Timing, Basic component of amicro system, memory subsystem. (Programming using VHDL/Verilog)
Chapter 4High performance embedded processors: An detailed architectural design, Instruction setand programming in ARM-11, philips/TI/Free scale cold fire embedded processors andprogramming concepts.
Chapter 5Hardware and software co-design: Hardware-software background: embeddedsystems, models of design representation, the virtual machine hierarchy, theperformance modeling, hardware software development, ADEPT modeling environment.
Motivation for object oriented technique, data types, modeling hardware components asclasses, designing specialized components, data decomposition, and processor example.
Chapter 6Wireless Embedded system design: Protocol design and validation, networkembedded systems operating systems and programming, Bluetooth and IrDA, wirelesssensor networks and ZigBee, wireless LAN- IEEE 802.11, RFID, GSM and GPRS,ubiquitous computing.
REFERENCE BOOKS:
1. Raj Kamal, Embedded systems Architecture, Programming and Design,TMH.
2. Jane W. S., Liu, Real Time Systems, Pearson Education Asia Pub
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3. M.J.S .Smith, - Application - Specific Integrated Circuits PearsonEducation, 2003.
4. M. Ercegovac, T. Lang and L.J. Moreno, Introduction to Digital Systems,Wiley,2000.
5. Sanjaya Kumar, James H. Ayler The Co-design of Embedded Systems: AUnified Hardware Software Representation, Kluwer Academic Publisher,
2002 .6. Peter Marwedel, G. Goosens, Code Generation for Embedded Processors,
Kluwer Academic Publishers, 1995.7. Computers as Components: Principles of Embedded Computing System Design,
by Wayne Wolf, Morgan Kaufmann Publishers, 2001.8. Programming Microsoft Windows CE, Second Edition, by Doug Boling, Microsoft
Press, 20039. Field Programmable Gate Arrays, Stephen D Brown, Robert J Francies, Kulwer
Academic Publications.10.Reference data manuals of ARM/ Freescale cold fire MCF5223X/ HCS12X
microcontroller/ TI/Philips processors.
Elective III
Subject: Wireless Communication Networks Hours Per Week: 04
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Subject Code: 10MECS332 Credits: 04
Chapter1Fundamentals of Wireless Communications, Modulations Techniques for WirelessCommunication, Propagations Modules, Structerd Spectrum Techniques.
Chapter2Cellular Wireless Networks and Standards Principles of Cellular Networks, WirelessStandards, AMPS and ETACS, USDC, GSM, CDMA (IS-95).
Chapter3Wireless Networking Mobile IP and Wireless Access Protocol, Cordles Systems andWireless Local Loop.
Chapter4Wireless LAN Wireless LAN Technology, IEEE 802.11 Wireless LAN structured, BluetoothTechnology.
Text Books:1)Wireless Communications and Networks By William Stallings, Pearson
Education, 20042)Wireless Communications: Principles and Paractice By T.S. Rappaport, Pearson
Education 2nd Ediition, 2003.
Elective III
Subject : BIOMEDICAL SIGNAL PROCESSING Hours Per Week : 04
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Subject Code : 10MECS333 Credits : 04
Chapter 1FINITE AND INFINITE IMPULSE RESPONSE FILTERS: Characteristics of FIR filters,Smoothing filters, Notch filters and derivatives, Window Design, Frequency Sampling andMinimax design. Generic Equations of IIR Filters, Integrators and design Methods of two
pole filters.
Chapter 2VLSI IN DIGITAL SIGNAL PROCESSING: Digital signal processors, High-performanceVLSI signal processing, VLSI applications in medicine , VLSI sensors for biomedicalsignals VLSI tools.
Chapter 3
Data Compression Techniques: Lossy and Lossless data reduction Algorithms. ECG datacompression using Turning point, AZTEC, CORTES, Huffman coding, vector quantisation,DCTand the K L transform.
Chapter 4Cardiological Signal Processing: Pre-processing. QRS Detection Methods. Rhythmanalysis. Arrhythmia Detection Algorithms. Automated ECG Analysis. ECG PatternRecognition. Heart rate variability analysis.
Chapter 5
Adaptive Noise Cancelling: Principles of Adaptive Noise Cancelling. Adaptive NoiseCancelling with the LMS Adaptation Algorithm. Noise Cancelling Method to Enhance ECGMonitoring. Fetal ECG Monitoring.
Chapter 6Signal Averaging, polishing - mean and trend removal, Prony's method. Linear
prediction. Yule - walker (Y -W) equations.
Chapter 7Neurological Signal Processing: Modeling ofEEG Signals. Detection of spikes and spindlesDetection of Alpha, Beta and Gamma Waves. Auto Regressive(A.R.) modeling of seizureEEG. Sleep Stage analysis. Inverse Filtering. Least squares and polynomial modeling.UNIT -VIII Original Prony's Method. Prony's Method based on the Least SquaresEstimate. Analysis of Evoked Potentials.
TEXT BOOKS1. Rangaraj M. Rangayyan - Biomedical Signal Analysis.2. D.C.Reddy, Biomedical Signal Processing- principles and techniques, Tata McGraw-Hill, 2005.REFERENCE BOOKS:1. Weitkunat R, Digital Bio signal Processing, Elsevier, 1991.
2. Akay M , Biomedical Signal Processing, Academic: Press 1994
3. Cohen. A, Biomedical Signal Processing -Vol. I Time & Frequency Analysis, CRC Press,
1986.
4. Biomedical digital Signal Processing, willis J.Tompkins, PHI,
Elective III
Subject : Advanced Computer Architecture Hours Per Week : 04
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Subject Code : 10MECS334 Credits : 04
Chapter1
Parallel Computer Models The State of Computing, Multiprocessors and Multicomputers,Multivector and SIMD Computers.
Chapter2Processors and Memory Hierarchy, Advanced Processor Technology, Superscalar andVector Processors, Memory Hierarchy Technology, Virtual Memory Technology.
Chapter3Bus, Cache, and Shared Memory Backplane Bus Systems, Cache MemoryOrganizations, Shared Memory Organization.
Chapter4Pipelining and Superscalar Techniques, Linear pipeline Processors, Nonlinear PipelineProcessors, Instruction Pipeline Design, Arithmetic Pipeline Design, Super Scalar and
Super Pipeline Design.
Chapter5Multiprocessors and Multicomputers, Multiprocessors System Interconnects, The Cache
coherence and Synchronization Mechanism, Three Generations of Multicomputers,MessagePassing Mechanisms,
Chapter6Scalable, Multithreaded, and Dataflow Architectures, Latency-Hiding Techniques,Principles of Multithreading, Fine-Grain Multicomputers, Scalable and MultithreadArchitecture, Data flow and Hybrid Architectures.
Chapter7UNIX, Mach, and OSF/1 for Parallel Computers, Multiprocessor UNIX Design Goals,Master Slave and Multithread UNIX, Multicomputer UNIX Extensions, Mach/OS KernelArchitecture and applications.
Text Books:1) Advanced Computer Architecture- Parallelism, Scalability, Programmability By
Kai Hwang.
Reference Books:1) Computer Architecture A Quantitative Approach By Hennssey & Petterson.