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Microprocessor Lecture (2) (part 1) 1

Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

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Page 1: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

Microprocessor

Lecture (2) (part 1)

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Page 2: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

• Introduction to instruction set architecture, microarchitecture and system architecture

• Microprocessor architectures RISC vs. CISC

• Program Execution by Conventional Microprocessors

• Microcomputer architecture and Basic Blocks of a Microcomputer

• Introduction to microprocessor

• Simplified Explanation of Control Unit design

• Pipeline

• Branch Prediction Feature

• Scalar and Superscalar Microprocessors

Outline

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Page 3: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

Introduction to instruction set architecture(1)

What are Instructions?

Instructions are the direction given to a computer, that causes electrical signals to be sent through specific circuits for processing

• Instructions are the most basic actions the processor can take:

- ADD AX, BX — Add value AX to BX and store in AX

- CMP AX, 5 — Compare value in AX to 5

- JE 16 — Jump ahead 16 bytes if comparison was equal

High level programming languages (C, C++, Java) allow many processor instructions to be written simply:

• if (A + B = 5) then… — Jump if sum of A and B is 5

• Every program must be converted to the processor instructions of the computer it will be run on.

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Page 4: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

Introduction to instruction set architecture (2)

• Instruction set

– Design defines functions performed by the processor

– Differentiates computer architecture by the

• Number of instructions

• Complexity of operations performed by individual instructions

• Data types supported

• Format (layout, fixed vs. variable length)

• Use of registers

• Addressing (size, modes)

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Page 5: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

Introduction to instruction set architecture (ISA) (3)

• Instruction set architecture (ISA) refer to the actual programmer visible instruction set.

• Serves as an interface between software and hardware.

• Provides a mechanism by which the software tells the hardware what should be

done.

instruction set

High level language code : C, C++, Java, Fortran,

hardware

Assembly language code: architecture specific statements

Machine language code: architecture specific bit patterns

software

compiler

assembler

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Page 6: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

INSTRUCTION SET ARCHITECTURE:‐Complete instruction set of the processor

BASIC 4 TYPES OF OPERATION:‐

– Data transfer between memory and processor register

– Arithmetic and logic operation

– Program sequencing and control

– I/O transfer

Page 7: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

Instruction Set Architecture

•RISC (Reduced Instruction Set Computer) Architectures Memory accesses are restricted to load and store instruction, and data manipulation instructions are register to register. • Addressing modes are limited in number. • Instruction formats are all of the same length. • Instructions perform elementary operations

• •CISC (Complex Instruction Set Computer) Architectures Memory

access is directly available to most types of instruction. • Addressing mode are substantial in number. • Instruction formats are of different lengths. • Instructions perform both elementary and complex operations.

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Page 8: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

Instruction Set Architecture: cont..

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• RISC (Reduced Instruction Set Computer) Architectures

• Large register file

• Control unit: simple and hardwired

• pipelining

• CISC (Complex Instruction Set Computer) Architectures • Register file: smaller than in a RISC

• Control unit: often micro‐programmed

– Current trend CISC operation a sequence of RISC‐like operations

Page 9: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

CISC Examples

• Examples of CISC processors are the System/360(excluding the 'scientific' Model 44),

• VAX,

• PDP‐11,

• Motorola 68000 family

• Intel x86 architecture based processors.

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Page 10: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

CISC Instruction Set Architecture: cont..

•Emphasis on hardware

•Includes multi-clock complex instructions

•Memory -to- memory: "LOAD" and "STORE“ incorporated in instructions

•Small code sizes, high cycles per second

•Transistors used for storing complex instructions

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Page 11: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

CISC :Instruction Set Architecture: cont..

•That is, the incorporation of older instruction sets into new generations of processors tended to force growing complexity.

•Many specialized CISC instructions were not used frequently enough to justify their existence.

•Because each CISC command must be translated by the processor into tens or even hundreds of lines of microcode, it tends to run slower than an equivalent series of simpler commands that do not require so much translation.

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Page 12: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

RISC Examples

•Apple iPods (custom ARM7TDMI SoC)

•Apple iPhone (Samsung ARM1176JZF)

•Palm and Pocket PC PDAs and smartphones (Intel X Scale family, Samsung SC32442 ‐ARM9)

•Nintendo Game Boy Advance (ARM7)

•Nintendo DS (ARM7, ARM9)

•Sony Network Walkman (Sony in‐house ARM based chip)

•Some Nokia and Sony Ericsson mobile phones

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Page 13: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

RISC Instruction Set Architecture: cont..

•Emphasis on software

•Single- clock, reduced instruction only

•Register to register: "LOAD" and "STORE“ are independent instructions

•Low cycles per second, large code sizes

•Spends more transistors on memory registers

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Page 14: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

Performance

•The CISC approach attempts to minimize the number of instructions per program, sacrificing the number of cycles per instruction. RISC does the opposite, reducing the cycles per instruction at the cost of the number of instructions per program.

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Page 15: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

Instruction Set Architecture

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NO RISC CISC

1 Simple instructions taking one cycle taking multiple cycles

Complex instructions taking multiple cycles

2 Instructions are executed by hardwired control unit

Instructions are executed by microprogramed control unit

3 Few instructions Many instructions

4 Fixed format instructions Variable format instructions

5 Few addressing mode, and most instructions have register to register addressing mode

Many addressing modes

6 Multiple register set

Single register set

7 Highly pipelined Not pipelined or less pipelined

Page 16: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

Instruction Cycle

• Two steps:

– Fetch

– Execute

Page 17: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

Fetch Cycle

• Program Counter (PC) holds address of next instruction to fetch

• Processor fetches instruction from memory location pointed to by PC

• Increment PC – Unless told otherwise

• Instruction loaded into Instruction Register (IR)

• Processor interprets instruction and performs required actions

Page 18: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

Execute Cycle

• Processor-memory – data transfer between CPU and main memory

• Processor I/O – Data transfer between CPU and I/O module

• Data processing – Some arithmetic or logical operation on data

• Control – Alteration of sequence of operations – e.g. jump

• Combination of above

Page 19: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

• The following three steps for completing the instruction:

1.Fetch. The microprocessor fetches (instruction read) the

instruction from the main memory (external to the

microprocessor) into the instruction register.

2. Decode. The microprocessor decodes or translates the

instruction using the control unit. The control unit inputs the

contents of the instruction register, and then decodes

(translates) the instruction to determine the instruction type.

3. Execute. The microprocessor executes the instruction using the

control unit. To accomplish the task, the control unit generates

a number of enable signals required by the instruction.

Program Execution by Conventional Microprocessors

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Page 20: Microprocessor - WordPress.com and system architecture •Microprocessor architectures RISC vs. CISC ... Outline 2 . Introduction to ... The microprocessor fetches the instruction

• For example, suppose that it is desired to add the contents of two

registers, X and Y, and store the result in register Z. To accomplish

this, a conventional microprocessor performs the following steps:

1. The microprocessor fetches the instruction into the instruction

register.

2. The control unit (CU) decodes the contents of the instruction register.

3. The CU executes the instruction by generating enable signals for the

register and ALU sections to perform the following:

a. The CU transfers the contents of registers X and Y from the

Register section into the ALU.

b. The CU commands the ALU to ADD.

c. The CU transfers the result from the ALU into register Z of the

register section.

Program Execution by Conventional Microprocessors

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