Memory and Programmable Logic Devices

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    P.RAJA

    Assistant Professor,Department of ECE,

    Mailam Engineering College,Mailam 604 304

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    A memory unit is a collection of cells capable ofstoring a large quantity of binary information

    There are two types of memories that are used indigital systems

    Random-Access Memory (RAM)

    Read-Only Memory (ROM)

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    RAM can perform both write and readoperations.

    A RAM loses its stored data when power is turned off,thus it is a volatile memory.

    The time it takes to transfer information to or from

    any desired random location is always the same,hence the name random-access memory (RAM).

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    A memory unit stores binary information in

    groups of bits called words.

    A group of eight bits is called a byte. A block diagram of the memory unit

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    The n data inputlines provide the information tobe storedin memory and the n outputlines specifythe binary datacoming out of the memory.

    The kaddress lines specify the particular word chosen.

    The two control inputs specify the direction of data

    transfer required Read and Write.

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    Data inputs

    Data outputs

    3 t 8c d r

    A0

    A1

    A2

    A2 A1 A0 = 000

    A2 A1 A0 = 101

    Memory size = No. of addresslocation v No. of data lines = 8 v 8

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    Memory size = 1024 v 16

    = 210 v 16

    Each word in memory is assigned an

    identification number, called an address

    (0 up to 2k-1).

    The selection of a specific word inside

    the memory is done by applying the k-bit

    address to the address lines.

    A decoderaccepts this address and opens

    the paths needed to select the word

    specified.

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    Write Operations

    Apply the binary address of the desired word to the

    address lines.

    Apply the data bits that must be stored in memory tothe data input lines.

    Activate the write input

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    Read Operations

    Apply the binary address of the desired word to theaddress lines.

    Activate the readinput

    Some memory chips have a different configuration of controlinputs; one input selects the unit and the other decides the

    operation.

    Memory Enable Read / Write Memory Operation

    0 X None

    1 0 Write to selected word

    1 1 Read to selected word

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    The operation ofa memory is usually controlled bythe CPU.

    The access time of a memory is the time required toselect aword and read it.

    The cycle time of a memory is the time required to

    complete awrite operation.

    The access time and cycle time must be within a timeequal to a fixed number of CPU clockcycles.

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    StaticRAM (SRAM): Memory cell is constructedusing Latch ( usingMOS transistor )

    DynamicRAM (DRAM) : Stores the binary data inthe formofelectric charges on ca acitors.

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    Row select

    T3 T4

    T1 T2

    T5T6

    Data

    line

    Data

    line

    Write

    (W)

    Read

    (R)

    T7 T8

    T9T10

    Data-in Data-out

    VDD

    D D

    Row select T3 - ON T4 - ON

    Column select T7

    - ON T8

    ON

    Write T9

    - ON T10 OFF

    Read T9

    - OFF T10 ON

    Column select

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    Rowselect

    Columnselect

    CT

    Rowselect

    Columnselect

    CT

    Writeoperation Read

    operation

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    Sl. No SRAM DRAM

    1 It contains less memory cells

    er unit area

    It contains more memory cells

    er unit area

    2 It access time is less It access time is greater than

    SRAM

    3 Refreshing circuitry is not

    required

    Refreshing circuitry is

    required

    Cost is more Cost i s less

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    A decoder with k inputs and 2k outputs requires 2kAND gates with k inputs per gate.

    The number ofgates and the number of inputs perstage can be reduced by employing two decoders ina two-dimensionalselection scheme.

    In this scheme, two k/2-input decoders are usedinstead of one k-inputdecoder.

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    Aread-only memory (ROM) is a memory in which

    permanent binary information is stored.

    Block diagramof a ROM

    We canperform the read operationonly

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    Inputs Outputs

    A B CIN S COUT

    0 0 0 0 0

    0 0 1 1 0

    0 1 0 1 0

    0 1 1 0 1

    1 0 0 1 0

    1 0 1 0 1

    1 1 0 0 1

    1 1 1 1 1

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    3 to 8Decoder

    A

    B

    CIN

    Outputs

    S COUT

    0 0

    1 0

    1 0

    0 1

    1 0

    0 1

    0 1

    1 1

    S COUT

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    Mask ROM rogram by manufacturer based on the user

    specification ROM Programmable ROM User can program their requirement

    One time program is possibleEPROM Erasable PROM Program by user

    Reprogram by erase the existing data byapplyingUV ( ultra violet) rays

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    PLD Programmable Logic Devices Types

    PROM

    ProgrammableArray Logic ( PAL).

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    ProgrammableArray Logic

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