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Eindhoven University of Technology MASTER Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link to publication Disclaimer This document contains a student thesis (bachelor's or master's), as authored by a student at Eindhoven University of Technology. Student theses are made available in the TU/e repository upon obtaining the required degree. The grade received is not published on the document as presented in the repository. The required complexity or quality of research of student theses may vary by program, and the required minimum study period may vary in duration. General rights Copyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal requirements associated with these rights. • Users may download and print one copy of any publication from the public portal for the purpose of private study or research. • You may not further distribute the material or use it for any profit-making activity or commercial gain

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Page 1: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

Eindhoven University of Technology

MASTER

Interleaved paralleling of hysteresis current controlled resonant pole inverters

Schellekens, J.M.

Award date:2007

Link to publication

DisclaimerThis document contains a student thesis (bachelor's or master's), as authored by a student at Eindhoven University of Technology. Studenttheses are made available in the TU/e repository upon obtaining the required degree. The grade received is not published on the documentas presented in the repository. The required complexity or quality of research of student theses may vary by program, and the requiredminimum study period may vary in duration.

General rightsCopyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright ownersand it is a condition of accessing publications that users recognise and abide by the legal requirements associated with these rights.

• Users may download and print one copy of any publication from the public portal for the purpose of private study or research. • You may not further distribute the material or use it for any profit-making activity or commercial gain

Page 2: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

__-We !ethnisthe universi!e;! eindhoven

Capaciteitsgroep Elektrische EnergietechniekElectromechanics &Power Electronics

Master of Science Thesis

Interleaved Parallelingof

Hysteresis Current ControlledResonant Pole Inverters

J.M. SchellekensEPE.zoo7·A.oz

The department Electrical Engineering

ofthe Technische Universiteit Eindhoven

does not accept any responsibility

for the contents ofthis report

Coaches:

Prof. Dr. Ir. A.J.A. VandenputDr. Ir. J.1. DuarteIr. c.G.E. WijnandsIr. P.J.M. van Gils

Date: January 2007

/ faculteit elektrotechniek

Page 3: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

Abstract

ASML is worlds leading provider of lithography systems for the semiconductor industry head­quartered in Veldhoven. Prodrive B.V. delivers competitive solutions in electronic design,manufacturing and added value services for industrial and professional markets. Prodrivedesigns and manufactures hard switching full-bridge current amplifiers, which drive the short­stroke actuators used by ASML in their wafer-steppers and scanners. ASML itself designs a3-phase hysteretic current controlled resonant pole inverter with additional outer-loop currentcontrol, which is used to drive the long-stroke actuators.

The hysteretic current controlled resonant pole inverter is a zero voltage switching topol­ogy. Zero voltage switching results in no, or no significant, switching losses compared tohard switched topologies. Also the voltage stress on switches and EMC is reduced due to thelimited ~~ of the branch-voltage during the switching actions. Drawbacks of this topology arethe large circulating currents, which occur during the resonant transitions, and the limitedoutput voltage-range.

Interleaved paralleling of the hysteretic current controlled resonant pole inverter topol­ogy is investigated as a possible solution for future amplifiers to increase the output currentand bandwidth. Use of a master slave structure, with control-ramps add to the hystereticcurrent control levels of the slave modules, results in steady-state interleaving of any num­ber of parallel modules, during normal operation, with a fast transient response due to thedead-beat control character of the control ramps. However, during clipping-mode operationadditional measures are required to interleave multiple modules in combination with zerovoltage switching. Mechanisms are suggested which will result in natural interleaving of evenand odd numbers of modules.

A pre-prototype is built and tested to verify the derived theories in practice. Steady-stateinterleaving with a fast transient response is achieved during normal operation, clipping­mode operation and switching between both modes. Conclusions are drawn and also someimprovements are suggested to increase the performance of the pre-prototype.

3

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Contents

Introduction

1 Theory of the Resonant Pole Inverter1.1 Topology Explained .

1.1.1 Modes of Operation . . . . . .1.1.2 Resonant Voltage Commutation1.1.3 Hysteresis Current Controller . .1.1.4 Resonant Current Commutation

1.2 Small-Signal Model . . . . . . . .

2 Theory of Interleaved Paralleling2.1 Comparison of Single and Parallel Modules2.2 Interleaving using Control Ramps .

2.2.1 Theory of Convergence .2.2.2 Implementation of Control Ramps2.2.3 Influence of Component Variation

2.3 Interleaving during Clipping-Mode Operation2.3.1 State-Plane for Interleaved Parallel Modules.2.3.2 Soft-Switching Ensured .2.3.3 Interleaving during Clipping-Mode Operation for Odd N2.3.4 Interleaving during Clipping-Mode Operation for Even N

2.4 Small-Signal Model of Interleaved Modules .

3 Design and Qualification of a Pre-Prototype3.1 Design of a Pre-Prototype .

3.1.1 Hardware Amplifier3.1.2 Control Logic3.1.3 Loads . . . . . . . .

3.2 Measurements........3.2.1 Large-Signal Measurements3.2.2 Small-Signal Measurements

4 Conclusions and Recommendations4.1 Conclusions ....4.2 Recommendations

Acknowledgements

5

6

99

1114171925

292933333436384043435053

5757575960606067

737374

76

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6

List of Abbreviations

List of Notation

List of Figures

List of Tables

Bibliography

A State-Plane Explained

B Derivation of'iL!min

C Fixed Hysteresis Current Control

D Derivation of fsw

E Derivation of flue!

F Zout for Triangular Currents

G Alternative to Derive G and Zout

H Current Measurement

I Control-Ramps Derived

J Ensured Soft-Switching Derived

K Clipping Detection

L Steady-State Currents Derived

M Matlab ScriptsMol Numerical integral of a matrix exponentMo2 Numerical Simulation using SDM .Mo3 Steady-state shootingM.4 Small-signal modeling 0 0 0 •• 0 0

M.5 Determine Zout and Goo . . . . .Mo6 State-Plane of Convergence of Interleaved Clipping Visualized.M.7 Convergence of Interleaved Clipping Visualized 0 0 • 0 0 0 0 • •

N Used Equipment

o Additional Measurements

P Project Description

CONTENTS

78

82

84

85

88

89

93

95

99

101

103

105

109

111

115

117

119

121121122126130135137139

143

145

147

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Introduction

ASML is worlds leading provider of lithography systems for the semiconductor industry head­quartered in Veldhoven. Prodrive B.V. delivers competitive solutions in electronic design,manufacturing and added value services for industrial and professional markets. Prodrivedesigns and manufactures hard switching full-bridge current amplifiers, which drive the short­stroke actuators used by ASML in their wafer-steppers and scanners. ASML itself designs azero voltage switching 3-phase amplifier which is used to drive the long-stroke actuators.

Continuing demands for higher throughput of these lithography systems results in increas­ing demands of power density, output power, control bandwidth and accuracy of these servoamplifiers. Parallel interleaving of independently controlled branches is one of the possibili­ties to meet these demands. This report describes the zero voltage switching technology thatis currently used in the long-stroke amplifier in combination with interleaved paralleling ofindependently controlled inverter legs.

Firstly, in Chapter 1, the suggested topology will be explained for a single leg. Secondlyinterleaved switching of independently controlled branches is treated in Chapter 2. After thatthe design and qualification of a single phase pre-prototype, consisting of 3 parallel interleavedmodules based on an existing amplifier, is discussed. Finally, in Chapter 4 conclusions aredrawn and recommendations are made based on the measurements and theory discussed inthis report. Additionally the project description is added, in Dutch, in Appendix P.

7

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Chapter 1

Theory of the Resonant PoleInverter

The Resonant Pole Inverter (RPI) is a Zero Voltage Switching (ZVS) topology. ZVS resultsin no, or no significant, switching losses compared to hard switched topologies. Also thevoltage stress on switches and EMC is reduced due to the limited ~~ of the branch-voltageduring the switching actions. Drawbacks of this topology are the large circulating currents,which occur during the resonant transitions, and the limited output voltage-range. The ZVShysteretic current controlled topology used by ASML, for the Long-Stroke amplifier, is knownas a variable hysteresis current controlled resonant pole inverter. The pseudo resonant poleconverter was proposed for the first time in [1] for use in High Power DC IDC converters.In the same year this converter topology was adapted to an inverter topology using fixedhysteresis control [2] and was called a resonant pole inverter. In [3] and later in [4] variablehysteresis current control was proposed, as it is currently implemented in the long-strokeamplifier of ASML. Also different other converter types employ the same ZVS technique, forinstance the Zero Voltage Resonant Transition (ZVRT) converter or Zero Voltage SwitchingQuasi Square-wave Converter (ZVS-QSC) which was proposed in [5], [6] and [7]. However,these converters use normal PWM techniques to generate the gating signals of the switches.This chapter is an introduction into the variable hysteresis current controlled RPI topologyand starts with an explanation of the basic topology, after that a model will be derived usingthe sampled-data modeling method.

1.1 Topology Explained

Figure 1.1 depicts the basic diagram of one leg of a variable hysteresis current controlled RPI.This basic topology consists of three basic parts, a hysteresis current controller, a resonantpole, consisting of a half bridge with parallel to the switches resonant capacitors Cr and inseries an inductor L f , and an output filter formed by Lf and filter capacitor Cf. The induc­tive load consisting of LL, RL and EMF eL is connected to the output of the inverter.

The hysteresis current controller generates the turn-on and turn-off signals for the switches.L f controls the output current ripple and generates in combination with Cr a resonant voltagecommutation which ensures zero voltage turn-off of the switches. Cf in combination with Lfand the load impedance ZL, which equals RL + jwLL' filters the high frequency current ripple

9

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10 CHAPTER 1. THEORY OF THE RESONANT POLE INVERTER

C"

iu

I~""r- j

IL J

Ucr

HysteresisCurrent

Controller

..Iset

Figure 1.1: Basic half-bridge topology

._::i

ihi*

ilo*

i~i= 2i:et'thi~:: -I th

i:el

t[sJ

-,­,,,,,,

_L,,,,,,

---------~--r~~:::::::::::::::~,,,,,,

_ L_

,,,,,,

,,,,,

_________ -1-_

,,,

us+f=====::::(

us-t.=.=~~===:t=L- c---=---=---=-====t±I==::::j=-J;.~--~-- -~---=---t2 13 14 t6 t7 t8

t[8}

i ~i i'0

it2

I'4 '6 'B

t[s]

Figure 1.2: Switching waveforms

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1.1. TOPOLOGY EXPLAINED 11

generated by the inverter leg. Cf can for EMC reasons be implemented as a double capacitorconnected to both rails, as is done with capacitors Cd and Cr 2.

The supply is chosen asymmetrical with a positive voltage Us+ and negative voltage-Us-. The equations derived in this chapter are simplified to two basic supply forms; thesymmetrical supply, Us+ = Us- = ~Us and the single supply, Us+ = Us and Us- = o.

1.1.1 Modes of Operation

Figure 1.2 shows the inductor current iLf, the switching-leg voltage UCr, which is defined asthe voltage difference between the positive plate of Cr 2 and ground, and the gating signalsof the switches for two switching cycles of the inverter leg depicted in Figure 1.1 as a func­tion of time t. This plot is generated with a total circuit delay Td (caused by the hystereticcurrent controller, driver and switches) and a constant and positive output voltage UCf. Thecomponent values and the turn-on and turn-off delay are exaggerated to emphasize all modesof operation.

A complete cycle consists of six modes of operation, as is depicted in Figure 1.4. Timeintervals tl ..t2, t3 ..t4, t5 ..t6 and t7 .. tS are equal to Td and iLf(tO) equals iLf(tS) during steady­state operation, as is depicted in Figure 1.2. For convenience both resonance capacitors Cr1

and Cr2 are replaced by an equivalent capacitor with capacitance Cr. For this analysis allcomponents, except for the delay of the gating signals, are assumed ideal and UCf is assumedconstant during one switching cycle to ..ts, which is approximately valid for a limited outputvoltage and current range.

The six transitions can be modeled using two equivalent circuits, which are depicted inFigure 1.3. Figure 1.3(a) shows the equivalent circuit of the linear current commutation,which occurs when a switch or diode is conducting. During the current commutation UCr isconstant and equal to Us+ or -Us-, depending on which switch or diode is conducting.

UCr(t) {Us+-Us-

, t7 < t ::; t2, t3 < t ::; t6 (1.1 )

When assuming UCf constant, iLf can be determined as follows.

where, tn = t7 < t ::; t2 or tn = t3 < t ::; t6 and which in in turn can be simplified to

(1.2)

, t7 < t ::; t2

, t3 < t ::; t6 (1.3)

Figure 1.3(b) shows the equivalent circuit for the resonant voltage commutation, whichoccurs when no switches or diodes are conducting. This results in the following system ofdifferential equations.

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12 CHAPTER 1. THEORY OF THE RESONANT POLE INVERTER

+ + +

UCr UCf+ UCr

Cr UCf

(a) Linear current commutation (b) Resonant voltage commutation

Figure 1.3: Equivalent circuits

UCfCrUCf

t---.....

(a) to-t2 (b) t2-t3

sJ sJ.-._..__._...-._---~ 41 jIio

Lf Lf

Us- SJ UCf Us- SJ UCf

(C) t3-t4 (d) t4-t6

Us+ sJ sJLf Lf

Us_ sJ Cr UCf Us- sJ UCf

(e) t6-t7 (f) t7-t8

Figure 1.4: Modes of operation

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1.1. TOPOLOGY EXPLAINED

UCr(t) = - Jr iLf(t)

iLf(t) = If (Ucr(t) - UCf )

for t2 < t :s; t3 or t6 < t :s; t7

From this system of differential equations UCr and i Lf can be solved resulting in

UCr(t) = {Ucr(tn) - UCf} cos (wor(t - tn)) ...

-ZOriLf(tn) sin (Wor(t - tn)) + UCf

iLf(t) = iLf(tn)COS(wor(t-tn)) ...

-CrWOr {UCj - Ucr(tn)} sin (Wor(t - tn))

13

(1.4)

(1.5)

where tn < t :s; tn+l with n = {2, 6} and ZOr = Ifi, WOr = JLlfCr and the initial current

iLf(tn) and voltage UCr(tn) can be determined from equations 1.1 and 1.3.

When using equations 1.1, 1.3 and 1.5 the following analysis can be made of the six modesof operation.

• (to ..t2) : Switch 81 is conducting and iLf is linearly increasing, as it is can be seen fromFigure 1.4(a) and Figure 1.2. At time instance t = tl, iLf equals the positive turn-offthreshold i hi and turn-off of 81 is initiated and is, due to circuit delay, delayed untilt = t2. During this interval equations 1.1 and 1.3 are valid.

• (t2 ..t3) : 81 is turned-off and a resonance between Cr and L f occurs, as it can be seenfrom Figure 1.4(b). During this resonant voltage commutation Cr is discharged by iLffrom Us+ to -Us-, as it is depicted in Figure 1.2. Due to the resonant commutationof UCr the voltage across 81 will be limited during turn-off. Therefore 81 is turned-offwith almost negligible losses. During this interval Equation 1.5 will hold, where n = 2.

• (t3 ..t4) : UCr equals -Us- and natural commutation of iLf to D2 occurs, as it can beseen from Figure 1.4(c). When D2 is conducting turn-on of 82 is initiated and is, dueto the circuit delay, delayed by Td. To ensure zero voltage turn-on of 82, D2 has to beconducting. Therefore i hi is always chosen positive. During this interval equations 1.1and 1.2 are valid.

• (t4 ..t6) : 82 is conducting as it is shown in Figure 1.4(d). Since D2 is conducting duringthe switching action of 82 turn-on occurs almost lossless. During this time interval iLfkeeps decreasing according to Equation 1.2, until t = t6. At t = t5, iLf equals thenegative turn-off threshold izo and turn-off of 82 is initiated, as it can be seen fromFigure 1.2.

• (t6 ..t7) : At t = t6 turn-off of 82 occurs and due to the initial conditions of Cr andLf a resonant voltage commutation occurs, where Cr is charged from -Us- to Us+.

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14 CHAPTER 1. THEORY OF THE RESONANT POLE INVERTER

Figure 1.2 shows the current and voltage waveforms during the resonant voltage com­mutation and Figure 1.4(e) shows the state of the switches. Thrn-off losses are almostnegligible because of the limited voltage over 82 during the switching action. Duringthis interval Equation 1.5 will hold, where n = 6.

• (t7 ..tS) : iLj is negative and natural commutation to D1 occurs, as can be seen fromfigures 1.2 and 1.4(f). iLj starts increasing according to Equation 1.2. The turn-onof 81 is initiated but is delayed by Td due to the circuit delay. Because i/o is alwayschosen negative the natural commutation to D1 will always occur. As a consequence81 is always turned-on with negligible losses.

From the analysis above it is clear that zero voltage turn-on is only achieved if iLj > 0at t2 and iLj < 0 at t6. However, the switch has to be turned-on before liLjl decreases tozero, otherwise Lj and Cr start to resonate and the inverter might switch with considerableturn-on losses.

The voltage change across the switch during turn-off is determined by the resonance thatoccurs between Cr and L j' Cr and L j are chosen so that the voltage across the switch iskept to a minimum during turn-off. This results in almost negligible turn-off losses. For acomplete resonant transition there should be enough energy stored in Cr and L j . The amountof energy stored in Cr is determined by te state of the switches and the supply voltage andis therefore not controllable. However, the energy stored in L j is controllable and equal to~Ljilj' Therefore a bound on the minimum iLj should be implemented to ensure properresonant voltage commutation which will be discussed next.

1.1.2 Resonant Voltage Commutation

This section discusses the resonant voltage commutation, which occurs after turn-off of aswitch using the state-plane method to explain the resonant behavior. For the readers whoare not familiar with this technique a short introduction is given in Appendix A.

Figure 1.5 shows state-plane plots of the resonance between Cr and Lj for a symmetricalsupply and two constant output voltage values, namely UCj = -iUs and UCj = +tus. Thelinear current commutation can be modeled using Figure 1.3(a), during this commutationUCr will be clamped to either Us+ or -Us- while iLj is changing linear. This linear currentcommutation results in straight lines in the state-plane plot, as it is indicated by time inter­vals t7 ..t2 and t3 ..t6 in Figure 1.5. Figure 1.5 also clearly shows the circuit delay which occursbetween tl ..t2 and tS ..t6'

After turn-off of a switch a resonance will occur, which can modeled using Figure 1.3(b),resulting in Equation 1.5. This resonant voltage commutation can be plotted as circle partsin the state-plane if the dimensions of both plotted states, UCr and iLj are the same. Thedimensions can be made equal by multiplying iLj with ZOr' which equals the impedance ofthe resonant circuit at the resonance frequency wor ' The circle which describes a resonancehas three relevant properties. Namely, its angular frequency WOr' its center M and radius R,as can be seen from figures 1.5(a) and 1.5(b). M and R can be derived from Equation 1.5resulting in

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1.1. TOPOLOGY EXPLAINED 15

M ((UCr), ZOr (iLf)) = (UCf'O)

R V(Ucr - (UCr))2 + Z5r(iLf - (iLf))2

V(Ucr(tn) - UCf)2 + Z5Jif (tn)

where t n = t2 or t n = t6 and () used to indicate a mean value.

Figure 1.5 clearly shows the circle parts of the resonant voltage commutations, which dueto the assumed constant UCf during the time-interval to .. ts, have a common center M. Thecircle parts are extended by cyan lines to emphasize that they are apart of a complete circle.The vectors in figures 1.5(a) and 1.5(b) emphasize the center and radius of the circles.

Z ihi'

IT---~--!

I ' ,, , ,I I L,, , L

t:,; _.-;....:-+--__VP

Z ihi',

R

-~

o UcfUer [Vj

Us-

I,,,,,,,,,-:-M, ,,,,I,I,I,,

~ I

,t,] "'-.l --A. I

~ ~7

o

Zilo'

Us+Ucf 0Uer [Vj

Us-

(a) (b)

Figure 1.5: State-plane of UCr and ZOr . iLf

Zero voltage turn-on is only achieved if the parallel diode is conducting before a switch isturned on. This is only achieved if Or is completely charged or discharged during the reso­nant voltage commutation. To make a complete commutation of UCr, from Us+ to -Us- orvise-verse possible, R has to be larger compared to Rmin. Where Rmin is the minimum radiusneeded, as it is shown in Figure 1.5. UCf is assumed constant during the resonant commu­tation and UCr(tn) is determined by the state of the switches before turn-off. Therefore, R

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16 CHAPTER 1. THEORY OF THE RESONANT POLE INVERTER

r------,-----------~------,------. ---~

O.75Us -

,J' O.5Us

I I-O.~S-----C::-:O.5USO.75Us Us

-o~5·'ccUs-------D=-=.2-'cc5UC-S -----~O----

o 0.25Us a.susUalVj

O.25Us 1-- - - - - -. - - --- ---- - -. - - -,- --- - -- - - -.- - - -- -- --\

SymmelricalSingle

Figure 1.6: Normalized iLfmin for a symmetrical and single supply

can only be controlled by iLf(tn), where n = 2 or n = 6. To ensure the natural commutationthere should be a bound on the minimum current at turn-off iLf . .mm

Equation 1.6 shows this bound on liLfl

liLfl ~ iLfmin = Z~r vi (Us+ + Us- ) (Us+ - Us- - 2UCf ) I (1.6)

where iLfmin is equal to the minimum liLfl that is needed to ensure resonant commutation.A complete derivation is included in appendix B. Equation 1.6 can be simplified for twofrequently used situations, namely for a symmetrical supply voltage

(1.7)

where ~Us = Us+ = -Us- [2] and for a single supply

liLfl ~ iLfmin = ; .!UsIUs - 2UCf l (1.8)Or V

where Us = US+ and Us- = 0 [4]. From bound (1.6) it can be seen that iLfmin is afunction of UCf and the Us, depicted in Figure 1.6.

Due to the circuit delay Td the voltage has to be clamped by the diode over a period Tdfor complete zero voltage switching to occur. This can be seen from Figure 1.5(a), whereIRI ~ IRminl· At t = t7 the transition is completed, the diode starts conducting and turn-onof 81 is initiated but is, due to the circuit delay, delayed by Td. Because IRI ~ IRmin I thediode conducts only for a moment after which a resonance occurs. After the delay, at t = to,81 is switched on and Cr is clamped to US+. This clamping results in turn-on losses equal tothe energy needed to charge the capacitor to US+ and would not occur if Td = O. Therefore

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1.1. TOPOLOGY EXPLAINED

a small margin has to be add to this minimum needed current.

17

In this section Cr is assumed constant. In practice the non-constant (voltage dependent)drain-source capacitance of the switch will be used in combination with a parallel capacitorto generate the resonant commutations. Therefore, the voltage dependent behavior of thedrain-source capacitance has to be included for the determination of iLfmin' Also in practicea fixed dead-time can be used, instead of initiation of the turn-on directly after the resonantvoltage commutation, this fixed time will influence iLf . and has to be included when iLf .

m~n m~n

is determined.

1.1.3 Hysteresis Current Controller

The output current of the inverter leg is regulated by the hysteresis current controller, as itis depicted in Figure 1.1. To achieve ZVS, the hysteresis current controller has to obey therules determined in the previous sections. Namely;

1. Turn-off of 81 can only occur if iLf > iLfmin > 0

2. Turn-off of 82 can only occur if iLf < -iLfmin < 0

3. Turn-on, of both 81 and 82, can only occur after that the parallel diode is conductingand before i Lf = 0 occurs.

The inductor current iLf can be approximated by a triangular shaped waveform, whenassuming UCf constant during a switching cycle, Td ;::::; 0, and fast resonant voltage commu­tations, t3 - t2 >> t2 - to and t7 - t6 >> t6 - t3. Using these assumptions the followingequation can be derived for hysteretic current control

.* ( , ) , 1 ( '* '* )Zset = zLf = ZL = 2 zhi + zZo (1.9)

where i hi and ito are the turn-off levels of the hysteretic current controller, i;et is theset-point for hysteretic current control and ( ) denotes a mean value.

From this equation different forms of hysteretic current control can be derived. Commonlyused forms are fixed and variable hysteretic current control. In this section variable [3] [8]hysteresis current control will be discussed, as it is shown in Table 1.1

Table 1.1: Turn-off levels for variable hysteresis controli;et < 0 i;et ~ 0'* ' i hi = 2i;et + ithzhi = Zth

i/o = 2i;et - ith '* 'zZo = -Zth

where ith' the minimum current for which turn-off can occur, is chosen constant equal to

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18 CHAPTER 1. THEORY OF THE RESONANT POLE INVERTER

,,,

-r-------------

I

. -,----'"'----r :Ith I I I

___________ ~ ' L ~

: : : i,, ,, ,, , ,

------------~-------------,-------------r-----------

, , ,, , ,, I ,I I ,

I I ,I I------------T-- -----------1-------------------------

II

I

II

-1.5 -------- -----------------:----------- "~ ----------, ,,,,

I ,-2 - - - - - - - - - - - - I - - - - - - - - - - - - -I - - - - - - - - -

I ,

I II )

--- - -r---------,-----,------;:====;;r2 - - - - - - - - - - - - ~ - - - - - - - - - - - - -: - - - - - - - - - - - - - ~ - - - -- ihi

, ,, ,

,,

I I I i~o1.5 - - - - - - - - - - - -: - - - - - - - - - - - - -:- - - - - - - - - - - - -: - - - '-----__

, , ,, ,, ,, ,

------------T-------------I----------, I, I, I, I, I, I ,

-------------------------~-------------~---------

II

0.5

S'.eo 0.-0

-0.5

-1

-1 -0.5 o 0.5

Figure 1.7: Turn-off levels as a function of i~et

Figure 1.7 depicts the turn-off levels as a function of i~et for variable hysteresis currentcontrol. Currents are normalized to i o , which equals the maximum output current of theinverter.

This method of hysteretic current control result in a varying switching frequency fs"W, andconsequently current ripple amplitude of iLj, of the inverter leg. As it can be seen from thefollowing equation

(1.10)

which is derived in Appendix D.

In Appendix C fixed hysteretic current control, and a combination of fixed and, the inthis chapter discussed, variable hysteretic current control is explained. The hysteretic currentcontrol schemes which are explained in this section and in Appendix C use a fixed ith, resultingin levels which are a function of i~et' instead of ith = iLjmin' which results in turn-off levelsthat are a function of i~et and UC j' Those more complicated hysteretic current controllers willresult, on average, in a smaller current ripple, and consequently less conduction losses. Evena smaller ripple is possible by making use of the quadrant in which te amplifier is operatingas it is discussed in [8]. More complicated hysteretic current controllers require that the stateUCj is available. In general, UCj is available to make the calculations to ensure ZVS during

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1.1. TOPOLOGY EXPLAINED 19

clipping mode operation, as it will be explained in the next section. ith will be assumedconstant and equal to max (iLjmiJ in the following sections.

1.1.4 Resonant Current Commutation

When assuming a constant output current during one switching cycle, which is true if L j <<LL1 , the output filter resonance can be modeled by the equivalent circuit depicted in Fig­ure 1.8. This equivalent circuit contains both a capacitor and an inductor. This will resultin resonant behavior of the circuit, which was neglected in the previous sections due to theassumed constant UCj. In this section the resonant behavior of the output filter will be ex­plained using the state-plane analysis method. For the readers who are not familiar with thistechnique a short introduction can be found in Appendix A.

UCr

+

UCf +Cf

(1.11)

Figure 1.8: Equivalent circuit for output filter resonance

Figure 1.9 depicts the steady-state time-domain and state-plane plots of UCj, which isa function of time and consequently not assumed constant anymore, and iLj during steady­state operation, using simulated data. During time-interval t7 ..t2 81 or D1 is conductingand during time-interval t3 ..t6 82 or D2 is conducting. During time-intervals t2 ..t3 and t6 ..t7

the resonant voltage commutation occurs, the switching delays are for clarity of the figurenot indicated. The circuit delay of the switching logic Td is also clearly visible resulting insignificant overshoot of the turn-off levels, which are indicated by ii!i and ito'

From Figure 1.9(a) and Figure 1.9(b) it can be seen that iLj is approximately triangularshaped despite the voltage ripple of UCj and the resonant voltage commutation. This justifiesthe earlier made assumption, that currents can be approximated triangular for a limitedoutput voltage and current. When using this assumption, the steady-state output voltageripple amplitude can be determined from the following equation

A ~ (iset + i th)2Lj(Us_ + Us+)UUCj =

4Cj (UCj + US-)(US+ - UCj)

where the influence of Td is assumed negligible, UCj is the mean output voltage, ~ denotesa amplitude or peak value and ~UCj equals the output voltage ripple.

If Td is significant (iset + ith) has to be replaced by the ripple amplitude of iLj. An exactderivation of the output voltage ripple is possible but will lead to elaborate equations and

lIn practice Lf wil be chosen significantly smaller than LL to limit the output current ripple.

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20 CHAPTER 1. THEORY OF THE RESONANT POLE INVERTER

are therefore not insightful. Equation 1.11 in turn can be rewritten for both a symmetrical­supply (1.12) and a single-supply (1.13) and a derivation of the output ripple voltage can befound in Appendix E

(1.12)

(1.13)

ihi*

_ isetO~

Us·

° -- - .-

Us-

to t1 t2t3 t4t[s]

10 t1t21314t[s]

(a) iLl as a function of t (b) UCI as a function of t

t1 t2

RUs

_

:Mus+I L__~-----------------1

I ~w I R~+- - - - - - - - - - - - - - - - - - r- - - - - - - -1- - - - - - - - - - - - - - - -,- - - - - - - - - - - - - - - -

, ,,,,,,,,,,,,

lD IhlOI

lD ,setoL-------

~ o~~ ---------------.,_C; lD 110°1r--P !

I

---Us- 0,5Us- ° 0,5Us+ Us.

UCf IV]

(c) State-plane of uCI and ZoiLI

Figure 1.9: uCf and iLf during normal operation

Figure 1.9(c) depicts the state-plane plot of uCf and ZOiLf' A total cycle consists of tworesonant current commutations and two resonant voltage commutations, of which the voltagecommutations can be neglected. During the time-interval to ..tl 81 or D1 is conducting. UCris clamped to Us+ and a resonance between L f and Cf occurs with radius Rus+ and center

IMus+

((UCf), ZO(iLf)) = (Us+, ZOiL)

V(Ucf - (ucf) )2 + zg (iLf - (iLf) )2

V(UCf(t7) - US+)2 + Zg(iLf(t7) - iL)2

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1.1. TOPOLOGY EXPLAINED 21

where Zo equals the impedance of the resonant circuit containing Lf and Cf and equals

&ye;'

At t = tl 81 is turned-off and a resonant voltage commutation occurs, where UCr isdischarged until UCr = Us- at t = t22. After that D2 starts conducting and 82 is turned­on resulting in a resonance between Cf and Lf with the following radius and center in thestate-plane

Mus_

Rus_

(Us-, ZOiL)

V(UCf(t3) + US_)2 + Z5(iLj(t3) - iL)2

During time-interval t3 ..t4 the second resonant voltage commutation occurs which can beneglected also.

When the output current and voltage is limited, iLf can be approximated by a triangularwaveform despite it is really part of a sinusoidal waveform. This is because only a small partof the sine-wave, which is a complete circle in the state-plane, is covered during the resonantcurrent commutation. If the output-voltage uCf comes close to one of the supply rails, or ifi;et is large compared to 1

0US+, or 1

0Us-, the triangular currents will become more sinu­

soidal until clipping occurs, which will be explained next.

Figure 1.10 depicts the time and state-plane plots during voltage clipping of the inverterleg. Clipping occurs if the output voltage uCf equals or gets a higher value than one of thesupply rails and, therefore, iLf cannot reach the turn-off levels. During time-interval to .. tlDl or 81 is conducting, depending on the switching state, which is followed by a resonantvoltage commutation. At t = t2 D2 starts conducting and 82 is turned on which keepsconducting until t = t3, after which another resonant voltage commutation occurs. Despitethe increasing output voltage, currents keep an approximate triangular shape. Also since aconstant circuit delay Td is used the overshoot, the difference between the turn-off level andthe actual current at the turn-off instance, is dependent on d~~f and consequently uCf. Att = t4 Dl starts conducting and 81 is turned on again. Due to the increasing output voltage,due to the fact that i;et > iL, the radius of the resonance keeps decreasing until it is too smallto make a level-hit possible and a resonance occurs, indicated by the circle in Figure 1.10(c).The output filter will keep resonating until the level i hi is hit. During the resonance theoutput current iL will change if there is a difference between UCf and eL + iLRL, a changeof iL will result in movement of the center of the resonance and can therefore eventuallyresult in a level hit and consequently switching of the inverter-leg. However, there are a fewdisadvantages of this resonance:

• In many applications a bootstrap circuit is used to create the voltage needed to enablethe upper switch (81). When using a bootstrap circuit there has to be a bound on themaximum duty-cycle (8 < 100%). Therefore the inverter-leg has to keep switching anda resonance, while one switch is continuous conducting, is not allowed.

2Due to the short time-interval in which this resonant transition occurs it is not clearly visible from thestate-plane and time domain plots of Figure 1.9.

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22 CHAPTER 1. THEORY OF THE RESONANT POLE INVERTER

• If no outer-loop current controller is used for stiff current-control, the output currentcan change to undesired values or if the radius of the resonance is small it can result ina total stop of the inverter-leg.

• The amplitude of the resonance is dependent on the initial conditions of the state­variables and can be very large, resulting in large circulating currents.

An advantage of the resonance is that the maximum and minimum possible average out­put voltage UCf can be reached, namely 100% and 0% PWM.

The resonance has to be considered also when disabling a RPI. If the inverter is dis­abled, both switches are turned-off and a resonance will occur. To limit the amplitude of theresonance the output voltage and current have to be controlled to acceptable values beforedisabling the inverter.

Iihi*

iset"

~ Ho'

il

tOt1t2t3t4

:--,----r;,-----­,,

Us+ ·_·-f--'f--~-_·

Us-

t[s]

(a) iLl as a function of t

t [s]

(b) UC I as a function of t

a Us+

12t 1

a.5Us+

RUs

_,,-------~------------

,-------1-----------

,-------- ,

,,,,,,,,I

,,

~- .__ .. _-_ . ..,---~

a.5Us-

lD ihi'

lD iset'

Us-

a -----------~ Zoilo'"r-f lD il

~s-

Uo [V]

(c) State-plane of UCI and ZaiLI

Figure 1.10: uCf and iLf during clipping mode operation

There are different possibilities to keep the inverter-leg switching during clipping-mode op­eration. Chosen is to implement an additional turn-off criterion, for instance allow a turn-offif a turn-off level is hit or if d~~1 reaches a certain preset value. ASML currently implements

d~~1 = 0 turn-off as an additional turn-off criterion in its amplifiers. Figure 1.11 shows thetime-domain and state-plane plots during clipping-mode operation. From Figure 1.11 it can

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1.1. TOPOLOGY EXPLAINED 23

be seen that UCI is increasing in the same way as it was explained earlier, also the currentovershoot due to the circuit delay Td is clearly visible. At t = t4, D1 starts conducting and81 is turned-on again resulting in an increase if iLl until d~~[ = 0 is reached at t = t5, afterthat 81 is turned-off and a voltage commutation occurs.

,,,,,,,,,--------, ",., .

HiliII III41 III

tOI1 121314 15161718

Us- -

101112131415161718

iL

t[s]

(a) iLj as a function of t

t[s]

(b) UC j as a function of t

a.5Us+

RUs

_

aa.5Us-Us-

Zo ihi'

Zo isel'Zoith ---------.--- ------:--------­

o ------------------:---------._~ 20 ilo· - - - - - - - - - - - - - - - - -:- - - - - - - - - - - - --

Zo iL ~___=__=__=__- - - - - _1- - -

~- ~----------:---

(c) State-plane of UCj and ZaiLj

Figure 1.11: uCI and iLl during clipping mode operation with di/dt = 0 turn-off

During clipping-mode operation, measures are required to achieve ZVS of the inverterleg. In Section 1.1.3 three rules are stated which have to be obeyed by the hysteresis currentcontroller to achieve ZVS, namely;

1. Turn-off of 81 can only occur if iLl> ith > 0

2. Turn-off of 82 can only occur if iLl < -ith < 0

3. Turn-on, of both 81 and 82, can only occur after the parallel diode is conducting andbefore iLl = 0 occurs.

where ith is chosen constant and larger than max (iLlmin) .

A turn-off if iLl has not reached the minimum required level can result in an incompleteresonant voltage commutation and consequently no zero voltage turn-on3 . Also during clip-

3 Also turn-on of a switch if the current has the wrong sign will result in reverse recovery losses.

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24 CHAPTER 1. THEORY OF THE RESONANT POLE INVERTER

ping mode operation when using an additional turn-off criterion, like d~~t = 0 turn-off, theserules have to be obeyed. To make sure that the minimum required current for turn-off isreached for all conditions measures are required.

At t = t6 82 is turned-on resulting in a fast resonant current commutation. Normallyturn-off of 82 would be initiated if the level i/o is hit. However, it is required that ith isreached after the following slow current commutation. To achieve this Ract4 , which is indi­cated in Figure 1.11 (c), has to be larger or at least equal to Rmin. Therefore turn-off of 82is inhibited until R act = R min , due to the circuit delay Td turn-off is delayed until t = t7resulting a R us+ larger than the minimum required Rmin . If Td = 0 and the resonant voltage

commutations are neglected d~~t = 0 will occur when iLf = ith. In practice the circuit delaycan be compensated resulting in much less overshoot.

From the previous it can be concluded that, when clipping against the positive rail, turn­off of 82 has to be inhibited as long as R min 2: R act , resulting in the following

Rmin > Ract R::j Rus+Zo lith - iLl > J,-(U-C-f------'U"-'S-+-)-2-+-Z-0-2-(i-L-f---Z-·L-)2

which holds if iL :::; ith, however if i L < 0 no action is required.

(1.14)

Also for clipping against the negative rail a similar equation can be derived. To preventhard-switching, when clipping against the negative rail, turn-off of 81 has to be inhibited aslong as

R min > R act R::j Rus_Zo lith + iLl > J'-(U-C-f-+----'U"-S---)-2-+-Z-O-2-(i-L-f---z-·L-)2

which consequently holds if iL 2: -ith, also if iL < 0 no action is required.

(1.15)

Equations 1.14 and 1.15 will result in a circular area of the state plane with a radius equalto Rmin for which turn-off has to be inhibited, which requires a lot of computational power.The circle can be "approximated" by a square resulting in conservative but much simplerequations saving a lot of computational power.

During clipping mode operation iLf will cover approximately one half of a sine-waveduring the slow current commutations, as it can be seen from Figure 1.11(a). This resultsin an absolute minimum switching frequency during clipping mode operation approximatelyequal to

2fSWmin R::j 21rJL

fC

f(1.16)

which is valid when d~~t = 0 turn-off is used and neglecting the fast resonant currentcommutation, resulting in a minimum switching frequency fSWmin and is approximately equal

4 R act is equal to Rus+ during the following slow current commutation if Td and the resonant voltagecommutation are neglected.

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1.2. SMALL-SIGNAL MODEL

to two times the resonance frequency of the output filter of the inverter-leg.

25

During clipping mode operation, measures are only required if the inverter is operating inquadrant 2 of 4, if the sign of i L is not equal to the sign of 1/'0f. This results in a maximumpeak to peak output voltage ripple which is dependent on the quadrant of operation and canbe determined from the following

, quadrant 1 and 3, quadrant 2 and 4

(1.17)

where Td = 0, the resonant voltage and the fast current commutations are neglected andtherefore will only hold for a limited output current range.

1.2 Small-Signal Model

A linear model of the RPI can be derived using the sampled-data modeling method. Thesampled-data modeling method leads, via compact and powerful notation, to disciplined de­scriptions for large-signal numerical simulations and to the derivation of small-signal linearmodels that describe perturbations about a nominal cyclic steady-state [9]. The sampled-datamodeling method, which is discussed in [9] and [10], is not within the scope of this reportand will therefore not be discussed in depth. Appendix M contains the Matlab scripts usedto create a discrete linear model using the sampled-data modeling method. The used model,which is depicted in Figure 1.1, assumes ideal switches with no on resistance. The complexity,number of states and components, of the models created using the sampled-data modelingmethod is free of choice. However, the outcome of such a discrete model is not very insight­ful. This section will discuss a more insightful model of which some component values will bederived using the sample-data modeling method.

When assuming ideal triangular currents and a circuit delay equal to Td the RPI can bemodeled by a controlled current source, with unity gain, a parallel capacitor Gf , a parallelimpedance Zout and a load ZL. Figure 1.12 depicts this model, where ZL represents LL andRL, with an added delay which is due the circuit delay and the hysteretic current controlswitching scheme.

UCf +Cf

Figure 1.12: Linear model with added delay

Resulting in the following open-loop transfer-function

(1.18)

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26 CHAPTER 1. THEORY OF THE RESONANT POLE INVERTER

The average delay is dependent on the type of hysteretic current controller that is usedand the circuit delay Td and is equal to

1oT ~ -f + Td, (1.19)2 sw

for the variable hysteretic current control method discussed in Section 1.1.3. In practiceTd will be small or can be compensated for and can be neglected in most applications. How­ever, if the control-logic is implemented digitally there might be a significant delay betweena change of the set-point and the turn-off levels which has to be included.

Zout and G can for ideal triangular current be determined from

Zout

G(1.20)

which is valid when assuming a constant output voltage and neglecting the resonant volt­age commutations and is derived in Appendix F. However this assumption is only valid ifthe switching time period is much longer than the time needed for a resonant voltage com­mutation. For small i set and UCf this is generally not true. It is possible to determine Zout

and G using the sampled-data modeling method. Appendix M.5 contains a Matlab scriptwhich can be used to estimate Zout and G from a model determined using the sampled-datamodeling method. Figure 1.13 depicts the transfer-function of both models for the currentlong-stroke amplifier of ASML. The model created by the sampled data modeling methodand the simplified model will be verified with measurements in Section 3.2.2.

The sampled data modeling method uses an iterative process to determine the steady­state information needed to derive a discrete model. This will result in long calculation timesif Zout and G needs to be determined over a large operating area. Appendix G discusses analternative, faster, method to determine Zout and G and gives more insight in the gain andimpedance as a function of the current set-point and output voltage.

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1.2. SMALL-SIGNAL MODEL 27

10'10'10'10'-120

10'

20C -'--~~'---'---'--I'I'I T"'-"~~---'-~-'---'I---'-I-,,--,,'I" ~---'------'~'---'---'--I'I'I'I~--"M~l

o ------- ----- --~-r~~_ -::-:--~~_::_f_,._. ---r::-~~-- : ._....._....,~:~::t:e:~~-20 ------- --- ---- --~-_,--,-,-j'"------- --, ----, --_: : ~-,-~--- ----------------, -,-,-,"1--------- deriloed linear mooel

_______ --'__ __ __ ~: : : : : with:O.5Tsw deIaY

I

.~ :::----- :--::.:-:~~:~.-._-----_.------:-:-::---------- ...!Jf-~:-~-100 -- - - - -- - - - - -,- - --------- --:--- -:-::- -----------------:--

I ! __ l_-----.l . --.----1.- : ': I :

Figure 1.13: Transfer function of the sampled-data model and the simplified model for Us =700V, Cr = 7nF, L f = 33J.1H, Cf = 7.2J.1,F, LL = 18.3mH, RL = 2.3[2 and q = 350V

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Ch.apter 2

Theory of Interleaved Paralleling

Interleaved paralleling is a frequently used technique to improve the dynamic behavior ofinverters and converters [11] [12] [13]. Interleaving is also often used for minimization of theoutput magnetics [S] and current ripple cancelation [13] [14] [15]. A lot of research has beendone on this subject, however little research is done on interleaved paralleling of the RPItopology. Three interleaving techniques, which are compatible with the RPI topology, werefound in literature during the writing of this report. Firstly, paralleling of a high number ofindependent RPIs, where interleaving is achieved by chance [S]. Secondly, the use of controlramps which are added to the turn-off levels [12] [13]. And finally, the use of weak magneticcoupling between the output filter inductances [Sp.

This section starts with comparison between parallel interleaved modules and a singlemodule. After that interleaving using control ramps will be explained and finally methods tointerleave modules during clipping-mode operation will be discussed in depth.

2.1 Comparison of Single and Parallel Modules

In this section a single module will be compared to N interleaved parallel modules. To make acomparison possible the following assumptions are made. Namely; The switches of the singlemodule consist of N parallel connected switches and resonant capacitors Cr, as it is depictedin Figure 2.1. In this way the total area of silicon, and consequently the current density, perswitch is the same. Also the supply voltage Us, the filter inductors L f , the resonant capacitorsCr per switch and the maximum output voltage ripple are chosen the same for both topologies.

When using these assumptions, conduction losses in the switches and inductors will onlybe the same for both compared topologies if iLf is N times smaller for the parallel modulescompared to a single module. This is generally not true because ith cannot be reduced by afactor N. Also the maximum d~tr, which determines the turn-off losses and much of the EMemission of the module, is dependent on the iLf at the turn-off instances. However for thehigh i:et , the inductor current iLf will be approximately N times smaller for parallel modulesas it will be explained next.

lThis method has been investigated for use with parallel boost power-factor correction converters but can,due to the chosen switching scheme, also be used for the RPI topology.

29

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30 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

J

c, Ie<

J

(a) A single module consisting of N branches (b) N parallel interleaved modules

Figure 2.1: Topologies used for Comparison

If the Cr per switching branch is assumed the same for both topologies, it can be de­termined that the threshold current for the interleaved modules ithi is a factor yIN smallercompared to the threshold current of a single module i th , as it can be seen from the following

ith JNCr uLf S

Zthi /¥jU (2.1 )Lf S

ithi1 .

..JNZth

where the index i indicates parallel interleaved modules.

In practice i;et often will be more than 2.5 times larger compared to ith. This will result ina smaller than 10% error of the maximum current, compared to the assumed N times smallermaximum current, for up to N = 3, if the yIN smaller ith is used for the parallel modules. Toillustrate this, the long stroke-amplifier designed by ASML has the following specifications.

i;et = 25A

ith = 7A

This will result in a maximum inductor current of

iLf = 2i;et + ith = 57A

Assuming N = 3 and ithi = J-Nith the maximum inductor current will become

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2.1. COMPARISON OF SINGLE AND PARALLEL MODULES

~ 2 ~* ith~Lf = N~set + VN = 20.7A

resulting in a 8% difference from the desired N times smaller maximum current.

31

Now a comparison can be made assuming the losses in the switches approximately thesame at maximum i set , for both topologies, however for zero set-point, conduction losses inthe switches will increase by a factor N for N parallel modules. Also switching losses will bea little higher due to the increased switching frequency. If this increased switching frequencyis not allowed for the used switches, a hysteretic current controller using a combination ofvariable and fixed hysteresis control can be used, as it is explained in Appendix C. This willalso influence the total power-loss of the interleaved parallel RPI.

For a comparison which assumes equal total power-losses of both topologies, or if the ratiobetween i;et and ith is smaller, a more detailed comparison has to be made to investigate ifit is beneficial to use interleaved paralleling. However, this will result in too detailed andelaborate equations which makes a theoretical comparison not meaningful.

Because the maximum stored energy is proportional to Lilf a smaller maximum current

will result in a smaller inductor volume. The volume will decrease by a factor of N 2 , whenkeeping the energy density and the inductance constant, which will result in a decrease in

4footprint area2 of N"3 if the height, width and length of the inductor decreases by the samefactor. For N parallel inductors, which are needed for interleaved paralleling of N modules,

Ithis will result in a total decrease in PCB space by a factor of N"3. Of coarse the decrease involume is only possible if the window size of the inductor allows it.

The maximum average output voltage ripple occurs during clipping mode operation. If thed~~t = 0 turn-off is used as an additional turn-off criterion, as it is discussed in Section 1.1.4,the maximum average ripple voltage for a single module (!1uCf) and for N parallel interleavedmodules (fj"uCfJ can be determined from the following

(2.2)

(!1uCf,.) lliLI+ithi J Lt7r v'N k·Ct

where i L is the maximum load current and k is a factor by which Cf can be decreased toachieve the same output current ripple. !1uCfi is derived in section 2.3.

If (!1uCf) is assumed equal to (!1uCfJ, k can be determined and is equal to the followingequation.

, ithi = ith

i = _l_i,thi v'N th

(2.3)

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32 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

For the specifications of the current long-stroke amplifier of ASML and ithi = J-Nith this

will result in the following ratios for k

ith = 7A

k = 0.44 , for N = 2k = 0.27 , for N = 3

which results in a filter capacitor Of that can be reduced by a factor larger than N. How­ever in practice the factor N can be used as a rule of thumb.

An N times smaller filter capacitor will result in an increase of the bandwidth by a factorof .;N, of the used hysteretic current control scheme. But more important the minimumswitching frequency will also increase by this factor, which results in a .;N decrease of thedelay introduced by the hysteresis current controller. Also a decrease in delay by a factorof N will occur due to the interleaving of the parallel modules which will result in a totaldecrease of the delay by factor N.;N if the modules are perfectly interleaved. In practiceperfect interleaving is only achieved during steady-state operation, Therefore, if outer-loopcurrent compensation is applied, the designed controller has te be robust for the changes ofthe introduced delay during transients. Table 2.1 contains a summary of the in this sectioncompared quantities, which are valid for i;et >> ith, as it is explained in the beginning of thissection.

Table 2.1: Comparison of a single module to N interleaved ModulesSingle Module N interleaved modules

Resonant capacitor Or Or [F]Filter inductor L f L f [H]Volume L f V ~V [m3

]

Total area inductors A N-~A [m 2]

Threshold current ith1 . [A].jNZth

Filter capacitor Of flOf [F]Delay a STd N~ST [s]

adue to hysteretic current control assuming Td = 0

The following conclusions can be drawn from this analysis.

• Parallel interleaving will most probably not result in a increase or decrease of the neededboard-space. The total area of the inductors might decrease slightly but not significantly.

• The losses at high currents will be approximately the same for both topologies if thethreshold current ith is significantly smaller compared to the maximum set-point currenti;et. However, the losses at zero current will increase.

• Decrease of the filter capacitor Of by a factor of N will increase the open-loop bandwidthof the RPI by a factor of.;N. Furthermore the delay introduced by the hysteresiscurrent controller can be decreased by a factor of N.;N if the modules are perfectlyinterleaved. This results in a significant increase of control bandwidth.

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2.2. INTERLEAVING USING CONTROL RAMPS 33

(2.4)

Also the following has to be considered when choosing between a single module usingparallel switched and independent parallel interleaved modules.

• When designing a single module using parallel switches it is hard to guarantee that allswitches turn-on, and off, simultaneously. If not, one switch might temporarily conductmore current and might derate or fail when a turn-off occurs. Turn-on is not an issuebecause it is generally done more slowly when the body diode is already conducting.

• This comparison was made using equal filter inductances Lj for both compared topolo­gies. Also other comparisons are possible for instance the open-loop bandwidth canbe assumed constant resulting in a lower switching frequency per module which mightenable the use of other switches like IGBTs instead of MOSFETs.

• Due to the phase staggering the output ripple current will be reduced significantly.

2.2 Interleaving using Control Ramps

From the three methods of interleaving found in literature the use of control ramps, as sug­gested in [12], is chosen for this investigation because the interleaving proces can be activelycontrolled and will be explained in this section.

2.2.1 Theory of Convergence

Figure 2.2 shows two triangular current waveforms, namely the desired waveform (dashedblue) and the actual waveform (solid blue). The control ramps are indicated by the dottedblue lines and are added to the normal turn-off levels, which are indicated by the dashedblack lines. From Figure 2.2 it can be seen that the actual waveform slowly converges to thedesired waveform. This is due to the control ramps which are aligned intersecting the normalturn-off levels at tops of the desired waveform.

The time difference, after a switching cycle, between the actual and desired current wave­form can be determined from

!1T. - (atip - atrn) (atin - atrp) !1T.HI - (atin - atrn) (atip - atrp) k

where !1n equals the time-shift between the actual and the desired waveform at the be­ginning of a cycle and !1Tk+I represents the time-shift after one cycle. at is the 1ft operator,ip represents the current iLj if 81 or D1 is conducting, in equals the current iLJ if 82 orD2 is conducting and atr is the derivative to time of the corresponding control ramp. Thederivation of Equation 2.4 can be found in Appendix 1.

Stability of the interleaving mechanism is achieved if the absolute value of the result ofthe polynomial is smaller than one. Dead-beat control is achieved if atrn equals atip or if atrpequals atino The amount of control action can be set by introducing k as a gain factor settingthe slope of the control ramps, where k = 1 will result in dead-beat control and k = 0 in nointerleaving. This results in

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34 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

+ .I

'------c!;- +- _t[sJ

Figure 2.2: Steady-State Convergence using Control Ramps

. .

I

_ ..-~2T

(2.5)~ _ (8t ip - k8t ip ) (8t in - k8t in ) ~T.

Tk+l - (8t in - k8t ip ) (8t ip - k8t in ) k

where stable interleaving is achieved if k > O. Notice the asymptotical behavior of theequation for k i- 1, as a consequence ~Tk will never reach zero. However, in practice almostideal interleaved switching is achieved in a limited number of cycles.

By substituting 8t ip with If (Us+ - uCf) and 8t in with if (-Us- - uCf) and making use

of a symmetrical supply ~Us = Us+ = Us-, Equation 2.5 can be rewritten to the followingequation.

(2.6)U o = ~CUf E [-1..1]

'2 s

where U o equals the normalized output voltage.

Now it can be seen that the control action per switching-cycle is depended on k and uCfand does not depend on the current amplitude. In this way the control action can be set fromno control to dead-beat control using k E [0.. 1].

2.2.2 Implementation of Control Ramps

To achieve steady-state interleaving the control ramps have to be aligned properly. In [12] amaster-slave structure is suggested which will be explained next.

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2.2. INTERLEAVING USING CONTROL RAMPS 35

Figure 2.3 shows the current waveforms iLl of 3 parallel interleaved modules and thecorresponding filter capacitor current iCI' The master-module (blue) does not use controlramps and the switching periods t:::..T are sampled and stored. For the placement of the rampsduring switching period t:::..Tp[k], where p denotes positive ramps, the duration of the previousswitching period t:::..Tp[k - 1] can be used. This will result in steady-state interleaving. How­ever, during a transient a change in switching frequency will occur, which will result in analignment fault, as it can be seen from the step-response depicted in Figure 2.3. The rampsduring t:::..Tp[k -1] are aligned using switching period t:::..Tp[k - 2]. Switching period t:::..Tp[k - 2]is much shorter than period t:::..Tp[k - 1] and therefore the ramps are not placed correctlyduring this cycle. The same applies for the negative control ramps, denoted by n'

Also other methods to determine the placement of the control ramps can be used. Forinstance the switching period times of all modules, or a moving average of those times, whichresults in faster recovery after a transient. Figure 2.4 shows the filter capacitor current iCI'which is a measure of the interleaving performance, for three methods to determine rampplacement. Namely, using the switching period times of the master module, using the mostrecent available switching time of all modules and a moving average of N switching times ofall parallel modules. Figure 2.4 clearly shows an improvement of the interleaving performanceduring a transient compared to the use of the master module switching times, as suggestedin [12], while maintaining the same steady-state performance.

---_.._-~~~~~-

Figure 2.3: Interleaving for N = 3 explained

In Section 1.1 is was concluded that iLl must be equal to, or higher than, ith to makea complete resonant voltage commutation possible. Therefore the control ramps have to beclipped to prevent a turn-off level which is lower than ith. In this section the positive turn-offlevels including the ramps are clipped to ith and i hi ± ~ihi' where ~ihi is denoted by t:::..rp, andthe negative turn-off levels including the ramps are clipped to -ith and iio ± ~ilo' where ~iio isdenoted by t:::..rn , as it is indicated in Figure 2.3, 2.5 and 2.6. However, this can result in mul­tiple hits of the control ramps during a switching cycle. This can be seen from Figure 2.5(a),

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36 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

15---------,----------~-----

_Tsw ' Master only

_Tsw ' Most resent

Tsw' MO-Ang awrage

:W/,VVIN··VAAA !\AA: i ... Vi· I: J j V--,.. 0'I·· •

c-i c - - - -- - - - - - -- - - -- - -,- -- - - - -- - - r --

-5-· .__.1_4 5 6

([51

_ I7

Figure 2.4: Ramp placement compared for, b..Lf

100J-LF and LL = 2mH0%, Us 160V, L f

where after the start of the cycle the first slave correctly hits its positive turn-off level (dottedred). After that the negative turn-off level is hit the current starts increasing again. However,the positive turn-off level is still clipped to its minimum value ihi - b..rp resulting in a turn-offwhich is not allowed. These unwanted hits can be prevented by disabling the control rampsafter a level hit until te beginning of the next cycle of the master module, as it is depicted inFigure 2.5(b).

2.2.3 Influence of Component Variation

The previous analysis was done using identical and ideal components and a fixed outputvoltage. Variation of the filter capacitor voltage uCf will result in a frequency deviationbetween successive switching cycles and consequently an interleaving error during transients.Component variation of the filter inductors Lf will result in a steady-state interleaving errordue to the difference in inductance, as it can be seen from Figure 2.6. The figure is generatedusing simulated data and the components are chosen the same as for the pre-prototype whichis discussed in Section 3.1. Variation of Lf has to be kept to a minimum to achieve the beststeady-state interleaving performance. Also the clipping levels of the control ramps have tobe set properly to ensure fast convergence and stability. Stability is achieved if the amplitudeof the control ramps b..r is set to

where b..Lf is equal to the component variation of L f .

If not, the currents of the slave modules will not turn-off due to a control ramp hit but by

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2.2. INTERLEAVING USING CONTROL RAMPS

(a) A double hit occurs after a change of set-point

/ /'vVVV\.u~AAAA!u. mmu..mmmmUmUmmmmmm..m. uumj--- ----------_.__ _ __.~ ..--_.------------

(b) Double hits are prevented by disabling the control-ramps after a hit

Figure 2.5: Double hits during one cycle, for N = 3, k = 1, and a constant UCf

37

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38 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

a hit of the clipped ramp. This will result in a insufficient time-shift of the inductor currentsof the slave modules to compensate for the inductance variance and therefore instability ofthe algorithm. Larger b.r will result in less clipping of the control ramps and therefore fastersettling times for large-signal transients.

~ O.5U

,[

! : I ';[ ! ! I II I i

..•.•-.---- Uo Master module

II , Uo Slaw module (1);

, .-,

--- - 1--1- _!uer Sla~ module (2) I

.U. J" I

! -"Ct

.L ~.. ~. ~ . ~ L. .J .U<ul0 ~. ~ . .. ~ -q,j

Figure 2.6: b.Lf = ±10%, Us = 160V, Lf = 120f.-tH, Cf = 100f.-tF and Ll = 2mH

In the previous section different methods to determine ramp placement are compared.Figure 2.7 depicts simulation results for the same three methods with a ±5% filter inductancevariation. Also with component variation interleaving performance during transients improvesif more recent switching period times are used, and the steady-state performance is notaffected. Even a beter transient response might be possible if feed-forward techniques areused. However, this is not investigated in this report.

Figure 2.8 shows the current through capacitor Cf , which is a measure for interleavingperformance, and the corresponding spectrum with 0%, ±5% and ±10% inductance variationof the filter inductors Lf. This plot is generated using simulated data with component valuesequal to the pre-prototype.

For identical filter inductors the spectrum is dominated by frequency components whichare equal to a multiple of N times the switching frequency of a single module kNfsw. Com­ponent variation of the filter inductor will result in extra frequency components equal to amultiple of the switching frequency of a single module kfsw, as it can be seen in Figure 2.8.These extra frequency components will result in a increase of the RMS ripple current and willtherefore result in extra dissipation in the filter capacitors.

2.3 Interleaving during Clipping-Mode Operation

In the previous section interleaving using control ramps was discussed during normal opera­tion. This section will discuss parallel modules during clipping-mode operation starting with

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2.3. INTERLEAVING DURING CLIPPING-MODE OPERATION 39

15,--------- ----,----------_Tsw ' Master only

_ Tsw

' Most resent

Tsw ' MO'oting awrage

10

-5;-1 _4

t[sj

Figure 2.7: Ramp placement compared for, b..Lf = ±5%, Us = 160V, Lf = 120f.-lH, Cf =

lOOf.-lF and L z = 2mH

:1~ ! I

! I I~~II JIi ~ I

1'''',,,,,,' "UI"J I. "I j ) I)-5

1 1.2 1.4 1.6 1.8 2

I [SJ X 10.3IISJ

II 'flU U!I~ I

,I eliI :11

I "',~,

1.2 14 1.6 1 B

:

-40

Ili,1-so~\ JI1m I.' Ii I I-so

V 1\ 'i I I,W,U\j ,11\1 II] 1,,1-, 'i ~'i~"-0

f[HzJ

(a) D.Lf = 0% (b) D.Lf = ±5% (c) D.Lf = ±10%

Figure 2.8: iCf compared for, Us = 160V, L f = 120f.-lH, Cf = lOOf.-lF and LL = 2mH

the explanation of the state-plane for parallel modules. After that the measures needed toensure ZVS will be explained and finally two mechanisms to interleave parallel modules dur­ing clipping-mode operation will be discussed.

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40 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

2.3.1 State-Plane for Interleaved Parallel Modules

Figure 2.10 depicts ideal interleaved currents iLf and output voltage uCf for N = 3 duringclipping mode operation to the positive supply rail, where Tsw equals f;;} and the resonant

voltage commutations are neglected. From Figure 2.1O(a)it can be seen that d~~[ = 0 occurssimultaneously for all N modules, which is due to the common filter capacitor Cf' Therefore,to make interleaving possible only the module which is supplying the maximum inductorcurrent iLf has to use the additional turn-off criterion to keep the inverter leg switchingduring clipping-mode operation3 . Between two fast resonant current commutations (t2 ..t3)the state of the switches in all N modules will be the same and the equivalent circuit depictedin Figure 2.9(a) can be used, where UCr = Us+ for clipping to the positive supply rail andUCr = Us- for clipping to the negative rail. Now a common impedance can be determinedfor the N parallel inductors, which is equal to

(2.7)

UCr UCrUcr +

Ct

(a) Slow current commutation (t2 ..t3) (b) Fast current commutation (tl .. t2)

Figure 2.9: Equivalent circuits during clipping mode operation for N = 3

Figure 2.11 depicts the corresponding state-plane, where the time instances tl, t2 and t3are indicated to increase the readability. Figure 2.11(b) depicts the state plane of the sumof all N inductor currents for clipping to the positive voltage rail. The 0 at t2 indicates thebeginning of the slow current commutation and Zn is used to normalize the current axis. Thecenter and radius of the resonance can be determined as follows

(Us+, ZniL)

(UCf(t) - Us+r+ Z~ C~ iLfi (t) - if.,rwhich is valid during time-interval t2 ..t3 and where time instance t = t2 equals the begin­

ning of the slow current commutation. Figure 2.11(a) depicts the state-plane for the individualinductor currents and can be determined from the state-plane of the sum of the currents byusing Zm for scaling.

3In this case d~~f = 0 turn-off is used, however other choices are possible.

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2.3. INTERLEAVING DURING CLIPPING-MODE OPERATION 41

,,,,

_ L_

1112

,,,,-----------------~ ---

13l[s]

(a)

Usp ~-""'-'%--""-,;;.--;;,.;;-;,;;;,-;;;,.;--"'-iio--",,-...---..,.,.,...,.,.,~"""-""'-"""-;;;,.;--...-';;'--;;,.;;-"""-;;,,;--""-""'------~-...-"'"--""-;,;;;,-;;;,.;--...-';;'-;;';;--"""-'*"-""""""1, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,, ,

, ,I [

l1t2

(b)

l[s]13

Figure 2.10: iLf and uCf for N = 3 clipping to the positive supply rail

(2.8)

The radius of the resonances of all N parallel modules are equal because the voltage acrossall N filter inductors are equal, which is due to the same switching state of all modules. Thecenter of the resonances of the individual modules, indicated by V (blue), can be determinedfrom i Lf (t2) of the individual modules, which is indicated by 0, and the radius of the res­onance. In the steady-state the current-waveforms will change between two levels centeredaround Zm ~. This because steady-state the current supplied by the amplifier is always equal

to the output-current. The factor N is due to the N parallel modules which supply ¥t currenteach. For clipping to the negative supply rail similar equations for the radius and center canbe derived.

During clipping-mode operation the fast resonant current commutation, which occurs dur­ing time-interval tl ..t2 can be modeled by Figure 2.9(b). During the fast current commutation

the d~~f in the other N - 1 modules is small, or 0 if d~~f = 0 is used as an additional turn-offcriterion. Therefore the inductor currents of the modules which share the same switchingstate can be assumed constant. Using this the center and radius of the fast current commu­tation, in the state-plane of the individual currents for clipping to the positive voltage rail,

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42 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

-Zm ith ~------_._. ",,---- .• --- .•

~: IUs+

ua IV]

~._::1 Zn iL··0.1

NC

Us+ua [VI

(a) Individual currents (b) Sum of the currents

Figure 2.11: Corresponding state-planes for N = 3 clipping to the positive supply rail

can be determined as follows

icN-j

iL - 2: iLfj (t1))=1

(Us+, ZmiC)

J(UCf(t) + Us-r+ Z~(max (iLfj(t)) - icrwhich is valid during time-interval tj .. t2, where ic indicates the center current of the

N-1resonance, ~ iLfj(t1) is the sum of the smallest (N - 1) inductor currents at t = t1 and

)=1

max (iLJi(t)) is the Nth module supplying the maximum inductor current.

In most cases the resonance of the fast current commutation can be neglected becauseof the large radius of the resonance. However, in some cases it can be used to explain theprocess of interleaving as it will become clear in Section 2.3.4. Also for clipping to the negativesupply rail similar equations can be derived. The derived equations are valid for clipping­mode operation but also can be used if the time-interval tl ..t2 is much smaller compared tothe time-interval t2 ..t3, this is generally not true during normal operation.

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2.3. INTERLEAVING DURING CLIPPING-MODE OPERATION

2.3.2 Soft-Switching Ensured

43

Also for interleaved parallel modules measures are needed to ensure that the minimum currentneeded for a complete resonant voltage commutation ith is reached, as it was discussed inSection 1.1.4 for single modules, to ensure zero voltage switching. If max (iLf) < ith, turn-offof 82 has to be inhibited as long as Equation 2.9 holds.

N

, if I: iLfj < iLj=1

(2.9)N

, if I: iLfj > iLj=1

Where max (iLfj) denotes the maximum iLf of all N inductor currents for which 81 isN

conducting and I: iLfj denotes the sum of all N inductor currents. If max (iLf ) > -ith,J=1

turn-off if of 81 has to be inhibited as long as Equation 2.10 holds.

Z (.) 2Z (~. . ) (uCf+US_)2m max ~Lfj - n 6 ~Lfj - ~L :S (. (" ) . )

j=1 Zm mm ~Lfj -~th

N

, if I: iLfj < iLj=1

(2.10)N

, if I: iLfj > iLj=1

Where min (iLfj) denotes the minimum iLf of all N inductor currents for which 82 is con­

ducting. These equations are valid for d~~f = 0 turn-off, also some margin needs to be addedto compensate for component variation. A complete derivation can be found in Appendix J.

Figure 2.12 depicts iLf for N = 3 during clipping to the positive rail, where ithm representsthe minimum current needed for a complete resonant voltage commutation. ith is chosenlarger to set the maximum switching frequency. The upper control ramps are not within theplot area due the high current set-point. The lower ramps are curved due to the changesof d~~f which is still used to determine the steepness of the ramps, as it was explained inSection 2.2.1. For all N = 3 modules, turn-off of 82 is inhibited as long as 2.9 holds, whereith is replaced with ithm , to ensure that ithm is reached, which is required to ensure zero voltageturn-on of 81. This turn-off inhibition mechanism will result in periodic inductor currentsbut no interleaving will occur. This is due to the large variation of the negative turn-offlevel between the successive switching cycles, this variation disrupts the natural interleavingmechanism, which will be discussed in the next section.

2.3.3 Interleaving during Clipping-Mode Operation for Odd N

Figure 2.13 depicts iLf, uCf and the state-plane plot for N = 3. From this figure it can beseen that during clipping-mode operation steady-state interleaving is achieved for clipping to

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44 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

1--

Tun~·,oF

t[s)

Figure 2.12: iLj during clipping-mode operation with turn-off inhibit for N=3

the positive supply rail, when using ddt! = 0 as a turn-off criterion and no positive turn­off level during clipping mode operation, together with a fixed negative turn-off level. Thisnatural interleaving proces does not occur in Figure 2.14 where N = 4. This section will

explain the interleaving proces which occurs when using ddt! = 0 as an additional turn-offcriterion for an odd number of parallel modules.

t (sl

(a)

UspUa [VI

lm(2iUN-ith)

t(s]to t1

--~-,-

Y"~l-,

IIUa- module 1 ...

/' ua- module 2 I

uQ module 3

1ua II

I' ----------- -------- - - --

i

._-~~---------------

O.SUs

-O.SUs

(b) (c)

Figure 2.13: iLj and UCj plot in time and phase-plane for N = 3

In Section 2.3.2 it was shown that during clipping-mode operation no interleaving will

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Zm Ith

2.3. INTERLEAVING DURING CLIPPING-MODE OPERATION

~ ,)llffUrHlhli:11FT )-il:,',WUtllt\::j·/f-.:::::::: :ii#-~_ :1--- i_#~:j_:: i"j;~ ~

2iUN-ilh""O,,,,", !_, J~" ,.t:;;Jl': .. '.' ,..:.;:.:1;(-. ~ ..:.rl?'. 'I__"---1..1_ _ --'

1011lis]

(a)

45

~o-'

(f~.

I~\,

'~o~--------~ ---

Z m iUN _.- (

"-uo module1

uD module 2

uQ module 3 I

uQ module 4 I

~"a

-Zm ithe--

Zm(2iUN-ith)

t[s]

(b) (c)

"a [V]

Usp

Figure 2.14: iLj and UCj plot in time and phase-plane for N = 4

occur if the normal turn-off levels are used and turn-off is inhibited to reach the minimumcurrent needed for a complete resonant voltage commutation. This because the large vari­ations of the turn-off current level between the different module disrupts the interleavingmechanism. However, steady-state interleaving when clipping to the positive supply rail forodd number of modules will occur if the upper turn-off level is disabled during clipping-modeoperation, resulting in d~~f = 0 turn-off only, and if the lower turn-off level is kept moreconstant, allowing only slow changes and no large cycle by cycle differences. This results inthe following turn-off levels for clipping tot the positive supply rail

, for iL ~ 0, for iL < 0

(2.11)

Also for clipping to the negative supply rail similar turn-off levels can be derived

, for iL ~ 0, for iL < 0 (2.12)

where ithc is the minimum turn-off level used during clipping-mode operation.

Clipping-mode has to be activated and deactivated if required. For clipping to the positiverail deactivation can be done if

(2.13)

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46 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

this because no action is required4 for clipping to the positive rail if the output currentis larger than the set-point of the hysteretic current controller. For clipping to the negativesupply a similar equation can be derived

(2.14)

Clipping-mode operation has to be activated if clipping is detected. This can be done indifferent ways:

• If d~~t = 0 occurs for the first time. However the minimum current needed for theresonant voltage commutation ithm might not be reached, during the transient fromnon-clipping to interleaved switching during clipping-mode operation, where ithm is theminimum current needed for voltage commutation. Therefore this method has to becombined with the method to ensure soft-switching discussed in Section 2.3.2. Delay ofthe turn-off instances to ensure zero-voltage turn-on will disrupt the natural interleavingmechanism. To ensure fast convergence to steady-sate interleaving during clipping-modeoperation ithc has to be larger than ith resulting in ith << ithc < 2ith, where ithc is theminimum turn-off level used during clipping mode operation. This method requirescontinuous calculation of the equations discussed in Section 2.3.2, which result in ahigh computational load but will result in the lowest conduction losses due to the smallpossible ith and ithc '

• If ith < 2ithm ::; ithc and it is determined that the minimum current required for turn-offith cannot be reached during the next switching cycle. No action to ensure zero voltageturn-off is required except for the use of ithc as threshold current. To determine if ith

is NOT reached, and clipping mode has to be activated, the following equation can beused for clipping to the positive voltage rail

.2 . 2 (UCI-US+)2Zth - max (ZLJ) - Zm > 0 (2.15)

where max (iL/J denotes the maximum iLl of all N inductor currents for which 81is conducting. The equation has to be evaluated after turn-off of 81 and before iLlreaches O. This equation is derived neglecting the resonant voltage commutations andfast current commutation. For clipping to the negative voltage rail a similar equationcan be determined

( )

2.2 .. 2 Uc + Us-Zth - mm (ZLI) - I Zm > 0 (2.16)

which has to be evaluated after turn-off of 82 and before iLl reaches 0, where min (iLIJ

denotes the minimum iLl of all N inductor currents for which 82 is conducting. Thismethod requires much less computational load but results in more losses during clip­ping mode operation and is implemented in the pre-prototype discussed in Section 3.Equations 2.15 and 2.16 are derived in Appendix K.

4The output voltage will decrease if Equation 2.13 holds.

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2.3. INTERLEAVING DURING CLIPPING-MODE OPERATION 47

• If d~~t = 0 occurs for the first time and ith = ithc 2: 2ithrrt' no action to ensure zero

voltage turnoff is required. This method requires no computational load but will resultin more losses during normal and clipping-mode operation.

A larger ithc than strictly needed will result in higher losses, therefore a ithc varying intime, from ithc to ith can be used. To compensate for component variation, which will resultin non-ideal but stable interleaving, also a margin has to be added to the thresholds.

To prove convergence of the naturally interleaving process first a non-linear differenceequation is derived, for clipping to the positive-supply rail and using d~~t = 0 turn-off as anadditional turn-off criterion. When neglecting the resonant voltage commutations and thefast current commutations, which can be done for d~~t = 0 turn-off as it will become clear inthe next section, Equation 2.17 can be used to determine iLf for all modules at the beginningof the slow resonant current commutations.

{ Ailkl + ~ IBilk] - ciL , 'L.. iLf ::; iL

i[k+l]

Ai[k] - iv IBilk] - ~iLI ' 'L..iLf 2: iL

Where,

0 1 0 0 0 1 1 1

ZL/J 0 0 1 0 0 1 1 1

ilk] = A= B=

[ 'LfN_' ] 0 0 0 1 0 1 1 1

zLfN Ik] 0 0 0 0 1 1 1 10 0 0 0 1 0 0 0

and

(2.17)

1 1 11 1 1

~=

1 1 11 1 10 0 0

.* .*. N Zhi - zZoZL =

2

k denotes the discrete time instances at the be beginning of the slow resonant currentcommutation, indicated by 0 in Figure 2.11. Vector i contains the inductor currents of all Nmodules from the highest momentary current to the lowest momentary current (iLh is themodule with the highest current at time instance k and iLfN is the module with the lowestcurrent). Because a fixed turn-off level is used during clipping mode operation mini is con­stant, which explains the 0 rows in Band C. For a single module iLflk+l) can be determinedfrom 2 *Rus+ added to the current at the previous time instance, which explains the diagonalin A. The second term, after the sum, equals two times the radius of the resonance betweenL f and Cf.

Using Equation 2.17 the successive currents at time instants k can be determined. Thisis depicted for N = 3 in Figure 2.15(a) and for N = 4 in Figure 2.15(c). Figures 2.15(b)and 2.15(d) depict the corresponding steady-state state-plane using simulated data. Fromthe slightly curved fast resonant current commutation it can be seen that this was included

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48 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

in the used model. From Figure 2.15 it can be seen that convergence to the ideal interleavedstate occurs for N = 3. For N = 4, the currents at time instances k keep oscillating betweentwo values resulting in resonances with two different radii.

Steady-state stability can be proven making use of the geometry of the problem. Thesteady-state output current iL, during clipping-mode, is dictated by the load. The negativeturn-off level is fixed and a function of iL, namely ito = itiL - ithc for clipping to the positive

rail. The positive turn-off level is omitted. However steady-state is only achieved if d~~f = 0occurs at a current equal to ithc for clipping to the positive rail, which is sufficient to guaran­tee zero voltage switching. Now the steady-state solution of iLj can be derived by rewriting

Equation 2.17 and using the steady-state current at which steady-state d~~t = 0 turn-off oc­curs. This results in a system of equations with N 2 equations and N (N - 1) variables whichis derived in Appendix L.

Using the derivation of Appendix L, the steady-state currents at time instances k can becalculated for N = 3 resulting in the following.

[

1 (2'* ')]. ~ .:hi + ~zol[k] = 3" (Zhi.~ 2zzo)

zZo

VkEZ ilk] = i[k+l]

It can be seen that there is only one solution which is equal to the ideal interleavedsolution. However, for N = 4 there are infinite possible solutions depending on the initialconditions when clipping occurs as it is shown below.

[

ihi + it~ + .~Lh[k+l] ] [ ihi;iio+ iLh [k+l] ]~ thi-tio

l[k] = ihi +3iio 2. l[k+l] = . 22 - ZLh[k+l] ZLh[k+l]

i~ i~. . .l[k] = 1[k+2] = 1[k+2i]

i[k+l] = i[k+3] = i[k+2i-l]

Consequently no interleaving will occur for even N when using d~~t = 0 as turn-off crite­rion during clipping-mode operation. Also other methods, like the method of Liapunov, canbe used to prove convergence of Equation 2.17. However this is not included in this reportbut can be useful for future investigation. The previous derivation is valid for clipping to thepositive voltage rail, for clipping to the negative voltage rail similar equations can be derived.

For the simulation results depicted in Figure 2.13 and 2.14 the threshold ith is chosenequal to ithc and larger than the minimum current needed for voltage commutation ithm

to fix the maximum switching frequency and to ensure soft-switching during the transientwhen entering clipping-mode operation. Also to ensure that only the module with maximuminductor current turns-off due to a d~~t = 0 turn-off, a timer is implemented which inhibits

d~~t = 0 turn-off for a time equal to

(2.18)

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2.3. INTERLEAVING DURING CLIPPING-MODE OPERATION 49

1-- ----,--,,,~"'----"'1-- Zm ith .

~'! I

._~

-Zm ith - - ~ - - - - -' - - __I ~----+----

\\

-lmith -- -----~ ...

rl\

Ua [VIUsp

Zm(2iUN-ith)

90 100

, ''__c

o 10 20 30 40 50 60 70 80k

Zm(2iUN-ith) '----+--..,---..;--;..--.,---+--......--;---11I

(a) N = 3 (b) N = 3

Usp

Zm i1h

ua[V1

Zm(2iUN-ith) I

I

,, ,

I I I I----~-----~----~----"'1-~--~

,

,

i

10 20 30 40 50 - -~---=7"::-0-c:":80:---9="=-0---c'1~-0k

2m ith - - - - ~ - -

~ ~._~ _:0

NE N

E

(c) N = 4 (d) N = 4

Figure 2.15: ilk] and corresponding steady-state state-plane, for clipping to the positive supply

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50 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

which is equal to one quarter of the resonance period time of the output filter. This timeris reset when a turn-off of 81 occurs if uCf 2:: 0, clipping to the positive supply rail, and whena turn-off of 82 occurs if uCf < 0, clipping to the negative supply rail. This can be seen inFigure 2.13 and 2.13 at t = tl. Normally this turn-off is expected the next time instance that

d~~! = 0 occurs. However, for this simulation ddt! :S 0 is used as a turn-off criterion, when81 is conducting, at t = it the value of ~nh is reached allowing the turn-off.

For ideal interleaved modules the maximum voltage ripple can be derived, which occursduring clipping-mode operation. When neglecting the fast current commutations also theoutput voltage, during clipping-mode operation, can be described by one half of a sine-wave,as it can be seen from the half circles in Figure 2.13(c) and 2.14. The radius equals theamplitude of the voltage ripple and will be equal to

, for operation in quadrant 1 and 3(2.19)

, for operation in quadrant 2 and 4

Since the voltages can be described by sinusoidal waveform the average ripple can be de­termined by multiplication of bouCfpp by ~. The average output voltage ripple can be usedto determine the maximum possible steady-state output voltage.

2.3.4 Interleaving during Clipping-Mode Operation for Even N

In the previous section it was concluded that no automatic interleaving will occur for even N

when using d~~! = 0 as a turn-off criterion for the slow current commutation. When using

d~~! < 0 for clipping to the positive rail or d~! > 0 for clipping to the negative rail steady­state interleaving will occur for both odd and even number of parallel modules.

Figure 2.16 and 2.17 depict iLl as a function of time and the corresponding steady-state

state-plane when clipping to the positive supply rail for three situations, namely; d~~! >> 0,

d~! = 0 and d~! << 0, where du denotes the voltage across the filter inductance at whichthe additional turn-off criterion occurs. From these figures it can be seen that interleaving,

for N = 4, will occur if d~~! << 0 is used as a turn-off criterion when clipping to the positivesupply rail.

The convergence to the ideal interleaved situation cannot be explained when neglectingthe fast resonant current commutations, as it is done for the derivation of Equation 2.17.If the fast current commutation is neglected to calculate the successive iLflkl' when using

d~~! « 0 as an additional turn-off criterion, the same oscillating behavior, as when using

d~~! = 0 as a turn-off criterion, is observed for even numbers of parallel modules.

Figure 2.18 depicts the bottom resonance of the state-plane for N = 4 and the threecompared turn-off criteria. If the initial currents at the end of the slow resonant currentcommutation5 are not equally distributed over the state-plane the center of the fast current

5except for max (iL!) which is in the process of a fast current commutation.

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2.3. INTERLEAVING DURING CLIPPING-MODE OPERATION

h-- -- -- -II

~ it~ ~ ~ :: = =-~V "1- =~= -_.2:F .., =-~ -=~ - =.?"'\= - "1:: - .",- - ..-,= -=--::'1= -_"1= - .e'j =- -._~ . ~thff'0~~~~~~V~V~.-t:~~V~~~

21UN-llh I~ .' i/ ."

I [s]

d'(a) ~~f »Oturn-off

, I

h I~ I

~ .~1[k~~;k?4$?4~?~k,-2IUN"lhi V - .../ L- ,/ L- , - _..- ,~...-

L_ _ _I [s]

(b) d~~f = 0 turn-off

h -

~ "u,;;!~~~~~~~I [s]

d'(c) ~~f« 0 turn-off

Figure 2.16: iLl as a function of time with different turn-off criterion for N = 4

51

~:zm ilh~--------- I

, (r, ,

-\1~~~:~' ..

~~-, .~ ..

Usp-<lu Usp

"aM

d(a) ~~f »Oturn-off

ZmI'hl7J::"+./ :. :

, C.~-' • i

.. ~ ,

0--- ----: - - - -, ~---. -- - ~---j( ,.

Zm IUN~ '~.~

-,.I;c -----·~:'cj---1.(~

Zrn(2iUN-ilh) -, I

Iu,p

Ua [VI

d'(b) ~~f = 0 turn-off

./

d'(c) ~~f« 0 turn-off

Figure 2.17: Corresponding state-plane with different turn-off criterion for N = 4

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52 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

commutation will be offset from its steady-sate interleaved value Zm Y:J. As a consequencethe voltage at the beginning of the slow current commutation, time instances k, will alsoshift from its steady state value, as it is indicated in Figure 2.18. These changes influencethe radius, and consequently the d~t, at the beginning of the slow current commutation,

which if d~~t < 0 turn-off is used, disrupts the steady-state situation that would occur if

d~~t = 0 turn-off is used. As a result, the currents will converge to the ideal interleaved situ­

ation, where the center of the fast current commutation is constant and equal to (Us-, ~iL)'

Usp-du UspualVj

(a) d~~[ » 0 turn-off

zmiUN -------------p-}

zm(2iUN-ith) .. ­I

Usp

d(b) ~~[ = 0 turn-off

Usp Usp+duUa [V]

d(c) ~~[ << 0 turn-off

Figure 2.18: Bottom of the state-plane with different turn-off criterion for N = 4

Also when using d~~t = 0 or d~~t > 0 turn-off for clipping to the positive rail, even numberof modules will eventually converge to the ideal interleaved situation. However the influenceof the shifting uCI at the begin of the slow current commutation is small resulting in veryslow, read no, convergence.

The small, or no, influence when using d~~t = 0 turn-off is trivial. Due to the d~~t whichis equal to 0 a small shift of uCI, from its steady-state value Us+ at the beginning of the

slow resonant current commutation, will have little or no influence. For d~~t > 0 it is not as

insightful. It would be logical to assume a disruption due to the d~~t which is not equal to 0and as a result convergence to ideal interleaving. However, due to the small part of the circlethat is covered in the state-plane this disturbance is negligible.

Inclusion of fast-resonant current commutation, which is explained in Section 2.3.1, willresult in elaborated equations which are not insightful. However when neglecting the changeof current iLl of the N - 1 modules which are in the proces of a slow current commutation6

it is possible to sequentially calculate the initial currents of the slow current commutation,the radius of the fast current commutation and UcI at the start of the following slow currentcommutation. It can be seen that as well any even as any odd number of parallel modules willconverge to interleaved switching when using the suggested additional turn-off criterion. Thisis implemented in a Matlab script which is included in Appendix M.6 and M.7. However, dueto the neglected change of the N -1 currents during the fast current commutation this method

6during the fast current commutation of the Nth module.

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2.4. SMALL-SIGNAL MODEL OF INTERLEAVED MODULES 53

is of limited use. Only a small part of a complete circle in the state-plane may be coveredduring the fast current commutation, otherwise the assumption of the constant currents ofthe N - 1 modules will not hold therefore the following must hold Us >> Zm max 12 X; ± ith I·

Zm ith

,----~... _-~,. ---,----,-,---,--" .. r--- ---,----,-~.,._~._.------,I : I I

,,

-----------,--

[--0", , ,, , ,

, , ,

Zm ith ~ ~ - ~ - ~ - ~ ~ ~ ~ L ~ ~' ~ ~" I

, ,I I

_.~ : "'-', I

UspUsp+du

"cr [VI

,,

,,\_)/~:

,/~ 1'''-''~_/~:',,,,,

>C_J=:~-----!--~---~---~

~Zm ith

Zm iUN ~ ~ ~ ~

Zm(2iUN-ilh) -

,- - - - -I

,,,

,,

- - -I-

,,,,

I I I I- - - - -r - - - - -"T - - -- - -1- - - - - - r - - - - -...,-- ---I I I I

I I I I

I to. :Zm ,uN, ~V v :

-lm ilh;"J: - - - - ~ - - - - - -,- - - - - r

; ,i\. II:

i ~ V : ~

~""~.)~---~-0----:':10:-----::'20=-----=;'=-0--4'=-0--5~0----='=60----:':7'0:-----::'BO=-----=9':-0--'100

k

._:J

(a) (b)

Figure 2.19: iLj and corresponding steady-state state-plane for N = 4

Figure 2.19 depicts the calculated successive iLjlkl and the corresponding steady-statestate-plane for clipping to the positive supply rail. Figure 2.19(a) clearly shows the conver­

gence when using d~~t < 0 as the additional turn-off criterion. This algorithm also correctly

determine the successive currents for odd and even N with d~~t = 0 and d~~t > 0 as theadditional turn-off criterion.

2.4 Small-Signal Model of Interleaved Modules

The model for interleaved modules can be determined in a similar way as for a single module.Namely by using the equivalent circuit depicted in Figure 1.12 and the sampled-data modelingmethod to determine G and Zout for parallel modules. When ideal interleaving is achieved,the average delay oT can be determined as follows

1oT;:::::: 2Nfsw + Td (2.20)

Where fsw is the switching frequency of a single module. In practice Td will be small or canbe compensated for and can be neglected in most applications. However, if the control-logicis implemented digitally there might be a significant delay between a change of the set-point

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54 CHAPTER 2. THEORY OF INTERLEAVED PARALLELING

and the turn-off levels which has to be included.

The sampled data modeling scripts included in Appendix M were not extended to N inter­leaved modules during the writing of this report. However G and Zout can be approximatedby using the sampled data modeling method for a single module by using ~ as the DCoperating-point to which the perturbations are added. In this way the DC setpoint per mod­ule will be the same, which results in a good approximation of G and Zout for limited outputcurrent and voltage7. The determined G and Zout can then be used in the transfer functionof the simplified linear model given by Equation 1.18.

Figure 2.20 depicts the transfer function of the sampled-data model and of the simplifiedmodel for N = 3 with Cr = 7nF, Cf = 100j.lF, ith = 5A and cST = 2Nhw together withthe transfer function of the sampled-data model for N = 1 with Cr = 21nF, Cf = 300j.lF,ith = 8.7A and cST = 2i

sw' From this figure it can be seen that the bandwidth of the hys-

teretic current controller will increase by a factor of VN and that the delay cST wi! decreaseby a factor N VN as it was explained in Section 2.1.

The model created by the sampled data modeling method and the simplified model willbe verified with measurements in Section 3.2.2.

7The ripple current is triangular for limited output current and voltage, therefore the output voltage ripplecan be neglected.

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2.4. SMALL-SIGNAL MODEL OF INTERLEAVED MODULES 55

20 ,-----,-------,---,-----,--,---r-r--,-----,-----,-----,---,----,-,----,--,---,----,----,----,---,---,----",I I I I II I I I I

I I I I I I I I I I I_' __ 1__ c- _1_ -'-- --.l_I_ _ _ __ 1 1 1__ -.l _ -.l _ L _1_1

, I I I I I I I I

I I I I I I I I II I I I I I I I II I I I I I I I I

--,_1 .1 1 1__ -1_-.1_ L -.-1_1

I I I I I I I II I I I I I I II I I I I I I II I I I I , I I

__ .1~ .1 I__ -l_-l_L-.J_1I I I I I I I

I I I I I

I I I I, ,. ,-

, , ,, , ,, , ,oI---__b_---b "..,-,F'- :, , ,, , ,

I I I I I I I___ L __ L _ _ 1__ 1_ ..1_1_ -l..-..l. L .1 __ ...J...c

I I I I I I I II I I I I I I

I I I I I I II I I I I I I I I I

-40~--------.J_- L __ L __I __ I Ll....l____ _ -.J __ L_L_I_L--.J_I _I I I I I I I I I I I I I

I I I I I I I I I I I I I II I I I I I I I I I I I I

-60L------:- __ ~_--l..---:--:_--:-~-~ ~ __ ~ : _~-;-~~-:---_---~----:__I I I I I I I I I I I I I I I

i I I I I I I I I I I I I I I

-80 L_.. ~'__~'_~_ I I I I I I I I I ~_~~,__ _~'__~'~~_~~~~~

10' 102 10310

4

-20

-50

-250

I I I I

I I I I I I I I I I I I I I

- - - - I- - - - - - - .., - -,.... - f- -1- t- ---I --1- - - - - - - + - - - -1- - -,.... - -+ - -l - t- --I-I

- 1 1 1 1111 I 1 I 1 III

----\ -----J--~ -~ -:- ~ J-: -------l- ---:- --~ -J-J- ~ J-:\ 1 I 1 1 1 II 1 1 I 1 1 1

1 1 1 1 1 I 1 1 1" I I 1 I I 1 II 1 1 1 I 1 I II

- - - r - .:.. - T - - """'I - - r- - I -,- r-"'" -1- - - - - - - T - - - -1- - - r- - ""t - ""t - r- ""'-1

1 \ 1 1 1 1 1 1 1 1 1 1 1 II1 1 1 1 1 I I 1 1 1 1 1 II1 1 1 1 1 I I 1 1 1 1 1 II

--r - - - - - r - ,... -, - T - -1- - - - - - - T - - - -1- - - 1- - , - , - r""'-I1 1 1 1 1 1 1 1 1 1 I1 1 1 1 1 1 1 1 1

--- Sampled-<lata model N=3 ~ T - - - - - - - ~ - - - ~ - - " - - ~ - - -, - r - -, - - 0 - ~ ~ -:

Simplified model N=3 :::: :

=~~_;_;;=S=a=m=p=le=d=-<l=a=t:::ia=m=o=d=eI:I=NI:==1C;~_-L'-c--_-_-_-_-_-~~_-_-_-~~_-_-~-_-_-~~_-_C_-~I-2±_~_~..~_-~~_-_-_-_-~:_-_-_-~,_~-"'°,L' -~~_'L'-~:~

10' 102 10

310

4

-100 f- - - - - - - ~ - - - - ~ - - - - -: - -: - -r -:- T ~ - - -

1 1 1 1 11 1 1 1

~150 - - - - - - ~ - - - - r - - ~ - -: - -, - ~ -:- , - - - - - - -

" ,

-200

f[Hz]

Figure 2.20: Transfer function of the sampled-data model and the simplified model for Us140V, L f = 120J.LH, LL = 4.2mH, RL = LOn and eL = 350V

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Chapter 3

Design and Qualification of aPre-Prototype

To verify the theories presented in this report and to test the interleaving mechanism duringnormal and clipping-mode operation a pre-prototype was built based on an existing 3-phaseamplifier. This chapter will start with an explanation of the hardware of the amplifier, nextthe control-logic (VHDL) is discussed globally. To conclude this chapter the measurementsare presented and compared to simulated data, from which conclusions are drawn.

3.1 Design of a Pre-Prototype

3.1.1 Hardware Amplifier

The pre-prototype is based on the PAAC550-25 amplifier. This 3-phase amplifier can supplya peak current of 25A with a (worst-case) peak output voltage of 550V at a supply voltageof 700V with a switching frequency which varies between 20kHz and 250kHz. This 3-phaseamplifier was ideal to build a pre-prototype of a I-phase amplifier consisting of 3 parallelmodules because of the digital (FPGA) implementation of the control-logic and the availabil­ity of the necessary measurements.

Figure 3.1 depicts the basic schematic of the amplifier and the required hardware changes(dotted) to the end-stage for the pre-prototype. The end-stage of the amplifier consists of3 switching-legs (R, Sand T), with in parallel to each ofthe switches capacitors Cr , and anoutput filter consisting of L f and Cf (dotted red). Current measurement for reconstructionof iLf is done by measuring the AC part of the current, using a current measurement trans­former in series with Cf (Red), and adding it to the DC part of the output current whichis measured using a Hall-effect current sensor (LEM). Also Ucf and Us are measured. Thecontrol of the amplifier is fully digital and implemented in an FPGA making changes to thecontrol logic easy to implement.

For the pre-prototype the 3-phases have to be put in parallel, therefore the AC part ofiLf of the individual modules cannot be determined using the current through Cf' For thepre-prototype it is chosen to reconstruct the inductor current using the Hall-effect sensors(LEM) only. To do this capacitors Cf were removed from the end-stage (dotted-red) and ex-

57

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58 CHAPTER 3. DESIGN AND QUALIFICATION OF A PRE-PROTOTYPE

R

J

Ct

s

JT///../ ..7

.//..//....

:~/~r::~'~n~~,q; q

rYY"'I,,--=:::::,,-,_-o-.,.////,o'''' ':0." ':0."

T

J

J

Figure 3.1: Basic schematic of the amplifier

ternally connected to the output of the amplifier (dotted-black). An extra Hall-effect sensor(LEML ) is added to determine the output current of the pre-prototype. Due to the limitedbandwidth of the Hall-effect sensors (250kHz) a switching frequency < 40kHz is chosen. Toachieve this L f was increased from 33f.tH to 120f.tH and Us was lowered from 700V to 140V.Of is chosen 100f.tF to limit the output voltage ripple at the low switching frequencies. Toachieve higher switching frequencies a high bandwidth current sensor is required. Appendix Hdiscusses different possibilities, which are not implemented in the pre-prototype. Table 3.1contains a summary of the end-stage component values and specifications.

Table 3.1: End-stage component values en specificationsItem Value

Us 140V (160Vmax )

~Lmax 40Aa

!SWmin 2.9kHzfswmax < 40kHz

Or 9npb

Lf 120f.tH

Of lOOf.tF

aDue to saturation current of the inductors L f

"Equivalent capacitance of switch and external connected capacitors

To maximize the performance of the data acquisition the data acquisition circuit needed to

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3.1. DESIGN OF A PRE-PROTOTYPE 59

be redesigned, requiring component changes and numerous reworks. The following measure­ments are available to the control logic of the pre-prototype, namely; iLf of all N modules,uCf, iL and Us. Also i;et is implemented as an analog input and is available to the controllogic. Table 3.2 contains a summary of the specifications of the data acquisition circuit,

Table 3.2: Specifications of the data acquisition circuitBits Unit/LSB Measuring range Sample rate Bandwidth AAF

zLf 10 131.072mA -67.11A 66.98A 20Msps 2.5MHz

.* 16 2.048mA -67.11A 66.98A 250ksps 25kHzZsetiL 16 2.048mA -67.11A 66.98A 250ksps 25kHz

Us 16 8.129mV OV 532.74V 250ksps 50kHz

uCf 16 8.129mV OV 532.74V 250ksps 50kHz

where AAF stands for Anti-Aliasing Filter, and LSB for Least Significant Bit.

3.1.2 Control Logic

The control logic is implemented in an FPGA internally running on a 20MHz clock, whichwill result in a maximum JiLf of 67mA per clock-cycle, as it can be seen from the following

diLfmax67.10-3

where fclk denotes the clock-frequency.

120.10 620.106

Clearly the resolution of iLf, which is equal to 131mAjbit, is the limiting factor of thecontrol-logic, as it also will become clear in Section 3.2.

The R-phase is implemented as the master module with slaves Sand T, resulting inN = 3. The interleaving control-logic is the same as discussed in Chapter 1 and 2. ThehY'steretic current controller switches to clipping-mode operation using Equation 2.15 and2. L6 as it is discussed in Section 2.3.3. Zm is equal to 1.89 however in the implementation ofthe pre-prototype it is rounded to 2 to save multipliers and to speed up the calculation process.

The following thresholds are used for hysteretic current control

ith 5AZthe 8A

ithm lA

where ith is the minimum current for which turn-off is allowed, ithe is the minimum turn-off

during clipping-mode operation and ithm is the minimum current for which d~~t = 0 turn-offis allowed and consequently equal to the minimum current required to achieve a completeresonant voltage commutation (ZVS). The ithe equal to 8A is not required to achieve ZVSduring clipping-mode operation but is chosen not equal to ith to see how different minimum

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60 CHAPTER 3. DESIGN AND QUALIFICATION OF A PRE-PROTOTYPE

turn-off levels will work in practice.

For the generation of the control ramps, k is set to 1, resulting in dead-beat control asit is explained in Section 2.2.1, the control ramps are clipped to a minimum of 5A and amaximum of 40A for the positive control ramps and to a maximum of -5A and a minimumof -40A for the negative control ramps.

3.1.3 Loads

Two loads where used during the measurements, namely; One for the large signal mea­surements capable of dissipating large amounts of energy. However, this load behaves verynon-linear for frequencies above 2.5kHz and therefore a more linear load is used for the small­signal measurements. Table 3.3 shows an overview of the DC specifications of both loads.

Table 3.3: DC specifications of the used loadsSmall-signal Large-signal

LL 4.57mH 4.51mHRL 0.51D 1.39DiL a ;::::: 5A ;::::: 40A

alimited by maximum dissipation

Figure 0.3 in Appendix 0 depicts LL and RL as a function of frequency for both loads,which is measured using the impedance analyzer shown in Table N.1.

3.2 Measurements

Figure 3.2 shows a picture of the measurement setup, where the pre-prototype is indicated by1, the external connected Cf with the additional Hall-effect current sensor iL is indicated by2, and 3 indicates the load used for the large signal measurements which will be discussed next.

3.2.1 Large-Signal Measurements

The large signal measurements where captured using a Tektronix TDS754D 4-channel oscil­loscope using 3 Tektronix TCP202 current-probes to measure the inductor currents iLf usingchannel 1 to 3 of the oscilloscope. Channel 4 was alternately used to measure the outputof the function-generator (used to generate i~et)' uCf using a Tektronix P5205 differentialhigh-voltage probe and iCf and iL using a Tektronix TCPA 300 current-probe amplifier incombination with a TCP 312 current-probe. Table N.1 contains a summary of all used testequipment. A Us of 140V was created using two DC supplies set to 70V and the outputterminal of the load was connected to the midpoint of the two supplies. A programmableload was used to dissipate energy that is transferred from Us+ to Us- if a positive set-pointis applied. A negative output current is not possible using this configuration.

Page 57: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

3.2. MEASUREMENTS

Figure 3.2: Measurement setup

Step Response No-Clipping

61

Figure 3.3 depicts 15ms of sampled data of a step on i;et from a 5A to lOA and vice-versa.Since it is sampled using a 4 channel oscilloscope iLf and iCf are data-sets from a singlemeasurement, iL and uCf are from other measurements using the same settings. iL and uCfwill not be affected much by the fact that it is data from different sets because these signalschange relatively slowly in time compared to iLf and iCf.

From Figure 3.3 it can be seen that the step causes a resonance. This is the resonancebetween LL and Gf , which can be seen from the transfer function given in Equation 1.18,with a resonance frequency equal to fat = vhcJ. In a servo system this resonance has to

271" LLCfbe suppressed using an additional current-control loop.

Figure 3.4 and 3.5 depict segments of data from the same step, the blue dotted linesindicate the turn-off levels of the master module1 after the change of set-point. After t = 0Ucf will keep changing, as a consequence steady-state is not reached within the plottedinterval, however the control ramps keep the inductor currents interleaved also after thetransient interleaving is achieved within a few cycles.

lThe blue dotted lines are indicative lines, not measured.

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62 CHAPTER 3. DESIGN AND QUALIFICATION OF A PRE-PROTOTYPE

I,,,

- e-- - -­,

I,,,

~ c ~

,

'\~I~I\.~li.!1!1':.~Ii!i'i.1~_,jjill,~~.~:~~;.iW'll\lf;~'I'~~.'~"I~I,.-~;:~'"is~~t_----LI '--I ----LI_ 1 1 I L..

a 2 4 6 8 10 12t[s]

:::~_____ ~ ,~~" . l- - I -l _" _~ ~ ~}*··1nmnT""~~~--=--I I I I

40 1 1 I 1 1 1

a 2 4 6 8 10 12

t [5] X 10~3

Figure 3.3: Step-response no clipping, step from i;et = 5A to i;et = lOA and vice-versa

~ .~~~tkW:&:~__\~..I~_~..lL~__ "·_.-&:~.:_&-&-_·--2 -1 a 2 3 4 5 6 7 8

t [5] X 10~4

I,,,--- -----

,,,-r ­,

,I I I I

IHlIHR~IIHH-l\;HII-'1- -,- - - - - - - - -1- - - - --- - -1- - - - - - -- -,... - - -- --- -t- - - - - - - --r- - ---I I I I, , ,, , ,

------1- --------1-- -1-----, , ,, ,

-4 -'----__--'---__---'--__----LI L.I__----'-I__-----.l --'---__---"

-2 -1 a 2 3 4 5 6 7 8

t [5] X 10~4

Figure 3.4: Step-response no clipping, step from i;et = 5A to i;et = lOA

Page 59: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

3.2. MEASUREMENTS

Step Response Clipping

63

Figure 3.6 depicts 10ms of sampled data from a step on i;et from 5A to 15A and vice-versa.Also for this figure iL and UCj are from other data sets made with the same settings. Af­ter the step to 15A, UCj starts increasing until clipping to the positive supply-rail occurs.The hysteretic current controller switches to clipping-mode operation using Equation 2.15,during clipping mode operation ithe is used for i/o' i/o is indicated in the figure the turn-off in­stanced do not occur exactly when i/o is reached due to the noise on the current measurement.

Figure 3.7 depicts a section of data from the same step. From Figure 3.7 it can be seenthat natural interleaving occurs within a few cycles, as it was explained in Chapter 2. Theclipping-mode operation stops after a few cycles because iL > i;et. The switching period timeof one module during switching mode operation is equal to 410jLs, this equals a switchingfrequency of 2439Hz, which is 16% lower than expected. This might be due to component

variation of Cj combined with earlier than d~~f = 0 turn-off due to tolerances in the control­logic. The fast current commutation takes approximately 25jLs, which is 6% of the timeneeded for the slow current commutation, during clipping-mode operation. For the interestedreader, Figure 0.1 in Appendix 0 depicts steady-state interleaved clipping for multiple cycles.

Figure 3.8 depicts the transition from clipping mode operation to normal mode operation.Due to the fast changing Uc j the switching frequency of the master module decreases by30% during 4 successive cycles resulting in wrong ramp placement. This can be improved byusing, for instance, the switching period times of all modules, as it is suggested in Section 2.2.2.Also a feed-forward can be implemented to achieve even better results. However, despite thewrong placement during four successive cycles fast interleaving after a transient is achieved.For the interested reader, Figure 0.2 in Appendix 0 depicts the transition from clippingmode operation to normal-mode operation for a slower changing output voltage UCj resultingin less severe interleaving faults.

Sine-wave No-Clipping

Figure 3.9 depicts iLj, iCj and iL for values of i;et of 1.25A, 2.5A and 5A. Because thesetup cannot handle large negative iL a 5A DC offset was add for i;et = 2.5A and 5A. FromiCj it can be seen that a large reduction of ripple current is achieved due to the interleavingmechanism. i;et = 5A with a 5A DC offset current results in a maximum ripple currentamplitude of approximately 5A, for a single module this would be equal to 27A resulting inapproximately a factor 5 reduction, when using VNith as the minimum current for which aturn-off is allowed for a single module. The output current iL is distorted due to the resonancebetween C j and LL, this can be improved using an additional current control loop.

Interleaving Performance

The resolution of iLj, which is equal to 131.072mA per LSB, will result in significant noise forsmall i;et. For instance i;et = 1A will result in an output current of ~A per module for thepre-prototype where N = 3, which is equal to approximately 2.5LSB. Figure 3.10 depicts iLjfor 3 parallel modules together with iCj for a DC current setpoint i;et equal to OA, 5A and lOAusing the DPO function of the digital oscilloscope. This figure clearly shows the jitter which

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64 CHAPTER 3. DESIGN AND QUALIFICATION OF A PRE-PROTOTYPE

-104.5 4.6 4.7

, , ,

L __---'--I-------'---~- __~I-----='Ic:--------:~I: _4.8 4.9 5 5.1 5.2 5.3 5.4 5.5

t [5] X 10.3

6,-----.-------.------,----,-----,-------,-------,-------,-----,

5.5

X 10-3

5.45.3

,,

-------,--------,-------

,,,1- - --

, ,I I I I

-4 - - - - - - - I- - - - - - - - - I- - - - - - - - - I- - - - - - - - - I- - - - - - -, , ,I I I II I I I

----r--------r------ -r--------r-I I I I ,

_8'---__--'----__---'--__-----' LI LI__---='I ~I '_______'________.J

4.5 4.7 4.8 4.9 5 5.1 5.2t[5]

-6

Figure 3.5: Step-response no clipping, step from i;et = lOA to i;et = 5A

20,-----.-

~ ..'..l 'f.;h~\:A/ ._ I. ',' I, i., . ,lli"t1j'IIJII'i

'i;,]ill;!lllll!iili,I'!.I,',lrlllj,'I!'il,I.I,'

._"' 0 ft- -7" -r~f:' r-~'1r-1itt;mtiTililliJ1Mmimmm~)'n~11(. !.' 'I

-10 1 ,••:-::': 1 1 • t · · ·t ·t ··..·..-r-· I • ,~ 0 1 234 5 6 7 8

t [5] X 10.3

Figure 3.6: Step-response clipping, step from i;et = 5A to i;et = 15A and vice-versa

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3.2. MEASUREMENTS 65

41pps- - f- -- -

,,

I

----J.t ----I

!I---r--- -

-10L'__-----l L __~ ~ E_~l__~ '_________'=====::::J0.2 0.4 0.6 0.8 1.4 1.6 1.8 2 2.2

x 10-3

._~

20,----------,------,-------,-----,------,--------,-----,------,------,--------,

.J3

15

2.2

X 10.3

Figure 3.7: Step-response clipping, step from i;et = 5A to i;et = 15A

-10':-----­1.5 2

330ps

2.5t[s]

3 3.5

X 10.3

15,-------------,---------------------,----------_

.J3

10

5

-10

-15 ------------

_20L- _1.5 2 2.5

t[s]

,,---------,-----------~---------,

,------'­,

,,--- -1---------------------,,,~---------------------,,,1-------------,

~ 1 1

3 15

X 10.3

Figure 3.8: Step-response clipping, step from i;et = 15A to i;et = 5A

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66 CHAPTER 3. DESIGN AND QUALIFICATION OF A PRE-PROTOTYPE

en3 s.on;\. ms 14 Dec 2006

15:49:31

'n;r".7iiooilCA<:--~~-~--'----"M·-'<-'.7iioo,,"m"'s''----r--,;-hf~---';5.77AA14 Dec 2006Ch3 '~(lO/.\ 15:27:58

(a) i;et = 1.25A, channel 4 is i L (b) i;et = 1.25A, channel 4 is ic!

14 Dec 200615:55:28

. ms

11 AcqsTtd<, mDI1.00MS/s[

(c) i;et = 2.5A with a 5A DC offset, channel 4 is iL (d) i;et = 2.5A with a 5A DC offset, channel 4 isiCf

14 Dec 200615:40: 28

msCit]

MS.ooms C 1 J 10.9 A 14 Dec 200616:03:36

Ch1 S.oo'\C . A

~-1:0"lilOM,,"S<7~<S--~1"'5"A:ricq'i<S------------c5-

(e) i;et = 5A with a 5A DC offset, channel 4 is iL (f) i;et = 5A with a 5A DC offset, channel 4 is i c !

Figure 3.9: Sinusoidal i;et with a frequency of 40Hz

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3.2. MEASUREMENTS 67

is also present for the master module2 , which is connected to channel 1 of the oscilloscope.For increasing set-points the jitter becomes less due to the increasing relative accuracy ofthe data acquisition for higher current set-points. Further measurement concluded that theeffective resolution of the data acquisition of iLf was only 8 bits, resulting in a resolution of524mA per LSB.

3.2.2 Small-Signal Measurements

Figure 3.11 depicts the transfer-function determined using the sampled-data modeling methodwith delay 8T (dotted blue), the simplified model with delay 8T (dotted green) and a measure­ment done using a network analyzer (red), for Us = 580V and 350V. The internal set-pointamplifier contains a second order anti-aliasing filter with a cut-off frequency of 25kHz, fur­thermore an additional delay of 9J.Ls is present caused by the control-Iogic3 which is indicatedby the solid lines. To make comparison possible both plots are generated using the samefrequency interval. In Figure 3.11(a) ~fsw is equal to 107kHz and in Figure 3.11(b) it is72kHz, which is indicated by the magenta line.

The sampled-data modeling method and the simplified model give good results up to 20 to30kHz, for higher frequencies it becomes closer to the switching frequency, which explains thephase and amplitude differences between the models and measurements. Figure 3.11 clearlyshows the resonance between Cf and ZL which is present in the transfer function of the RPItopology. Also the increase of the DC gain due to the lower switching frequency if a 350Vsupply is used can be seen, a lower switching frequency results in less significant resonantvoltage commutations and therefore a more ideal triangular shaped current waveform andconsequently a higher DC gain.

Figure 3.12 depicts the same transfer-functions and measurements of the pre-prototypefor Us = 140V and 90V. The same anti-aliasing filter is used in the set-point amplifier andthe additional delay in the control-logic is equal to 3J.Ls. Also these plots are generated usingthe same frequency interval, in Figure 3.11(a) ~fsw is equal to 14kHz and in Figure 3.11(b) itis equal to 9kHz, which is also indicated by the magenta line. LL and RL are determined fromFigure 0.3(a)4, which is included in Appendix 0, using the resonance frequency of Cf and LL.

From Figure 3.12 it can be seen that the measurements have more damping compared tothe models, also the phase lag of the models differs from the measurements and suggest thatthe pre-prototype has less delay and more damping. This difference has to be investigatedfurther. Especially the damping has to be investigated because it results in a difference atlow frequencies where the amplifier can be assumed as almost ideal. The same difference indamping is observed in Figure 2.20, which might suggest that the sampled data model for asingle module cannot be used to model multiple parallel modules. Therefore a sampled-datamodel of parallel modules has to be derived to verify this. Also the large-signal behavior ofthe load has to be verified, the impedance analyzer used to measure the inductance uses a

2The master module uses no control-ramps and should therefore be free of jitter if an ideal hysteretic currentcontroller was implemented.

3This delay is the combined delay of the used ADC and the control-logic until a turn-off level change isapplied.

4Generated using an impedance analyzer.

Page 64: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

68 CHAPTER 3. DESIGN AND QUALIFICATION OF A PRE-PROTOTYPE

rek Run:, 50.0MS/[T~amPle

I '

DPO Brightness: 76 %]

l\: 10.0A,@: 5.0 A

" , , , '5.00 ~

5.00 AM10.0]..lsC1 3.2 A 14 Dec 2006

11:58:59

(a) i;et = OA, channel 4 is iCf

leK ilWf!I50.0MS/S 18772 Acqs OPO Brlgtitness: 52 %[T """"""""",,]

Ch3 5, no r\

,l\: 13.3 A@: 8.3 A

14 Dec 200612:04:50

(b) i;et = 5A, channel 4 is ic f

3_1 A 14 Dec 200612:06:00

M 20.0]..155_00 A(113 5_ 00 A

lei<: Run: 50.0MS/s Sample IWI.!l ------DPO Brightness: 52 %[-T- ----------------------- --------]

(c) i;et = lOA, channel 4 is iCf

Figure 3.10: Jitter due to the resolution of the data acquisition circuit of iLf

Page 65: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

3.2. MEASUREMENTS 69

20mA current source instead of a set-point equal to lA. Also the low switching frequencycompared to the bandwidth of the hysteretic current controller and the low resolution of thedata acquisition might be causing the difference between the measurements and the derivedmodel at higher frequencies.

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70 CHAPTER 3. DESIGN AND QUALIFICATION OF A PRE-PROTOTYPE

I I I I I I I Io __ I "-_--+_1--_I~~~-~-

I I I I I I I I I I-20 I- - -+ - -I- _I _ ~ ~ '- I- --J - - - 1- I- _I _ 1_ I- I_I_

I I I I I I I I I I I I

-40

-60

-80

-100

-120

-140 "-_--'-_-'--__.L---'--'--'-"--- _

10'

103

f [Hz]

(a) for i;et = D.51A, Us = 58DV, eL = 29DV and !sw = 213kHz

I I I I I I I I I

r---_:_-_:_-:-7-'-:+7,7,---,;;;-,;;;-"~-;;,.;.-:. .- -:-: '-:- ~ - ~ ~ -:- :-:-:- - - - - ~ - - -:-I I I I I I I I I I I II I

I I I 11 I I I I I I I I I II I I I I_____I I- _ .... _ -l- _I _ I- I- 1-1- --J _ ~ _ '__ -I- L _1_1_ L 1_1 --: -l- _ l- -I _1_ 1_ 1_1 ~ 1__ J.. _ I- ~ _1_1_1

I I I I I I I I I I I I I I I I I I I I II I I I I I I

I I I I I I I I I I I I II I I II I I I I I I I I I It I I I I I II I I I I I I I

_____: L _ ~ _ ~ _: __ '_ :_: ~ :__ -l _ ~ _: _:_ ~ :_:_ _ _ _ _ _ _ -~~"[- ~-:=r":~':'~=-~~.'!!f."'."'_1••,,-••-.~~.~.~.~. L _

I I I I I :: : : : I : ~•••••, .....~

.......... Sampled data model '. ,__ ,_, , ,_, ",'I I I I I I I I

--- with AAF and control delay :,':::, """ , : : : : : :

Simplified model ::J- __ I__ +__ -:-:-~-:------:---:----: -:: :: I -~-:-~-:-:-Iwith AAF and control delay I: ::: I I :::: : I : : I

--~Measureddata -- 1--+-- :-:-1--:- ----:---:- ~-:-:--:-:---------:-- ~-- ~ -----

0

-100

Ol-200Q)

~

]l-300~

~

-400 "

-500~

---,---~---T-:-:-~~I-----~---:--T--~-:-:-:------i---:--I 1 I: : I - --T---:--~-:-Ttr:-:

I I I I I I I I 1 1 I I I I 1 I I 1 I 1 I I 1 I t: I'_1_1 -..j __ 1__ +-_I--..j_I_,_I_I ~ J --I __ I--_I_-I-_i:;__I

I I I I I I I 1 I I I 1 II 1 I 1 I I 1 II: 1

I I I 1 I I I I I 1 I I I I 1 I 1 1 I 1 I I 1 I ~ I_____1 1- +-_1_1_1-1-1 I J_I_I J 1__ +-_I--..j_I __ I_I -I- _1 __ I--_I_-I--l;_I_1

I I I 1 I I I I I 1 I 1 I 1 I I I I 1 I I 1 I I~ 1 II I I 1 I I I I 1 I 1 111 I I II 1 I 1 I I 1 I I:' I

_____, 1- +-_1_1_1-1-1 -l I- _-1 __ -l_I_I-I -.1 ,__ L -.1_1 __ I I __ -1- 1__ 1-_1--.l-l~_'_1

I 1 I I I I 1 I 1 I 1 1 I 1 I 1 I I 1 I I~ I II I I I I I I 1 I 1 I II 1 1 I 1 lei I

__I L .L _I _ 1_ L I- 1 -l I- _ -1 _ ~ -l _1_ I- 1 -.1 ,__ .L _ -I- 1__ L _ L -1 --.J~_, _I

I I I 1 I I 1 I 1 I I I I I I I 1 I I~ II I I 1 I 1 I I 1 I 1 I I I I I 1 I 1 1 I I 1 I ~ I

_____I ~ ~ _:_:-~~:-------l---:--~-~~-:-:-:------~---I. ~_-~~-:--:-:-----~-- .~ ••-!~_~..?-.~;~.

I I I I I I I I 1 I 1 I I 1 I I 1 I 1 1 I 1 I ~. I

_____; I- .L_I_I_l- LI -1 1-_.1 _ ~ ...l_I_I-I -.1 1__ +- _I- -.1 _1 __ 1_1 .1 I__

I I I I I I I I 1 I 1 III I I I II 1 I 1 I II I 1 I I I I I 1 I 1 III I I I I I 1 I 1 I I 1

________ 1__ -I- _ J- _I __ I. I. L I~ --.J L _ -1 _ L --.1 _1_ L L, -.l _ _ L _ I- -.1 _1 __ 1_1 .1 _ _ L _ L

I 1 I I I I I 1 I I III I 1 I I I I I 1 I 1 I

I 1 I I I I I 1 I I IIII! I 1 I I I I I 1 J 1 I

20

0

-20

lD -40

~-60. ]l

~ -80

-100

-120

-14010'

143kHz

103

f[Hz]

(b) for i;et = D.51A, Us = 35DV, eL = 175V and !sw

I 1 I I I III I 1 1 I I 1 1 I I 1 I I: 1 I

1----:---:--....7""~_:_,00'------..-..-,;;;~~-;,,;;-~-~'.·- - ~ - ~ ~ -:-:-:- - - - - - ~ - - - - - ~ - ~ ~ -:-1-:-:- --~ ---:- -~ -:- ~ ~~--:

I I 1 I I I I I 1 I 1 I 1 1 I I 1 I I~ 1I I I I I I I 1 I I I I I 1 1 1 I I I 1 1 I~ 1

_____1 I- _ -'" _ +- _1_1_ L L 1 --I 1__ +- ;- -J _1_1_ 1 -..j 1__ -I- _I- -l _1 __ 1_1 - .1 - - -1_ - I-- -1- -I- -I~_ -I

I I 1 I I I I I 1 I 1 I I I I I 1 I 1 1 I 1 I I 1 I I~ 1I I 1 I I I I 1 I I I I I I 1 II 1 1 I 1 I I:; 1

I I I 1 I I I I 1 I I _ I I I 1 1 I 1 I I 1 1 I I~ 1_____1 L _ ..l _ 1. _1_1_ L L 1 ...J L _ 1 _ L --.1 _1_1_ 1_'__ --::-_ ::.--_~ -_ •. ··.:L·:r·-"I·-".~...__.T•• _ 1 1__ L _1_ 1 --,:;_'_1

,-__'--_'--_-'-:-,-:-,,-,-:c.:c.: , : : I : : : : : I: I 1 I 1 I 1 ....~h•••••~ •••• ~•••~•••~.:~ : :

•....•.•.. ,Sampled data model 1__ 1. _ '-- --.J _1_1_1 -.1 ,__ 1_1- --' _1_'_1_'__ 1 1__ L _1_1 ~~.-'

1 I 1 I I J I I 1 I 1 1 I I I 1 I I~ ·'1--- with AAF and control delay :: :::: I :: :: : I : : : : :~ :

Simplified model :--~ _~_:.:-:_. _~-~~-:-'-:-I-----i- _~_:_+_~ __:with AAF and control delay :: :: I : : : I: : I I : I :t :

--~Measureddata I__ ~ __ J_I __ I ~ 1 1 ••1_1_1 1_1~_I_11 I 1 I I I I - 1 -I 1 1 I '~ 1

0

-100

~ -200~. ]l

-300~

-400

-500 -

10'

Figure 3.11: Transfer-function of an existing amplifier NCr = 7nF, LL = 18.3mH and RL = 2.30

33/lH, Cf 7.2/l,F,

Page 67: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

3.2. MEASUREMENTS 71

II

I , I-.I- 1 L _ J_

I II II I

~- I -~ ~ I -'---'-~TI-'-1,-,----

1/ :I I,II ,

,I I I I

I I I II I I I

I I I I I I I I I I I I------~----~-----I--I-~-I-TT-------r---~--~--r-r--'

I I I I I I I I I I I I II I I I I I I I I I I I I

I I I I I I I I I I I I I

I I I I I I I I I I I I I I- - - - - I - - - -. I - - I I - 1 - 1- T T - - - - - - - 1- - - - I - - , - - ,-- - I -1- T

I I I I I I I I I I I I I I

I I I I I I I I I I I I I II I I I I I I I I I I I I II I I , I I I I I I 1 I I I I I I I I I

------~----~-------I-~-I-T~-------~---~--~--~-~-I-T~~- ------T-------~-~-~-- -I I I I I I I I I I I I I I I I I

I I 1 I I I I I I I I I I I I I II I I I I I I I I I I I I I I I I I

-80 '-------'- _--'------L 1 , I .l

10' 102

103

20

0

iii' -20~. 31~ -40

-60

0 1

-50OlQ)

-100~. ]l~ -150 I

I

-200 I

-250 c

10'

IIII I

I I

.......... Sampled data model

--with AAF and control delay

Simplified modelwith AAF and control delay

--- Measured data

I I I I I I I I II I I I I I I I I I

I I I I I I I I I I I I I-1--,--1-- -I-"-I-------T------ 1-- -'-1-1-'

I I I I I I I I I J I I I

I I I I I I I I I I I I I

I I I I I I I I I I I J I I I-----l-------rl~-------~-------~-1-1-Tl-1

1 1 1 I 1 1 1 1 1 1

1 1 1 1 1 I 1 1 1 1 1 1-.l __ ..J __ L 1_ L ..J _I -.L ' 1__ -.l _ -.l _ L ..J _I

1 1 1 1 II 1 1 1 1 1 1

1 1 1 1 II 1 1 1 1 1 11 1 I , 1 1 1 I 1 1 1

-1- -I- - >- -:- +- -1-1-- - -- - - + - -- -1- --1- - -+ - -..j - +- ...... -1

1 II 1 1 1 1 1 1 1I I I I I 1

(a) for i;et 1.01A, Us

f[Hz]

140V, eL = 70V and !sw = 27kHz

I I II I I

I I II 1 I I II I 1 I I I 14--1--1--1-1-4-1----- --1-----I---1--~-~--4

1 I II I 1 I 1 I I

I I 'I I 1 I 1 I II II I I I 1 I I I

[ , I' I 1 I I I- - - - - r- - - - --, - - -I - - t t - 1- r

I I I 1 I I II I I 1 I I I

I I 1 I I I

I I 1 I I I- - -1- - T - T -I-I"

1 I I I

I

,,,I II 1--~~-------I----~

I I I II 1 I

1 1 I 1 I 'I1 1 II I I

I 1 I 1 I I II 1 I I- --, - - - - r- - - -.- - -I - -I - i -1- r- -r - - - - - - -1- - - - -, - - --f - - 1- - 1- --, -

I 1 1 1 1 II 1 1 I I I

1 1 I 1 1 I II 1 I I I I

1 1 1 1 1 I II 1 I I I II 1 1 1 1 II 1 I I I I

------l----r--T--I-~-T--rT-------I----T-----I--r~-

1 1 1 I I I II 1 I I I I1 1 I I 1 1 II I I I I I

1 1 I I I 1 II 1 I 1 1 I 11 1 I I 1 1 1 I 1 I I 1 I I I 1 I _1_1. __

------~----~--T--I-~-T--~T-------I----------I--~-I--~~----------------1

1 1 I 1 1 I II 1 I 1 I I I 1

1 1 I 1 1 1 II 1 I I 1 I I 1

1 1 I I 1 1 II 1 I 1 1 II ,1 I 1 I

20

0:

iii' -20~

]l~ -40

-60

-8010'

o1 1 I 1 I

I 1 I 1 1

I I 1 I 1- --- -------I----T--

-100

-150

-200

(b) for i;et

f[Hz]

1.01A, Us = 90V, eL = 45V and !sw 18kHz

Figure 3.12: Transfer-function the pre-prototype N7nF, LL = 4.2mH and RL = 1.00

100jLF, Cr

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Chapter 4

Conclusions and Recommendations

From the theory explained in this report together with the measurements the following con­clusions can be drawn and recommendations can be made.

4.1 Conclusions

• Increasing output power using paralleled interleaved modules will result in a significantripple current reduction, an increase of bandwidth and a decrease of the delay introducedby the hysteretic current control. This at the cost of slightly increased losses at lowcurrent set-points.

• Interleaving using control ramps wil result in steady-state interleaving with a fast tran­sient response during normal-mode operation. Interleaving using control ramps is robustfor acceptable component variations and results in stable control with a dead-beat char­acter for small-signal perturbations. However, during clipping-mode operation otherinterleaving mechanisms are used which will be disrupted by the control ramps.

• Steady-state interleaving during clipping-mode operation can be achieved for odd andeven numbers of parallel modules using the appropriate additional turn-off criterionand a constant or slowly changing turn-off level. The natural interleaving mechanismis robust for component variations and small signal perturbations and will result infast convergence to steady-state interleaving. Also equations are derived to calculatethe initial cycle by cycle state of the inductor currents making it possible to predictthe dynamic behavior of both explained interleaving mechanisms during clipping-modeoperation.

• The sampled-data modeling method and the discussed simplified model can be used toaccurately determine the small-signal model for a single module. However, for multipleparallel modules it is not enough to just extend the model of a single module becausethis will result in a significant difference in damping and phase lag. A detailed sampled­data model for multiple parallel modules was due to lack of time not investigated duringthe graduation period but should be derived. This model can then be used to verify thesimplified model.

73

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74 CHAPTER 4. CONCLUSIONS AND RECOMMENDATIONS

4.2 Recommendations

• Lowering of the switching frequency of the individual modules is possible enabling theuse of IGBTs, instead of keeping the switching frequency per module fixed to increasethe bandwidth.

• A beter transient response during normal operation is possible by using the switchingperiod times of all N modules to determine the placement of the control ramps. Alsodifferent feed forward techniques can be investigated which might improve the transientresponse even further.

• Stability of the natural interleaving mechanisms is proven using the geometry of theproblem. A more detailed analysis is possible using, for instance, the method of Lia­punov. This can give more insight in the dynamics of the natural interleaving mechanismand is therefore interesting for future research.

• The resolution of the data acquisition of the inductor currents was limited resulting insignificant jitter for small set-points, also the switching frequency was low compared tothe existing amplifiers. For future research higher resolution data acquisition has to beused to improve the behavior of the amplifier for small current set-points, also increaseof the switching frequency and use of an additional current-loop in combination withthe suggested interleaving techniques has to be investigated. In this way a workingprototype of a long-stroke or short-stroke amplifier can be build, as it is discussed inthe project description which is included in Appendix P. Due to certain choices whichwere made during the graduation period there was a shift from a working short-strokeamplifier to investigation of interleaved paralleling during normal and clipping-modeoperation.

• Resonant pole inverters require accurate measurement of the filter inductor current.This requires a high bandwidth current sensor capable of measuring DC currents. Thesesensors are not yet commercially available, which is a disadvantage of this topology.Appendix H discusses a possible implementation of such a sensor.

• Coupling of the filter inductors has to be investigated to reduce the total inductor size.It might also result in a faster transient response [15].

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Acknowledgements

First of all I want the thank Han Severt for his help writing the VHDL code of the pre­prototype amplifier and all his help during the testing and debugging phase. Without him itwould have been very challenging or even impossible for me to finish my graduation periodin this time with a working amplifier and these practical results.

Also I want to thank my supervisors at ASML, Prodrive and the Eindhoven University ofTechnology, namely; Peter van Gils for his confidence and his help getting everything arrangedat ASML, Korneel Wijnands for keeping me on track with my planning and milestones andJorge Duarte for his insight into the power-electronics and help on the sampled data modelingmethod and various other theoretical, and mathematical, problems. Furthermore I want tothank my supervisors for the freedom they gave me to change the direction of the investiga­tion beyond the original project description.

Finally, I want the thank my other direct colleagues at ASML for their help and valuablediscussions on various subjects, especially Jan Coenders and Henk Huisman for their insightin to the state-plane for single and paralleled modules.

75

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List of Abbreviations

Abbreviation In full Page

AAF Anti-Aliasing Filter 59AC Alternating Current 57

DC Direct Current 9

EMC Electro Magnetic Compatibility 9EMF Electro Motive Force 9

FPGA Field Programmable Gate Array 57

HF High Frequency 109

IGBT Insulated Gate Bipolar junction Transistor 33

LF Low Frequency 109LSB Least Significant Bit 59

PAAC Power Amplifier Alternating Current 57PWM Pulse Width Modulation 9

RPI Resonant Pole Inverter 9

ZVRT Zero Voltage Switching Resonant Transition 9ZVS Zero Voltage Switching 9ZVS-QSC Zero Voltage Switching Quasi Square-wave Converter 9

77

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List of Notation

Operator DescriptionOt First derivative to time

First derivative to timeSecond derivative to timeAmplitude or peak value

II Absolute value() Mean Value

Symbol Unit Description Page

Index indicating parallel modules 30

rSu [V] Voltage across the filter inductance at which theadditional turn-off criterion occurs 50

b.T [s] Time difference between the actual and desired currentwaveform (iLf ) 33

b.ucf [V] Output voltage ripple (ripple of uCf) 19b.rn [A] The maximum amplitude of the negative control ramps 35b.rp [A] The maximum amplitude of the positive control ramps 35

wOr [rad S-l] Angular frequency of the resonance between Cr andL 1 14

f' VLfCr

A [m2] Area 31

Cf [F] Filter capacitor 9Cr [F] Combined switching-leg capacitor 9Cr1 [F] Switching-leg capacitor 81 11Cr2 [F] Switching-leg capacitor 82 11

fol [Hz] Angular frequency of the resonance between Cf andL 1 61

L, VLLCf

fsw [Hz] Switching frequency of the inverter-leg 18

!SWmin [Hz] Minimum switching frequency of the inverter-leg 24

79

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80 CHAPTER 4. CONCLUSIONS AND RECOMMENDATIONS

ZC [A] Current needed to determine the center of theresonance of the fast current commutation duringclipping-mode operation 42

.* [A] Positive turn-off level (for hysteretic current control) 13zhiiLf [AJ Current through L f 11

zLfmin [A] The minimum current required for a complete resonantvoltage commutation 16

'* [A] Negative turn-off level (for hysteretic current control) 13ZZo

in [A] iLf if 82 or D2 is conducting 33Zo Maximum output current of the inverter 18zp [A] iLf if 81 or D1 is conducting 33'* [A] Set-point for the hysteretic current controller 17ZsetZth [A] The minimum turn-off level (must be larger compared to

iLfmiJ 17Zthm [A] The minimum turn-off level required for ZVS over the

complete output voltage range (constant) 43Zthc [AJ The minimum turn-off level used during clipping- mode 46

operation.

k The amount of control action of the control ramps 33

L f [H] Filter inductor 9LL [H] Load inductor 9

M [V] A vector describing the center of a resonance in thestate-plane 14

N Any integer number of parallel modules 29

R [V] Radius of a resonance in the state-plane 14RL [0] Load resistor 9r n [AJ Control ramps which are added to ito 33rp [AJ Control ramps which are added to i hi 33

t [8] Time 11Td [8] Total circuit delay 11

Tsw [8] Switching period of single module f;;; 40

UCf [V] Output voltage across Cf (assumed constant) 11

uCf [V] Output voltage across Cf (function of t) 19Uc". [V] Voltage across C". 11U o Normalized output voltage uCf 34US [VJ Supply voltage (single supply) 11

Us+ [V] Positive supply voltage (symmetrical supply) 11

Us- [V] Negative supply voltage (symmetrical supply) 11

V [m3] Volume 31

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4.2. RECOMMENDATIONS

Zo [0] Impedance of Cf and L f , /¥i; 21

ZOr [0] Impedance of Cr and L f , Ifi 14

ZL [0] Load impedance equal to jwLL + RL 25Zm [0] Impedance of Cf and one L f of N parallel ones 40Zn [0] Impedance of Cf and N parallel L fS 40

81

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List of Figures

1.11.21.31.41.51.61.71.81.91.101.111.121.13

Basic half-bridge topologySwitching waveformsEquivalent circuits . . . .Modes of operation ....State-plane of UCr and ZOr . iLjNormalized iLjmin for a symmetrical and single supplyTurn-off levels as a function of i;et .Equivalent circuit for output filter resonance.UCj and iLj during normal operation .....UCj and iLj during clipping mode operation.UCj and iLj during clipping mode operation with di/dt = 0 turn-offLinear model with added delay . . . . . . . . . . . . . . . . . . . . .Transfer function of the sampled-data model and the simplified model for Us =

700V, Cr = 7nF, L j = 33t-tH, Cj = 7.2t-tF, LL = 18.3mH, RL = 2.30 andeL = 350V .

101012121516181920222325

27

2.1 Topologies used for Comparison. 302.2 Steady-State Convergence using Control Ramps. 342.3 Interleaving for N = 3 explained . . . . . . . . . 352.4 Ramp placement compared for, I:i.Lj = 0%, Us = 160V, Lj = 120t-tH, Cj =

I00t-tF and LL = 2mH . . . . . . . . . . . . . . . . . . . . . . . . . . . 362.5 Double hits during one cycle, for N = 3, k = 1, and a constant UCj . . . . .. 372.6 I:i.L j = ±10%, Us = 160V, L j = 120t-tH, Cj = I00t-tF and L z = 2mH .... 382.7 Ramp placement compared for, I:i.L j = ±5%, Us = 160V, L j = 120t-tH,

Cj = I00t-tF and Lz = 2mH . . . . . . . . . . . . . . . . . . . . . . . . . . 392.8 iCj compared for, Us = 160V, L j = 120t-tH, Cj = I00t-tF and LL = 2mH 392.9 Equivalent circuits during clipping mode operation for N = 3 . . . . . . . 402.10 iLj and uCf for N = 3 clipping to the positive supply rail . . . . . . . . . 412.11 Corresponding state-planes for N = 3 clipping to the positive supply rail. 422.12 iLj during clipping-mode operation with turn-off inhibit for N=3 442.13 iLj and UCj plot in time and phase-plane for N = 3 . . . . . . . . . . . . 442.14 iLj and UCj plot in time and phase-plane for N = 4 . . . . . . . . . . . . 452.15 ilk] and corresponding steady-state state-plane, for clipping to the positive supply 492.16 iLj as a function of time with different turn-off criterion for N = 4 . 512.17 Corresponding state-plane with different turn-off criterion for N = 4 512.18 Bottom of the state-plane with different turn-off criterion for N = 4 52

83

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LIST OF FIGURES

iLj and corresponding steady-state state-plane for N = 4 53Transfer function of the sampled-data model and the simplified model for Us =140V, Lj = 120t-tH, LL = 4.2mH, RL = LOn and eL = 350V 55

Basic schematic of the amplifier. . . . . . . . . . . . . . . . . 58Measurement setup. . . . . . . . . . . . . . . . . . . . . . . . 61Step-response no clipping, step from i;et = 5A to i;et = lOA and vice-versa 62Step-response no clipping, step from i;et = 5A to i;et = lOA . . . . . . . 62Step-response no clipping, step from i;et = lOA to i;et = 5A . . . . . . . 64Step-response clipping, step from i;et = 5A to i;et = 15A and vice-versa 64Step-response clipping, step from i;et = 5A to i;et = 15A . 65Step-response clipping, step from i;et = 15A to i;et = 5A . . . . . 65Sinusoidal i;et with a frequency of 40Hz. . . . . . . . . . . . . . 66Jitter due to the resolution of the data acquisition circuit of iLj . 68Transfer-function of an existing amplifier N = 1, Lj = 33t-tH, OJ = 7.2t-tF,Or = 7nF, LL = 18.3mH and R L = 2.3n 70Transfer-function the pre-prototype N = 3, Lj = 120t-tH, OJ = l00t-tF, Or =

7nF, LL = 4.2mH and RL = LOn 71

84

2.192.20

3.13.23.33.43.53.63.73.83.93.103.11

3.12

A.1 Basic resonant circuit 89A.2 State-Plane Plot ... 90

C.1 Turn-off levels for fixed hysteretic current control as a function of i;et 96C.2 Turn-off levels as a function of i;et .. . . . . . . . . . 97

D.1 Switching frequency fsw as a function of i;et and UCj . 100

E.1 Ideal triangular iCj . . . . . . . . . . . . . . . . . . . . 101

F.1 Ideal triangular iLj with a turn-off and turn-on delay Td 103

G.1 Zout and G as a function of UCj and iset . . . . . 107

H.1 Current measurement using two separate sensors 110

1.1 Positive control-ramps together with the actual and desired current. 1121.2 Negative control-ramps together with the actual and desired current 112

J.1 Soft switching ensured . . . . . . . . . . . . . 116

0.1 Steady-state interleaved clipping (cM = UCj) 1450.2 From steady-state interleaved clipping to normal mode operation (ch4 = UCj) 1460.3 Impedance of used loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 146

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List of Tables

1.1 Turn-off levels for variable hysteresis control . . . . . . . . 17

2.1 Comparison of a single module to N interleaved Modules 32

3.1 End-stage component values en specifications 583.2 Specifications of the data acquisition circuit 593.3 DC specifications of the used loads ...... 60

C.1 Turn-off levels for fixed hysteresis control 95

N.1 Equipment used during the measurements 143

85

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Bibliography

[1] O. Patterson and D. Divan, "Pseudo-resonant full bridge dc/dc converter," PESC '87,pp. 424-430, June 1987.

[2] D. Divan and G. Skibinski, "Zero-switching-Ioss inverters for high-power applications,"IEEE lAS, pp. 627-634, October 1987.

[3] Cho, "Three phase sine wave voltage source inverter using the soft switched resonantpoles," IECON '89, vol. 1, pp. 48-53, November 1989.

[4] Cheriti, "A variable frequency soft commutated voltage source inverter delivering sinu­soidal waveforms," IEEE lAS '90, vol. 1, pp. 697-702, October 1990.

[5] C. P. Henze, H. Martin, and D. Parsley, "Zero-voltage switching in high frequency powerconverters using pulse width modulation," APEC '88, pp. 33-39, February 1988.

[6] G. Hua and F. C. Lee, "Soft-switching techniques in pwm converters," IEEE Transactionson Industrial Electronics, vol. 42, no. 6, pp. 595-603, December 1995.

[7] Y. Zhang and P. Sen, "A new soft switching technique for buck, boost and buck-boostconverters," IEEE Transactions on Industry Applications, vol. 39, no. 6, pp. 1775-1782,November 2003.

[8] D. Perreault, J. Kassakian, and H. Martin, "A soft-switched parallel inverter architecturewith minimal output magnetics," PESC '94, vol. 2, pp. 970-977, June 1994.

[9] J. Duarte, "Sampled-data modelling and simulation of cyclically switched converters,"Eindhoven University of Technology, Den Dolech 2, Eindhoven, The Netherlands, EUTReport 96-E-303, 1996.

[10] J. Duarte and M. Hendrix, "Computer-aided optimization of switching converters forlow-power applications," Eindhoven University of Technology, Den Dolech 2, Eindhoven,The Netherlands, EUT Report 00-E-311, 2000.

[11] M. Meyer and A. Sonnenmoser, "A hysteresis current control for parallel connected line­side converters of an inverter locomotive," EPE '93, vol. 4, pp. 102-109, September1993.

[12] J. Batchvarov, J. Duarte, and M. Hendrix, "Interleaved converters based on hysteresiscurrent control," PESC '00, vol. 2, pp. 655-661, June 2000.

[13] D. M. Sable, F. C. Lee, and B. H. Cho, "A zero-voltage-switching bidirectional batterycharger/discharger for the nasa eos satellite," APEC '92, pp. 614-621, February 1992.

87

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88 BIBLIOGRAPHY

[14] J. R. Pinheiro, H. A. Grndling, D. L. Vidor, and J. E. Baggio, "Control strategy ofan interleaved boost power factor correction converter," PESC '99, vol. 1, pp. 137-142,February 1999.

[15] J. Kolar, G. Kamath, N. Mohan, and F. Zach, "Self-adjusting input current ripple cancel­lation of coupled parallel connected hysteresis-controlled boost power factor correctors,"PESC '95, vol. 1, pp. 164-173, June 1995.

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(A.I)

Appendix A

State-Plane Explained

Figure A.I shows a resonant circuit with a capacitor C with initial voltage Uc, an inductorL with initial current h, a voltage source with a constant voltage Uo and a current sourcewith a constant current 10 .

Figure A.I: Basic resonant circuit

The voltage and current in time can be described by the following system of differentialequations.

uc = b(iL - 10)iL = t(Uo-uc)

Which in turn can be rewritten into the following second order differential equation.

LCuc +uc = Uo

Where, uc(O) = Uc, iL(O) = hand uc(O) = b(h - 10 ),

(A.2)

This second order differential equation can be solved resulting in the following equation.

uc(t) = Uo+ (Uc - Uo)cos (wot) + Zo (h - 10) sin (wot)iL(t) = 10 + (h - 10 ) cos (wot) - Yo (Uc - Uo)sin (wot)

Where, Wo = vb, Zo = .ff; and Yo = 10

,

(A.3)

If both states Uc and i L are scaled and plotted on a single orthogonal base (uc, ZoiL)resonances will appear as circles.

Rewriting of equation A.3 results in

89

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90 APPENDIX A. STATE-PLANE EXPLAINED

uc(t) Uo + Rcos (wot + 'Po) (A.4)Zoidt) ZoIo - Rsin (wot + 'Po)

where

R V(Uc - UO)2 + Z5 (h - 10 )2

'Po arctan (Zo(h-1o))Uc-Uo

From this equation it can be seen that multiplication of iL by Zo, or more general scalingof both states to the same dimension, will result in voltage and current resonances with thesame amplitude R and a ~7f phase-shift.

--.-J200

o

150 ----------,------------,------------~------------,----------- ~ ----------,IIIIIIIIII

I I I I100 c ~ " ~ -------"-----------

I I I II I I II I I II I II I II I II II II II II I

50 -----------~------------I------------~------------,------------~-----------I I II I I

, : : R ----~' ~ <PoI I _______________

: (Uo'Za*10) ---> C(II

I II I I~------ I ------~-------------

I I I II I II I II I II I II I I

I "I "I I I II I I I I

-50 - - - - - - - - - - -, - - - - - - - - - - - -!- -----------~ -----------T - - -~- - - - T - - - - - - - - - --

I "I I II II II III ,

.~~J ~ ~ L -'-- _-50 0 5 100 150

uc[Vj

-100-100

~._--'

Figure A.2: State-Plane Plot

By plotting the capacitor voltage Uc on the x-axis and the inductor current iL on they-axis the resonance will appear as a circle with radius R, initial phase 'PO, center (Uo, ZoIo)and angular frequency wo, as it is depicted in Figure A.2, where the following parameters andinitial conditions where used:

L

h10

30f-LH C15A UclOA Uo

5f-LH150V50V

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91

In a state-plane plot the amount of energy stored in each state at each time instance isshown in a single figure. However the exact time information is lost and can therefore notbe read from the figure. State-plane analysis is especially useful when analyzing the resonantbehavior of soft switching inverters and converters, this because resonances are depicted ascircles. If damping is present the circles will become spirals. If one of the states is a constantover a time-interval circles will become straight lines.

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Appendix B

Derivation of i£f .m'tn

From Figure 1.5 it is clear that iLj (t2) is sufficiently high (R > Rmin) to make the transi­tion of UCr from Us+ to Us- possible for both cases displayed in the figure. Also for thecase displayed in Figures 1.5(b)iLj(t6) is sufficient (R > Rmin) , however, in Figure 1.5(a)iLj(t6) results in IRI ~ IRminl, which is just enough to make a complete resonant voltagecommutation possible. At t = t7 the diode starts conducting and turn-on of 81 is initiated,however due to the very small radius of the resonance the diode stops conducting and a newresonance starts. After the circuit delay Td at time instance t = to 81 is turned on and Cr

is clamped to Us+. The energy stored in Cr is dissipated in the switch resulting in switchinglosses. If turn-on had occurred at t = t7, if Td = 0, turn-on was lossless. However, if theradius becomes even smaller, IRI « IRminl, natural commutation will not occur at all andconsiderable energy is dissipated in the switches during the switching actions, therefore toensure ZVS there should be a bound on IiLj I before turn-off of a switch can occur.

To make a complete resonant voltage commutation possible, for time interval t2 ..t3 whereUCr changes from Us+ to Us-, the following must hold.

IRI 2 IRminl = UCj + Us-

which results in the following inequality

(B.1)

(B.2)

where UCj 2 0 and iLjmin equals the minimum allowable iLj necessary for the naturalcommutation to occur.

Also for time-interval t6 ..t7, where UCr changes from Us- to Us+, a similar equation canbe derived

IRI 2 IRminl = Us+ - UCj

Which in turn results can be rewritten to

93

(B.3)

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94 APPENDIX B. DERIVATION OF hFMIN

(B.4)

where UCj SO.

Equations B.2 and B.4 can be rewritten and simplified to the following equations.

. . { Z~1' J-u§+ + U§_ + 2UCj (Us + + Us-)IZLjl 2: ZLjmin =

o

, UCj 2: 0

, UCj < 0

, UCj 2: 0

, UCj < 0

(B.5)

(B.6)

By taking the maximum values of both B.5 and B.6 for UCj 2: 0 and UCj < 0 andrewriting them, the following conservative bound can be found.

liLjl 2: iLfmin = Zl JI (Us+ + Us- ) (Us + - Us- - 2UCj) I0,.

(B.7)

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(C.l)

Appendix C

Fixed Hysteresis Current Control

The variable hysteresis current control scheme suggested in [3] is discussed in Section 1.1.3.This section starts with the explanation of fixed hysteretic current control [2], after that acombination of fixed and the suggested variable hysteretic control scheme is discussed.

Table C.l shows the turn-off levels for fixed hysteretic current control.

Table C.l: TUrn-off levels for fixed hysteresis control.* <0 i;et 2: 0~set

.* .* . .* .* .~hi = ~set + ~thf ~hi = ~set + ~thf.* '* . .* .* .~lo = ~set - ~th f ~lo = ~set - ~thf

Where ith f is constant and equal to

~thf > i;et + max (iLfmin)

and the index f denotes fixed hysteretic control.

Figure C depicts the turn-off levels as a function of i;et for fixed hysteresis current con­trol. Currents are normalized to i o , which equals the maximum output current of the inverter.Variable hysteretic current control results in a smaller current ripple and therefore less con­duction losses for smaller set-points, however the frequency changes as a function of i;et andwill be much higher compared to fixed hysteretic current control and can be determined asfollows

fSWf ~ ( )4£ fUs liset I+ 2ithf

When using fixed or variable hysteretic current control the switching frequency of theinverter leg will vary as a function of UCf and i;et. To limit the maximum switching frequencyfswmax ' ith can be increased. However, this will also decrease the switching frequency for largerset-points and will consequently limit the maximum achievable control bandwidth. By makinguse of a combination of the discussed variable and fixed hysteresis control as it is depictedin Figure C, fswmax can be limited without affecting the switching frequency for higher set­points. Using this combination the, current ripple amplitude of iLf wil be limited to ith f

95

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96 APPENDIX C. FIXED HYSTERESIS CURRENT CONTROL

~------~-----------,------------------------

I

- - - 1- __I

I_ l _

II

IIII Ia ------------~------------~---- L _

I I II

III

I------------~-------------I-------------~---- -------

I

I

I

I

1 ------------~-------I

II

0.5 -.

I

2 ------------f ----------II

III

1.5-------------~------------~-------I I

-0.5

-1,

---------------- --,

I

I

-1.5 '- - - - - - - - - - - - - ~ - - - - - - - - - - - - -' - - - - - - - - - - - - - L - - - - - - - - - - - -I

I

-2 - - - --I

I-------~-------------I--------------------------

-1 -0.5 0.5

Figure C.l: Thrn-off levels for fixed hysteretic current control as a function of i;et

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97

which is chosen larger compared to ith and will therefore result lower maximum switchingfrequency. As it can be seen from Equation C.2, where ith = ith

fif combined hysteretic

current control is used.

f ~SWmax

Us(C.2)

______ L _,,

II

------------1----------I

1 L - - -

o _ith ; _I

I

,,,,,,,,,, ,

---I-------------~------------,,,,,

~ l ~------------- _

,,,,

, ,___ ~ I L _

, , ,, , ,

I I I I

-2L-----------L-----------L------------~------------, ,, , ,

I I I

1.5 -------

, ,2 ------------+------------~-------------~---

, , ,, , ,, , ,, , ,, , ,

__ 1 1 ~ _

, , , (IF , ...------, , ,, , ,, ,, ,, ,

--']" -----1----, ,, ,

,,

I ' ,

0.5~------------t------------~--

-0.5

-1 -0.5 0.5

Figure C.2: TUrn-off levels as a function of i:et

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Appendix D

Derivation of fsw

When assuming ideal triangular currents i.e. negligible circuit delay Td' no significant resonanttransitions and a constant i~et the switching frequency for variable hysteretic current controlcan be approximated by the following

(Us+ - UCj ) (Us- + UCj)

fsw ~ ( ) ( )2L j lisetl + ith Us+ + Us-

Which in turn can be simplified for a symmetrical supply Us+ = Us- = ~Us to

fsw ~ ( )8L j Us lisetl + ith

and for a single supply Us+ = Us and Us- = 0 to.

UCj(Us - UCj)fsw ~ ( )

2LjUs lisetl + ith

(D.l)

(D.2)

(D.3)

The switching frequency is a function of i~et and UCj as it can be seen from Figure D.1.The maximum frequency occurs if i~et = 0 and UC j = 0 for a symmetrical supply, and isequal to equation D.4. The minimum frequency fSWmin occurs if UCj clips to Us+ or Us­and is equal to OHz. To ensure fSWmin >> 0 a bound on the maximum output voltagecan be introduced or an extra turn-off criterion can be implemented, which is discussed insection 1.1.4. For fixed hysteretic current control a similar derivation is possible.

Usfswmax ~ -8L.

j 2th

99

(D.4)

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100

,.10

APPENDIX D. DERIVATION OF Fsw

Us == 2llJV, 11M>: = 20A, Ilh = 2A and y = 15 ~,

'serIA] SymmetrlCll1Single

O.5Us

Figure D.l: Switching frequency fsw as a function of i;et and uCf

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Appendix E

Derivatioll of 6ilCf

Figure Eol depicts the ideal triangular steady-state filter capacitor current iCj, when assumingTd = 00

Figure E.l: Ideal triangular iCj

Using this current wave form the peak to peak output ripple current can be determinedas follows

t2

1 Jo!::luCj = -c ~LjdtPP j

to

The inductor current in turn can be determined by the following

Rewriting of the right hand side of Equation Eol into two parts results in

101

(Eol)

(E.2)

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102 APPENDIX E. DERIVATION OF t::..UCF

(E.3)

(E.4)

Now Equation E.2 and Equation E.3 can be combined and simplified to

A ' (i set + i th)2Lj(Us- + Us+)L.J.UCj =

4Cj (Ucj + Us-)(Us+ - UCj)

This equation can be used for a limited output voltage and current range only, due to theassumed triangular shaped currents. Also Td is assumed 0, if Td is significant (i set + ith) hasto be replaced the current ripple amplitude of iCj.

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Appendix F

Zout for Triangular Currents

When assuming a constant output current, no resonant transitions and a small circuit delayld, iLj will be triangular shaped as displayed in Figure F.l, where t2 - t1 = t5 - t4 = Td·Due to the turn-off delay current will shoot over the turn-off levels ito and ihi until it reaches

imin or imax . imin - ito and imax - ihi are equal to Td d~~f, when assuming ideal triangularcurrent waveforms.

_~__~I. Ll t~ I

" Ql[s]

I I I ~ U __LLL13 L4 15 16

Figure F.l: Ideal triangular iLj with a turn-off and turn-on delay Td

d~~f is dependent on Us and UCj , therefore (iLj) and consequently the output current iLis output voltage UCj dependent. This can be translated into an output impedance Zout. Todetermine Zout, iL for a given UCj must be known. From Figure F.l it can be seen that iLis equal to

103

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104 APPENDIX F. ZOUT FOR TRIANGULAR CURRENTS

when assuming (icj ) = O.Using a triangular shaped iLj equation F.1 can be solved to.

i L = ~ (t3 - to) imax + ~ (t6 - t3) imin

where imax , imin, t3 - to and t6 - t3 can be determined by

(F.1)

(F.2)

2max ihi + L1F (Us+ - UCj )1d

imin i/o + iF (Us- - UCj )Td

t3 - to ihi + imax +Td (F.3)L~ (US:-UCf) L~ (UCf- US-)

t6 - t3 = 'lio + imqx +TdL~ (US--UCf) L~ (UCf- US+)

Combining and rewriting of Equation F.2 and F.3 results in

(i/o + ih.i) Td ( ) TdiL(Ucj) = 2 + 2Lj Us+ + Us- - Lj UCj

Which can be used to solve the differential output impedance

(FA)

(F.5)Z - dUC j _ r { j~.uC j }out - diL - fl.U;~->o iL(UCj) - iL(Ucj + b.UCj)

Simplification of this equation results in the output impedance for ideal triangular currentswith a constant circuit delay Td

(F.6)

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Appendix G

Alternative to Derive G and Zout

An alternative to the sampled data modeling method to determine Zout and G is to useEquation 1.5, which is discussed in Section 1.1.1 and is valid for a constant output voltageUCj, and use it to solve iL for different i;et and UCj. Using this solved data, Zout and G canbe determined as follows

Z - dUcj ~ iJ.UCjout - diL ~ iL(UCj, i set ) - idUcj + iJ.UCj, iset )

G = diLj ~ iL(UCj, iset ) - idUcj, iset + iJ.i set )di set iJ.iset

(G.1)

(G.2)

Figure G.1 depicts Zout and G, derived from equations G.1 and G.2, as a function of UCjand i;et for different values of Us, LF and Td. To make a comparison possible Cr and ith arescaled with Us.

Figure G.1(a) and G.1(b) show Zout and G for Us = 800V and Td = Os. From these plotsit can be seen that even without circuit delay, Zout varies between 175 and 2750 instead ofinfinity, as can be determined from Equation 1.20. G varies between 0.8 and 1.

When Us is halved while maintaining the same operating frequency range and approxi­

mately the same ZOr = Ifj, as is depicted in figures G.1(c) and G.1(d) a slight decrease

of output impedance occurs1, which is mainly caused by the smaller ith . A smaller turn-offcurrent results in more dominant resonant voltage commutations.

If the maximum and minimum output frequency is halved, as is shown in figures G.1(e)and G.1(f), then the resonant voltage commutations will be less dominant resulting in a in­creased Zout and G.

The circuit delay is the most dominant parameter to influence Zout and G. Figure G.1(g)and G.1(h) depicts Zout and G for Us = 400V, Td = 0.5,'Ls. Zout will vary between 27 and290 and G between 0.95 and 1. This low Zout can be explained using equation 1.20. For this

1In practice switches with a smaller voltage range have generally a smaller drain source capacitance whichjustifies the assumed approximately constant ZO,>.

105

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106 APPENDIX G. ALTERNATNE TO DERIVE G AND ZOUT

situation equation 1.20 results in Zout = 30ft

This alternative way to determine Zout and G assumes a constant UCf during one switchingcycle. This approximation is not needed when using the sampled-data method. However, thevoltage ripple is small compared to the output voltage for a limited output voltage and currentrange and will therefore give approximately the same result as the sampled-data modelingmethod but is much easier and faster to solve.

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..lJ.J..iJJJ.Jj

(a) Zout for Us = 800V and LF = 30j.LB (b) G for Us = 800V and LF = 30j.LB

107

ID~~;';5;?:::!i1fffl!#!#fi5>'1 .~~.,:~ ---------~;;;;:-'

"l~, ~",,"'O.:l!:lJ'

"''"~ot ...~",,",;o

(c) Zout for Us = 400V and LF = 15j.LB

(e) Zout for Us = 400V and L F = 25j.LB

~"'..(),~..~""'"'

S'''"~"'~~,~,

(g) Zout for Us = 400V and T d = O.5j.Ls

(d) G for Us = 400V and LF = 15j.LB

(f) G for Us = 400V and LF = 25j.LB

(h) G for Us = 400V and Td = O.5j.Ls

Figure G.1: Zout and G as a function of Vej and i set

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Appendix H

Current Measurement

There are different possible methods to reconstruct the inductor current. For instance use ofa commercial available current sensor (eg. a Hall-effect sensor), generally these sensors havea bandwidth which is limited to approximately 200kHz, this limits the switching frequency toapproximately 40kHz. Another option is to use two current measuring transformers in serieswith both switches 81 and 82. By adding the outputs of both measurements the inductorcurrent can be reconstructed, as it is discussed in [13]. Using a shunt resistor, in series withthe filter inductor, to measure the current is only possible in low current and low switch­ing frequency applications. This because of the temperature coefficient and parasitic seriesinductance of the measuring resistor. For instance for the series inductance, if a maximumswitching frequency of 300kHz is used with a desired sensor bandwidth of 1MHz (3th har­monic) the impedance due to a parasitic inductance of 1nH, which is optimistic, at 1MHzwill be equal to approximately 6mO. To obtain enough accuracy a large current measuringresistor is required. This in-turn will result in significant losses making the design of such asensor challenging.

The inductor current can also be reconstructed by using two separate sensors. Namelya separate sensor to measure the LF (including DC) and HF part of the inductor current.Figure H.1 depicts a possible implementation in the end-stage. The HF part can be measuredusing a couple of turns around the filter inductor, which creates a voltage transformer, incombination with a passive integration circuit, which consists of Rm and em. Current mea­surement using a current transformer and a parallel resistor will result in significant losses andis therefore not preferable. The transfer function of the HF current sensor can be determinedusing the following set of equations.

ULj

ULm

UCm

UCm = jwLf k·jwRrnCrn+l n ZLj

(H.I)

when neglecting the mutual inductance, and where n equals the turn-ratio and k thecoupling-factor of the measuring windings. This transfer function has a high-pass behaviorand for frequencies f » 27l"flLc

rnthe following gain can be determined.

109

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110 APPENDIX H. CURRENT MEASUREMENT

JrJ

kL f .UCm = R C 2Lf

n m m

HFcurrent sensor

r··································~

I-----r--';":-r-----,

cross overfilter

LFcurrent sensor

(H.2)

Figure H.I: Current measurement using two separate sensors

The LF part of the inductor current can be obtained by using a normal Hall-effect sensor,as it is indicated in Figure H.I, and using a cross-over filter to add the LF and HF signals. TheHall-effect sensor must be able to handle the high frequency content i Lf , the high frequencycontent may not interfere with the LF measurement. Another possibility is to implement aHall-effect sensor or another magnetic flux sensor in the core of L f and using it to determinethe zero-crossings of iLf these zero-crossings can together with the HF measurement be usedto reconstruct iLf. The zero-crossings have to be determined very accurate, a 50ns delay willresult in a significant offset of the measurement.

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Appendix I

Control-Ramps Derived

The derivation of Equation 2.4 will be split in two parts. Firstly the time-shift between theactual and the desired current-waveform after the positive control ramp will be determined,secondly the time-shift after the negative control ramp will be determined and finally thesetwo results are combined into Equation 2.4.

Figure 1.1 depicts the positive control ramp with some additional time intervals, whichwill be used to derive the first part of the equation. ilT~ represents the time differencebetween the actual and de desired control ramp after the positive control ramp, where ilT~

is a function of the following variables

which is equal to

ilT~ = 5T' - 5T"

5T' and 5T" can be determined from the following

(1.1 )

(1.2)

(1.3)

(1.4)

Combining Equation 1.3 and 1.4 results in the following

ilT~ = . Otip ilTk _ Ot~p . Otip ilTkOtZp - Otrp O(ln OtZp - Otrp

which in-turn can be simplified to

(1.5)

ilT~ = ([1 - Ot~p] . Otip ) ilTk (1.6)O(ln Ot zp - Otrp

Figure 1.2 depicts the actual and desired current-waveform which can be used to determinethe second part needed to derive Equation 2.4. Now ilTk+l will be determined, which is afunction of the following variables.

111

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112

ihi*

APPENDIX 1. CONTROL-RAMPS DERIVED

7f---C---,--------------+--:~-~-===--='-'-"e---~~--toj~---_,;,~;_,r:;-k----/"*j7:::~...:..:.:.:..:.:.~.~.:.~..:.: :.: :.: .

or

t[s]

Figure 1.1: Positive control-ramps together with the actual and desired current

,------------------y----------,---- ----------------------,---

tis]

Figure 1.2: Negative control-ramps together with the actual and desired current

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~Tk+1 = f (!5T~, OtTn, Otip, Otin)

which is, due to the chosen time-intervals also equal to.

I /I

~Tk+1 =!5T -!5T

where !5T' and !5T" can be obtained from the following

113

(1.7)

(1.8)

(1.9)

(1.10)

Combining and rewriting Equation 1.9 and 1.10 results in

~Tk+l = ([1 - Ot~n] .Otin ) ~T~ (1.11)Ot2p Ot2n - OtTn

Now ~Tk+1 can be determined from ~Tk by combining the results of Equation 1.6 and1.11 resulting in the following equation

AT _ ([1 OtTn] Otin )L.l k+l - - --Otip Otin - OtTn

which in-turn can be simplified to Equation 2.4.

(1.12)

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Appendix J

Ensured Soft-Switching Derived

Figure J.1(a) depicts the state-plane for clipping to the positive supply rail. From this figureit can be seen that the radius Rus+ is too small to reach the required turn-off level Zmith. Aradius equal to Rmin is required to reach the turn-off threshold. The radius of the resonanceis dependent on the sum of the inductor currents and the output voltage. During a fast cur­rent commutation uCf and the inductor currents are approximately constant, except for themodule that is executing the fast current commutation. The radius can therefore be adjustedby adjusting the turn-off level of the module that is executing a fast current commutation.

From the geometry of Figure J.1 it can be seen that, if Rus+ is larger than Rmin thatM us+ is smaller than Mmin. M us+ is known and equal to

Mus+

Zmmax(iLf ) - Zn If iLf; - iLl~=l

N

, for L: iLf; 2': iLi=l

(J.1)

Zmmax(iLf ) + Zn li~ iLf; - iLl ,for i~ iLf; < iL

Now A1m in can be solved from the following system of equations

R~inZ~ (max (iLf) - M min ) + (ucf - US+)2Z~ (ith - M min )2 + (US+ - US+)2

(J.2)

which in turn can be rewritten to

M " _ 1 ( (")" (uc r us+)2)mm -"2 max zLf + Zth + Z2 ( (" )+" )m max ~Lj ~th

where max (iLf) < ith.

(J.3)

During clipping to the positive supply rail turn-off of 82 has to be inhibited until Mus+ islarger than M min . Equation J.3 only holds for max (iLf) < ith, if max (iLf) > ith no actionis required l

. By combining Equation J.1 and J.3 to M us+ > M min the following equationcan be derived

lThe resonance can result in a current change in the wrong direction if I: iLj > iL for clipping to thepositive supply rail. Therefore turn-off has to be inhibited if iLj < ith.

115

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116 APPENDIX J. ENSURED SOFT-SWITCHING DERIVED

Z (.) 2Z I(~' .)1 < (ucr us+)2m max ~LJi + n L.J ~LJi - ~L _ ( (, ) , )i=l Zm max tLfi -tth

Z ( ') 2Z I(~' ')1 < (ucr us+)2m max ~Lfi - n L.J ~LJi - ~L _ ( (, ) , )

i=l Zm max tLfi -tth

N

, if I: iLJi < iLi=l

N

, if I: iLfi > iLi=l

(J.4)

If max (iLf) < ith turn-off of 82 has to be inhibited as long as Equation J.4 holds. Forturn-off of 81 a similar equation can be derived.

oZmiUN,

Zm ith ~'-~'-'-'~-5~ 1'-,._."..•"..~_."

/'\RUs+=RmnI I

I I M =M'- I Us+ rrir\ I

\~-~-O--/

II

,/ ,

) \I 1

I I

: M.:, R I mn r

\ lJ1" M ." I lJs+ (\ I /

..... "- I "'" f

-~,(),_/

o,-:::; Zm iUN,N

E

Us+ua [V]

Us+

ua[V]

(a) (b)

Figure J.1: Soft switching ensured

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Appendix K

Clipping Detection

Clipping can be detected a-priori. At the beginning of the fast current commutation it canbe determined if the minimum turn-off level is reached during the following slow currentcommutation, when neglecting the fast current commutation and voltage commutations. Inthis way the level can be adjusted, in time to ensure that ith is reached. When clipping tothe positive supply rail action is required if Rmin > RuS+' which is derived in Appendix J.By using Equation J.2 and rewriting it the following can be found:

R~inZ 2 -2 Z2 ( - ) 2 R2 ( ) 2mZth - m max ZLf + us+ - UCf - US+

which in turn can be simplified to

>>

(K.1)

qh - max (iLf)2 - (UCf;':S+r> 0 (K.2)

where max (iLfJ denotes the maximum iLf of all N inductor currents for which 81 is stillconducting and ith is the current which has to be reached if no action is required. Equation K.2has to be evaluated after turn-off of 81, at the beginning of the fast current commutation, ofthe module with the highest inductor current and before the following, lower, turn-off levelreached, which is after the fast current commutation. For clipping to the negative voltagerail a similar equation can be derived.

117

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Appendix L

Steady-State Currents Derived

The steady-state solution for the inductor currents at the beginning of the slow resonantcurrent commutation during clipping-mode operation l can be derived from Equation 2.17together with the determined steady-state current at which d~~t = 0 turn-off occurs.

During steady-state clipping to the positive rail I: iLf[k] will be smaller than iL andconsequently Equation 2.17 will hold. This equation can be expanded with the steady-stated~~t = 0 turn-off level. This results in the following equation

i hi 0 1 0 0 0 .*zhi

zLh 0 0 1 0 0 iLh

zLfN_2 0 0 0 1 0 iLfN_2

zLfN_l 0 0 0 0 1 zLfN_l

iio 0 0 0 0 1 .*[k+I] z[o [k] (1.1)

0 1 1 1 .* 1zhi

0 1 1 1 iLh 1

2 +1.- iL-N0 1 1 1

N 1zLfN_2

0 1 1 0 zLfN-l 10 0 0 0 iio [k] 0

which is valid for clipping to the positive supply rail and which in turn can be rewrittento

(1.2)

where

lWhen using d~~f as the additional turn-off criterion.

119

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120 APPENDIX L. STEADY-STATE CURRENTS DERIVED

0

'Lj, ]0

zLhQ=1.= c=

iLf~_l001

and

1 0 0 0 1 10 1 0 0 1 1

A= B=0 0 1 0 1 10 0 0 1 1 10 0 0 0 1 1

1 1 11 1 0

0f.= fl=

1 11 1 01 1 0

1 1 0 0 0 01 1 1 0 0 0

0 1 0 0F=

1 11 1 0 0 1 01 1 0 0 0 1

For N resonances there will be a maximum of N solutions for which i can be solved bycombining Equation L.2 N times, and rewriting it using ilk] = i[k+l]. Resulting in the followingequation

Gihi + (~Dilo - E(ihi + i/o)) - Gila = ([A] - [F] - ~ [B]) I (1.3)

where

[ ![k]~ Q

[I]G=[~]I= .![';' G= D= E=~ Q

1.[k+N-l] ~ Q

and

[0] [0] [0] A [0] [0] [0] B F [0] [0] [0]A [0] [0] [0] B [0] [0] [0] [0] F [0] [0]

[A] = [0] A [0] [0] [B]= [0] B [0] [0] [F]=

[0] [0] F [0][0] [0] A [0] [0] [0] B [0] [0] [0] [0] F

[0] denotes a zero matrix of the appropriate size.

Using Equation L.3 the steady-state solution can be derived. Solutions for N = 3 andN = 4 are presented in Section 2.3.3.

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Appendix M

Matlab Scripts

This section contains the Matlab simulation scrips used to determine the small-signal linearmodel of a single leg RPI using the sampled-data medeling method. Section M.2 containsthe script used for numerical simulation of one switching cycle. For numerical simulationthe integral of a matrix exponent has to be solved which can be calculated using the scriptin Section M.l. The numerical simulation script is called by the script in Section M.3 todetermine the steady-state values for a given operating-point. The found steady-state valuesin turn can be used by the script in Section M.4 to determine a discrete linear small-signalmodel. The delay introduced by the hysteretic current controller is not included in the small­signal model. This because the sampled-data modeling method uses a single steady-stateoperation-point and steady-state values of small perturbations around this operating-point toderive the model by use of a multi-variable Taylor-expansion. Due to the use of steady-stateinformation the dynamics introduced by the delay are lost. Section M.5 contains a scriptthat can be used to estimate Zout and G, which in turn can be used for the model which isexplained in Section 1.2. Also other Matlab scripts are add in this section to which is referredin the report.

M.l Numerical integral of a matrix exponent

function Y = intexpm(tO,tl, A, BB)% syntax Y = intexpm(tO,tl, A. BB)% calculates int_tO-tl(exp( A(tl-tau) )*Bu)dtau% where BE :::: Bu%and is therefore equivalent to'I. syms tau ;Yo T = int( expm(A*(tl-tau»*BB.tau,tO,tl)% Y=double (T)

%

tau = tl-tO

[V,L] = eig(A)

G = zeros(size(A»

for i=1:1engtb(A)if L(i,i)==Q

G(i,i) = tau j

elseGO,i) = O/L(i,i»*(exp(tau*LO,i»-l)

endend

end

121

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122 APPENDIX M. MATLAB SCRIPTS

M.2 Numerical Simulation using SDM

function [x! Xseq Tseq Q FoM] :: StepByStep(tstep,xi,comp.param,show)

one cyclenumerical simulation ofof a single full bridgeresonant-pole inverterwith an inductive load

step time for numerical simulation of one cycleclose to transitions tstep tstep/l000;[ iLf ; uer ; uCf ; iLl] - initial state values[ Lf Cr Cf Ll Rl ] - circuit component values[ iset ith E1 Td Usp Usn] - circuit parameters;'on l of ' off', to present intermediate resultsof the numerical simulations ;

final state vector (after one cycle) ;sequence of vectors for the values of the state vectorsat the beginning of eacb mode of operation j

sequence of time corresponding to each mode of operationa figure of merrit to monitor convergence to steady-state ;in this case, energy stored in iLl j

a set of figures of merit for optimization ;

Output:xfXseq

campparamshow

% SETPBYSTEP%%%%% [x! Xseq Tseq Q FoM] = StepByStep(tstep,xi,comp.param,show)%%% Input:% tstep%%%%%%%%%%%% Tseq% Q%% FOH%% Just enter stebbystep to start with default parameters

%--------------------------------------------------------------------------%----------------------------- SET PARAHETERS -----------------------------%--------------------------------------------------------------------------if nargin == 0

tstep = 0.5e-9 % simulation step time

LfCrCfLlRl

30e-67e-95e-6

30e-320 ;

% filter inductance [H]% lumped resonant capacitance [F]% filter capacitance [F]% load inductance [H]% load resistance [Ohm]

iseti tbElTdUBpUsn

2012o1e -9

400400

% load EMF [V]% switch off delay [s]% positive supply voltage [V]% negative supply voltage [V] (NB. positive number)

xi = o j Usp El+Rl·iset ; iset ] ;

showelse

LfCrCfLlRl

'on' j

camp (1)camp(2)camp (3)camp(4)camp (5)

iseti tbElTdUBpUsn

end

param (1)param (2)param (3)param (4)param(5)param (6)

%--------------------------------------------------------------------------%----------------------------- STATE HATRICES -----------------------------%--------------------------------------------------------------------------

% STATE VECTOR x = [ iLf ; uCr ; uCf ; iLl ]

%------ MOOEA_ 1 = [ 0 0 -l/Lf 0 ; ..

0 0 0 0 " .1/Cf 0 0 -l/Cf ; ..

0 0 1/Ll -Rl/Ll ] ;

B 1 Usp/Lf ,.0 , ...0 , ...

-El/Ll ] ;

%------ MODE 2

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M.2. NUMERICAL SIMULATION USING SDM 123

MODEo

-lICrl/Cfo

llLfooo

-l/Lfoo

lILI

oo

-11 Cf-RI/LI

B_3 0 ; ...0 ; ...0 ; ...

-EI/LI ] ;

%------ MODE 4 -----­A 4 A_l;

B 4 -Usn/Lf J" •

0 J'"

0 J" •

-EIILI ] ;

%------ MODE 5 -----­A_5 A 4B_5 = B_4 ;

%------ MODE 6 ------A 6 A 3B_6 = B_3 ;

%------ MODE 7 -----­A 7 A_lB_7 = B_1 ;

{A_l A_2 A 3 A_4 A 5 A_6 A_7}{B_1 B 2 B 3 B_4 B 5 B 6 B_7}

clear A_l A_2 A_3 A_4 A_5 A_6 A_7clear B_1 B_2 B_3 8_4 8_5 8_6 B_7

% A and B are nested arrays called by A{i} 1<=1<=7

%--------------------------------------------------------------------------%-------------------------- CONSTRAINED VECTORS --------------------------%--------------------------------------------------------------------------

I = {[l 0 0 0] [0 0 0 0] [0 1 0 0] [1 0 0 0] [0 0 0 0] [0 1 0 0] [1 0 0 O]}

%--------------------------------------------------------------------------%------------------------------- SIMULATION -------------------------------%--------------------------------------------------------------------------

% -- initialization

xold

s 1mfinetf ine

told

xi ;

o111otstepll000

o ;

% xnew = x [n+l] xold = x en]%where n is the sample instance

%start in first mode% start at sample n=l% one during simulation

% start time of simulation

if strcmp(show, 'on')t zeros(l,50000)iLl zeros(1,50000)iLf zeros(1,50000)uCr zeros(l,50000)uCf zeros(1,50000)

end

Tseq zeros(1.7)Xseq zeros(4.7)FoM [];

% fl11 data with zeros to speedup simulation% good for 400kHz at tstep = le-10

if iset>=O %level-splitter outputp = [2*iset+ith -ith]

elsep [ith 2*iset-ith] ;

end

while (8im == 1)

% -- CALCULATE NEW STATE VECTORif (fine == 0)

tnew told + tstepelse

tnewend

told + tfine

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124

= expm(A{j}*(tnew-told»*xold + intexpm(told,tnew,A{j}.B{j})

% -- TEST CONSTRANTSswitch j

case 1if (l{l}*xnew - pO)) >= 0

if (fine == 0)

n = n-1 ;

tnew toldxnew xoldfine 1

elsej = 2 ;Tseq (1) = tnew ;XseqL ,1) =fine = 0 ;

endend

case 2if (tnew - Tseq(t) - Td) >= 0

if (fine == 0)

n = 11-1 j

tnew toldxnew xoldfine 1

elsej = 3 ;Tseq (2) = tnew j

Xseq(: ,2) =

fine = 0 ;end

endcase 3

if (1{3}*xnew + Usn) <= 0if (fine == 0)

n = n-1 j

tnew toldxnew xoldfine 1

elsej = 4 ;Tseq (3) = tnew ;Xseq(: ,3) = xnewfine = 0 ;

endend

case 4if (l{4}*xnew - p (2)) <= 0

if (fine == 0)

n = n-1 ;tnew toldxnew xoldfine 1

elsej = 5 ;Tseq (4) = tnew ;Xaeq(: .4) =

fine = 0 ;end

endcase 5

if (tnew - Tseq(4) - Td) >= 0if (fine == 0)

n = n-1 ;

tnew toldxnew xoldfine 1

elsej = 6 ;Tseq (5) = tnew ;Xseq(: .5) = xnewfine = 0 ;

endend

case 6if (1{6}*xnew - Usp) >= 0

if (fine == 0)

n = n-1 ;

tnew toldxold

fine 1else

j = 7 ;Tseq (6) = tnew ;Xseq(: ,6) = xnewfine = 0 ;

endend

case 7

APPENDIX M. MATLAB SCRIPTS

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M.2. NUMERICAL SIMULATION USING SDM

if (1{7}*xnew - 0 ) >= 0if (fine := 0)

n = n-1 ;toew toldxnew xoldfine 1

elsej = 1 ;Tseq(7) tnew j

Xseq(:,7) xnew8im = 0 j

fine = 0 ;end

endend

125

% -- SAVE DATAif strcmp (show. ' on ,)

ten) tnew;1Lf(n) xnew(l)uer(n) xnew(2)uCf(n) xnew(3)1L1(n) xnew(4)

end= Q + xnew(4)-2*(tnew-told)

% INCREMENT FOR NEXT LOOP PASSxoldtold = tnewn = n+1 ;

end

% int (iLl)

xfQ

n-1 ;Xseq(: ,7)Q/TBeq (7) %1/T int(iCf)

if strcmp (show, 'on I)

subplot (4,1,0plot (t ([1: n]), iLf ([1 :n]))xlabel('t') ;ylabel (, i_ {Lf} [A]')xlim([O ten)])grid On ;

subplot (4 ,1,2)plot (t ([1: n]), uCr ([1: n]))xlabel(Jt') ;ylabel ('u_{Cr) [V] ')xlim ([0 dn)])grid On j

Bubplot (4,1.3)plot (t ([1: n]), iLl ([1: n]))xlabel('t') j

ylabel (' i_ {Ll} [A]')xlim([O ten)])grid on ;

subplot(4,l,4)plot (t ([1: n]) ,uCf ([1: n]))xlabel('t') ;ylabel('u_{Cf} [V] ')xlim([O ten)])grid on ;pausa(O.S)

end

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126 APPENDIX M. MATLAB SCRIPTS

M.3 Steady-state shooting

function [gamma xss Xseq Tseq FoMJ = Shoot(tstep.xi,comp,param,show)

Just enter shoot to start with default parameters ;

[gamma xss FoMJ

XseqTseqFoM

campparamshow

solut onsolut onstrans tion times

- steady -state- steady-state- steady-state

= Shoot(tstep,xi,comp.param,show)

number itterations to steady state solution[ iLf ; uCr ; uCf ; iLl] = X(T7)[X(Tl) X(T2) X(T3) X(T4) X(T5) X(T6) X(T7)][Tl T2 T3 T4 T5 T6 T7]a set of figures of merit for optimization j

step time for numerical simulation of on cycle ;[ iLt ; uCr ; uCf jill] initial state values[ Lf Cr Cf L1 Rl ] - cireui t component values[ iset ith El Td Usp Usn] - circuit parameters;'on' of I off'. to present intermediate resultsof the numerical simulations ;

steadystate shooting of a singlefull bridge resonant-pole inverterwith an inductive load

Output:gammaxss

Input:tstepxi

% SHOOT:%%%%%%%%%%Y.%%%%%%%%%%

%--------------------------------------------------------------------------%----------------------------- SET PARAMETERS -----------------------------%--------------------------------------------------------------------------

eps1eps2

1e -61. -6

% threshold on remainder

if nargin == 0tstep = 1e-9 % simulation step time

LfCrCfLlRl

30. -67e -95e -6

30e-35

% filter inductance [H]%lumped resonant capacitance [F]% filter capacitance [F]% load induct ance [H]

% load resistance [Ohm]

iseti thElTdUspUsn

201250500e-9400400

% load EMF [V]% switch off delay [s]

% positive supply voltage [V]% negative supply voltage [V] (NB. positive number)

xi = [ 0 ; Usp El+Rl"'iset; iset ] ;%xi = [ 0 ; Usp ; 0 ; 0 ] ;

show = 'on'comp = [Lf Cr Cf L1 Rl]param = [iset i th El Td Usp Usn]

elseLfCrCfLlRl

compO)comp(2)comp (3)comp (4)comp (5)

i seti thE1TdUspUsn

end

param (0param (2)param (3)param(4)param (5)param (6)

%--------------------------------------------------------------------------%----------------------------- STATE MATRICES -----------------------------%--------------------------------------------------------------------------

% STATE VECTOR x = [ ilf ; uCr ; uCf ; ill ]

%------ MODEA_I = [ 0 0 -1/Lf 0 .. ..

0 0 0 0 , ...1/Cf 0 0 -1/Cf ....

0 0 llLl -RI/LI ] ;

B 1 Usp/Lf , ...0 , .. .0 ....

-EI/Ll ] ;

%------ MODE 2

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M.3. STEADY-STATE SHOOTING 127

%------ MODEA_3 = [ a

-lICrlICfa

11 Lfaaa

-llLfaa

1 ILl

aa

-lICf-RI/Ll

B_3 a ",a ; .,a ",

-El/Ll ] ;

%------ MODE 4 -----­A 4 A_l;

B 4 -Usn/Lf '" ..a '" ..a , ...

-El/Ll J ;

%------ MODE 5 -----­A 5 A_4B_5 = B_4 ;

%------ MODE 6 ------A 6 A 3B_6 = B_3 ;

%------ MODE 7 -----­A 7 A_lB_7=B_l;

AB

{A_l A 2 A 3 A_4 A 5 A 6 A_7}{B_1 B 2 B 3 B 4 B 5 B 6 B_7}

% A and B are nested arrays called by A{i} 1<=1<=7

clear A_l A_2 A_3 A_4 A_5 A_6 A_7clear 8_1 B_2 B_3 8_4 8_5 8_6 B_7

%--------------------------------------------------------------------------%-------------------------- CONSTRAINED VECTORS --------------------------%--------------------------------------------------------------------------

I = {[lOa OJ [0 a a OJ [0 1 a OJ [1 a a OJ [0 a 0 OJ [0 1 a OJ [1 a a a]}

%-------------------------------------------------------------------------­%-------------------------------- SHOOTING -------------------------------­%--------------------------------------------------------------------------

% -- Initializationgamma 0 ;monitor 0 ;gamma_max 50;Qpast 100 ;FoM []

xO xi j

T [] ;while (gamma<gamma_max) & (monitor==O)

gamma = gamma + 1 j

if gamma >= gamma_maxdispC'Warnign: Termination of steady state failed. maximum number of itteration reached')xss = xOTseq TXseq = Xend

[xf X T Qnow FoM] = StepByStep(tstep,xO,comp,param.show) ;

%-------------------------- SENSETIVITY MATRICES --------------------------

%------Ph> 1Ph> 2Ph> 3Ph~ 4Pb~ 5Ph~ 6Phi_7

Phi matrix [4 4] -----­expm( A{l}*T(l) ) ;expm( A{2}*(T(2)-T(1»expm( A{3}*(T(3)-T(2»expm( A{4}*(T(4)-T(3»expm( A{5}*(T(5)-T(4»expm( A{6}*(T(6)-T(5»expm( A{7}*(T(7)-T(6»

Phi = {Phi_l Phi_2 Phi_3 Phi_4 Phi_5 Phi_6 Phi_7}clear Phi_l Phi_2 Phi_3 Phi_4 Phi_5 Phi_6 Phi_7

% J = [df Idx-I% de I dx

df I dT , ...de I dT J ;

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128 APPENDIX M. MATLAB SCRIPTS

+ B {2}

+ B{3}+ B {4}

+ B{S}+ B{6}+ B{7}

A{2}*X(:,1)A{3}*X(: ,2)A{4}*X(: ,3)A{S}*X (: ,4)A{6}*X(: ,S)A{7}*X(: ,6)

g2Tlg3T2g4T3gST4g6TSg7T6

A_i*x(T_i) + B_i [4 1] -----­+ B{l}+ B{2}+ B{3}+ B{4}

B{S}B{6}

+ B{7}

%------ g_i(T_i) =

glTI A{l}*X(: ,1)g2T2 A{2}*X (: ,2)g3T3 A{3}*X(: ,3)g4T4 A{4}*X(: ,4)gSTS A{S}*XC: ,S)g6T6 A{6}*X(:,6)g7T7 A{7}*X (: ,71

%-----­dcldxdc2dxdc3dxdc4dxdc5dxdc6dx

dc7dx

dc/dx matrix [7 4]l{1}*Phi{l} ;l{2}*Phi{2}*Phi{l}l{3}*Phi{3}*Phi{2}*Phi{l} ;l{4}*Phi{4}*Phi{3}*Phi{2}*Phi{l}l{S}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*Phi{l}l{6}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*Phi{l}l{7}*Phi{7}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*Phi{l}

dcdx = [dcldx ; dc2dx ; dc3dx ; dc4dx ; dc5dx ; dc6dx ; dc7dxJ ;clear dcldx dc2dx dc3dx dc4dx dc5dx dc6dx dc7dx

%------ dc/dTdcldTl 0 +dc2dTl -1 +dc3dTI 0dc4dTI 0dcSdTI 0dc6dTI 0dc7dTI 0

matrix [7 7J -----­

l{l}*glT1 ;1{2}*Phi{2}*(-g2Tl + giTl) ; % second term equals 0l{3}*Phi{3}*Phi{2}*(-g2Tl + glTl) ;l{4}*Phi{4}*Phi{3}*Phi{2}*(-g2Tl + glTl) ;l{S}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*(-g2Tl + glTl)l{6}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*(-g2Tl + glTl)l{7}*Phi{7}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*(-g2Tl + glTl)

dc2dT2dc3dT2dc4dT2dcSdT2dc6dT2dc7dT2

1 + 1{2}*g2T2; % second term equals 0o + l{3}*Phi{3}*(-g3T2 + g2T2) ;o + l{4}*Phi{4}*Phi{3}*(-g3T2 + g2T2) ;o + 1{5}*Phi{S}*Phi{4}*Phi{3}*(-g3T2 + g2T2) % second term equals 0o + l{6}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*(-g3T2 + g2T2) ;o + l{7}*Phi{7}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*(-g3T2 + g2T2) ;

dc3dT3dc4dT3dc5dT3dc6dT3dc7dT3

o + l{3}* g3T3 ;o + l{4}*Phi{4}*(-g4T3 + g3T3) ;o + 1{S}*Phi{S}*Phi{4}*(-g4T3 + g3T3); X second term equals 0o + l{6}*Phi{6}*Phi{S}*Phi{4}*(-g4T3 + g3T3) ;o + l{7}*Phi{7}*Phi{6}*Phi{S}*Phi{4}*(-g4T3 + g3T3) ;

dc4dT4dcSdT4dc6dT4dc7dT4

o-1

oo +

l{4}*g4T4 ;1{S}*Phi{S}*(-g5T4 + g4T4) ; % second term equals 0l{6}*Phl{6}*Phi{S}*(-gST4 + g4T4)l{7}*Phi{7}*Phi{6}*Phi{S}*(-gST4 + g4T4)

dc5dT5dc6dT5dc7dTS

1oo

1{5}*g5T5 ; % second term equalsl{6}*Phi{6}*(-g6TS + gSTS) ;l{7}*Phi{7}*Phi{6}*(-g6TS + gSTS) ;

dc6dT6dc7dT6

o + l{6}* g6T6 ;o + l{7}*Phi{7}*(-g7T6 + g6T6) ;

dc7dT7 o + l{7}* g7T6 ;

% a lower triangular matrix [7 7JdcdT = [ dcldTI 0 0 0 0 0 0 J •••

dc2dT1 dc2dT2 0 0 0 0 0 ....de3dT1 dc3dT2 dc3dT3 0 0 0 0 ....de4dT1 dc4dT2 dc4dT3 de4dT4 0 0 0 ....de5dT1 dcSdT2 de5dT3 de5dT4 de5dT5 0 0 ....de6dT1 deGdT2 dc6dT3 dc6dT4 de6dT5 de6dT6 0 ....de7dT1 de7dT2 dc7dT3 de7dT4 dc7dTS dc7dT6 dc7dT7 ] ;

clear de1dT1clear de2dT1 de2dT2clear dc3dT1 de3dT2 dc3dT3clear de4dT1 de4dT2 dc4dT3 de4dT4clear de5dT1 de5dT2 dc5dT3 dc5dT4 de5dT5clear de6dT1 dc6dT2 dcGdT3 dcGdT4 deGdT5 deGdT6clear de7dT1 dc7dT2 dc7dT3 dc7dT4 de7dT5 de7dTG dc7dT7

%------ df/dT matrix [4 7]

dfdTIdfdT2dfdT3dfdT4dfdTSdfdT6dfdT7

Phi{7}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*(-g2Tl + glTl)Phi{7}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*(-g3T2 + g2T2)Phi{7}*Phi{6}*Phi{S}*Phi{4}*(-g4T3 + g3T3)Phi{7}*Phi{6}*Phi{S}*(-gST4 + g4T4)Phi{7}*Phi{6}*(-g6TS + gSTS)Phi {7}* (- g7T6 + g6T6) ;g7T7 ;

dfdT = [dfdTI dfdT2 dfdT3 dfdT4 dfdTS dfdT6 dfdT7]clear dfdTI dfdT2 dfdT3 dfdT4 dfdTS dfdT6 dfdT7 ;

%------ df/dx matrix [4 4] ------

dfdx = Phi{7}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*Phi{l}

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M.3. STEADY-STATE SHOOTING

%------------------------------- JACOBIAN -------------------------------

J = dfdx - dfdT*inv(dcdT)*dcdx - eye(length(xi» ;

%------------------------------- SHOOTING -------------------------------

Qavg = abs( (Qnow-Qpast)/Qpast ) %check convergenceif Qavg < eps2

disp('Convergence ELI < eps2')moni tor = 1x S6 = xOTseq TXseq = X

elseQpast = Qnow

end

129

R (xf-xO);r = abs(R) ./D + abs(xO)] ;

finde r > epst ) ;if (~isempty(w» "(monitor 0)

Jc = J(w,w) ;xO(w) = xO(w) - Jc\R(w) ;

elsedisp('Convergence r < eps! ')monitor = 1xss = xOTseq TXseq = X

end

%check precicion and determine J

%Note that A\B is roughly equivalent to inv(A)*B.

',xOO) ,xO(2) ,xO(3) ,xO(4)))

%------------------------------- DISPLAY -------------------------------if strcmp(show, 'on')

disp(sprintf('%s%d','Itteration : '~gamma» ;disp(sprintf('%s%e'. 'Remainder : '.max(r»)disp(sprintf('%s%e'. '<Energy> : I,Qavg»disp(sprintf('%s\n%f\n%f\n%f\n%f\n\n', 'xO

endend

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130 APPENDIX M. MATLAB SCRIPTS

M.4 Small-signal modeling

function [F G H K Ts ] = Model(tstep.diset,dEl,comp,param.show)

Output:F smallsignal state matrix ;G smallsignal input to state matrix ;H smallsignal state to out pur matrix ;K smallsignal direct feedthrough matrixTs sampletime [s] (equal to 1/fs)where. fs is equal to the switching frequency of the

Just enter model to start

small signal model for the given operating pointx[k+l] F*x[k] + G*u[k]y[k] Hox[k] + K.u[u]

step time for numerical simulation of on cycle ;delta used on the set point to determine the modeldelta used the output voltage to determine the model[ Lf Cr Cf Ll Rl ] - circuit component values[ iset ith El Td Usp Usn] - circuit parameters;}on' of ' off'. to present intermediate resultsof the numerical simulations j

inverter

with default parameters ;

[iLf ; uCr ; uef ; iLl][iset ; El]

ModelCtstep,comp,param,show)[F G H K]

campparamshow

Input:tstepdisetdEl

% MODEL:%%%%%%%%%%%%%%%%%%%%%%%%%%

%% ------------------------------------------------------------------------%----------------------------- SET PARAMETERS -----------------------------%--------------------------------------------------------------------------if nargin == 0

tstep = 1e-9 % simulation step time

LfCrCfLIRI

33e-6 ;7e -9 ;

7.2. -69.1 e-317. S ;

% filter inductance [H]% lumped resonant capacitance [F]

% filter capacitance [F]% load inductance [H]

% load resistance [Ohm]

iseti thEITdUspUsndEldiset=

1 ;9.723S0 ;2S. -9700 ;o ;10 ;2 ;

% load EMF [V]

% switch off delay [s]% positive supply voltage [V]negative supply voltage [V] (NB. positive number)

comp (1)comp(2)comp (3)comp(4)comp(S)

show = 'on'comp = [Lf Crparam = [iset

elseLfCrCfLIRI

Cf Ll RI]ith El Td Usp Usn]

isetithElTdUspUsn

end

param (1)

param (2)param (3)param(4)param(S)param(6)

close all ;

%% ------------------------------------------------------------------------%---------------------- STEADY-STATE SHOOTING -----------------------------%--------------------------------------------------------------------------

% --- determine steadystate --­disp('determine steady-state') ; disp(' ') ;xi = [ 0 ; Usp ; EI+Rl* iset ; iset ] j

[gamma xss X T FoM] = Shoot(tstep,xi,comp,param,show)

% --- determine sensitivity dT/dp & dx/dp --­disp('determine sensitivity'); disp(' ') j

findsens = 1 ;

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MA. SMALL-SIGNAL MODELING 131

Shoot(tstep ,xii2 ,comp .parami2, 'no')

Shoot(tstep ,xie2 ,comp ,parame2, 'no')

Shoot (tstep • xiel , comp , paramel , , no') ;

xas(2) xi1(2)], 'g')xss(3) xil(3)],'b')xaa(4) xil(4)], 'k')

iset +0. 5*diset] • [xi2 (2)iset +0. S*di set] , [xi2 (3)iset+O.S*diset] .[xi2(4)dx/di_{set}')

if strcmp (show.' on')paramil [iset+O.5*diset ith E1 Td Usp Usn]parami2 = [iset-O.5-diset ith E1 Td Usp Usn]paramel = [iset ith El+O.S*dEl Td Usp Usn] ;parame2 = [iset itb EI-C.S-dEl Td Usp Usn] ;xiii [0 Usp El+Rl*(iset+Q.5*diset); iset+O.S*disetxii2 [0 j Usp El+Rl*(iset-O.5*diset) j iset-Q.S*disetxiel [0; Usp (El+dEl)+Rl*iset j iset ] ;xie2 [0; Usp (El-dEl)+Rl*iset j iset ] ;disp('1 of 4') ;[gamma xii Xsi! Tsil FoM] = Shoot(tstep,xiil,comp,paramil,'no ' )gammaxiidisp('2 of 4') ;[gamma xi2 Xsi2 Tsi2 FoM]gammaxi2disp(J3 of 4') ;[gamma xel Xsel Tse! FoM]gammaxeldisp('4 of 4') ;[gamma xe2 Xse2 Tse2 FoM]gammaxe2close all ;subplot (2 .2,1)pl::::plot([iset-O.S*diset iset iset+O.5*diset]. [xi2(t) xss(t) xil(l)], 'r')hold on ;p2=plot([iset-0.5.diset isetp3=plot([iset-0.5.diset isetp4=plot ([iset -0.5. diset isettitle('Sensitivity of Statesxlabel('i_{set} [A] J)ylabel('\bf x')legend([pl(1) p2(i) p3(1) p4(1)],'i_{Lf} [A]','u_{Cr} [V]','u_{Cf} [V]','i_{Ll} [A]')

sUbplot(2,2,2)pl=plot([(El-dEl)+Rl*iset El+Rl*iset (El+dEl)+Rl*iset].[xe2(t) xss(t) xel(1)],'r 1

)

hold on ;p2=plot([(El-dEl)+Rl*iset El+Rl*iset (El+dEl)+Rl*iset],[xe2(2) xss(2) xel(2)],'g')p3=plot([(El-dEl)+Rl*iset El+Rl*iset (El+dEl)+Rl*iset] ,[xe2(3) xss(3) xel(3)] ,'b')p4=plot([(El-dEl)+Rl*iset El+Rl*iset (El+dEl)+Rl*iset] .[xe2(4) xss(4) xel(4)] ,'k')title('Sensitivity of States dx/dE_l')xlabel ( 'E_ {l} [V],)ylabel('\bf x')legend([p1(l) p2(1) p3(1) p4(1)] , 'i_{Lf} [A]', 'u_{Cr} [V]', 'u_{Cf} [V]', 'i_iLl} [A] ')

SUbplot (2 ,2 ,3)pl=plot([iset-O.S*diset iset iset+0.5.diset] ,[Tsi2(t) T(t) Tsil(t)]. 'r')hold on ;p2=plot([iset-0.S*diset iset iset+0.5.diset], [Tsi2(2) T(2) Tsil(2)], 'g')p3=plot([iset-0.5*diset iset iset+O.S.diset]. [Tsi2(3) T(3) Tsil(3)]. 'b')p4=plot([iset-0.S*diset iset iset+0.5*diset]. [Tsi2(4) T(4) Tsil(4)], 'y')p5=plot([iset-0.S*diset iset iset+O.5*diset]. [Tsi2(S) T(S) Tsil(S)], 'm')p6=plot([iset-0.5*diset iset iset+0.5*diset]. [Tsi2(6) T(6) Tsil(6)], 'c')p7=plot([iset-O.5*diset iset iset+0.5*diset]. [Tsi2(7) T(7) Tsil(7)], 'k')title('Sensitivity of Transition times dT/di_{set}')xlabel (, i_{set} [A]')ylabel( '\bf T \rm [a] ,)legend([pl(1) p2(1) p3(1) p4(1) pS(1) p6(1) p7(l)] , 'T_{1}', 'T_{2}', 'T33}', 'T_{4}', 'T_{S}', 'T_{6}', 'T_{7}')

subplot(2,2,4)pl=plot([(El-dEl)+Rl*iset El+Rl*iset (El+dEl)+Rl*iset], [Tse2(1) T(1) Tsel(1)], 'r')hold on ;p2=plot([(El-dEl)+Rl*iaet El+Rl*iaet (El+dEl)+Rl*iset] ,[Tse2(2) T(2) Tsel(2)] ,'g')p3=plot([(El-dEl)+RHiset El+Rl*iset (El+dEl)+Rl*iset], [Tse2(3) T(3) Tsel(3)], 'b')p4=plot([(El-dEl)+Rl*iset El+Rl*iset (El+dEl)+Rl*iset] ,[Tse2(4) T(4) Tsel(4)] ,'y')pS=plot([(El-dEl)+RHiset El+Rl*iset (El+dEl)+Rl*ieet] ,[Tse2(S) T(S) Tsel(S)] ,'m')p6=plot([(El-dEl)+Rl*iset El+Rl*iset (El+dEl)+Rl*iset] ,[Tse2(6) T(6) Tse1(6)] ,'c')p7=plot([(El-dEl)+RHiset El+R10iset (El+dEl)+Rl*iset] ,[Tse2(7) T(7) Tsel(7)] ,'k')title('Sensitivity of Transition times dT/dE_{l}')xlabel( 'E_{l} [V],)ylabel( '\bf T \rm [a] ,)legend([pl(1) p2(1) p3(1) p4(i) ps(1) p6(1) p7(1)], 'T_{l}', 'T_{2}', 'T_{3}', 'T_{4}', 'T_{S}', 'T_{6}', 'T_{7}')

elseparamil [iset+0.5*diset ith El Td Usp Usn]parami2 [iset-0.5*diset ith El Td Usp Usn]paramel [iset ith El+O. 5*dEl Td Usp Usn] ;parame2 [iset ith EI-0.5*dEl Td Usp Usn] ;xiil [0 Usp El+Rl*(iset+O.5*diset) j iset+O.5*disetxii2 [0 j Usp El+Rl*(iset-O.5*diset) j iset-O.S*disetxiel [0; Usp (El+dEl)+Rl*iset iset]xie2 [0 i Usp (El-dEl)+Rl*iset i iset ] j

disp('l of 4') ;[gamma xil Xsil Tsil FoM] = Shoot(tstep,xiil,comp,paramil,'no')gammaxi 1disp('2 of 4') ;[gamma xi2 Xsi2 Tsi2 FoM] Shoot(tstep,xii2,comp,parami2.'no');

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132

gammaxi2disp(J3 of 4 1 ) ;

[gamma xel Xsel Tae! FoM]gammaxoldisp(J4 of 4') ;[gamma xe2 Xse2 Tse2 FoM]gamma.02

end

Shoot(tstep ,xiel,comp ,paramel. 'no')

Shoot(tstep.xie2,comp,parame2.'no')

APPENDIX M. MATLAB SCRIPTS

dTdiset ((Tsil-Tsi2)./diset)'dXdiset (xil-xi2)./diset

dTdEI ((Tsel-Tse2) ./dEI)'dXdEI (xel-xe2)./dEI

dxdp = {dXdiset dXdEI}clear dXdiset dXdEl j

dTdp = {dTdiset dTdEI}clear dTdiset dTdEl i

clear xiii xii2 xiel xie2 paramil parami2 paramel parame2

%--- determine model ---

%% ------------------------------------------------------------------------%----------------------------- STATE MATRICES -----------------------------%--------------------------------------------------------------------------

% STATE VECTOR x -:. [ ill ; uCr j uCf ; ill ]

MOOEoo

llCfo

B 1 Usp/U ," .0 ," .0 .' ..

-EI/lI ] ;

%------ MODEA 2 A 1B_2 = B_1 ;

-l/lfoo

1/11

oo

-l/Cf-RI/Ll

'0 o.j •••

; ..] ;

MOOEo

-lICrlICfo

l/Uooo

-l/lfoo

llLI

oo

-11 Cf-RI/LI

B 3 0 ; ..0 ; ..0 ; ..

-EI/Ll ] ;

%------ MODE 4 -----­A 4 A_l;

B,4 -Usn/Lf ,. ..0 ; . ..0 ; . ..

-EI/LI ] ;

%------ MODE 5 ------

A 5 A_4B_5 = B_4 ;

%------ MODE 6 ------

A 6 A 3B_6 = B_3 ;

%------ MODE 7 ------

A 7 A- 1B_7 = B_1 ;

A {A_l A 2 A 3 A 4 A 5 A 6 A_nB {B_1 B 2 B 3 B 4 B_5 B 6 B_n

clear A- 1 A- 2 A_3 A- 4 A_5 A- 6 A_7clear B- 1 B- 2 B_3 B_4 B_5 B_6 B_7

% A and B are nested arrays called by A{i} 1<=1<=7

%% ------------------------------------------------------------------------%-------------------------- SENSETIVITY MATRICES --------------------------

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MA. SMALL-SIGNAL MODELING

%--------------------------------------------------------------------------

Selecting vectors of Constrant vector= {[1 0 0 0) [0 0 0 0) [0 1 0 0) [1 0 0 0) [0 0 0 0) [0 1 0 0) [1 0 0 O)}

133

%------Ph~ 1Ph~ 2Ph~ 3Phl. 4Phl. 5Phi_6Phl. 7

Phi matrix [4 4]expm( A{l}*T(l) ) ;expm( A{2}*(T(2)-T(1))expm( A{3}*(T(3)-T(2))expm( A{4}*(T(4)-T(3))expm( A{S}*(T(S)-T(4))expm( A{6}*(T(6)-T(S))expm( A{7}*(T(7)-T(6))

Phi = {Phi_l Phi_2 Phi_3 Phi_4 Phi_5 Phi_6 Phi_7}clear Phl. 1 Phl. 2 Phl. 3 Phl 4 Phl. 5 Phi_6 Phi 7

% J = [df/dx-I df/dT •...% dc/dx dc/dT);

%------ g_i(T_j) = A_i*x(T_j) + B_i [4 1) ------glT1 A{1}*X(: .0 + B{l}g2T2 A{2}*X(: .2) B{2} g2T1 A{2}*X(: .0 + B{2}g3T3 AO}*X(: .3) B{3} g3T2 A{3}*X(: .2) + BO}g4T4 A{4}*X(: .4) B{4} g4T3 A{4}*X(: .3) + B{4}gSTS A{S}*X (: .S) + B{S} gST4 A{S}*X (: .4) + B{S}g6T6 A{6}*X(: .6) B{6} g6TS A{6}*X(: ,S) B{6}g7T7 A{7}*X(: ,7) B{7} g7T6 A{7}*X (: .6) B{7}

%------dcldxdc2dxdc3dxdc4dxdc5dxdc6dxdc7dx

dc/dx matrix [7 4Jl{l}*Phi{l} ;1{2}*Phi{2}*Phi{1}1{3}*Phi{3}*Phi{2}*Phi{1} ;1{4}*Phi{4}*Phi{3}*Phi{2}*Phi{1}1{S}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*Phi{1}1{6}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*Phi{1}1{7}*Phi{7}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*Phi{1}

dcdx ,. [dcldx ; dc2dx ; dc3dx ; dc4dx ; dc5dx ; dc6dx ; dc7dxJ ;clear dCldx dc2dx dc3dx dc4dx dc5dx dc6dx dc7dx

'l.------ dc/dT matrix [7 7J ------dc1dT1 0 + 1{1}*glT1 ;dc2dTl -1 1{2}*Phi{2}*(-g2Tl + giTI) ; %second term equals 0dc3dT1 0 1{3}*Phi{3}*Phi{2}*(-g2Tl + glT1)dc4dT1 0 + 1{4}*Phi{4}*Phi{3}*Phi{2}*(-g2T1 + glT1) ;dcSdT1 0 + 1{S}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*(-g2T1 + glT1) ;dc6dT1 0 + 1{6}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*(-g2T1 + glT1)dc7dT1 0 + 1{7}*Phi{7}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*Phi{2}*(-g2T1 + glT1)

dc2dT2dc3dT2dc4dT2dcSdT2dc6dT2dc7dT2

dc3dT3dc4dT3dcSdT3dc6dT3dc7dTJ

dc4dT4dcSdT4dc6dT4dc7dT4

dcSdTSdc6dTSdc7dTS

dc6dT6dc7dT6

dc7dT7

1 + 1{2}*g2T2 i % second term equals 0o + 1{3}*Phi{3}*(-g3T2 + g2T2) ;o + 1{4}*Phi{4}*Phi{3}*(-g3T2 + g2T2) ;o + 1{5}*Phi{5}*Phi{4}*Phi{3}*(-g3T2 + g2T2) i % second term equals 0o + 1{6}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*(-g3T2 + g2T2) ;o + 1{7}*Phi{7}*Phi{6}*Phi{S}*Phi{4}*Phi{3}*(-g3T2 + g2T2) ;

o l{3}*g3T3;o l{4}*Phi{4}*(-g4T3 + g3T3) ;o + 1{5}*Phi{5}*Phi{4}*(-g4T3 + g3T3) %second term equals 0o + 1{6}*Phi{6}*Phi{S}*Phi{4}*(-g4T3 + g3T3) ;o + 1{7}*Phi{7}*Phi{6}*Phi{S}*Phi{4}*(-g4T3 + g3T3)

o + l{4}*g4T4 ;-1 + 1{5}*Phi{5}*(-g5T4 + g4T4) ; % second term equals 0o + 1{6}*Phi{6}*Phi{S}*(-gST4 + g4T4)o + 1{7}*Phi{7}*Phi{6}*Phi{S}*(-gST4 + g4T4)

1 1{5}*g5T5; % second term equals 0o 1{6}*Phi{6}*(-g6TS + gSTS) ;o + 1{7}*Phi{7}*Phi{6}*(-g6TS + gSTS) ;

o + l{6}*g6T6 ;o + 1{7}*Phi{7}*(-g7T6 + g6T6)

o + l{7}*g7T6 ;

% a lower triangular matrix [7 71dcdT = [ dc1dT1 0 0 0 0 0 0 , ...

dc2dT1 dc2dT2 0 0 0 0 0 , ...dc3dT1 dc3dT2 dc3dTJ 0 0 0 0 , ...dc4dT1 dc4dT2 dc4dTJ dc4dT4 0 0 0 , ...dc5dT1 dcSdT2 dcSdT3 dcSdT4 dcSdTS 0 0 , ...dc6dT1 dc6dT2 dc6dT3 dc6dT4 dc6dTS dc6dT6 0 , ...dc7dT1 dc7dT2 dc7dT3 dc7dT4 dc7dTS dc7dT6 dc7dT7 ) ;

clear dc1dT1clear dc2dT1 dc2dT2clear dc3dT1 dc3dT2 dc3dT3

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134

clear dc4dTl dc4dT2 dc4dT3 dc4dT4clear dc5dTl dc5dT2 dc5dT3 dc5dT4 dc5dT5clear dc6dTl dc6dT2 dc6dT3 dc6dT4 dc6dT5 dc6dT6clear dc7dTl dc7dT2 dc7dT3 dc7dT4 dc7dT5 dc7dT6 dc7dT7

%------ df/dT matrix [4 7J

APPENDIX M. MATLAB SCRIPTS

dfdTldfdT2dfdT3dfdT4dfdT5dfdT6dfdT7

Phi{7}*Phi{6}*Phi{5}*Phi{4}*Phi{3}*Phi{2}*(-g2Tl + glTl)Phi{7}*Phi{6}*Phi{5}*Phi{4}*Phi{3}*(-g3T2 + g2T2)Phi{7}*Phi{6}*Phi{5}*Phi{4}*(-g4T3 + g3T3)Phi{7}*Phi{6}*Phi{5}*(-g5T4 + g4T4)Phi{7}*Phi{6}*(-g6T5 + g5T5)Phi{7}*(-g7T6 + g6T6)g7T7 ;

dfdT = [dfdTl dfdT2 dfdT3 dfdT4 dfdT5 dfdT6 dfdT7Jclear dfdT! dfdT2 dfdT3 dfdT4 dfdT5 dfdT6 dfdT7 j

%------ df/dx matrix [4 4] ------

%------ df/dp matrix [ J ------

dfdpldfdp2

-( dfd. -eye (s ize (dfdx») *dxdp{l} - dfdHdTdp {l}-(dfdx-eye(size(dfdx»)*dxdp{2}- dfdT*dTdp{2}

dfdp = [ dfdpl dfdp2 Jclear dfdpl dfdp2

Yt------ dc/dp matrix [ ] ------

dcdpldcdp2

-dcdx*dxdp{l} - dcdT*dTdp{l}-dcdx*dxdp{2} - dcdT*dTdp{2}

dcdp = [ dcdpl dcdp2 J ;clear dcdpl dcdp2 j

clear glTl g2T2 g2Tl g3T3 g3T2 g4T4 g4T3 g5T5 g5T4 g6T6 g6T5 g7T7 g7T6 ;

%% ------------------------------------------------------------------------%--------------------------- SHALL SIGNAL HODEL ---------------------------%-------------------------------------------------------------------._-----

F dfdx - dfdT*inv(dcdT)*dcdxG dfdp - dfdT*inv(dcdT)*dcdp

[0 0 0 IJ[0 OJ ;

Ts T(7);

%% ------------------------------------------------------------------------%---------------------------- OUTPUT TO SCREEN ----------------------------%--------------------------------------------------------------------------

if strcmp(show.'Qn')Pd = ss(F,G,H,K,Ts)[Hnum,HdenJ = ss2tf(F,G,H,K,1)Hd = tf(Hnum.Hden.Ts) ;[Znum,Zden] = ss2tf(F,G.H,K,2)Zd = (tf(Znum,Zden,Ts»-(-l)He = d2c(Hd,'tustin ') ;Zc = d2c(Zd,'tustin') ;Delay = tf([O 1],[0 1],'iodelay',O.5*Ts)Hc2 Delay *HcZc2 = Delay*Zc

figure ;sUbplot (2 ,2,1)zplane(Hnum.Hden)

subplot (2 ,2 ,2)pzplot (He)

sUbplot (2,2,3)bode(Hd)hold onbode(Zd)bode(Hc2)bode(Zc2)xlim([l 0.5*Ts'(-1)J)grid on ;

subplot(2,2,4)step (He) ;hold on ;

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M.5. DETERMINE ZOUT AND G 135

step(Hc2)grid on

end

M.5 Determine Zout and G

function [Zo G Tsl = FitZoAndG(tstep,diset .dEl,corop,param,sbow)

Output:Zo Open-loop output impedance [Ohm]G Open -loop gain iTs SWitching frequencyJust enter FitZoAndG to start with default parameters

Document:

Determine Zo and G for a given operating-pointusing the model introduced in masterthesis document.

Interleaved Paralleling of a HysteresisCurrent Controlled Resonant pole InverterJ.M Scbellekens December 2006

step time for numerical simulation of on cycle j

delta used on the setpoint to determine the modeldelta used on the output voltage to determine the model[ Lf Cr Cf Ll Rl ] - circuit component values[ iset itb El Td Usp Usn] - circuit parameters;'on' of 'off'. to present intermediate resultsof the numerical simulations ;

compparamshow

dEl

Input:tstepdiset

% Fi tZoAndG:%%%%%%%%%%%%%%%%%%%%%

global glcompglobal glTsglobal Hsdeglobal G

%% ------------------------------------------------------------------------%----------------------------- SET PARAMETERS -----------------------------%--------------------------------------------------------------------------

if nargin == 0tstep = 1e-9 % simulation step time

Lf

CrCfLlRl

33e-6 ;7e-9 ;

7.2e-S ;18.3e-32.3 ;

% filter inductance [H]% lumped resonant capacitance [F]

% filter capacitance [F]% load inductance [H]

% load resistance [Ohm]

iseti thElTdUspUsndEldiset=

0.58 ;350100-9700o ;1 ;0.25

% load EMF [V]% switch off delay [s]% positive supply voltage [V]

X negative supply voltage [V] (NB. positive number)

comp (1)comp(2)comp(3)comp(4)comp(5)

show = 'on'comp = [Lf Crparam = [iset

elseLf

CrCfLlRl

Cf Ll Rl]i th El Td Usp Usn]

isetithElTdUspUsn

end

param (1)param(2)param(3)param(4)param(S)param(S)

close all

[F G H K Ts] = Model(tstep,diset ,dEl ,cornp.param.show) ;

[Hnum. Hden]Hsdd[Znum • Zden]Zsdd

ss2tf(F,G.H.K.1) ; % discrete SDM transfere and impedancetf(Hnurn,Hden.Ts) ;ss2tf(F,G,H,K,2) ;(tf (Znum ,Zden •Ts) ) - (-1)

Hsdc d2c(Hsdd,'tustin') ; X continuous SDH transfere and impedance

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136

Zsde = d2c(Zsdd.'tustin')

hold off

APPENDIX M. MATLAB SCRIPTS

W[MAG DEG]G

%% -----------------------------------------------------------------------­%----------------------------- Determine G -------------------------------­

%--------------------------------------------------------------------------1/sqrt(Ll*Ct) ;[O;O.l*wo] ;bode(Hsdc ,W) j

mean(squeeze(MAG»

%% -----------------------------------------------------------------------­%-------------------------------- FIND Zo --------------------------------­

%--------------------------------------------------------------------------glTs Ts iglcomp = camp j

Xo = [min ([250 Lf lTd])]%GOAL [0 0]%WEIGHT = [1 1]

x = fminsearch(<DObj .Xo)'lox = fminimax (~Obj , Xo, [] , [] , [] ,[] , [10] , [1000])'l.X = fgoalattain (~Obj , Xo , GOAL, WEIGHT, [] , [] , [] , [] , [10] , [1000])

%% ------------------------------------------------------------------------%---------------------------- OUTPUT TO SCREEN ----------------------------%--------------------------------------------------------------------------

if strcmp (show. 'on J)ZO = XGTs

Delay = tf([O 1] ,[0 l],'iodelay' ,O.5*Ts)fmax = 1/(2*Ts) ;F = logspace(1,floor(log10(fmax» ,100)W = 2*pi*F ;[MAGs DEGe] = bode(Hsde,W) ;[MAGsd DEGsd] = bode(Delay*Hsde,W)Hide = tf([O G] ,[Ll*Cf (Ll/Zo+Cf*Rl) (R1/Zo+!)])[MAGi DEGiJ = bode (Hide, W) ;[MAGid DEGid] = bode(Delay*Hide,W)

hf = figure ;hal eubplot(2,l,l)

bpi = semilogx(F,20*log10(squeeze(MAGs» J'b: J ,F,20*log10(squeeze(MAGsd». 'b'." ..F ,20*log10(squeeze (MAGi» J 'g:' ,F ,20*log10(squeeze(MAGid». 'g')

grid on ;ylahel('i_L/i3setY* [dB] ,) ;

ha2 = subplot(2,l,2) ;hp2 = semi logx (F • squeeze (DEGs) J J b : 1 • F • sque ez e (DEGsd) • 1 b' • F • squeeze (DEGi) , , g: ' , F , squeeze (DEG id) • ' g' )grid on j

ylabel(' i_LI i3 set Y* [deg]')xlabel('f [Hz] ,) ;

legend(hpl,'Sampled-data model' ,'with O.5T_{sw} delay' ,'derived linear model' .'with O.5T_{sw} delay')set ([hpl hp2],' LineWidth' ,2) ;

end

%% ------------------------------------------------------------------------%--------------------------- OBJECTIVE FUNCTION ---------------------------%--------------------------------------------------------------------------

function J = Obj(X)%Objective function for to find Zo%Minimize the error of the magnitude%If fminsearch is used J must be scalarglobal glcompglobal glTsglobal Hsdcglobal G

Zo x

Lf gleomp(1)Cr gleomp (2)Cf gleomp(3)Ll gleomp(4)Rl gleomp(5)

= 1/sqrt (Ll*Cf)

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M.6. STATE-PLANE OF CONVERGENCE OF INTERLEAVED CLIPPING VISUALIZED137

W = [O.Ol*wo:l0:20*wo] j

[HAGsd, PHASEsd] = bode (Hsde. '.I)

Hide = tf ([0 G]. [Ll*Cf (Ll/20+ChRl) (Rl/20+1)])[MAGid. PHASEid] = bode (Hide, '.I) ;

MAGerr = 20*log10(squeeze(MAGid» - 20*log10(squeeze(MAGsd»%PHASEerr = squeeze(PHASEid) - squeeze(PHASEsd) ;HAGsse = sum(HAGerr.~2) j

%PHASEsse = sum(PHASEerr.~2)

J = [MAGss.] ;

M.6 State-Plane of Convergence of Interleaved Clipping Vi­sualized

function SoftClippingVisualized% Plots the state-plane for individual iterations ~or the settings below.% Resonances are indicated by complete circles. The change of current of% the non-switching modules during the fast resonant current commutation% is neglected. By pressing any key the next iteration is displayed.

clear all ; close all ;

% iT = Center fast commutation diameter of ther resonance is add because the% inital currents are, at the time instance, at the beginning of the slow% current commutation instead of the fast current commutation

XX Initial ConditionsN = 4 ;iL = -5 ;iLfO = [4 1]du = 3;

% # modules% output current% currents of inductor's 1

% turn-off voltage = Usp+du

[A]

to N-l, J.Lf 0 N= 2*iLl+-ith [A][V]

Usp 160Usn 0;i th 5;Cf 100.-6Lf = 120.-6

% positive supply voltage [V]% negative supply voltage [V]% threshold current [A]% filter capacitance [F]% filter inductance [H]

XX settings2m N*Bqrt(Lf/(N*Cf))2n sqrt(Lf!(N*Cf));

ilim [-Zm*20 Zm*20] ; % plot limits current axis [V]ulim [Usp-O.2*Usp Usp+O.2*Usp] % plot limits voltage axis [V]

kmax 100 ; % # of iterations

%% Initialize2m N*sqrt(Lf/(N*Cf))2n sqrt(Lf/(N*Cf));

uCf = Usp + du j

iLfO = [iLfO min([-ith 2*iL/N-ith])]if sum(iLfO)<iL

Rslow sqrt( Zn-2*(sum(iLfO) - iL)-2 + (uCf - Usp)-2 ) j

iLfmax max(iLfO) + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/ZmiT iL - sum(iLfO(find(iLfO<max(iLfO))) + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/Zm)Rfast sqrt«Usp+du-Usn)-2+(iLfmax-iT)-2*Zm-2);

elseRslow sqrt( Zn~2*(sum(iLfO) - iL)-2 + (uCf - Usp)-2 ) j

iLfmax max(iLfO) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm ;iT iL - sum(iLfO(find(iLfO<max(iLfO))) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm)Rfast sqrt«Usp+du-Usn)-2+(iLfmax-iT)-2*Zm-2) j

end

%% Start Iterations

while (1)

%Zm.*(iLfO(find(iLfO<max(iLfO))) + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/Zm)%% Left Plotsubplot(1,2.1) j

plot(ulim,Zm/N.*[iL iL],'y:') j

hold on ; grid on ;plot(ulim,Zm.*[max([ith 2*iL/N+ith]) max([ith 2*iL/N+ith])] ,'m: ,) ;plot(ulim,Zm.*[min([-ith 2*iL/N-ith]) min([-ith 2*iL/N-ith])], 'm: ,)plot ([uCf uCf]. ilim,' c') ;plot([Usp+du Usp+du],ilim,'k') j

plot(uCf*ones{1,N) ,Zm.*iLfO ,'bo')plot(ulim,Zm.*[iT iT], 'c / ) ;

% plot initial currentsX plot center fast transition

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138

plot (Usp+du. Zm'" iLfmax , 'bo')

for i=l:Nswitch mod(i-l.3)

case 0c = 'b '

case 1

c = ' r'case 2

c = 'g'

% plot max current

7. plot circles

APPENDIX M. MATLAB SCRIPTS

endif sum( iLfO) >iL

circle (Usp • Zm.'" iLfO (i) -sqrt (Rslow -2- (uef -Usp) -2) • Rslow • c. ' - I)plot(Usp,Zm.*iLfO(i)-sqrt(Rslow-2-(uCf-Usp)-2) ,'v') ;

elsecircle (Usp. Zm. '" iLfO (i) +sqrt (Rslow-2-(uCf -Usp) -2) • Rslow. c. J -')

plot (Usp • Zm.'" iLfO (i) +sqrt (Rslow -2- (uef -Usp) ~ 2) • J V .)

endendcircle(UsD,Zm*iT,Rfast, 'c'. 1_')

axis equalhold off

axis([ulim i1im])

iL - sum(iLfO(find(iLfO<max(iLfO))) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm) ;max(iLfO) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm ;sqrt«Usp+du-Usn)~2+(iLfmax-iT)-2*Zm~2) ;

y.y. Right Plotsubplot (1 .2,2)plot(ulim,Zn .• [iL iL]. 'y: J)

hold on ; grid on

plot ([uCf uCf], [ilim].' c')plot ([Usp+du Usp+duJ. [i1im]. 'k J)

circle(Usp,Zn"'iL,Rslow. Jb J• '_J)

plot(uCf ,Zn*sum(iLfO) .'bo') ;

axis equal i axis([ulim ilim])bold off

~ Create textboxannotation! = annotation( ...J textbox J ••

'Position'. [0.3422 0.9394 0.3378 0.04264] •...J EdgeColor J , J none J , •••

J Fi tHeightToText J • J off J , •••

J FontName J , J Arial ' , ...J FontSize' ,12, ...'HorizontalAlignment ' ,'center' •...'String' ,{ 'Left click for next itteration, right click to quit '});

XuCf = Usn + sqrt(Rfast-2-(iT-min([-ith 2*iL/N-ith]))~2*Zm~2)

[x,y,button] ginput(l);if button == 3

breakend

XX Recalculate U and i

if sum(iLfO)<iLiLfO = [ iLfO(find(iLfO<max(iLfO))) + sqrt(Rslow~2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/Zm min([-ith 2*iL/N­

ith])] ;if -isreal(iLfO)

disp('iLf complex, sum(iLf)<iL')iLiOsqrt(Rslow-2-(uCf-Usp)-2)/Zmsqrt(Rslow-2-du-2)/ZmRslow(uCf - Usp)break

enduCf = Usn + sqrt(Rfast-2-(iT-min([-itb 2*iL/N-ith]))-2*Zm~2)

Rslow = sqrt( Zn-2*(sum(iLfO) - iL)-2 + (uCf - Usp)-2 ) ;if sum( iLfO) <iL

iT iL - sum(iLfO(find(iLfO<max(iLfO))) + sqrt(Rslow-2-(uCf-Usp)~2)/Zm + sqrt(Rslow-2-du-2)/Zm)iLfmax max(iLfO) + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/Zm ;Rfast sqrt«Usp+du-Usn)-2+(iLfmax-iT)-2*Zm~2);

elseiTiLfmaxRfast

endelse

iLfO = [ iLfO(find(iLfO<max(iLfO))) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm min([-ith 2*iL/N­ith])] ;

if ~isreal(iLfO)

disp(JiLf complex, sum(iLf»iL')iLfOsqrt(Rslow-2-(uCf-Usp)-2)/Zmsqrt(Rslow-2-du-2)/Zm

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M.7. CONVERGENCE OF INTERLEAVED CLIPPING VISUALIZED 139

iL - sum(iLfO(find(iLfO<max(iLfO») - sqrt(Rslow·2-(uCf-Usp)-2)/Zm - sqrt(Rslow·2-du-2)/Zm)max(iLfO) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm ;sqrt«Usp+du-Usn)-2+(iLfmax-iT)-2*Zm-2) ;

Rslow(uCf-Usp)break

enduCf = Usn + sqrt(Rfast-2-(iT-min([-ith 2*iL/N-ith]»-2*Zm-2)Rslow = sqrt( Zn-2*(sum(iLfO) - iL)-2 + (uCf - Usp)-2 ) ;if sum (iLfO) <iL

iT iL - sum(iLfO(find(iLfO<max(iLfO») + sqrt(Rslow-2-(uCf-Usp)-2)/ZmiLfmax max(iLfO) + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/Zm ;Rfast sqrt«Usp+du-Usn)-2+(iLfmax-iT)-2*Zm-2);

elseiTiLfmaxRfast

endend

end

%% Circle Functionsfunction h = circle(x,y.R,LineColor.LineStyle)h = rectangle(JPosition', [x-R y-R 2*R 2*R] J 'Curvature', [1 1], JLineStyle' ,LineStyle, 'EdgeColor' ,LineColor)

%%circlepart(x,y,R,phi.LineColor,LineStyle)circlepart(x.y,R,phi.LineColor,LineStyle)

and radius RPlots a circle part with center (x,y)from to [phil phi2]LineColor and LineStyle are optional

function h% Plot : h%%%%

Phi = phi(l) :O,01:phi(2)

x x+R*cos(Phi)Y y+R*sin(Phi)

if nargin == 4h = plot (X. Y)

else if nargin == 6h = plot (X, Y, 'Color'. LineColor.' LineStyle' ,LineStyle)

elsedisp('Not enough arguments J)disp('type help circlepart ')

end

M.7 Convergence of Interleaved Clipping Visualized

function SoftClippingVisualizedinTime% Plots the currents at the start of the slow resonant current commutation% in time for the number iterations set below. The change of current of% the non-switching modules during the fast resonant current commutation% is neglected. By pressing any key the next iteration is displayed.

clear all j close all j

% iT = Center fast commutation diameter of ther resonance is add because the% inital currents are. at the time instance. at the beginning of the slow% current Commutation instead of the fast current commutation

%% Initial Conditions

= 4 ;iL = -5 j

iLfO [-1du = 1

-2 -3J ;

% # modules% output current

% currents of inductor's% turn-off voltage = Usp+du

[AJ1 to N-l, 1Lf 0 N= 2*iLl+-ith [A]

[VJ

Usp 160Usn 0;i th 5 j

Cf 100e-6Lf = 120e-6

% positive supply voltage [V]% negative supply voltage [V]% threshold current [A]% filter capacitance [F]% filter inductance [H]

%% settingsZm N.sqrt(Lf/(N*Cf))Zn sqrt(Lf/(N*Cf));

11imulim

[-Zm*20 Zm*20J[120 190J

% plot limits current axis [V]% plot limits voltage axis [V]

kmax 100 ; Yo # of iterations

XX InitializeZm = N*sqrt(Lf/(N*Cf))

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140 APPENDIX M. MATLAB SCRIPTS

Zn = sqrt(Lf/(NoCf)) ;

uCf = Uap + du j

iLfO = [iLfO min([-ith 20iL/N-ith])]if Bum(iLfO)<iL

Ralaw sqrt( Zn-2*(sum(iLfO) - iL)-2 + (uCf - Usp)-2 ) ;iLfmax max(iLfO) + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/ZmiT iL - sum(iLfO(find(iLfO<max(iLfO») + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/Zm)Rfast sqrt«Usp+du-Usn)-2+(iLfmax-iT)-2*Zm-2) j

elseRslaw sqrt( Zn-2*(sum(iLfO) - iL)-2 + (uCf - Usp)-2 ) ;iLfmax max(iLfO) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm ;iT iL - sum(iLfO(find(iLfO<max(iLfO))) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm)Rfast sqrt«Usp+du-Usn)-2+(iLfmax-iT)-2*Zm-2);

end

%% Start Iterations

for k=l:kmaxilk,:) = iLfO%% Recalculate U and i

iL - sum(iLfO(find(iLfO<max(iLfO))) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm)max(iLfO) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm ;sqrt«Usp+du-Usn)-2+(iLfmax-iT)-2*Zm-2) ;

iL - sum(iLfO(find(iLfO<max(iLfO))) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm)max(iLfO) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du~2)/Zm ;sqrt«Usp+du-Usn)-2+(iLfmax-iT)-2*Zm-2) ;

= [ iLfO(find(iLfO<max(iLfO))) - sqrt(Rslow-2-(uCf-Usp)-2)/Zm - sqrt(Rslow-2-du-2)/Zm min([-ith 2 0 iL/N­ith])] ;

if -isreal(iLfO)disp('iLf complex, sum(iLf»iL')iLfOsqrt(Rslow-2-(uCf-Usp)-2)/Zmsqrt(Rslow-2-du-2)/ZmRslow(uCf -Usp)break

enduCf = Usn + sqrt(Rfast-2-(iT-min([-ith 2*iL/N-ith]»-2*Zm-2)Rslow = sqrt( Zn-2*(sum(iLfO) - iL)-2 + (uCf - Usp)-2 ) ;if sum( iLfO) <iL

iT iL - sum(iLfO(find(iLfO<max(iLfO»)) + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/Zm)iLfmax max(iLfO) + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/Zm j

Rfast sqrt«Usp+du-Usn)-2+(iLfmax-iT)-2*Zm-2);else

iTiLfmaxRfast

endelse

iLfO

if sum(iLfO)<iLiL£O = [ iLfO(find(iLfO<max(iLfO») + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/Zm min([-ith 2*iL/N-

ith])] ;if -isreal(iLfO)

disp('iLf complex, sum(iLf)<iL')iLfOsqrt(Rslow-2-(uCf-Usp)-2)/Zmsqrt(Rslow-2-du-2)/ZmRslow(uCf-Usp)break

enduCf = Usn + sqrt(Rfast-2-(iT-min([-ith 2*iL/N-ith]»-2*Zm-2)Rslow = sqrt( Zn-2*(sum(iLfO) - iL)-2 + (uCf - Usp)-2 ) ;if sum(iLfO)<iL

iT iL - sum(iLfO(find(iLfO<max(iLfO») + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/Zm)iLfmax max(iLfO) + sqrt(Rslow-2-(uCf-Usp)-2)/Zm + sqrt(Rslow-2-du-2)/Zm ;Rfast sqrt«Usp+du-Usn)-2+(iLfmax-iT)-2*Zm-2);

elseiTiLfmaxRfast

endend

end

k = [l:kmax] ;plot (k, ilxlabel('k') ;ylahel (' i_{Li} [A]')grid on

%% Circle Functionsfunction h = circle(x,y,R,LineColor,LineStyle)h = rectangle (' Position J • [x-R y-R 2*R 2*R],' Curvature' ,[1 1].' LineStyle ' J LineStyle J' EdgeColor' ,LineColor)

c ircl epart (x ,y ,R, phi, Li neCol or ,Li neSt yle)c irclepart (x ,y ,R, phi, LineCol or J L i neSt yle)

and radius RPlots a circle part with center (x,y)from to [phil phi2]LineColor and LineStyle are optional

function h% Plot , h%%%%

Page 127: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

M.7. CONVERGENCE OF INTERLEAVED CLIPPING VISUALIZED

Phi = phi(l) :O.Ol:phi(2)

x x+R*cos(Phi)Y y+R* sin (Phi)

if nargin == 4h = plot (1. y) ;

elseif nargin == 6h = plot (X. Y. 'Color J. LineColor.' LineStyle' ,LineStyle)

e1 sedisp('Not enough arguments')disp('type help circlepart')

end

141

Page 128: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

Appendix N

Used Equipment

Table N l' Equipment used during the measurements..Brand Type Description #Used

8delta 120-25D 0-120V 25A DC power-supply 1

Fluke 85 Digital multi-meter a 1

HP 33120A Function/arbitrary waveform generator 1HP E3631A 3 output 0-6V 5A and 0-25V 1A DC power-supply 1HP 4294A 40Hz-llOMHz impedance analyzerb 1HP 4395A 10Hz-500Hz Network, Spectrum, Impedance Analyzer 1

Tektronix TDS754D 4 channel 500MHz 2Gs/s DPO oscilloscope 1Tektronix TCPA300 Current-probe amplifier 1Tektronix TCP312 DC-100MHz 30A current-probec 1Tektronix TCP202 DC-50MHz 15A (50 peak) current-probe 3Tektronix P5205 DC-lOOMHz 1000V differential high-voltage probe 1Tektronix P6139A DC-500MHz 10* 8pF lOMO passive voltage probe d 2

TDI RBL488 4000W dynamical programmable load 1

Xantrex XFR600-2 0-600V 2A DC power-supply 1

aUsed during testing and debugging of the test setupbUsed to characterize the used loadscUsed in combination with the TCPA300dUsed during testing and debugging of the test setup

143

Page 129: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

Appendix 0

Additional Measurements

o ~: 2.469kH2. @: 1.064kH2

'';-'

'0001: 000

10.0 A(,3 10.0 A

M 250}JS elf 9.1 A 13 Nov 200618:41:46

Figure 0.1: Steady-state interleaved clipping (eM = Ucf)

145

Page 130: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

146 APPENDIX O. ADDITIONAL MEASUREMENTS

~ Single Seq 1.00MS/si T+.-j ··· m •••••••••••••

chi zoom:· 0.5X vert O.2X Horz.~.

·~:16.2A

:@:11.2A

C 1310.0 A10.0/\

M 250JJs elf 9.1 A 13 Nov 200618:43:24

Figure 0.2: From steady-state interleaved clipping to normal mode operation (ch4

10'10'

"oc-;,,----,-----,---,--,,-,-,--,----,--;,--,-,-,--"'1----7";--11·11I II I I I I I I 1< I I 'I'5 ~~~~, ~ __1_~~~_~~ 1 ~ __,4_1~ ~_1_~~~

I II I I III I I I II I I I I 'III I I 'III I I " II I I I I I

I I 1,111 I t II II I I I II II I II I I I

I I I I I-----,--- 111- --1-1-

, ,

4 ,- ~,'-

I:: :':' :::::: ::: :,::: ::: : : :: :~

~ 3~, -~~~I---~ __:-~~~~~~---:--~~-:~~~I~---~-~-:-~~~~! II II I I I I I, I I I I I 1'1 I I I 1.' I "

11'1, I I I II I I I I I I I I I I I I I "'

: :':: : I : ,:: I ::: :: :: I I :: ,::12: ~.~:_:+:- __ -: __,_+~_::.-' : ': I I I , __ ~_~_'_:-:_:~~

: :::: : ':: :: :: :,:1I IIII1 I II I I I I III!

IIII1 I II : I ': II,:

1",I I I I I III I I III I I I I I I I

80 L L -.J 1.1 ~ __ ,_ ~ ~ ~ ~ ~ '- : -J _ _ '- _ 1- _1_ ~ :_I-J

II I I I 1'1 I I IIIII I I 1111,1 I I IIII I I I I I I I60 J.. L'-'4. ... __I_.L".J.L UJ.. 1 -J_I_'.J .LI.J. J.. _ J.. _1_ LL

II I I I I I I I I I

II I I I I 111'1 I I I I III I I I I I II I I I I I III II I I I I II I I I I i III I I I I I

40,...- .... LI_'.LI ...J __,_.L.l.J Lw ,- _L...J_I_I_ .I.'..L _"__ L _ L_I_

II II I I 11'1 I I I I I III I

" ,1,1 I

111111 I I2O_1-LI_I.l.I_ _ __ I__ L-J_

111111 I I

111111 I I I, 11111 I I IoI II II I I I

10'

g0::

1001""" -II II

(a) Small-signal load (b) Large-signal load

Figure 0.3: Impedance of used loads

Page 131: MASTER Interleaved paralleling of hysteresis current ... · Interleaved paralleling of hysteresis current controlled resonant pole inverters Schellekens, J.M. Award date: 2007 Link

Appendix P

Project Description

Afstudeeropdracht: Interleaved Paralleling of Hysteresis Current ControlledResonant Pole Inverters

Inleiding:

De PADC is een door Prodrive BV ontwikkelde "hard switching full bridge PWM" versterkeren wordt in wafer steppers van ASML gebruikt als korteslagversterker. Door de blijvendevraag om meer uitgangsvermogen van deze versterkers loopt deze topologie vast tegen zijnvermogens grens. De PAAC is een door ASML ontwikkelde "hysteresis current controlledresonant pole" inverter en wordt in de wafer steppers van ASML als langeslag versterker ge­bruikt. Het voordeel van deze topologie is dat de schakelverliezen extreem laag zijn, als nadeelkomt er bij dat de piekstroom in de filter spoelen 2 keer zo groot is als de uitgangsstroom.Omdat deze topologie bijna geen schakelverliezen heeft is deze topologie potentieel interessantom voor de toekomstige korteslag versterkers te gebruiken.

Opdrachtomschrijving:

Onderzoek de mogelijkheden voor de toekomstige generatie korteslag versterkers gebruik mak­end van de resultaten van de prestudie uitgevoerd door Andrew Kotsopoulos met nadruk opde PAAC topologie. Ontwerp een korteslag versterker die voldoet aan de specificaties van delaatste generatie PADC. Onderzoek de mogelijkheden voor het parallel schakelen van meerdere"hysteresis current controlled resonant pole" eindtrappen met synchronisatie. Hierdoor ver­hoogt de effectieve schakelfrequentie van de uitgang per parallel geschakelde stage, waardoorde schakelfrequentie per tak laag gehouden kan worden wat de schakelverliezen weer ten goedekomt. Dit laatste is ook voor ASML interessant omdat voor de lange slag versterker zelfs dePAAC topologie tegen grenzen begint te lopeno

Invulling van de afstudeerperiode:

Bij het afstuderen zullen 3 partijen betrokken zijn, namelijk de opdrachtgever Prodrive BVgevestigd te Son en Breugel, de Technische Universiteit Eindhoven (TU/ e), en ASML geves­tigd te Veldhoven. Tijdens de eerste periode van het afstuderen staat het verdiepen in detopologie centraal, omdat ASML de meeste know how van deze topologie heeft zal tijdens

147

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148 APPENDIX P. PROJECT DESCRIPTION

,1

de eerste periode drie a vier dagen in de week bij ASML aan de opdracht gewerkt worden.Aan het eind van het afstuderen zal er oak een prototype gebouwd moeten worden. Dit zalvoornamelijk bij Prodrive B.V. plaatsvinden gebruik makend van een bestaande versterker(FlexDMC) welke door Prodrive ontwikkeld is. Gedurende de gehele afstudeer periode zal 1a 2 dagen in de week op de TV aan de opdracht gewerkt worden. Dit am contact te houdenmet de begeleider op de TV, voor verslaglegging, maar oak in verband met bestuurstakenvan de afstudeerder. Tijdens de gehele afstudeerperiode wordt er contact gehouden met deopdrachtgever.