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ARL-TR-8871 ● JAN 2020
Low-Noise Amplifiers (LNAs) and Power Amplifiers (PAs) for Next-Generation S- and X-Band Radars by John E Penn
Approved for public release; distribution is unlimited.
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Destroy this report when it is no longer needed. Do not return it to the originator.
ARL-TR-8871 ● JAN 2020
Low-Noise Amplifiers (LNAs) and Power Amplifiers (PAs) for Next-Generation S- and X-Band Radars John E Penn Sensors and Electron Devices Directorate, CCDC Army Research Laboratory
Approved for public release; distribution is unlimited.
ii
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1. REPORT DATE (DD-MM-YYYY)
January 2020 2. REPORT TYPE
Technical Report 3. DATES COVERED (From - To)
March–September 2019 4. TITLE AND SUBTITLE
Low-Noise Amplifiers (LNAs) and Power Amplifiers (PAs) for Next-Generation S- and X-Band Radars
5a. CONTRACT NUMBER
5b. GRANT NUMBER
5c. PROGRAM ELEMENT NUMBER
6. AUTHOR(S)
John E Penn 5d. PROJECT NUMBER
5e. TASK NUMBER
5f. WORK UNIT NUMBER
7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES)
CCDC Army Research Laboratory ATTN: FCDD-RLS-RE Adelphi, MD 20783-1138
8. PERFORMING ORGANIZATION REPORT NUMBER
ARL-TR-8871
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11. SPONSOR/MONITOR'S REPORT NUMBER(S)
12. DISTRIBUTION/AVAILABILITY STATEMENT
Approved for public release; distribution is unlimited.
13. SUPPLEMENTARY NOTES ORCID ID: John Penn, 0000-0001-7535-0388 14. ABSTRACT
The US Army Combat Capabilities Development Command Army Research Laboratory (CCDC ARL) has been evaluating and designing efficient broadband high-power amplifiers for future adaptive multimode radar systems in addition to other circuits for use in communications, networking, and electronic warfare (EW). ARL submitted designs of broadband amplifiers, power amplifiers, high-dynamic range low-noise amplifiers, high-power switches, frequency multipliers, and other circuits for future radar, communications, EW, and sensor systems using Qorvo’s high-performance 0.15-µm gallium nitride (GaN) fabrication process. This technical note briefly summarizes several designs using Qorvo’s 0.15-µm high-power, efficient GaN on 4-mil silicon carbide process that were submitted to an ARL prototype wafer option fabrication.
15. SUBJECT TERMS
MMIC, power amplifier, low-noise amplifier, microwave, radar
16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF ABSTRACT
UU
18. NUMBER OF PAGES
38
19a. NAME OF RESPONSIBLE PERSON
John E Penn a. REPORT
Unclassified b. ABSTRACT
Unclassified
c. THIS PAGE
Unclassified
19b. TELEPHONE NUMBER (Include area code)
(301) 394-0423 Standard Form 298 (Rev. 8/98)
Prescribed by ANSI Std. Z39.18
iii
Contents
List of Figures iv
1. Introduction 1
2. S- and X-Band Low-Noise Amplifier 1
3. S- and X-Band Power Amplifier 5
4. S- and X-Band 10-W Power Amplifier 16
5. Broadband Feedback Amplifiers 21
6. Broadband Nonuniform Distributed Amplifier 24
7. Conclusions 27
8. References 29
List of Symbols, Abbreviations, and Acronyms 30
Distribution List 31
iv
List of Figures
Fig. 1 S- to X-band LNA ideal schematic (6- × 25-µm HEMT) .................... 2
Fig. 2 S- to X-band LNA simulation (ideal lossless match) ........................... 3
Fig. 3 S- to X-band LNA simulation (lossless input match, MMIC output match) ................................................................................................ 3
Fig. 4 S- to X-band LNA simulation (full MMIC layout) .............................. 4
Fig. 5 S- to X-band LNA EM simulation (EM [solid] vs. MMIC [dash]) ...... 4
Fig. 6 S- to X-band LNA layout ................................................................... 5
Fig. 7 Power (green) and efficiency (magenta) contours at 6 GHz (8 × 125 µm) ...................................................................................... 7
Fig. 8 Initial ideal 3.5- and 7-W PA linear simulations (8 × 93 µm vs. two 8 × 93 µm) ......................................................................................... 8
Fig. 9 Power and PAE simulations at 6 GHz of ideal 3.5-W (solid) and 7-W PA (dotted)......................................................................................... 8
Fig. 10 Ideal PA no. 2 schematic (8- × 150-µm HEMT) ................................. 9
Fig. 11 Power and PAE simulations at 6 GHz of ideal PA no. 2 (8 × 150 µm) ...................................................................................... 9
Fig. 12 Revised S- to X-band 8- × 150-µm PA simulations: ideal (dash) vs. MMIC (solid) ................................................................................... 10
Fig. 13 Output match of S- to X-band 8- × 150-µm PA simulation: ideal (dash) vs. MMIC (solid) ................................................................... 11
Fig. 14 Power and PAE of 8- × 150-µm PA from 3 to 9 GHz, ideal lossless design (28 V) ................................................................................... 12
Fig. 15 Power and PAE of 8- × 150-µm PA from 3 to 9 GHz, with lossy MMIC elements (28 V) .................................................................... 13
Fig. 16 Power and PAE of 8- × 150-µm PA from 3 to 9 GHz, final layout EM (28 V) .............................................................................................. 14
Fig. 17 S- to X-band 8- × 150-µm PA simulations: MMIC (dash) vs. EM (solid)............................................................................................... 15
Fig. 18 Final compact layout of 8- × 150-µm S- to X-band PA ..................... 15
Fig. 19 Power and PAE of 2X 8- × 150-µm 10-W PA from 3 to 9 GHz, ideal lossless design .................................................................................. 17
Fig. 20 Power and PAE of 2X 8- × 150-µm 10-W PA from 3 to 9 GHz, lossy MMIC PA ........................................................................................ 18
Fig. 21 Power and PAE of 2X 8- × 150-µm 10-W PA from 3 to 9 GHz, final layout EM (28 V) ............................................................................. 19
v
Fig. 22 S- to X-band 2X 8- × 150-µm 10-W PA linear simulations: 1X (dash) vs. 2X (solid).................................................................................... 20
Fig. 23 S- to X-band 2X 8- × 150-µm 10-W PA simulations: MMIC (dash) vs. EM (solid) ........................................................................................ 20
Fig. 24 Final compact layout of 2X 8- × 150-µm S- to X-band 10-W PA ..... 21
Fig. 25 Final compact layouts of broadband feedback amplifiers (6× 50 µm, 4× 50 µm, and 4× 65 µm) ................................................................. 22
Fig. 26 Simulation of 6- × 50-µm resistive feedback amplifier (MMIC [solid] vs. ideal [dot]) .................................................................................. 23
Fig. 27 Simulation of 4- × 50-µm source feedback amplifier (MMIC [solid] vs. ideal [dot]) .................................................................................. 23
Fig. 28 Simulation of 4- × 65-µm source feedback amplifier (MMIC [solid] vs. ideal [dot]) .................................................................................. 24
Fig. 29 Schematic of initial ideal uniform 4- × 20-µm DA ............................ 25
Fig. 30 Simulation of initial ideal uniform 4- × 20-µm DA ........................... 25
Fig. 31 Simulation of re-tuned ideal NUDA ................................................. 26
Fig. 32 EM simulation (solid) of nonuniform MMIC DA ............................. 26
Fig. 33 Layout of NUDA ............................................................................. 27
1
1. Introduction
The US Army Combat Capabilities Development Command Army Research Laboratory
(CCDC ARL) has been evaluating and designing efficient broadband high-power
amplifiers and robust low-noise amplifiers (LNAs) for future multimode radar systems
that could be used in other applications such as communications, networking, and
electronic warfare (EW). ARL submitted designs of broadband amplifiers, power
amplifiers (PAs), and high-dynamic range LNAs for future radar, communications, EW,
and sensor systems using Qorvo’s high-performance 0.15-µm gallium nitride (GaN)
fabrication process. The circuits most applicable to radar applications are documented in
this technical report. When the fabricated designs are returned and tested, future technical
reports will document results of circuit characterization.
2. S- and X-Band Low-Noise Amplifier
Not all high-electron-mobility transistor (HEMT) models in the Qorvo 0.15-µm GaN
process design kit (PDK) had noise figure data, which are necessary for the design of an
LNA. Initially, gain, noise figure, quality factor (Q) of the optimal noise match, and
stability were simulated over 2–10 GHz for the recommended HEMT sizes with noise
data of 4 × 25 µm and 6 × 25 µm. Some source inductance was used to optimize the
performance tradeoffs, with the 6- × 25-µm HEMT chosen for the initial design. DC
biases of 5 and 10 V were recommended for low-noise applications, rather than the 25 to
28 V that would be typical for high-power applications. These designs should be able to
operate over a large range of DC, though the best noise figure is typically at a moderately
low-drain current.
Initial lossless matched LNA designs achieved good noise figure, very good gain, and
conditional stability over an octave bandwidth, 3–6 GHz, 4–8 GHz, or 5–10 GHz, but
achieving 3–10 GHz bandwidth with good stability, noise figure, gain, and return loss
was difficult. Large coupled lines, such as used on a prior Raytheon GaN fabrication1
were suitable for larger bandwidths but compact lumped element matching circuits
resulted in the best compromise of layout area, noise figure, stability, and gain. Figure 1
shows a schematic of the initial design using ideal lossless matching elements, while
Fig. 2 shows its corresponding linear simulation. The noise figure (green, right axis) is
well below 1 dB from 3 to 12 GHz, and gain is above the 10-dB goal from 3 GHz to
above 9 GHz. Note that with ideal lossless matching elements there is a stability problem
near 2 GHz (black, right axis). When lossy monolithic microwave integrated circuit
(MMIC) elements are substituted into the output matching network and the source
feedback inductors, the gain decreases but the stability improves. Figure 3 shows better
than 10 dB gain from 3 to 9 GHz, and the noise figure is still below 1 dB over the desired
2
range. Conditional stability is achieved for nominal loads (near 50 ohms), but there is
still a potential instability near 3 GHz for poor matches (Mu > 0.4). When the lossless
input match is converted to MMIC elements, unconditional stability is achieved, but the
gain drops about 1.5 dB, below the 10 dB goal, and the noise figure increases nearly 0.5
to a respectable 1.4 dB over a broad frequency range from 3.3 GHz up to 10 GHz. Linear
simulations of the full MMIC layout are shown in Fig. 4. The layout was then
electromagnetic (EM)-simulated and readjusted to achieve performance similar to the
original MMIC linear simulation (Fig. 5). Final layout of the S- to X-band LNA is shown
in Fig. 6.
Fig. 1 S- to X-band LNA ideal schematic (6- × 25-µm HEMT)
6x25
6x50
4x25
Rser=0
Lsrc=0.3Rser=0
Lsrc=0.8
Rshnt=2000
Rser=0Lsrc=0.65
Rshnt=2000
Wf=50
Wf=25
Wf=25
Rshnt=2000
PORTP=1Z=50 Ohm
PORTP=2Z=50 OhmRES
ID=TL3R=Rshnt Ohm
INDID=L8L=3.3 nH
G
D
S
QGAN15_ES_FET_V2ID=LN_1416_6x25_1Wu=Wf umN=6BIAS=5V 100 mA/mm
INDID=L9L=1.8 nH
CAPID=L5C=0.347 pF
CAPID=L6C=0.354 pF
CAPID=L7C=0.347 pF
INDID=L1L=Lsrc nH
INDID=L3L=1.8 nH
RESID=TL4R=Rser Ohm
CAPID=L4C=0.354 pF
G
D
S
QGAN15_ES_FET_V2ID=LN_1416_4x25_1Wu=Wf umN=4BIAS=5V 100 mA/mm
INDID=L2L=3.3 nH
QGAN15_ES_FETVIAID=FETVIA_1WIN=20 um
3
Fig. 2 S- to X-band LNA simulation (ideal lossless match)
Fig. 3 S- to X-band LNA simulation (lossless input match, MMIC output match)
4
Fig. 4 S- to X-band LNA simulation (full MMIC layout)
Fig. 5 S- to X-band LNA EM simulation (EM [solid] vs. MMIC [dash])
5
Fig. 6 S- to X-band LNA layout
3. S- and X-Band Power Amplifier
For the design of an S- to X-band PA, load pull simulations were performed on a
1-mm (8- × 125-µm) HEMT at 3, 6, and 9 GHz. The maximum allowed DC bias
for the 0.15-µm GaN process is 28 V and that was assumed for this PA design to
maximize power. Figure 7 shows an example of the power and power-added
efficiency (PAE) contours at 6 GHz for a 1-mm HEMT, yielding a maximum 60%
PAE for a load of 0.62 at 75° and a Q of 1.95. Maximum power of 37.1 dBm
(5.1 W) is shown for a load of 0.43 at 98° and a Q of 1.05, and a very good
compromise load of 0.47 at 94° and a Q of 1.2 yields 37 dBm (5 W) and 55% PAE.
Lower Q means larger achievable bandwidth, and the compromise target
impedance yields 5 W/mm with 55% PAE at 28 V. These load pull simulations
were used to create a simple scalable model of the target load impedance. A slightly
larger 8- × 150-µm (PDK limit) HEMT was chosen to achieve 5 W per device with
0.8-dB margin for losses. In order to achieve higher powers, multiple HEMTs
would have to be parallel combined. A 10-W PA design was later achieved by
6
paralleling two 8- × 150-µm HEMTs, starting with this initial 8- × 150-µm HEMT
5-W PA design. Another ideal lossless matched PA design based on 8- × 93-µm
HEMTs achieved very good gain but the bandwidth was less than desired. Figure
8 shows linear simulations of an initial 8- × 93-µm PA (solid lines) and a two-way
combined 8- × 93-µm PA at twice the output power. Very good maximum
efficiency (PAE) of 52% PAE was simulated with 3.5 W for the single 8- × 93-µm
PA and 7 W for the two-way combined 8- × 93-µm PA at 3-dB gain compression
and peak efficiency (Fig. 9). A redesign with a larger HEMT device was needed for
the 5-W and 10-W power goals, and additional compromises in performance would
be needed to achieve the bandwidth goals of S- to X-band (3–10 GHz). A larger
8- × 175-µm HEMT was used in a prior successful PA design in Qorvo’s 0.25-µm
GaN process, but the 0.15-µm GaN PDK would not allow scaling the nominal 8- ×
100-µm HEMT beyond 8- × 150-µm, so these second PA (no. 2) designs were
limited to 8 × 150 µm (1.2 mm). The ideal lossless matched single-stage 8- ×
150-µm PA no. 2, whose schematic is shown in Fig. 10, predicts 7 W (38.6 dBm)
at less than 3-dB gain compression with an excellent 54% PAE that is still rising
toward its peak (Fig. 11).
7
Fig. 7 Power (green) and efficiency (magenta) contours at 6 GHz (8 × 125 µm)
0 1.0
1.0
-1.0
10.0
10.0
-10.0
5.0
5.0
-5.0
2.0
2.0
-2.0
3.0
3.0
-3.0
4.0
4.0
-4.0
0.2
0.2
-0.2
0.4
0.4
-0.4
0.6
0.6
-0.6
0.8
0.8
-0.8
ContoursSwp Max
6e+009
Swp Min
1
m2
m5
m3
m1
PAE Max
PLoad Max
PAE Contours
PLoad Contours
Gamma Points
GPC_MAX(2,1,1,3)Load_Pull_8x125
Conj(S(2,2))Load_Pull_8x125
Conj(S(1,1))Load_Pull_8x125
m1: 60.046 %Mag 0.6186Ang 75.02 DegPAE = 60.046 %iPower = 1harm = 1
m3: 6 GHzMag 0.02044Ang 5.756 Deg
m5: 58 %Mag 0.7286Ang 81.64 DegPAE = 58 %iPower = 1harm = 1
m2: 37.105 dBmMag 0.4332Ang 97.81 DegPLoad = 37.105 dBmiPower = 1harm = 1
8
Fig. 8 Initial ideal 3.5- and 7-W PA linear simulations (8 × 93 µm vs. two 8 × 93 µm)
Fig. 9 Power and PAE simulations at 6 GHz of ideal 3.5-W (solid) and 7-W PA (dotted)
9
Fig. 10 Ideal PA no. 2 schematic (8- × 150-µm HEMT)
Fig. 11 Power and PAE simulations at 6 GHz of ideal PA no. 2 (8 × 150 µm)
In increase the gain bandwidth, the input match of the 8- × 150-µm PA was
increased in complexity to achieve broadband S- to X-band gain, 3–9 GHz. Stable
gain was achieved with nearly identical gain performance for the lossy MMIC PA
design versus the original ideal lossless PA as shown in Fig. 12. Comparing the
ideal output match design to the desired optimal parallel resistor-capacitor load
model shows excellent match from about 2.6 to 9 GHz (Fig. 13, dashed lines).
Converting the broadband output match to actual MMIC elements reduced the
bandwidth slightly with minimal losses of 0.5–0.6 dB across most of the band,
rolling off below 3 GHz and above 9 GHz (Fig. 13, solid lines). A 0.5-dB loss
corresponds to about 12% power and efficiency loss in the output match compared
to the ideal case. Output power and PAE performance simulations for the ideal
INDID=L7L=2.37 nH
INDID=L16L=1 nH
CAPID=L17C=3 pF
CAPID=L15C=1.8 pF
INDID=L8L=2.07 nH
CAPID=L4C=0.435 pF
INDID=L6L=2.37 nH
INDID=L14L=0.40 nH RES
ID=R2R=Res2 Ohm
CAPID=L5C=0.49 pF
CAPID=L3C=100 pF
G
D
QGAN15_ES_FET2_V2ID=LIN_4852_8x150_1Wu=150 umN=8VIA_count_per_pad=2VIA=No ShareBIAS=28V 100 mA/mm
RESID=R1R=Res1 Ohm
PORTP=1Z=50 Ohm
PORTP=2Z=50 Ohm
TLINID=TL1Z0=29 OhmEL=90 DegF0=5 GHz
CAPID=L18C=0.536 pF IND
ID=L13L=1.25 nH
Res2=50WF=150
Res1=2w50=88
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Power (dBm)
Pcomp_8x150_Amp_5G
0
5
10
15
20
25
30
35
40
45
50
55
60
p2
p1p3
25 dBm13.55 dB
0 dBm16.39 dB
25 dBm38.55 dBm
25 dBm53.99
DB(|Pcomp(PORT_2,1)|)[*,X] (dBm)AMP_8x150_5G_NL.AP_HB
PAE(PORT_1,PORT_2)[*,X]AMP_8x150_5G_NL.AP_HB
DB(PGain(PORT_1,PORT_2))[*,X]AMP_8x150_5G_NL.AP_HB
p3: Freq = 5 GHz p1: Freq = 5 GHz
p2: Freq = 5 GHz
10
lossless S- to X-band 8- × 150-µm PA from 3 to 9 GHz are shown in Fig. 14.
Efficiency (PAE) ranges from a peak of 60% at 3 GHz to 52% at 9 GHz, while
output power is approximately 6.75 W (38.3 dBm) from 3 to 7 GHz, falling off
some at 8 and 9 GHz, with an input power of 0.5 W (27 dBm). Once the 0.5-dB
losses of the actual MMIC matching elements are factored in, the output power
drops to 6 W (37.8 dBm), falling even more at 8 and 9 GHz, with an input power
of 0.5 W (27 dBm), while PAE drops to a peak of 51% at 3 GHz, dropping farther
to a peak PAE of 44% at 9 GHz. Figure 15 shows the simulated output power and
PAE performance for the S- to X-band 8- × 150-µm PA with lossy MMIC matching
circuits from 3 to 9 GHz. When the MMIC layout is EM-simulated and the layouts
readjusted to get back to the prior performance, the output power is similar, as are
the peak efficiencies which range from about 44% to 50% as shown in Fig. 16. The
small signal linear performance of the final layout (EM) is shown in Fig. 17 and is
very similar to the original MMIC linear simulation. Final layout plot of the
compact 5- to 6-W broadband 3- to 9-GHz PA is shown in Fig. 18.
Fig. 12 Revised S- to X-band 8- × 150-µm PA simulations: ideal (dash) vs. MMIC (solid)
11
Fig. 13 Output match of S- to X-band 8- × 150-µm PA simulation: ideal (dash) vs. MMIC
(solid)
12
Fig. 14 Power and PAE of 8- × 150-µm PA from 3 to 9 GHz, ideal lossless design (28 V)
0 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930
Power (dBm)
Pcomp_8x150_Amp_5G
10
15
20
25
30
35
40
0
10
20
30
40
50
60
p21p20p19p18p17p16
p15
p11p10p9
p6
p5p2
p1
p8
p4
p3
27 dBm55.92Freq = 5 GHz
27 dBm38.24 dBmFreq = 5 GHz
0 dBm18.29 dBFreq = 3 GHz
27 dBm38.34 dBmFreq = 3 GHz
27 dBm59.88Freq = 3 GHz
DB(|Pcomp(PORT_2,1)|)[*,X] (L, dBm)AMP_8x150_5G_NL.AP_HB
PAE(PORT_1,PORT_2)[*,X] (R)AMP_8x150_5G_NL.AP_HB
DB(PGain(PORT_1,PORT_2))[*,X] (L)AMP_8x150_5G_NL.AP_HB
p3: Freq = 3 GH z p4: Freq = 4 GH z p7: Freq = 5 GH z p8: Freq = 6 GH z p12: Freq = 7 G H z
p13: Freq = 8 G H zp14: Freq = 9 G H zp1: Freq = 3 GH z p2: Freq = 4 GH z p5: Freq = 5 GH z
p6: Freq = 6 GH z p9: Freq = 7 GH z p10: Freq = 8 G H zp11: Freq = 9 G H zp15: Freq = 3 G H z
p16: Freq = 4 G H zp17: Freq = 5 G H zp18: Freq = 6 G H zp19: Freq = 7 G H zp20: Freq = 8 G H z
p21: Freq = 9 G H z
13
Fig. 15 Power and PAE of 8- × 150-µm PA from 3 to 9 GHz, with lossy MMIC elements (28 V)
0 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930
Power (dBm)
Pcomp_8x150_Amp_5G
10
15
20
25
30
35
40
0
10
20
30
40
50
60
p21
p20p19p18
p17p16p15
p12
p11
p9
p6
p5p2
p1
p14p10
p8
p3
27 dBm47.88Freq = 5 GHz
27 dBm37.88 dBmFreq = 5 GHz
0 dBm18.63 dBFreq = 3 GHz
27 dBm37.78 dBmFreq = 3 GHz
26 dBm51.15Freq = 3 GHz
DB(|Pcomp(PORT_2,1)|)[*,X] (L, dBm)AMP_8x150_5G_NL.AP_HB
PAE(PORT_1,PORT_2)[*,X] (R)AMP_8x150_5G_NL.AP_HB
DB(PGain(PORT_1,PORT_2))[*,X] (L)AMP_8x150_5G_NL.AP_HB
p3: Freq = 3 GH z p4: Freq = 4 GH z p7: Freq = 5 GH z p8: Freq = 6 GH z p10: Freq = 7 G H z
p13: Freq = 8 G H zp14: Freq = 9 G H zp1: Freq = 3 GH z p2: Freq = 4 GH z p5: Freq = 5 GH z
p6: Freq = 6 GH z p9: Freq = 7 GH z p11: Freq = 8 G H zp12: Freq = 9 G H zp15: Freq = 3 G H z
p16: Freq = 4 G H zp17: Freq = 5 G H zp18: Freq = 6 G H zp19: Freq = 7 G H zp20: Freq = 8 G H z
p21: Freq = 9 G H z
14
Fig. 16 Power and PAE of 8- × 150-µm PA from 3 to 9 GHz, final layout EM (28 V)
0 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930
Power (dBm)
Pcomp_8x150_Amp_5G
10
15
20
25
30
35
40
0
10
20
30
40
50
60
p18p17
p16p15p14
p13p12
p11p10p9
p5
p4p2
p1
p8
p3
27 dBm45.01Freq = 5 GHz
27 dBm37.66 dBmFreq = 5 GHz
0 dBm18.83 dBFreq = 3 GHz
27 dBm37.13 dBmFreq = 3 GHz
26 dBm50.45Freq = 3 GHz
DB(|Pcomp(PORT_2,1)|)[*,X] (L, dBm)AMP_8x150_5G_NL.AP_HB
PAE(PORT_1,PORT_2)[*,X] (R)AMP_8x150_5G_NL.AP_HB
DB(PGain(PORT_1,PORT_2))[*,X] (L)AMP_8x150_5G_NL.AP_HB
p3: Freq = 3 GH z p6: Freq = 4 GH z p7: Freq = 5 GH z p8: Freq = 6 GH z p19: Freq = 7 GH z
p20: Freq = 8 GH zp21: Freq = 9 GH zp1: Freq = 3 GH z p2: Freq = 4 GH z p4: Freq = 5 GH z
p5: Freq = 6 GH z p9: Freq = 7 GH z p10: Freq = 8 GH zp11: Freq = 9 GH zp12: Freq = 3 GH z
p13: Freq = 4 GH zp14: Freq = 5 GH zp15: Freq = 6 GH zp16: Freq = 7 GH zp17: Freq = 8 GH z
p18: Freq = 9 GH z
15
Fig. 17 S- to X-band 8- × 150-µm PA simulations: MMIC (dash) vs. EM (solid)
Fig. 18 Final compact layout of 8- × 150-µm S- to X-band PA
16
4. S- and X-Band 10-W Power Amplifier
The previous 5- to 6-W S- to X-band PA design was used as the basis for parallel
combining two 8- × 150-µm HEMTs to achieve a 10-W output power goal. First,
an ideal double-tuned lossless output match for an 8- × 150-µm HEMT was
designed based on the prior ideal match to 50 ohms but translated to 100 ohms.
Then, two of these circuits were combined in parallel to create the output match to
50 ohms. Output power and PAE performance simulations for the ideal lossless S-
to X-band 2X 8- × 150-µm PA from 3 to 9 GHz are shown in Fig. 19. Efficiency
(PAE) ranges from a peak of 58% at 3 GHz, to 49% at 9 GHz, while output power
is up to 16 W (42 dBm) with an input power of 1 W (30 dBm). Once the 0.75-dB
losses of the actual MMIC matching elements are factored in, the output power is
as high as 13.2 W (41.1 dBm), falling off at 7 to 9 GHz, with an input power of 1
W (30 dBm), while PAE is a peak of 50% at 4 GHz, dropping to a peak PAE of
31% at 9 GHz. Figure 20 shows the simulated output power and PAE performance
for the S- to X-band 2X 8- × 150-µm 10-W PA with lossy MMIC matching circuits
from 3 to 9 GHz. When the MMIC layout is EM-simulated and the layouts
readjusted to get back to the prior performance, the output power ranges from 10 to
12 W from 3 to 9 GHz, while PAE ranges from 39% to 48% with an input power
of 1 W (30 dBm), as shown in Fig. 21. The small signal linear performance of the
final layout of the parallel 10-W PA versus the prior single 8- × 150-µm PA is
shown in Fig. 22. It is similar in shape but the gain is 2 to 3 dB lower than the prior
5- to 6-W PA. The small signal linear performance of the final layout (EM) is shown
in Fig. 23 and is very similar to the original MMIC linear simulation. Final layout
plot of the compact 10- to 12-W broadband 3- to 9-GHz PA is shown in Fig. 24.
Note the odd-mode stabilizing resistors between the gates and drains of the two
parallel combined 8- × 150-µm HEMTs shown in the layout of Fig. 24. An analysis
of the odd-mode stability showed a potential problem around 5.2–6.6 GHz that
could be removed with either an odd-mode resistor on the gates of less than
150 ohms or an odd-mode resistor on the drains of less than 250 ohms. To provide
margin in avoiding an odd-mode oscillation, both a 100-ohm resistor placed on the
gates and a 200-ohm resistor placed on the drains were added to the two parallel
8- × 150-µm HEMTs.
17
Fig. 19 Power and PAE of 2X 8- × 150-µm 10-W PA from 3 to 9 GHz, ideal lossless design
0 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930313233
Power (dBm)
Pcomp_8x150_Amp_5G_2X
10
15
20
25
30
35
40
45
0
10
20
30
40
50
60
70
p19p18p17p16p15p14
p13
p12p11
p7
p6p5
p2
p1
p10
p4p3
30 dBm53.87Freq = 5 GHz
30 dBm41.98 dBmFreq = 5 GHz
0 dBm18.06 dBFreq = 3 GHz
30 dBm42.14 dBmFreq = 3 GHz
30 dBm57.77Freq = 3 GHz
DB(|Pcomp(PORT_2,1)|)[*,X] (L, dBm)
AMP_8x150_5G_NL_2X.AP_HB
PAE(PORT_1,PORT_2)[*,X] (R)
AMP_8x150_5G_NL_2X.AP_HB
DB(PGain(PORT_1,PORT_2))[*,X] (L)
AMP_8x150_5G_NL_2X.AP_HBp3: Freq = 3 GHz p4: Freq = 4 GHz p8: Freq = 5 GHz p9: Freq = 6 GHz p10: Freq = 7 GHz
p20: Freq = 8 GHzp21: Freq = 9 GHzp1: Freq = 3 GHz p2: Freq = 4 GHz p5: Freq = 5 GHz
p6: Freq = 6 GHz p7: Freq = 7 GHz p11: Freq = 8 GHzp12: Freq = 9 GHzp13: Freq = 3 GHz
p14: Freq = 4 GHzp15: Freq = 5 GHzp16: Freq = 6 GHzp17: Freq = 7 GHzp18: Freq = 8 GHz
p19: Freq = 9 GHz
18
Fig. 20 Power and PAE of 2X 8- × 150-µm 10-W PA from 3 to 9 GHz, lossy MMIC PA
19
Fig. 21 Power and PAE of 2X 8- × 150-µm 10-W PA from 3 to 9 GHz, final layout EM (28 V)
20
Fig. 22 S- to X-band 2X 8- × 150-µm 10-W PA linear simulations: 1X (dash) vs. 2X (solid)
Fig. 23 S- to X-band 2X 8- × 150-µm 10-W PA simulations: MMIC (dash) vs. EM (solid)
21
Fig. 24 Final compact layout of 2X 8- × 150-µm S- to X-band 10-W PA
5. Broadband Feedback Amplifiers
A simple approach to a broadband amplifier uses feedback, typically resistive
feedback from drain to gate. Several broadband feedback amplifiers were designed
in a prior Raytheon GaN process, demonstrating excellent noise figure as well as
broadband gain. Using the two provided noise figure HEMT models for the Qorvo
0.15-µm GaN process, variations of a broadband feedback amplifier were designed.
One amplifier uses a 6- × 50-µm HEMT with resistive feedback, and the other two
designs use source inductance to create broadband LNAs. These small compact
designs are intended to be biased through an external bias tee for the drain supply.
Figure 25 shows the layouts of a 6- × 50-µm feedback amplifier using a series 450-
ohm resistor and capacitor for the feedback path, plus a 4- × 50-µm and a 4- × 65-
µm feedback amplifier that use source inductance. The 6- × 50-µm resistive
feedback amplifier simulation shows 13.5-dB gain at 0.5 GHz rolling off to 10.1-
dB gain at 7 GHz with a minimum noise figure of 1.5 dB increasing gradually to 2
dB at 7 GHz. Simulations of the 6- × 50-µm MMIC layout (solid) versus an ideal
lossless amplifier are shown in Fig. 26. Next, the simulations of the 4- × 50-µm
22
feedback amplifier show the MMIC element performance (solid) versus an ideal
lossless design in Fig. 27. The 4- × 50-µm source feedback amplifier simulation
shows 15.5-dB gain at 0.5 GHz rolling off to 10.5-dB gain at 7 GHz with a
minimum noise figure of 1.1 dB increasing gradually to 1.25 dB at 7 GHz. The
second source feedback amplifier using a slightly larger 4- × 65-µm HEMT
provides higher low-frequency gain and slightly better noise figure. Simulations of
the 4- × 65-µm feedback amplifier show the MMIC element performance (solid)
versus an ideal lossless design in Fig. 28. The 4- × 65-µm source feedback amplifier
simulation shows 17.3-dB gain at 0.5 GHz rolling off to 10.3-dB gain at 7 GHz
with a minimum noise figure of 1.0 dB increasing gradually to 1.2 dB at 7 GHz.
Fig. 25 Final compact layouts of broadband feedback amplifiers (6× 50 µm, 4× 50 µm, and
4× 65 µm)
23
Fig. 26 Simulation of 6- × 50-µm resistive feedback amplifier (MMIC [solid] vs. ideal [dot])
Fig. 27 Simulation of 4- × 50-µm source feedback amplifier (MMIC [solid] vs. ideal [dot])
24
Fig. 28 Simulation of 4- × 65-µm source feedback amplifier (MMIC [solid] vs. ideal [dot])
6. Broadband Nonuniform Distributed Amplifier
Distributed amplifiers (DAs) provide very broadband gain and decades of
bandwidth but are typically a compromise on performance when power efficiency
or low noise figure is desired. Nonuniform DAs have been explored to achieve large
bandwidth gain with better efficiencies for PAs. A nonuniform approach was
explored, but with lower noise figure as the main objective. Using the 4-finger
HEMT model with noise data, a simple uniform ideal DA was designed using 4- ×
20-µm HEMT devices. Figure 29 shows the simple ideal schematic and Fig. 30
shows the preliminary simulation with good flat 10-dB gain to nearly 30 GHz. Note
the stability problem near 40 GHz that needs to be addressed. The noise figure of
the ideal DA is almost 2 dB at its minimum and is below 2.5 dB from about 8 to
26 GHz. This initial design was retuned, allowing varying HEMT sizes resulting in
a better noise figure, below 2.5 dB from below 5 GHz up to 26 GHz with a
minimum noise figure of 1.8 dB at 8 GHz (Fig. 31). Gain of this retuned DA is
higher, and flat to 30 GHz, while stability is vastly improved. Once the ideal DA
was converted to MMIC elements, EM-simulated, and re-tuned, the final EM
25
simulations show a higher noise figure closer to 2.5-dB average over 6 to 26 GHz,
with a minimum of 2.2 dB at 8 GHz. Gain is still good, close to 10 dB to 30 GHz.
Figure 32 shows the EM simulation (solid) versus the original lossy MMIC element
nonuniform DA simulation (dotted). The final layout is shown in Fig. 33 of the
nonuniform distributed amplifier (NUDA). It should have very good gain
bandwidth but the noise figure is higher than desired at lower frequencies, below
6 GHz.
Fig. 29 Schematic of initial ideal uniform 4- × 20-µm DA
Fig. 30 Simulation of initial ideal uniform 4- × 20-µm DA
PORTP=1Z=50 Ohm
PORTP=2Z=50 Ohm
LLd=0.5
LLg=0.3
LLd2=0.24 LLd2=0.1375
LLg2=0.15
Wf=20
INDID=L4L=LLd nH
CAPID=C1C=12 pF
CAPID=C4C=12 pF
INDID=L3L=LLd2 nH
RESID=R1R=50 Ohm
CAPID=C2C=12 pF
INDID=L5L=LLd nH
INDID=L8L=LLg nH
INDID=L2L=LLd nH
INDID=L9L=LLg2 nH
INDID=L7L=LLg2 nH
INDID=L1L=LLd2 nH
INDID=L6L=LLd nH
CAPID=C3C=12 pF
INDID=L10L=LLg nH
G
D
QGAN15_ES_FET2_V2ID=LN_1416_4x25_2Wu=Wf umN=4VIA_count_per_pad=1VIA=No ShareBIAS=5V 100 mA/mm
INDID=L12L=LLg nH
G
D
QGAN15_ES_FET2_V2ID=LN_1416_4x25_3Wu=Wf umN=4VIA_count_per_pad=1VIA=No ShareBIAS=5V 100 mA/mm
INDID=L11L=LLg nH
G
D
QGAN15_ES_FET2_V2ID=LN_1416_4x25_1Wu=Wf umN=4VIA_count_per_pad=1VIA=No ShareBIAS=5V 100 mA/mm
G
D
QGAN15_ES_FET2_V2ID=LN_1416_4x25_4Wu=Wf umN=4VIA_count_per_pad=1VIA=No ShareBIAS=5V 100 mA/mm
RESID=R2R=50 Ohm
G
D
QGAN15_ES_FET2_V2ID=LN_1416_4x25_5Wu=Wf umN=4VIA_count_per_pad=1VIA=No ShareBIAS=5V 100 mA/mm
0 5 10 15 20 25 30 35 40 45 50 55 60
Frequency (GHz)
amp_damp_idl
-25
-20
-15
-10
-5
0
5
10
15
0
0.5
1
1.5
2
2.5
3
3.5
413 GHz9.85 dB
13 GHz2.044 dB
DB(|S(1,1)|) (L)
Damp_4x25_idl
DB(|S(2,1)|) (L)
Damp_4x25_idl
DB(|S(2,2)|) (L)
Damp_4x25_idl
MU1(2,1) (R)
Damp_4x25_idl
DB(NF(2,1)) (R)
Damp_4x25_idl
26
Fig. 31 Simulation of re-tuned ideal NUDA
Fig. 32 EM simulation (solid) of nonuniform MMIC DA
27
Fig. 33 Layout of NUDA
7. Conclusions
Multiple MMIC designs were submitted to an ARL Qorvo 0.15-µm GaN prototype
wafer option to demonstrate the performance, bandwidth, capability, versatility,
and applicability of GaN for compact, efficient microwave circuit designs—
particularly for air and missile defense radars, but also applicable to EW, network
communications, and efficient amplifiers for future radio and communications
networks.
The designs described in this report are not the only designs in fabrication, nor the
only MMIC designs targeted for radar applications. Those designers are expected
to document these other designs in current and future reports. Some of the LNAs
and PAs built upon prior work with Raytheon, which has a high-performance in-
house GaN process. Future reports will document the testing and characterization
of the designs that are expected to be fabricated and returned 3–4 months after
commitment to the mask submission, which was completed in mid-September
2019.
28
The III/V design team has developed a full reticle of creative high-performance
circuits that were submitted to fabrication in Qorvo’s 0.15-µm commercial GaN
process.2
29
8. References
1. Penn JE, Darwish A. Broadband low noise gallium nitride (GaN) amplifiers
for next-generation radars. Adelphi (MD): Adelphi (US); 2017 Nov. Report
No.: ARL-TR-8208.
2. Penn J, Darwish A, Hawasli S, McKnight K, Hawasli S. Gallium nitride high-
electron-mobility transistor (HEMT) monolithic microwave integrated circuit
(MMIC) designs submitted for Qorvo prototype wafer option (PWO)
fabrication. Adelphi (MD): CCDC Army Research Laboratory (US); 2019
Sep. Report No.: ARL-TR-8811.
30
List of Symbols, Abbreviations, and Acronyms
ARL Army Research Laboratory
CCDC US Army Combat Capabilities Development Command
DA distributed amplifier
DC direct current
EM electromagnetic
EW electronic warfare
GaN gallium nitride
HEMT high-electron mobility transistor
LNA low-noise amplifier
MMIC monolithic microwave integrated circuit
NUDA nonuniform distributed amplifier
PA power amplifier
PAE power-added efficiency
PDK process design kit
Q quality factor
31
1 DEFENSE TECHNICAL
(PDF) INFORMATION CTR
DTIC OCA
1 CCDC ARL (PDF) FCDD RLD CL
TECH LIB
11 CCDC ARL
(PDF) FCDD RLS R
(1 HC) P AMIRTHARAJ
FCDD RLS RE
R DEL ROSARIO
A DARWISH
T IVANOV
P GADFORT
S HAWASLI K KINGKEO
K MCKNIGHT
J PENN (1 HC)
J WILSON
FCDD RLS RW
E VIVEIROS