Lecture 4

Basic Instructions

Dr. Dimitrios S. Nikolopoulos

CSL/UIUC

Outline

• Declarations• Moving data• The flags register• Logic instructions• Addition&subtraction

Declarations

SEGMENT code

myvar1 DW 1234h ; define word variable; value=1234h

myvar2 DW 1234 ; define word variable; value=1234d=4D2h

myvar3 RESW ; define word variable; value not specified

myvar4 DW 0ABCDh ; define word variable; value = ABCDh; note the leading zero

ece291msg DB “ECE291 is great!”; define strings as series of bytes; this is not one byte but 16!

..start ; denotes execution starting point

It’s all bytes stored in memory

CS – Code segment begins

CS:IP

121 3404 D200 00AB CD

43 = ‘C’ 45 = ‘E’32 = ‘2’ 45 = ‘E’31 = ‘1’ 39 = ‘9‘69 = ‘i‘ 20 = ‘ ’

3

5

7

9

B

D

F

0

2

4

6

8

A

C

E‘ ’11 73 = ‘s’

72 = ‘r’ 67 = ‘g’61 = ‘a’ 65 = ‘e’21 = ‘!’ 74 = ‘t’

?? ???? ???? ???? ??

13

15

17

19

1B

1D

1F

10

12

14

16

18

1A

1C

1E

myvar1

myvar2

myvar3

myvar4

ece291msg

Moving data

mov ax, csmov ax, cs ; make data seg same as code seg; make data seg same as code seg

mov ds, axmov ds, ax

mov ax, [myvar2]mov ax, [myvar2] ; move value of myvar2 to ax; move value of myvar2 to ax

; same as mov ax, [2]; same as mov ax, [2]

; ax now contains 04D2h; ax now contains 04D2h

mov si, myvar2mov si, myvar2 ; si now points to myvar2; si now points to myvar2

; it contains 0002h; it contains 0002h

mov ax, [si]mov ax, [si] ; move value pointed to by si to ; move value pointed to by si to axax

; ax again contains 04D2h; ax again contains 04D2h

; this was an indirect reference; this was an indirect reference

Moving Data

mov bx, ece291msgmov bx, ece291msg ; bx now points to the beginning ; bx now points to the beginning ofof

; out “ECE291 is great” string.; out “ECE291 is great” string.

; bx points to the first ‘E’; bx points to the first ‘E’

; bx contains 0008h; bx contains 0008h

dec byte [bx + 1]dec byte [bx + 1] ; new instruction! arg = arg – 1; new instruction! arg = arg – 1

; Just changed the C in “ECE” to a ; Just changed the C in “ECE” to a BB

mov si, 1mov si, 1 ; now lets use SI as an index; now lets use SI as an index

inc byte [ece291msg + si]inc byte [ece291msg + si] ; new instruction! arg = arg + 1; new instruction! arg = arg + 1

; evaluates to inc [8 + 1] = inc ; evaluates to inc [8 + 1] = inc [9][9]

; B becomes a C again!; B becomes a C again!

Moving Data; Memory can be addressed using four registers only!!!; Memory can be addressed using four registers only!!!

; SI -> offsets from DS; SI -> offsets from DS

; DI -> offsets from DS; DI -> offsets from DS

; BX -> offsets from DS; BX -> offsets from DS

; BP -> offsets from SS

mov ax, [bx]mov ax, [bx] ; ax = word in memory pointed to by bx; ax = word in memory pointed to by bx

mov al, [bx]mov al, [bx] ; al = byte in memory pointed to by bx; al = byte in memory pointed to by bx

mov ah, [si]mov ah, [si] ; ah = byte in memory pointed to by si; ah = byte in memory pointed to by si

mov cx, [di]mov cx, [di] ; cx = word in memory pointed to by di; cx = word in memory pointed to by di

mov ax, [bp]mov ax, [bp] ; ax = [SS:BP] Stack Operation!; ax = [SS:BP] Stack Operation!

; In addition, BX + SI, BX + DI, BP + SI, and BP + DI are ; In addition, BX + SI, BX + DI, BP + SI, and BP + DI are allowedallowed

mov ax, [bx + si]mov ax, [bx + si] ; ax = [ds:bx+si]; ax = [ds:bx+si]

mov ch, [bp + di]mov ch, [bp + di] ; ch = [ss:bp+di]; ch = [ss:bp+di]

Moving Data

; Furthermore, a fixed 8- or 16-bit displacement can be added; Furthermore, a fixed 8- or 16-bit displacement can be added

mov ax, [23h]mov ax, [23h] ; ax = word at [DS:23h]; ax = word at [DS:23h]

mov ah, [bx + 5]mov ah, [bx + 5] ; ah = byte at [DS:bx+5]; ah = byte at [DS:bx+5]

mov ax, [bx + si + 107]mov ax, [bx + si + 107] ; ax = word at [DS:bx+si+107]; ax = word at [DS:bx+si+107]

mov ax, [bp + di + 42]mov ax, [bp + di + 42] ; ax = word at [; ax = word at [SSSS:bp+di+42]:bp+di+42]

; Remember that memory to memory moves are illegal!; Remember that memory to memory moves are illegal!

mov [bx], [si]mov [bx], [si] ; BAD BAD BAD; BAD BAD BAD

mov [di], [si]mov [di], [si] ; BAD BAD BAD; BAD BAD BAD

; Special case with stack operations; Special case with stack operations

pop word [myvar]pop word [myvar] ; moves data from top of stack to; moves data from top of stack to; memory variable myvar; memory variable myvar

Flags register

• The flags register is a collection of bits that determines the state of the processor after an operation

• Flag bits change after arithmetic and logic instructions (e.g. carry, overflow, zero, sign, parity)

• 9 out of the 16 bits of the FLAGS register have meaning in the 8086, 11 out of the 32 bits in the EFLAGS register of the 80386, and 12 out of the 32 bits in the EFLAGS register of the 80486 and higher

Flags register

8086, 8088, 801868086, 8088, 80186

8028680286

80386, 80486DX80386, 80486DX

80486SX80486SX

AC AC (Alignment check)(Alignment check)(VM)(VM) Virtual mode Virtual mode

(RF)(RF) Resume Resume

(NT)(NT) Nested task Nested task(IOPL)(IOPL) Input/output Input/output

privilege levelprivilege level(O)(O) Overflow Overflow(D)(D) Direction Direction

(I)(I) Interrupt Interrupt(T)(T) Trace Trace(S)(S) Sign Sign(Z)(Z) Zero Zero

(A)(A) Auxiliary Carry Auxiliary Carry(P)(P) Parity Parity(C)(C) Carry Carry

Logic instructions

• NOT, AND, OR, XORNOT A = ~AAND A,B = A& =BOR A,B=A |= BXOR A,B ^= A• NOT does not affect any flags• The other instructions affect

– C (carry flag, they clear it)– O (overflow flag, they clear it)– Z (zero flag, they set it if result is 0)– S (sign flag, takes the high order bit of the result)– P (parity, number of 1’s in the result)– A (auxiliary carry flag)

Examples of logic instructions

1100 1010NOT AL

AL

0011 0101AL

ALBL

0011 01010110 1101

AND AL, BL0010 0101AL

ALBL

0011 01010110 1101

OR AL, BL0111 1101AL

ALBL

0011 01010110 1101

XOR AL, BL0101 1000AL

ALBL

0011 01010000 1111

AND AL, BL0000 0101AL

ALBL

0011 01010000 1111

OR AL, BL0011 1111AL

Practical uses of AND/OR instructions

• Apply a bit mask to data– Masks are used to force certain bits to specific values

• Example– In x86 operating systems virtual memory is organized in

pages, I.e. chunks of 4096 (1000h) consecutive bytes, aligned with an address which is an integer multiple of the page size

– Find the beginning of the page that contains address B9A2C07Eh

– Mask=page_size = 1000h– AND B9A2C07E, mask = B9A2C000

The TEST instruction

• TEST is a non-destructive version of AND– Logically AND two operands like AND– Modify FLAG bits like AND– Doesn’t modify the contents of the destination– TEST AL,1 sets flags like AND AL,1 but does not modify AL– Useful in jump instructions

Shift left

• Syntax SHL reg, count (immediate)

SHL reg, CL (count in register)• Moves the left operand a bit position to the left as

many times as specified by count or CL • The empty positions are filled with 0’s• The higher order bit is stored in the C flag• The most efficient way to multiply by 2!• 8086 and 8088 had immediate shl by 1 instructions

0RegisterC

SHL

Example

; Pack the lower nibbles from AH and AL into a single byte in AL

; for example AH = 0110 1101 and AL = 1010 0111

and al, 0Fh ; clears upper nibble in AL

; AL = 0000 0111

shl ah, 4 ; Moves lower nibble in AH up

; AH = 1101 0000

or al, ah ; combines nibbles

; AL = 1101 0111

; Mission accomplished

Shift rightShift right

• Syntax Syntax SHR reg, count (immediate)SHR reg, count (immediate)

SHR reg, CL (count in register)SHR reg, CL (count in register)• Moves the left operand a bit position to the right as Moves the left operand a bit position to the right as

many times as specified by count or CL many times as specified by count or CL • The empty positions are filled with 0’sThe empty positions are filled with 0’s• The lower order bit is stored in the C flagThe lower order bit is stored in the C flag• The most efficient way to divide by 2!The most efficient way to divide by 2!• 8086 and 8088 had immediate shr by 1 instructions8086 and 8088 had immediate shr by 1 instructions

Register CSHR

Shift arithmetic right

• Syntax: SAR reg, count

SAR reg, CL• Moves each bit of the operant one position to the

right as many times as specified by count/CL• Lower order bit shifts to the carry flag• High order bit is replicated

Register CSAR

Shift arithmetic right

• Main purpose is to perform a signed division by some power of twoMOV AX, -15

SAR AX, 1 ; result = -8

• In 80286 and later SAR can be used to sign extend one register into anotherMOV AH, AL ; assume AL = 1111 0001

SAR AH, 7 ; AX = 1111 1111 1111 0001

Rotate through carry L/R

• Syntax: RCL reg, count (immediate)

RCL reg, CL (count in register)• Rotate bits to the left through the carry flag• Bit in the carry flag is written back to bit 0• Syntax: RCR reg, count (immediate)

RCR reg, CL (count in register)• Rotate bits to the right through the carry flag• Bit in the carry flag is written back to H.O. bit

RCL RCR

Rotate left/rightRotate left/right

• Syntax:Syntax: ROL reg, count (immediate)ROL reg, count (immediate)

ROL reg, CL (count in register)ROL reg, CL (count in register)• Rotate bits to the left Rotate bits to the left • H.O. bit goes to the L.O. bit and the carry flagH.O. bit goes to the L.O. bit and the carry flag• Syntax:Syntax: ROR reg, count (immediate)ROR reg, count (immediate)

ROR reg, CL (count in register)ROR reg, CL (count in register)• Rotate bits to the right Rotate bits to the right • L.O. bit goes to the H.O. bit and the carry flagL.O. bit goes to the H.O. bit and the carry flag

ROL ROR

Example

mov ax,3mov ax,3 ; Initial register values; Initial register values AX = 0000 0000 0000 AX = 0000 0000 0000 00110011

mov bx,5mov bx,5 ;; BX = 0000 0000 0000 BX = 0000 0000 0000 01010101

or ax,9or ax,9 ; ax <- ax | 0000 1001; ax <- ax | 0000 1001 AX = 0000 0000 0000 AX = 0000 0000 0000 10111011

and ax,10101010band ax,10101010b ; ax <- ax & 1010 1010; ax <- ax & 1010 1010 AX = 0000 0000 0000 AX = 0000 0000 0000 10101010

xor ax,0FFhxor ax,0FFh ; ax <- ax ^ 1111 1111; ax <- ax ^ 1111 1111 AX = 0000 0000 1111 AX = 0000 0000 1111 01010101

neg axneg ax ; ax <- (-ax); ax <- (-ax) AX = 1111 1111 0000 AX = 1111 1111 0000 10111011

not axnot ax ; ax <- (~ax); ax <- (~ax) AX = 0000 0000 1111 AX = 0000 0000 1111 01000100

Or ax,1Or ax,1 ; ax <- ax | 0000 0001; ax <- ax | 0000 0001 AX = 0000 0000 1111 AX = 0000 0000 1111 0101 0101

shl ax,1shl ax,1 ; logical shift left by 1 bit; logical shift left by 1 bit AX = 0000 0001 1110 AX = 0000 0001 1110 10101010

shr ax,1shr ax,1 ; logical shift right by 1 bit; logical shift right by 1 bit AX = 0000 0000 1111 AX = 0000 0000 1111 01010101

ror ax,1ror ax,1 ; rotate right (LSB=MSB); rotate right (LSB=MSB) AX = 1000 0000 0111 AX = 1000 0000 0111 10101010

rol ax,1rol ax,1 ; rotate left (MSB=LSB); rotate left (MSB=LSB) AX = 0000 0000 1111 AX = 0000 0000 1111 01010101

mov cl,3mov cl,3 ; Use CL to shift 3 bits; Use CL to shift 3 bits CL = 0000 0011CL = 0000 0011shr ax,clshr ax,cl ; Divide AX by 8; Divide AX by 8 AX = 0000 0000 0001 AX = 0000 0000 0001

11101110mov cl,3mov cl,3 ; Use CL to shift 3 bits; Use CL to shift 3 bits CL = 0000 0011CL = 0000 0011shl bx,clshl bx,cl ; Multiply BX by 8; Multiply BX by 8 BX = 0000 0000 0010 BX = 0000 0000 0010

10001000

Addition

• Syntax: ADD A,B– A, B can be register or memory, but not both memory– B can also be immediate data

• Examples– ADD AX, BX ; register addition– ADD AX, 5h ; immediate addition– ADD [BX],AX ; addition to memory location– ADD AX,[BX] ; memory location added to register– ADD DI,MYVAR ; memory offset added to the

register

• Flags modified: S, C, Z, O, A, P

Example; multiply AX by the decimal 10 (1010b)

; (multiply by 2 and 8, then add results)

shl ax, 1 ; AX x 2

mov bx, ax ; save 2AX

shl ax, 2 ; 2 x (original AX) x 4 = 8 x (orig AX)

add ax, bx ; 2AX + 8AX = 10AX

; multiply AX by decimal 18 (10010b)

; (multiply by 2 and 16, then add results)

shl ax, 1 ; AX x 2

mov bx, ax ; save 2AX

shl ax, 3 ; 2AX x 2 x 2 x 2 = 16AX

add ax, bx ; 2AX + 16AX = 18AX

Increment

• Syntax: INC A– A can be register or memory location

• Examples:– INC AX ; AX=AX+1– INC byte[BX] ; memory location increased by 1– INC word[BX] ; memory location increased by 1

• Flags modified: S, Z, O, A, P• But not the carry flag!

Add with carry

• Syntax: ADC A,B– A, B can be registers or memory– B can also be immediate

• Function: A = A + B + carry flag• Used to add numbers larger than 16 bits (in 16-bit

mode) or larger than 32 bits in (32-bit mode)• Examples

– ADD AX,CX ; produces a 32-bit sum– ADC BX,DX ; of BX:AX + DX:CX -> BX:AX

• Flags modified: S,C,A,Z,O,P

Subtraction

• Syntax: SUB A,B– A, B can be register or memory (not both memory)– B can be immediate

• Function: A=A-B– Carry flag is interpreted as a borrow request from H.O. bit

• Flags modified S,C,A,Z,P,O• Example:

MOV CH, 22h SUB CH, 34h ; result = -12h, S=1 (negative), Z=0, C=1

; (borrow from high order bit), P=0 (even ; parity)

Decrement

• Syntax: DEC A– A can be register or memory

• Function: A=A-1• Examples

– DEC AX ; AX=AX-1– DEC BYTE [BX]; memory location decreased by 1– DEC WORD [BX] ; memory location decreased by 1

• Flags modified: S,A,Z,P,O• Carry flag not modified!

Subtract with borrow

• Syntax: SBB A,B– A, B can be register or memory (not both memory)– B can be immediate

• Function: A=A - B - carry flag– Used to subtract numbers which are wider than 16 bits (in

16-bit mode) or wider than 32 bits (in 32-bit mode)

• Flags modified S,C,A,Z,P,O• Examples:

SUB AX, DI ; this subtracts the 32-bit numbers

SBB BX, SI ; BX:AX-SI:DI -> BX:AX

The carry flag

• Indicates a carry in the H.O. bit after addition or a borrow after subtraction

• Carry is set when an unsigned number goes out of range

• Example (8 bits)– FFh + 1h = 00h with C=1– 02h – 03h = FFh with C=1

The overflow flag

• Condition set when signed numbers go out of range• Example (8 bits)

– 7Fh + 1h = 80h (wanted +128 but got –128)– 80h – 1h = 7Fh (wanted –127 but got +127)

Overflows and carries

mov ax,0fffehmov ax,0fffeh ; 65534 interpreted as unsigned; 65534 interpreted as unsignedadd ax,3 add ax,3 ; C = 1, O = 0 --- ; C = 1, O = 0 --- Unsigned Overflow ConditionUnsigned Overflow Condition

mov ax,0FFFEh mov ax,0FFFEh ; -2 interpreted as signed; -2 interpreted as signedadd ax,3add ax,3 ; C = 1, O = 0 --- ; C = 1, O = 0 --- Okay as signedOkay as signed

mov bx,07FFFhmov bx,07FFFh ; 32767 interpreted as signed; 32767 interpreted as signedadd bx,1add bx,1 ; C = 0, O = 1 --- ; C = 0, O = 1 --- Signed Overflow ConditionSigned Overflow Condition

mov bx,07FFFhmov bx,07FFFh ; 32767 interpreted as unsigned; 32767 interpreted as unsignedadd bx,1add bx,1 ; C = 0, O = 1 --- ; C = 0, O = 1 --- Okay as unsignedOkay as unsigned

mov ax,07hmov ax,07h ; 7 interpreted as either signed or unsigned; 7 interpreted as either signed or unsignedadd ax,03hadd ax,03h ; C = 0, O = 0 --- ; C = 0, O = 0 --- Okay as eitherOkay as either