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Lecture #3 BJT Transistors & DC Biasing Instructor: Dr. Ahmad El-Banna November 2014 J-601-1448 Electronic Principals Integrated Technical Education Cluster At AlAmeeria © Ahmad El-Banna

Lecture #3 BJT Transistors & DC Biasing

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Page 1: Lecture #3 BJT Transistors & DC Biasing

Lecture #3 BJT Transistors & DC Biasing Instructor: Dr. Ahmad El-Banna N

ov

em

ber

2014

J-601-1448 Electronic Principals

Integrated Technical Education Cluster At AlAmeeria‎

© A

hmad

El-B

anna

Page 2: Lecture #3 BJT Transistors & DC Biasing

Agenda

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Transistor Construction & Operation

Transistor Configurations

Transistor Testing & Terminal Identification

Transistor DC Bias Configurations

Design Operations

Various BJT Circuits &Troubleshooting Techniques

Practical Applications

Page 3: Lecture #3 BJT Transistors & DC Biasing

Transistor Construction

• Basic BJT Constructions

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• Basic BJT symbols and Currents

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Transistor Operation

• Basic Operation using pnp transistor.

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• Majority and minority carrier flow of a pnp transistor.

• Biasing a transistor: (a) forward-bias (b) reverse-bias.

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Page 5: Lecture #3 BJT Transistors & DC Biasing

BJT CONFIGURATIONS

• Common Base

• Common Emitter

• Common Collector

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Configurations: Common Base

• Notation and symbols used with the common-base configuration: (a) pnp transistor; (b) npn transistor.

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• Input or driving point characteristics for a common-base silicon transistor amplifier.

• Output or collector characteristics for a common-base transistor amplifier.

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Page 7: Lecture #3 BJT Transistors & DC Biasing

Configurations: Common Base..

• Formulas:

7

• Biasing of a CB pnp tr. in the active region:

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Page 8: Lecture #3 BJT Transistors & DC Biasing

Configurations: Common Emitter

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• Notation and symbols used with the common-emitter configuration: (a) pnp transistor

(b) npn transistor.

• Characteristics of a silicon transistor in the common-emitter configuration:

(a) collector characteristics

(b) base characteristics.

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Page 9: Lecture #3 BJT Transistors & DC Biasing

Configurations: Common Emitter..

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• Formulas:

• Biasing of a CE npn tr. in the active region:

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Page 10: Lecture #3 BJT Transistors & DC Biasing

Configurations: Common Collector

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• Notation and symbols used with the common-collector configuration: (a) pnp transistor; (b) npn transistor.

• Common-collector configuration used for impedance-matching purposes. J-6

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Configurations: Common Collector..

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• Defining the linear (undistorted) region of operation for a transistor.

• Formulas:

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Page 12: Lecture #3 BJT Transistors & DC Biasing

PRACTICAL VIEW

• Transistor Spec. Sheets

• Transistor Testing

• Transistor Casing and terminals identification

• Transistor Development

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Page 13: Lecture #3 BJT Transistors & DC Biasing

Transistor Specification Sheets

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Transistor Specification Sheets..

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Page 15: Lecture #3 BJT Transistors & DC Biasing

Transistor Testing using Curve Tracer

15 • Check the beta value:

Curve tracer response to 2N3904 npn transistor.

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Page 16: Lecture #3 BJT Transistors & DC Biasing

Transistor Testing using Transistor Tester

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• Transistor testers: (a) digital meter (b) dedicated testers.

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Page 17: Lecture #3 BJT Transistors & DC Biasing

Transistor Testing using Ohmmeter

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• Checking the forward-biased base-to-emitter junction of an npn transistor.

• Checking the reverse-biased base-to-collector junction of an npn transistor.

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Page 18: Lecture #3 BJT Transistors & DC Biasing

Transistor Casing

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• Various types of general-purpose or switching transistors: (a) low power (b) medium power (c) medium to high power.

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Page 19: Lecture #3 BJT Transistors & DC Biasing

Terminal Identification

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• Transistor terminal identification.

• Internal construction of a Fairchild transistor in a TO-92 package.

• Type Q2T2905 Texas Instruments quad pnp silicon transistor: (a) Appearance (b) pin connections.

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Page 20: Lecture #3 BJT Transistors & DC Biasing

TRANSISTOR DC BIAS CONFIGURATIONS

• Fixed-Bias Configuration

• Voltage-Divider Bias Configuration

• Emitter-Follower Configuration

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• Biasing means applying of dc voltages to establish a fixed level of current and voltage. >>> Q-Point

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Page 21: Lecture #3 BJT Transistors & DC Biasing

Fixed-Bias Configuration

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• Fixed-bias circuit. • DC equivalent ct.

• Base–emitter loop. • Collector–emitter loop.

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Page 22: Lecture #3 BJT Transistors & DC Biasing

Fixed-Bias Configuration Example

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Page 23: Lecture #3 BJT Transistors & DC Biasing

Fixed-Bias Configuration ...

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• Load Line Analysis

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Saturation Current

Page 24: Lecture #3 BJT Transistors & DC Biasing

Voltage-Divider Configuration

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• Exact Analysis • Voltage-divider bias configuration.

• DC components of the voltage-divider configuration.

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Page 25: Lecture #3 BJT Transistors & DC Biasing

Voltage-Divider Configuration

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• Approximate Analysis • Transistor Saturation

• Load-Line Analysis

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Page 26: Lecture #3 BJT Transistors & DC Biasing

Voltage-Divider Configuration Example

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Page 27: Lecture #3 BJT Transistors & DC Biasing

Emitter-Follower Configuration

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i/p ct

o/p ct

• dc equivalent ct

• Common-collecter (emitter-follower) configuration.

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Page 28: Lecture #3 BJT Transistors & DC Biasing

Summary Table

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Page 29: Lecture #3 BJT Transistors & DC Biasing

Summary Table..

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Page 30: Lecture #3 BJT Transistors & DC Biasing

DESIGN OPERATION 30

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Design Operations

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• The design process is one where a current and/or voltage may be specified and the elements required to establish the designated levels must be determined.

• The design sequence is obviously sensitive to the components that are already specified and the elements to be determined. If the transistor and supplies are specified, the design process will simply determine the required resistors for a particular design.

• Once the theoretical values of the resistors are determined, the nearest standard commercial values are normally chosen and any variations due to not using the exact resistance values are accepted as part of the design.

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Page 32: Lecture #3 BJT Transistors & DC Biasing

Design Operations Example

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Page 33: Lecture #3 BJT Transistors & DC Biasing

VARIOUS BJT CIRCUITS

• MULTIPLE BJT NETWORKS

• CURRENT MIRRORS

• CURRENT SOURCE CIRCUITS • Bipolar Transistor Constant-Current Source

• Transistor/Zener Constant-Current Source

• PNP TRANSISTORS

• TRANSISTOR SWITCHING NETWORKS

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Page 34: Lecture #3 BJT Transistors & DC Biasing

MULTIPLE BJT NETWORKS

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• R–C coupling

• Darlington configuration

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Page 35: Lecture #3 BJT Transistors & DC Biasing

CURRENT MIRRORS

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Page 36: Lecture #3 BJT Transistors & DC Biasing

CURRENT SOURCE CIRCUITS

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• Bipolar Transistor Constant-Current Source

• Transistor/Zener Constant-Current Source

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Page 37: Lecture #3 BJT Transistors & DC Biasing

pnp

TRANSISTORS

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TRANSISTOR SWITCHING NETWORKS

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Page 38: Lecture #3 BJT Transistors & DC Biasing

TRANSISTOR SWITCHING NETWORKS..

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Page 39: Lecture #3 BJT Transistors & DC Biasing

TROUBLESHOOTING TECHNIQUES 39

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Page 40: Lecture #3 BJT Transistors & DC Biasing

TROUBLESHOOTING TECHNIQUES • For an “on” transistor, the voltage VBE should be in the neighborhood of 0.7 V.

• For the typical transistor amplifier in the active region, VCE is usually about 25% to 75% of VCC .

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Page 41: Lecture #3 BJT Transistors & DC Biasing

PRACTICAL APPLICATION

• BJT Diode Usage and Protective Capabilities

• Relay Driver

• Alarm System with a CCS

• Voltage Level Indicator

• Logic Gates

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Page 42: Lecture #3 BJT Transistors & DC Biasing

Practical Application

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• BJT Diode Usage and Protective Capabilities

• Relay Driver

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Page 43: Lecture #3 BJT Transistors & DC Biasing

Practical Application…

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• Alarm System with a CCS

• Voltage Level Indicator

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Page 44: Lecture #3 BJT Transistors & DC Biasing

Practical Application….

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• Logic Gates

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Page 45: Lecture #3 BJT Transistors & DC Biasing

• For more details, refer to:

• Chapter 3 & 4, Electronic Devices and Circuits, Boylestad.

• The lecture is available online at:

• https://speakerdeck.com/ahmad_elbanna

• For inquires, send to:

[email protected]

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