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This information is subject to change without notice.© Keysight Technologies, 2016Published in USA, January 27, 20165992-1320EN
Keysight Technologies PAM-4 Simulation to Measurement Validation with Commercially Available Software and Hardware
White Paper
This white paper was first published at DesignCon in January, 2016. Reprinted with permission from DesignCon.
DesignCon 2016
PAM-4 Simulation to Measurement Validation with Commercially
Available Software and Hardware
Lieven Decrock, TE Connectivity [email protected]
Chad Morgan, TE Connectivity [email protected]
Rutger Smink, TE Connectivity [email protected]
Fangyi Rao, Keysight Technologies [email protected]
Heidi Barnes, Keysight Technologies [email protected]
Joris Van Kerrebrouck, University of Ghent [email protected]
Timothy De Keulenaer, University of Ghent [email protected]
Xin Yin, University of Ghent [email protected]
Johan Bauwelinck, University of Ghent [email protected]
Abstract Next-generation of OIF and IEEE signaling standards are seriously considering PAM-4 signaling at 56 Gb/s over electrical channels. To exploit the advantages of PAM-4 signaling, a new measurement and simulation eco-system must be established and validated. Simulation of PAM-4 signals are done with an IBIS-AMI signal generator, an S-parameter channel model, and remote access software for receiver data recovery. Measured data is from commercially available PAM-4 generators, QSFP28 Ethernet cable assemblies, and digital oscilloscope receivers with specialized waveform processing. This paper will present correlation data to validate the software and hardware tools necessary for fast-track deployment in upcoming PAM-4 applications.
Authors Biography
Lieven Decrock was born in Roeselare, Belgium in 1974. He received his M.Sc. degree in electro-mechanical engineering from the University of Leuven in 1996 and obtained an MSc degree in Electromagnetic Compatibility and Radio Communications from the University of York (UK) in 2004.
Lieven has been with TE Connectivity Belgium since 1996. He started as a mechanical engineer for coaxial connectivity solutions and evolved to now be a signal integrity engineer and technologist. As signal integrity engineer, he has been involved in the development of a lot of high-speed connectors and cable assemblies. Applications can be found in the consumer, automotive, wireless, server and datacenter space. As a technologist, he is working on the edge of electrical and optical systems, helping to define the solutions for the next system generations. He is also highly involved in the development of the fastest electrical links, looking at 25Gbps and 40Gbps systems. Lieven combines customer requirements and internal specifications, using software tools to simulate and hardware to validate, delivering a product fulfilling the SI and EMI requirement from the customers. His main interest is the interaction between mechanics and high-speed data links.
Heidi Barnes is a Senior Application Engineer for High Speed Digital applications in the EEsof EDA Group of Keysight Technologies, a spin-off of Agilent Technologies. Past experience includes over 6 years in signal integrity for ATE test fixtures for Verigy, an Advantest Group, and 6 years in RF/Microwave microcircuit packaging for Agilent Technologies. She rejoined Agilent Technologies in 2012, and holds a Bachelor of Science degree in electrical engineering from the California Institute of Technology.
Chad Morgan earned his degree in Electrical Engineering from the Pennsylvania State University, University Park, in 1995. For the past 20 years, he has worked for TE Connectivity, specializing in the analysis & design of high-speed, high-density components. As a Senior Principal Engineer, he has focused on signal integrity work such as the high frequency measurement & characterization of components & materials, full-wave electromagnetic modeling of high-speed interconnects, and the simulation of digital systems. Currently, Mr. Morgan is Engineering Manager of the U.S. Advanced Technology group of the Data & Devices business unit at TE Connectivity. He is a Distinguished Innovator with numerous patents, and he has presented a number of award-winning papers at trade shows such as DesignCon and the International Microwave Symposium.
Rutger W. Smink was born in Wijnandsrade, The Netherlands on July 3, 1980. He received his M.Sc. and Ph.D. degrees in electrical engineering from the Eindhoven University of Technology, Eindhoven, The Netherlands, in 2004 and 2008, respectively (both cum laude).
Since 2008 he has been with TE Connectivity's Hertogenbosch, The Netherlands, where he held a position as antenna engineer and later on as signal integrity engineer for both the electrical and optical domain. His current research interests include the electromagnetic analysis of wave propagation along electrical connector systems and optical waveguides.
Fangyi Rao is a master R&D engineer at Keysight Technologies. He received his Ph.D. degree in theoretical physics from Northwestern University. He joined Agilent/Keysight EEsof in 2006 and works on Analog/RF and SI simulation technologies in ADS. From 2003 to 2006 he was with Cadence Design Systems, where he developed SpectreRF Harmonic Balance technology and perturbation analysis of nonlinear circuits. Prior to 2003 he worked in the areas of EM simulation, nonlinear device modeling, and medical imaging.
Joris Van Kerrebrouck was born in Ghent, Belgium in 1989. He received the master degree in applied electrical engineering from Ghent University, Belgium, in 2014. In 2014, he joined the INTEC Design laboratory part of the department of information technology at Ghent University, where he pursues the PhD. degree, working on high speed electrical transceivers. His current fields of interest are high-speed SiGe BiCMOS analog circuits and systems.
Timothy De Keulenaer is a Postdoctoral Researcher at INTEC. He was born in Mortsel, Belgium, in 1987. He received the bachelor and master degree in applied electronics from Ghent University, Ghent, Belgium, in 2008 and 2010 respectively and has from then on been working at the INTEC Design laboratory part of the department of information technology at Ghent University. There he received the PhD degree in applied electrical engineering in June 2015. His research focuses on high speed integrated circuit design and signal integrity aspects for backplane communication and is currently working on the development of a duo-binary transceiver chipset aiming at serial data rates up to 112Gbps as part of the BiFAST project.
Xin Yin received the B.E. and M.Sc. degrees in electronics engineering from the Fudan University, Shanghai, China, in 1999 and 2002, respectively, and the Ph.D. degree in applied sciences, electronics from Ghent University, Ghent, Belgium, in 2009. Since 2007, he has worked as a staff researcher in IMEC-INTEC and since 2013 he has been a professor in the INTEC department at Ghent University. He is active in European and International projects such as DISCUS, Phoxtrot, MIRAGE, SPIRIT and GreenTouch consortium. His current research interests include high-speed and high-sensitive opto-electronic circuits and subsystems, with emphasis on burst-mode receiver and CDR/EDC for optical access networks, and low-power mixed-signal integrated circuit design for telecommunication applications. He led a team which won the GreenTouch 1000x award together with Bell Labs/Alcatel-Lucent and Orange Labs in Nov. 2014 and he is a member of the 2015 ECOC technical program committee.
Johan Bauwelinck was born in Sint-Niklaas, Belgium, in 1977. He received the Ph.D. degree in applied sciences, electronics from Ghent University, Belgium in 2005. Since Oct. 2009, he is a professor in the INTEC department at the same university and since 2014 he is leading the INTEC Design group. He also became a guest professor at iMinds in the same year and in Nov. 2014, the Design group was awarded the 3rd biannual Greentouch 1000x award together with Bell Labs/Alcatel-Lucent and Orange Labs.
His research focuses on high-speed, high-frequency (opto-) electronic circuits and systems, and their applications on chip and board level, including transmitter and receiver analog front-ends for wireless, wired and fiber-optic communication or instrumentation systems. He was and is active in the EU-funded projects GIANT, POWERNET, PIEMAN, EuroFOS, C3-PO, Mirage, Phoxtrot, Spirit and Flex5Gware conducting research on high speed burst-mode electronics for next generation PONs and low-power driver electronics for transport, metro, access, datacenter and radio-over-fiber networks. He was a member of the ECOC technical program committee and he co-authored more than 150 publications and 10 patents in the field of high-speed electronics and fibre-optic communication.
1 Introduction
The next-generation of signaling standards, as developed by OIF and IEEE, are seriously considering the usage of PAM-4 signaling at 56 Gb/s over electrical channels.[1] The ability to increase the data rate without enhancing the hardware channel has significant hardware cost advantages. New Tx and Rx technologies are already showing viability for PAM-4 end-to-end links. To fully exploit the advantages of PAM-4 signaling, a new measurement and simulation eco-system must also be established and validated.
Simulation and measurement both have challenges in generation, receiving, and analysis of multi-level signaling. Simulation and measurement often overlap in the area of sampling theory and the post processing required for data analysis. This paper focuses on the correlation between the measurement of a PAM-4 end-to-end link, and the simulation of the exact same link. Analyzing the generic instrument generation and measurement case for PAM-4 will provide a clear understanding of the critical elements for correlating simulations with measurements for multi-level signaling.
PAM-4 signal generation is currently performed by combining discrete components or by using a state-of-art arbitrary waveform generator (AWG). The measurement setup used in this paper includes a commercially available PAM-4 arbitrary waveform generator, a physical high-speed link such as a QSFP28 cable assembly, and a digital oscilloscope to capture the data. The digital sampling oscilloscope receiver provides a hardware clock and data recovery (CDR) and a variety of software equalization techniques (CTLE, DFE, FFE) for opening the eye when making measurements with lossy channels. Measurements by the oscilloscope also include post-processing techniques for basic waveform analysis.
The software simulation will use the IBIS-AMI methodology to simulate the PAM-4 hardware measurement. At the Tx side the IBIS-AMI model is used to generate an equalized Tx waveform for downloading to the AWG so that both simulation and measurement use the same excitation to the DUT channel. At the Rx side the IBIS-AMI behavioral model is built to match with the oscilloscope analog characteristics such as CDR loop bandwidth, impedance, and random jitter. The Rx model also includes algorithmic models for equalization schemes such as CTLE, DFE, FFE functionality to capture the oscilloscope built-in functionality. A measured S-parameter model of the cable assembly provides a realistic physical model of the channel.
This generic PAM-4 end-to-end link is then used to validate the correlation between simulation and measurement. Basic measurements like eye-height, eye-width, and BER provide a good starting point for correlation with simulation, but advanced SNR analysis can often provide a faster quality check. This paper will demonstrate the basic tools needed to evaluate the PAM-4 implementation on both the software and the hardware levels, covering a good correlation between both techniques and securing a fast design-track for the next generation PAM-4 applications.
2 Physical Link
The PAM-4 ecosystem includes the connecting channel between the Tx and Rx. The SERDES channel components will need to be validated for use with this new multi-level signaling. The IEEE and OIF standards provide frequency dependent loss and crosstalk suggestions for Input-Output (IO) connectors and cabling, but no direct correlation to actual eye opening statistics. This must be done either with channel simulations or end-to-end link measurements. This paper uses the QSFP28 IO connector and cable, shown in Fig. 1, to demonstrate a process for correlating simulations and measurements to validate a component for use within a PAM-4 SERDES channel.
2.1 The QSFP28 series
The QSFP28 series features a full family of board connectors, Direct Attached Cables (DAC), Active Optical Cables (AOC) and transceiver modules. To create the electrical end-to-end link, that is used to validate the correlation. The QSFP28 board connector is a Quad Small Form-factor Pluggable connector, with a bandwidth of 28 Gbps per channel, as shown in Fig. 2.
Fig. 1 QSFP 28 cable assembly
Fig. 2 : QSFP28 board connector with heat sink
Owing to its four channels and small form-factor, it is one of the high runners in the deployment of 100G data-center networks. Moreover, the QSFP28 cable connector series
maintains backwards compatibility by having the same physical dimensions as its QSFP+ 10 Gbps predecessor.
The physical link under consideration uses a direct attached copper cable. This cable is purely passive, as it does not do any data processing, amplification or equalization of the signals. It just transfers the data as is. Obviously, the usage of such a cable depends heavily on the full link. The industry standards describe this end-to-end link and give the losses that are permitted within the cable assembly, board connector, and module compliance boards (MCBs).
Commercially available cable assemblies can be compared with industry standards for single channel 28 Gbps transmission. The loss budget, as defined in the standards [1], defines the longest possible cable assembly length. An overview is given in Table 1. Obviously, thicker conductor sizes result in lower high-frequency losses and thus longer lengths.
Table 1 : Copper cable assembly lengths for various conductor sizes as described in the standardization bodies.
Conductor Size IEEE 802.3bj InfiniBand™ EDR 24 AWG (Ø0.51mm) 6 meters 4 meters 26 AWG (Ø0.40mm) 5 meters 3 meters 30 AWG (Ø0.25mm) 3 meters 2 meters 33 AWG (Ø0.18mm) 2 meters 1 meter
2.2 The Device Under Test
In agreement with the industry standards, an end-to-end link is used to validate the correlation between simulations and measurements for PAM-4 multi-level signaling. This end-to-end link is shown in Fig. 3 and is the device under test (DUT). A waveform generator is used to transmit an equalized waveform through the link, then an oscilloscope captures the data at the other end, possibly employing additional equalization techniques to achieve open eye diagrams. The employed four-channel twin-pair cable assembly is three meters long and has a 30 AWG conductor size.
Fig. 3 : A QSFP28 end-to-end link employing module compliance boards
QSFP28 QSFP28
MCB MCB AWG30 – 3m
On the module compliance boards (MCB), all high-speed 28 Gbps connections are accessible through 2.92 mm connectors. Fig. 4 shows the QSFP+ pin numbering for the two Tx to Rx differential pairs that were selected for measurement in this study. This choice allows for far end crosstalk analysis.
NEAR END
FAR END
TX1+ (pin 36) TX1- (pin 37) TX2+ (pin 3) TX2- (pin 2)
RX1+ (pin 22) RX1- (pin 21) RX2+ (pin 17) RX2- (pin 18)
Fig. 4 : Pin assignment of measurement setup
Fig. 5 shows the measured insertion loss curve of just the MCB by using a simple through connection that is twice the QSFP28 signal routing trace length. The data shows resonant free behavior that goes beyond the 1.5 times the 14 GHz Nyquist clock rate (21GHz) and validates the PCB material properties and 2.92 mm connectors for this application.
Fig. 5: Insertion loss curve of the through line on the MCB (twice the trace length to the connector).
0 5 10 15 20 25-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
Frequency [GHz]
Insertion loss Host board (MCB)
RX2 RX1 TX2TX1
2.3 Measuring the DUT performance
Several types of equipment can be used to check the high-speed performance parameters of passive cable assemblies, like a Vector Network Analyzer (VNA), a Time Domain Reflectometry/Transmissivity (TDR/TDT), or a Bit Error Rate Tester (BERT). Each type of equipment, and its underlying measurement technique, has its own advantages and disadvantages. Since the cable assembly that is used in this study is very long compared to the employed data-rate of 28 Gbps, the expectation is that high losses will be recorded during measuring the DUT. The high losses can only be captured by a device with sufficient dynamic range. The VNA is therefore a very suitable device to perform this measurement in a convenient amount of time, and will therefore be used. A calibration of the measurement leads has been performed up to the 2.92 mm connectors.
A VNA with 67 GHz of bandwidth is used to collect the scattering parameters of the link under test. The differential losses for the two pairs under consideration (see Fig. 4) for the three meter 30 AWG cable assembly are plotted in Fig. 6. In Table 2, the differential insertion losses at a few distinct frequencies are shown.
Fig. 6 : Differential Insertion Loss – 3 meter 30 AWG
Table 2: Differential Insertion Loss – 3 meter 30 AWG
The S-Parameter behavioral data of the channel is stored in a standard Touchstone® 1.0 format that is available on all high end VNA’s and easily imported into channel simulation
Insertion Loss 3 meter – 30AWG
6.25GHz 12.5GHz 25GHz
Pair 1 -13.63dB -20.88dB -41.94dB
Pair 2 -13.58dB -22.02dB -47.14dB
tools. The Touchstone® file format is an ASCII text file for documenting N-port network parameters of linear devices, such as passive cable assemblies. The exported data file is an s8p file that includes the far-end crosstalk aggressor data. However, for initial validation tests, we are only considering a single through channel with all aggressors turned off and the paths terminated in 50 ohms. As a result, the file has been reduced to an s4p file for use in the channel simulations.
3 Simulating PAM-4 signals
The IBIS-AMI methodology is employed for PAM-4 link simulations. AMI models are created to represent Tx and Rx behaviors. Each model consists of analog and algorithmic portions. In the Tx model, the analog part captures the output impedance, and the algorithmic part the Tx equalization. In this study, the Tx equalizer is a 3-tap FFE. In the Rx model, the analog part captures the input load, and the algorithmic part the Rx equalizations and CDR. In this study, the Rx model implements a CTLE, a DFE and a CDR to represent data processing performed by the oscilloscope. The Tx analog model, the physical channel and the Rx analog model are assumed to be linear and time-independent and can be represented by a combined analog channel impulse response, denoted as hAC. During the simulation, a four-level square wave that represents the PAM-4 stimulus is passed into the Tx algorithmic model. The Tx output signal is convolved with hAC to generate the input to the Rx algorithmic model. The Rx model returns both the equalized signal and the CDR output, which are used to construct the PAM-4 eye and to calculate symbol error rates (SERs). The simulation flow is illustrated in Fig. 7. [2]
Fig. 7 PAM-4 IBIS-AMI channel simulation flow
To analyze PAM-4 link performance at different signal levels, SER is calculated for each of the three eyes. For the upper eye, SER is measured between symbols 3 and 2. For the middle eye, SER is measured between symbols 2 and 1. For the lower eye, SER is measured between symbols 1 and 0. One set of bathtub curves and SER contours is generated for each eye. Fig. 8 shows examples of SER contours and bathtub curves of upper, center and lower eyes.
Fig. 8 PAM-4 simulation: SER contours and bathtub curve
4 Measuring PAM-4 signals
The goal of this paper is to look at the characterization of a channel component for use in a PAM-4 signaling application. The desire is to validate a measurement set-up that can also be correlated with simulation. This may sound simple, and yet all too often one finds that that the lack of calibration and selection of reference planes can make this task quite challenging at multi-Gigabit data rates. It is often said that everyone trusts a measurement, except for the person that made it, and that no one trusts the simulation except for the person that did the simulation. The solution is to leverage both simulations and measurements to cross-check and insure that both measurement and simulations can be trusted.
Fig. 9 : Measurement Flow
The measurement process is illustrated in Fig. 9. The first thing to consider is the connection to the DUT, which is the QSFP28 cable assembly including MCBs for our example. A PAM-4 channel will have significant loss at the higher data rates, on top of the lower SNR that comes with the multi-level signals for the same voltage swing. Also the loss of coaxial cable fixturing to the DUT must be calibrated out. The instrument calibration techniques are utilized to calibrate out the losses of the fixture cables. This eliminates any embedding/de-embedding steps on the simulation side and minimizes the number of variables between simulation and measurement. Mathematically there are robust methods for “de-embedding” the effects of the measurement fixture, but in practice one finds that there are a number of basic sampling theory, domain transformations, and tolerance issues that can add to the error terms when comparing simulation with measurement. [4]
The next challenge is to verify that the Tx signal used in simulation matches with the one used in measurement. Here again, simplicity has significant value. Ideally, one would like a model of the transmitter for use in simulation, however, for PAM-4 this is not a trivial task. PAM-4 is a new technology with proprietary designs and no standardized method of generation, so few models of actual hardware exist. If one uses a proprietary PAM-4 vendor model, then there is no guarantee that the channel will behave the same for a different vendor’s model. The PAM-4 Tx signal must also include complex equalization such as a feed forward equalizer (FFE) to compensate for the high losses at Nyquist frequency of
PAM-4 signaling and open up the eye at the Rx. Opening the eye at the Rx allows the clock data recovery (CDR) to lock onto the signal for measurement. To ensure consistency and flexibility in measurement-simulation correlation, in this study, the Tx output waveform generated in simulation is saved into a file, loaded onto the AWG and then transmitted into the channel for measurement. Using the AWG, this approach not only guarantees that the exact same channel input signal is used in measurement and simulation but also allows the simulation to define a simple IBIS AMI PAM-4 Tx model with a 3 tap FFE applied to the rising and falling edges of the bit pattern. The actual edges of the model can be ideal since this is not an actual device and then an external lumped capacitor at the output of the Tx AMI model provides an adjustable rise time.
Fig. 10 PAM-4 simulation set-up
The simulation can use this simple PAM-4 Tx model to set the rising edge and FFE for the measurement of the QSFP28 cable assembly. The setting of the rise-time must consider a typical value for a given data rate, and it must also be within the control of the AWG hardware. Here again, simplicity helps in setting the rise-time. Starting with a slow rise-time that is well within the control range of the AWG will reduce reflections/ringing that are not captured by the simple Tx model used in simulation. The desire is to have the AWG replicate the simulated waveform and not be at the limits of its control. The AWG calibration features are used to calibrate out the fixture cabling and provide the desired waveform at the Rx or oscilloscope in this example. Fig. 11 shows the instrument cable fixtures connected together for the calibration of the waveform at the oscilloscope receiver. A simple clock pattern can be used to correct the simulation for small differences in rising and falling edge rates, level amplitude, amplitude noise, and random timing jitter.
Fig. 11 Calibrating the AWG and verifying the calibrated AWG waveform with a clock 03030303 pattern. Measurement in blue on channel 1, simulated in red on channel 2.
The next decision is to consider a real-time oscilloscope or an equivalent time sampling oscilloscope. The beauty of the real-time oscilloscope is that it can capture at very high sampling rates the actual voltage vs. time waveform. This is very helpful when turning on PAM-4 hardware for the first time where the received eye is completely closed and one must capture the waveform to see what equalization is needed. However at-speed real-time oscilloscopes can be quite expensive when compared to the same bandwidth that a sampling oscilloscope can provide. The sampling oscilloscope requires a repetitive pattern so that it can keep sampling the waveform at different time points with high fidelity to accurately recreate the full pattern. The precision of the equivalent time sampling oscilloscope with low signal to noise ratios and the focus on measuring repetitive patterns makes it ideal for characterizing passive channel components and comparing with simulation.
To simplify the correlation of the Rx on the sampling oscilloscope with the Rx in simulation it helps to take advantage of the calibration features of the instrument. The measuring oscilloscopes can be made to emulate a given bandwidth and CDR topology so that a generic Rx AMI model can be used on the simulation side. The oscilloscope can be set to emulate a simple 1st order PLL with the loop bandwidth adjusted for a given data rate. At 12.5 Gbps (6.25 GBaud) the loop bandwidth is set to 3.25 MHz and at 25 Gbps it is set to 7.5MHz. The receiver bandwidth on the sampling oscilloscope can be set to a 4th order Bessel for flat group delay to avoid amplitude ripple from the bandwidth limits of the instrument. [5]
Now that the AWG Tx, QSFP28 DUT, and equivalent time sampling oscilloscope Rx have been defined the actual measurement can be done. Starting with a clean PAM-4 signal with no equalization one can quickly confirm that the eye is completely closed after the long 3 meter QSFP28 cable, as shown in Fig 12, even at the lower data rate of 12.5 Gbps (6.25 GBaud).
Fig. 12 Example un-equalized PAM-4 signal from the calibrated AWG transmitter and eye closure after transmitting
through the 3meter QSFP28 DUT to the oscilloscope receiver.
This means that equalization must be added for PAM-4 channel testing. The simulation makes it an easy task to optimize a 3 tap FFE for the loss of the QSFP28 cable. This equalized Tx waveform is then downloaded to the AWG and measured on the oscilloscope to verify that the simulated FFE equalized Tx matches the measurement Tx stimulus. Additional adjustments to amplitude settings, noise amplitude, and random jitter can be added back into the simulation to account for small differences with the generated waveform.
Fig. 13 . The simulated Tx stimulus top left with a 3 Tap FFE is exported to the AWG to generate the measurement Tx stimulus, bottom left. The signal received after the DUT channel at the oscilloscope Rx on the bottom right is then compared with the simulated Rx top right.
The calibrated PAM-4 FFE corrected stimulus is then connected to the QSFP28 3 meter DUT, Fig 13, and the desired open eyes are observed at the receiver, both in simulation and measurement. Fig. 14 shows the direct comparison of the simulated and measured eye-diagrams at the Rx side. Note that simulations and measurements correspond well for this first test case at 12.5 Gbps (6.25GBaud) with a PRBS7 pattern.
The next step is to determine the best method of quantifying the correlation between measurement and simulation. Traditionally measured data has always been post processed in the simulation environment, however, modern day instruments now contain state of the art tools for quickly measuring and analyzing captured waveforms. Comparing measurement with simulation on the instrument can provide instantaneous comparison of measurement with simulation and enable the simulated data to be displayed in exactly the same way that a final pass/fail measurement might be done in production.
Fig. 14 Waveform at the Rx side including the DUT with 3 tap FFE; measured on Channel 1A (top) and simulated on
Channel 2A (bottom)
Now it is a very simple task to use the measurement eye width and eye height settings to compare simulation with measurement. This simulation to measurement correlation at the slower data rate verifies the methodology and now can be applied to the desired higher data rates and increasing channel losses.
5 PAM-4 Measurement and Simulation Example
The next data rate of interest is to see if the Tx FFE equalization can still open the eye with -13.5 dB of loss at Nyquist when running at 25 Gbps (12.5 GBaud). On the simulation side the Keysight Advanced Design System (ADS) software package uses the IBIS-AMI methodology to simulate a PAM-4 link over a QSFP28 cable assembly as described in the previous sections. The IBIS-AMI transmitter is configured for a 12.5 Gbaud PAM-4 signal using a pseudo-random binary sequence (PRBS) 2^7-1 generated by a series of linear feedback shift registers (LFSR). The Tx FFE 3 tap equalization settings are optimized to (-0.028, .69, -0.41) for the QSFP28 DUT data rate dependent channel losses. The rise and fall time is kept at the 35ps 20/80 that was used in the previous section. Random jitter of 170 fs and amplitude adjustments are fed back into the simulation from measurements of the Tx stimulus to improve the simulation to measurement correlation.
The Keysight M8195A arbitrary waveform generator (AWG) with 65 GSa/s and 30 GHz of bandwidth is used to replicate the simulated Tx stimulus generated by the ADS IBIS-AMI model. The intrinsic losses of the AWG path and instrument cable fixturing to the 86108B Precision Waveform Analyzer plugged into the DCA-X 86100D mainframe is compensated with an internal software digital pre-filter by the AWG. Custom IQTools with Matlab scripting provided the necessary automated calibration routine with the DCA to determine the required response for this digital pre-filter. The 86108B CDR is set to a 1st order PLL with 7.5 MHz bandwidth.
Following the methodology from section 4 the next step is to verify that the measurement AWG generated Tx PAM-4 waveform matches with the IBIS-AMI simulation generated Tx waveform. Fig. 15 shows the measured Tx stimulus on top and the simulated Tx on the bottom. Here we start to see the limits of the 65 GSamples/s of the AWG in that there are not enough sample points to replicate the ideal simulated waveform. If additional accuracy is needed it will be necessary to add the AWG measured non-linear rising and falling edges to the IBIS model used in simulation, or utilize the wider bandwidth M8196A AWG instrument.
Fig. 15 Measured Tx stimulus (top) at 25 Gbps (12.5 GBaud) PRBS7 vs IBIS-AMI simulated waveform (bottom)
Inserting the QSFP28 cable with ~ -13.5dB of loss at the clock rate of 6.25 GHz shows that the equalized Tx waveform for simulation and measurement both easily open the eye with only the FFE equalization, as shown in Fig. 16.
Fig. 16 12.5Gbps simulation with transmitter FFE. A wider bandwidth is needed for the AWG to generate the desired stimulus from the IBIS-AMI model and improve simulation to measurement correlation.
At 56 Gbps (28 GBaud), the limits of the measurement hardware are reached and the rising and fallinge edges are a function of the available M8195A AWG hardware. The simple definition used in simulation can no longer be recreated for the measurement stimulus and one must now include a model for the AWG transmitter in the simulation or upgrade to a faster M8196A with wider bandwidth and 92 GSa/s. At this point the available measurement system no longer has a generic stimulus, however, in simulation it is still possible to see how the channel would respond to a standardized Tx stimulus, Fig 17. Along with the challenges on the Tx side, the losses approaching -25dB at Nyquist result in a closed eye at the receiver and now CTLE and DFE correction must be added at the receier.
Fig. 17 50 Gbps (25 Gbaud) simulation with transmitter FFE and receiver CTLE
6 Conclusions and Future Work
The ability to simulate the FFE corrected waveform on the simulation side and then use this exact waveform generated by an AWG on the measurement side resulted in excellent measurement to simulation correlation for a PAM-4 SERDES channel. The key to success was to start with a methodical approach of starting simple so that variables between simulation and measurement are minimized. Even the data rates are lowered to verify the methodology and then they can be increased and additional equalization added to compensate for the higher losses. The use of IBIS-AMI models provides for fast channel simulation and the ability to easily leverage complex equalization techniques such as FFE, CTLE, and DFE. Advanced calibration techniques on the measurement side enable the AWG and receiving oscilloscope to be calibrated together with the fixture cables to insure the desired transmitter signal is generated for input to the DUT reference plane. Finally, the use of high quality VNA measured S-Parameters to capture the full black-box behavior of the passive QSFP DUT channel resulted in the simulation correctly optimizing the required equalization to open the eye for the Rx hardware CDR and accurately predict the final received signal.
Future work on channel testing will explore the implementation of PAM-4 IBIS-AMI models that represent real silicon. The results of a real implementation of PAM-4 generation can then be compared with the simplified model technique for evaluating channel components for use in PAM-4 SERDES signaling.
References
[1] IEEE Std 802.3bj™-2014: IEEE Standard for Ethernet Amendment 2: Physical Layer Specifications and Management Parameters for 100 Gb/s Operation Over Backplanes and Copper Cables.
[2] H. Zhang, F. Rao, X. Dong, G. Zhang, “IBIS-AMI Modeling and Simulation of 56G PAM4 Link Systems” DesignCon 2015.
[3] A. Healey, C. Morgan. “A Comparison of 25 Gbps NRZ & PAM-4 Modulation Used in Legacy & Premium Backplane Channels”, DesignCon 2012.
[4] J. Carrel, H. Barnes, R. Sleigh, H. Hakimi, M. Resso, “De-Mystifying the 28 Gb/s PCB Channel: Design to Measurement” DesignCon 2014.
[5] Dennis Derickson, Markus Müller, Digital Communications Test and Measurement, Prentice Hall, 2008 (ISBN 0-13-220910-1).
