March 3rd, 2008

EE235 Nanofabrication, University of California Berkeley

Hybrid Approach of Top Down and Bottom Up to Achieve Nanofabrication

of Carbon Nanotube Devices

Maggie Zhang

March 3rd, 2008

EE235 Nanofabrication, University of California Berkeley

A Dielectrophoretic Method for High Yield Deposition of Suspended, Individual Carbon Nanotubes with four-Point Electrode Contact

• Manufacture four-point contacted suspended, individual multiwalled carbon nanotubes by dielectrophoresis– DEP (dielectrophoresis) force is exerted on a dielectric particle when it i

s subjected to a non-uniform electric field • Bulk Carbon Nanotube Self Assembly (Chinese U of HK)• Avoid time-consuming in-situ manipulation: AFM etc.

– Theory:

– 2D chip design• Structures fab by focused-ion beam (FIB) treatment• Pt electrodes by light lithography, physical vapor deposition, and subsequent lift-off

Tomb Shwarmb et al, Nanoletter 2007, 3

March 3rd, 2008

EE235 Nanofabrication, University of California Berkeley

• 3D chip design• Manufacturing process of 3-D chips: (I) first layer of Pt structures : photolithography, phy

sical vapor deposition and lift off(II + III) layer of SiN evaporated on the first layer of

Pt isolates both Pt layers(IV + V) definition of electrodes by cutting out trenc

hes by FIB milling in two steps(V) final 3-D design and a SEM picture of 3-D chip.DEP manipulation parameters: f = 5MHz

Yielding of the process dependent on - Chip design- Solution. SDS (sodium dodecyl sulfate) reduce t

he bundled CNT attached on the electrode- Electrode material- Gap distance

March 3rd, 2008

EE235 Nanofabrication, University of California Berkeley

Resistive Heating to achieve localized carbon nanotube synthesis

CMOS integration of nano structures

(carbon nanotubes (CNTs))

Local and selective synthesis

using silicon microstructures (MEMS)

Device applications to nano sensors and

nano electronics

1. In-situ controlled growth of CNT 2. Assembly of single CNT3. CNT/silicon contact discussed

March 3rd, 2008

EE235 Nanofabrication, University of California Berkeley

Experimental Procedure

Electric field assisted synthesis

Gaps between Si structures

Bias between Si (V2 )

Electric field (V2 / gaps)

5 ~ 10 m 2 ~ 5 V

0.2 ~ 1 V/m

Temperature

C2H2/Ar gasSynthesis pressure

850 ~ 900C 60 / 55 sccm

250 Torr

Local synthesis of CNT

March 3rd, 2008

EE235 Nanofabrication, University of California Berkeley

CNT-Silicon Heterojunction

CNT : Work function of CNT

Si: Electron affinity of silicon

Eg-Si : Band gap of silicon

Ei -EF : Fermi level for silicon

Bp: Barrier height

Bp = ( S

+ Eg-Si ) - CNT

= 0.37~0.67 eV

CNT: multiwall CNT (root and tip growth)Si: p+type, conc. 1019/cm3

Contact resistanceSpecific contact resistivity C : 10-5~10-4 -cm2 [1]

Barrier height Bp : 0.4 eV

Concentration of Silicon:1019 /cm3(p-type)

Contact area A : 2 10 -11 cm2

Diameter of CNT : 50nm

Contact resistance = 0.5 ~ 5M

AR C

Contact

[1] K. K. Ng and R. Liu, IEEE Trans. ED, 37, 1535 (1990)

March 3rd, 2008

EE235 Nanofabrication, University of California Berkeley

Conclusion• Top down approach: Photolithography and FIB, SOI standard proce

ss• Bottom up: DEP manipulation (micro to nano scale) to CNT synthesi

s• Localized heating: Better control of synthesis, higher yielding and ca

patibility for post-processing• Contact Resistance Issue