Header 7x2 pin L1/L2/L3/L4 MCLK Au dio BICK … · 7x2 pin L1/L2/L3/L4 Header (EXT) R1/R2/R3/R4 PIC 18F4550 USB B-TYPE I2C/SPI MCLK BICK LRCK SDTI Au dio Signals +12V AGND Reg 12V

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GENERAL DESCRIPTION

The AKD4438-SA is an evaluation board for the AK4438 (32-bit 8ch DAC) that supports DVD-Audios, Car-Audio Systems, allowing quick evaluation with digital audio interface.

Ordering guide

AKD4438-SA --- Evaluation board for AK4438

（Control software is packed with this board）

FUNCTION

3 type digital audio interface

- Optical input - COAX input - External input

8ch Analog outputs USB Port for Serial control

COAX In

AK4438

DIR

Opt In AK4118A

L1/L2/L3/L4 7x2pin

Header

(EXT)

R1/R2/R3/R4

PIC 18F4550

USB

B-TYPE

I2C/SPI

MCLK BICK LRCK SDTI

Audio Signals

+12V

AGND

Reg

12V→3.3V

Reg

12V→3.3V

Reg

12V→3.3V

D3.3V

D3.3V

TVDD

AVDD

VREFH

Figure 1.AKD4438-SA Block Diagram

AK4438 Sound Quality Evaluation Board Rev.2

AKD4438-SA

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Board Diagram

Board Diagram

Figure 2.AKD4438-SA Board Diagram

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Description

(1) Connector for Power supply

+12V、AGND

Terminals for power supply. Refer to table1.

(2) AOUT1L~AOUT4L、AOUT1R~AOUT4R

RCA Connector for analog outputs.

(3) COAX、OPT

Input SPDIF signal to AK4118A.

When using the COAX：R302=0Ω、R303=Open (Default)

When using the OPT ：R302=Open、R303=0Ω

(4) AK4118A

AK4118A outputs digital data to AK4438 as DIR.

(5) PORT303

External digital data inputs to AK4438.

MCLK、BICK、LRCK、SDTI1、SDTI2、SDTI3、SDTI4

When using the PORT303：R310=R311=R312=R313=R314= R315= R316=51Ω

R306=R307=R308=R309=R330 =R331= R332=Open

When using the AK4118A：R310=R311=R312=R313=R314= R315= R316=Open (Default)

R306=R307=R308=R309=R330 =R331= R332=51Ω

(6) USB

USB Port. It is possible to set up the registers of AK4438 from PC via the USB port.

(7) PIC18F4550

USB control IC

(8) SW301

Setting switch for AK4118A.Upside is “Hi”, downside is “Lo”.

Refer to Table2.SW301 setting.

(9) SW401

Setting switch for AK4438.Upside is “Hi”, downside is “Lo”

Refer to Table5.SW401 setting.

(10) SW402

Power down switch for AK4438.Upside is “Hi (on)”, downside is “Lo (off)”

(11) SW403

Mute switch for AK4438.

Push ：AK4438 is mute

Release ：AK4438 is unmute

(12) SW404

Power down switch for AK4118A.Upside is “Hi (on)”, downside is “Lo (off)”

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Evaluation Board Manual

■Operation sequence

[1] Set up power supplies

The power should be separated from the source of a power supplier.

Name of

connector

Color of

connector Voltage Use application Comment and attention

+12V Red +12V ・Regulator Should always be connected.

GND Black 0V ・Ground Should always be connected.

Table 1. Power supply line setting

[2] Switch setting It should be set to match the mode.

(1) SW301 setting

No. Switch Name Function default

1 DIF2 DIF2-pin of AK4118A Hi

2 DIF1 DIF1-pin of AK4118A Lo

3 DIF0 DIF0-pin of AK4118A Lo

4 OCKS1 OCKS1-pin of AK4118A Hi

5 OCKS0 OCKS0-pin of AK4118A Lo

Table 2. SW301 setting

Mode DIF2 pin DIF1 pin DIF0 pin SDTO LRCK BICK

I/O I/O

0 0 0 0 16bit, Right

justified H/L O 64fs O







4 1 0 0 24bit, Left

justified H/L O 64fs O default

5 1 0 1 24bit, I2S L/H O 64fs O

6 1 1 0 24bit, Left

justified H/L I 64-128fs I

7 1 1 1 24bit, I2S L/H I 64-128fs I

Table 3. AK4118A Audio interface format

OCKS1 pin OCKS0 pin (X’tal) MCKO1 fs (max)

0 0 256fs 256fs 96 kHz

0 1 256fs 256fs 96 kHz

1 0 512fs 512fs 48 kHz default

1 1 128fs 128fs 192 kHz

Table 4. AK4118A MCLK setting

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(2) SW401 setting

No. Switch Name Function default

1 I2C

I2C pin of AK4438

H：I2C mode

L：SPI mode

Hi

2 PS

PS pin of AK4438

H：Parallel mode

L：Serial mode

Hi

3 TDM0 TDM0 pin of AK4438（Parallel mode only） Lo

4 TDM1 TDM1 pin of AK4438（Parallel mode only） Lo

5 DIF

DIF pin of AK4438（Parallel mode only）

H：32bit I2S compatible

L：32bit LSB justified

Lo

6 CAD0-I2C CAD0 pin of AK4438 （I2C mode only） Lo

7 CAD0-SPI CAD0 pin of AK4438（SPI mode only） Lo

8 CAD1 CAD1 pin of AK4438（Serial mode only） Lo

Table 5.SW401 setting

(3) SW402/SW403/SW404 setting

SW402 PDN

Power down switch for AK4438

Hi：Power up

Lo：Power down

※Should be “Hi” during operation AK4438.

SW403 MUTE

Mute switch for AK4438（Parallel mode only）

Release：Unmute

Push：Mute

SW404 AK4118-PDN

Power down switch for AK4118A

Hi：Power up

Lo：Power down

※Should be “Hi” during operation AK4118A.

Table6.SW402/SW403/SW404 setting

[3] USB connect (Serial mode only) Connect the board to PC with the USB cable.

[4] Power on Turn on the power to the board. In case of serial mode, startup AK4438 control software.

[5] Setup the control registers (Serial mode only) Refer to “Control soft manual”.

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Control Soft Manual

■ Evaluation Board and Control Soft Settings

1. Set an evaluation board properly.

2. Connect a USB control box (AKUSBIF-B) and an evaluation board.

Pay attention about direction of the 10pin header when connecting to an AKUSBIF-B.

3. Connect a PC (IBM-AT compatible) and the USB control box (AKUSBIF-B).

The USB control box is recognized as HID (Human Interface Device) on the PC.

It is not necessary to install a new driver.

4. Start up the control program.

When the screen does not display “AKUSBIF-B” at bottom left, reconnect the PC and the USB control box, and push

the [Port Reset] button.

5. Proceed evaluation by following the process below.

[Support OS]

Windows XP / Vista / 7

Figure3.Control Software Window

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■ Operation Overview Function, register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs.

Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching

tab window. Refer to the “■ Dialog Boxes” for details of each dialog box setting.

1. [Port Reset] : For when connecting to PC

Click this button after the control soft starts up when connecting to PC.

2. [Write Default] : Initializes Registers

When the device is reset by a hardware reset, use this button to initialize the registers.

3. [All Write] : Executes write commands for all registers displayed.

4. [All Read] : Executes read commands for all registers displayed.

5. [Save] : Saves current register settings to a file.

6. [Load] : Executes data write from a saved file.

7. [All Req Write] : Opens “All Req Write” dialog box.

8. [Data R/W] : Opens “Data R/W” dialog box

9. [Sequence] : Opens “Sequence” dialog box.

10. [Sequence (File)]: Opens “Sequence(File)” dialog box.

11. [Read] : Reads current register settings and displays on to the register area

(on the right of the main window).

This is different from [All Read] button, it does not reflect to a register map,

only displaying register settings in hexadecimal.

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■ Tab Functions

1. [REG]: Register Map

This tab is for a register writing and reading.

Each bit on the register map is a push-button switch.

Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).

Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)

Grayout registers are Read Only registers. They can not be controlled.

The registers which is not defined in the datasheet are indicated as “---”.

Figure4.Window of [ REG ]

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1-1. [Write]: Data Writing Dialog

It is for when changing two or more bits on the same address at the same time.

Click [Write] button located on the right of the each corresponded address for a pop-up dialog box.

When the checkbox is checked, the data will be “H” or “1”. When the checkbox is not checked, the data will be “L”

or “0”. Click [OK] to write setting values to the registers, or click [Cancel] to cancel this setting.

Figure5.Window of [ Register Set ]

1-2. [Read]: Data Read (I2C mode only)

Click [Read] button located on the right of the each corresponded address to execute a register read.

After register reading, the display will be updated regarding to the register status.

Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).

Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)

Please be aware that button statuses will be changed by a Read command.

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2. [Tool]: Testing Tools

Evaluation testing tools are available in this tab.

Click buttons for each testing tool.

Figure 6.Window of [ Tool ]

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2-1.[Repeat Test] : Repeat Test Dialog

Click [Repeat Test] button in the Test tab to open a repeat test dialog shown below.

Repeat writing test can be executed by this dialog.

Figure 7.Window of [ Repeat Test ]

[Start] Button : Starts the repeat test.

A dialog for saving a file of the test result will open when clicking this button.

Name the file.

Test will start after specifying a saving file.

[Close] Button : Closes this dialog and finishes the process.

[Address] Box : Data writing address in hexadecimal numbers.

[Start Data] Box : Start data in hexadecimal numbers.

[End Data] Box : End data in hexadecimal numbers.

[Step] Box : Data write step interval.

[Repeat Count] Box : Repeat count of the test writing.

[Up and Down] Box : Data write flow is changed as below.

• Checked: Writes in step interval from the start data to the end data and turn back from the end data to

the start data.

[Example] Start Data = 00, End Data = 05, Step = 1, [ ]…for 1 count.

Data flow :[00→01→02→03→04→05→05→04→03→02→01→00] x Repeat Count Number

• Not checked: Writes in step interval from the start data to the end data and finishes writing.

[Example] Start Data = 00, End Data = 05, Step = 1, [ ]…for 1 count.

Data flow : [00→01→02→03→04→05] x Repeat Count Number

[Sampling Frequency] Box: Selects sampling frequency 44.1kHz/48kHz

[Count] Box : Indicates the count number during a repeat test.

[Lch Level] Box : Indicates the Lch Level during a repeat test.

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2-2.[Loop Setting] : Loop Dialog

Click [Loop Setting] button in the Tool tab to open loop setting dialog as shown below.

Writing test can be executed.

Figure 8.Window of [ Loop ]

[ OK ] Button : Starts the test.

[ Cancel ] Button : Closes the dialog and finishes the process.

[ Address ] Box : Data writing address in hexadecimal numbers.

[ Start Data ] Box : Start data in hexadecimal numbers.

[ End Data ] Box : End data in hexadecimal numbers.

[ Interval ] Box : Data write interval time.

[ Step ] Box : Data write step interval.

[ Mode Select ] Box : Mode select check box.

• Checked : Writes in step interval from the start data to the end data and turn back from the end

data to the start data.

[Example] Start Data = 00, End Data = 05, Step = 1

Data flow : 00→01→02→03→04→05→05→04→03→02→01→00

• Not Checked : Writes in step interval from the start data to the end data and finishes writing.

[Example] Start Data = 00, End Data = 05, Step = 1

Data flow : 00→01→02→03→04→05

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■ Dialog Boxes

1. [All Reg Write]: All Reg Write dialog box

Click [All Reg Write] button in the main window to open register setting files.

Register setting files saved by [Save] button can be applied.

Figure9.Window of [ All Reg Write ]

[Open (left)] : Selects a register setting file (*.akr).

[Write] : Executes register writing by the setting of selected file.

[Write All] : Executes all register writings.

Selected files are executed in descending order.

[Help] : Opens a help window.

[Save] : Saves a register setting file assignment. The file name is “*.mar”.

[Open (right)] : Opens a saved register setting file assignment “*. mar”.

[Close] : Closes the dialog box and finish the process.

~ Operating Suggestions ~

1. Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mar” should

be stored in the same folder.

2. When register settings are changed by [Save] button in the main window, re-read the file to reflect new

register settings.

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2. [Data R/W]: Data R/W Dialog Box

Click the [Data R/W] button in the main window for data read/write dialog box.

Data write is available to specified address.

Figure 10. Window of [ Data R/W ]

[Address] Box : Input data address in hexadecimal numbers for data writing.

[Data] Box : Input data in hexadecimal numbers.

[Mask] Box : Input mask data in hexadecimal numbers.

This is “AND” processed input data.

[Write] : Writs the data generated from Data and Mask values to the address specified by “Address” box.

[Read] : Reads data from the address specified by “Address” box.

The result will be shown in the Read Data Box in hexadecimal numbers.

[Close] : Closes the dialog box and finishes the process.

Data writing can be cancelled by this button instead of executing a write command.

*The register map will be updated after executing [Write] or [Read] commands.

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3. [Sequence]: Sequence Dialog Box

Click [Sequence] button to open register sequence setting dialog box.

Register sequence can be set in this dialog box.

Figure 11. Window of [Sequence ]

~ Sequence Setting ~

Set register sequence by following process bellow.

1. Select a command

Use [Select] pull-down box to choose commands.

Corresponding boxes will be valid.

< Select Pull-down menu >

· No_use : Not using this address

· Register : Register writing

· Reg(Mask) : Register writing (Masked)

· Interval : Taking an interval

· Stop : Pausing the sequence

· End : Finishing the sequence

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2. Input sequence

[Address] : Data address

[Data] : Writing data

[Mask] : Mask

[Data] box data is ANDed with [Mask] box data. This is the actual writing data.

When Mask = 0x00, current setting is hold.

When Mask = 0xFF, the 8bit data which is set in the [Data] box is written.

When Mask =0x0F, lower 4bit data which is set in the [Data] box is written.

Upper 4bit is hold to current setting.

[ Interval ] : Interval time

Valid boxes for each process command are shown bellow.

· No_use : None

· Register : [Address], [Data], [Interval]

· Reg(Mask) : [Address], [Data], [Mask], [Interval]

· Interval : [Interval]

· Stop : None

· End : None

~ Control Buttons~

The function of Control Button is shown bellow.

[Start] : Executes the sequence

[Help] : Opens a help window

[Save] : Saves sequence settings as a file. The file name is “*.aks”.

[Open] : Opens a sequence setting file “*.aks”.


~ Stop of the sequence~

When “Stop” is selected in the sequence, the process is paused and it starts again when [Start] button is clicked

Restarting step number is shown in the “Start Step” box. When finishing the process at the end of sequence,

“Start Step” will return to “1”.

The sequence can be started from any step by writing the step number to the “Start Step” box.

Write “1” to the “Start Step” box and click [Start] button, when restarting the process from the beginning.

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4. [Sequence(File)]: Sequence Setting File Dialog Box

Click [Sequence(File)] button to open sequence setting file dialog box.

Those files saved in the “Sequence setting dialog” can be applied in this dialog.

Figure 12. Window of [ Sequence(File) ]

[Open (left)] : Opens a sequence setting file (*.aks).

[Start] : Executes the sequence by the setting of selected file.

[Start All] : Executing all sequence settings.

Selected files are executed in descending order.

[Help] : Opens a help window.

[Save] : Saves a sequence setting file assignment. The file name is “*.mas”.

[Open(right)] : Opens a saved sequence setting file assignment “*. mas”.


~ Operating Suggestions ~

1. Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mas” should be

stored in the same folder.

2. When “Stop” is selected in the sequence the process will be paused and a pop-up message will appear. Click

“OK” to continue the process.

Figure 13. Window of [ Sequence Pause ]

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Measurement Results

[Measurement condition]

・ Measurement unit : Audio Precision, SYS -2722 (No.00103)

・ MCKI : 512fs 、256fs、128fs

・ BICK : 64fs

・ fs : 48kHz、96kHz、192kHz

・ Bit : 24bit

・ Input Frequency : 1kHz

・ Power Supply : AVDD= TVDD =3.3V (Regulator)、VREFH =3.3V (Regulator)

・ Pass : COAX→AK4118A(DIR) → AK4438 → AOUTL/R

・ Temperature : Room

・ Board Setting : Parallel Mode

[Measurement Results] 1. f s=48kHz, MCLK=512fs, BICK=64fs

Result

Unit Lch Rch

DAC1 : SDTI1 => DAC1 => L/ROUT1

S/(N+D) fs = 48kHz (0dBFS, 20kHz LPF) 90.3 90.5 dB

DR fs = 48kHz (-60dBFS, A-Weighted) 108.0 108.1 dB

S/N fs = 48kHz (No Inputs, A-Weighted) 108.1 108.1 dB













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2. fs=96kHz, MCLK=256fs, BICK=64fs

Result

Unit Lch Rch



DR fs = 96kHz (-60dBFS, 40kHz LPF) 102.7 102.7 dB

S/N fs = 96kHz (No Input, 40kHz LPF) 102.8 102.8 dB













3. fs=192kHz, MCLK=128fs, BICK=64fs

Result

Unit Lch Rch




S/N fs = 192kHz (No Inputs, 40kHz LPF) 102.7 102.8 dB













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4. [Plot Data] 1. fs=48kHz, MCLK=512fs, BICK=64fs

DAC1 : SDTI1 => DAC1 => AOUT1L/AOUT1R

Figure 14.FFT (0dBFS) [fs = 48kHz]

Figure 15.FFT (-60dBFS) [fs = 48kHz]

20 20k 50 100 200 500 1k 2k 5k 10k

Hz

-180

+0

-160

-140

-120

-100

-80

-60

-40

-20

d

B

r

A

20 20k 50 100 200 500 1k 2k 5k 10k

Hz

-180

+0

-160

-140

-120

-100

-80

-60

-40

-20

d

B

r

A

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Figure 16.FFT (No Inputs fs=48kHz]

Figure 17.THD+N vs. Amplitude (Input Level) [fs = 48kHz]

20 20k 50 100 200 500 1k 2k 5k 10k

Hz

-180

+0

-160

-140

-120

-100

-80

-60

-40

-20

d

B

r

A

-140 +0 -120 -100 -80 -60 -40 -20

dBFS

-140

-70

-130

-120

-110

-100

-90

-80

d

B

r

A

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Figure 18.THD+N vs. Input Frequency [fs = 48kHz, 0dBFS Inputs]

Figure 19.Linearity [fs = 48kHz]

20 20k 50 100 200 500 1k 2k 5k 10k

Hz

-130

-60

-120

-110

-100

-90

-80

-70

d

B

r

A

-140 +0 -120 -100 -80 -60 -40 -20

dBFS

-140

+0

-120

-100

-80

-60

-40

-20

d

B

r

A

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Figure 20.Frequency Response [fs = 48kHz]

Figure 21.Crosstalk [fs = 48kHz]

20 20k 50 100 200 500 1k 2k 5k 10k

Hz

-1

+1

-0.8

-0.6

-0.4

-0.2

+0

+0.2

+0.4

+0.6

+0.8

d

B

r

A

20 20k 50 100 200 500 1k 2k 5k 10k

Hz

-150

-70

-140

-130

-120

-110

-100

-90

-80

d

B

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[Plot Data] 2. fs=96kHz, MCLK=256fs, BICK=64fs

DAC1 : SDTI1 => DAC1 => AOUT1L/AOUT1R

Figure 22.FFT (0dBFS) [fs = 96kHz]

Figure 23.FFT (-60dBFS) [fs = 96kHz]

20 40k 50 100 200 500 1k 2k 5k 10k 20k

Hz

-180

+0

-160

-140

-120

-100

-80

-60

-40

-20

d

B

r

A

20 40k 50 100 200 500 1k 2k 5k 10k 20k

Hz

-180

+0

-160

-140

-120

-100

-80

-60

-40

-20

d

B

r

A

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Figure 24.FFT (No Inputs fs=96kHz]

Figure 25.THD+N vs. Amplitude (Input Level) [fs = 96kHz]

20 40k 50 100 200 500 1k 2k 5k 10k 20k

Hz

-180

+0

-160

-140

-120

-100

-80

-60

-40

-20

d

B

r

A

-140 +0 -120 -100 -80 -60 -40 -20

dBFS

-140

-70

-130

-120

-110

-100

-90

-80

d

B

r

A

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Figure 26.THD+N vs. Input Frequency [fs = 96kHz, 0dBFS Inputs]

Figure 27.Linearity [fs = 96kHz]

20 40k 50 100 200 500 1k 2k 5k 10k 20k

Hz

-130

-60

-120

-110

-100

-90

-80

-70

d

B

r

A

-140 +0 -120 -100 -80 -60 -40 -20

dBFS

-140

+0

-120

-100

-80

-60

-40

-20

d

B

r

A

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Figure 28.Frequency Response [fs = 96kHz]

Figure 29.Crosstalk [fs = 96kHz]

20 40k 50 100 200 500 1k 2k 5k 10k 20k

Hz

-1

+1

-0.8

-0.6

-0.4

-0.2

+0

+0.2

+0.4

+0.6

+0.8

d

B

r

A

20 40k 50 100 200 500 1k 2k 5k 10k 20k

Hz

-150

-70

-140

-130

-120

-110

-100

-90

-80

d

B

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REVISION HISTORY

IMPORTANT NOTICE

0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the information

contained in this document without notice. When you consider any use or application of AKM product stipulated in this document (“Product”), please make inquiries the sales office of AKM or authorized distributors as to current status of the Products.

1. All information included in this document are provided only to illustrate the operation and application examples of AKM Products. AKM neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of AKM or any third party with respect to the information in this document. You are fully responsible for use of such information contained in this document in your product design or applications. AKM ASSUMES NO LIABILITY FOR ANY LOSSES INCURRED BY YOU OR THIRD PARTIES ARISING FROM THE USE OF SUCH INFORMATION IN YOUR PRODUCT DESIGN OR APPLICATIONS.

2. The Product is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage or serious public impact, including but not limited to, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. Do not use Product for the above use unless specifically agreed by AKM in writing.

3. Though AKM works continually to improve the Product’s quality and reliability, you are responsible for complying with safety standards and for providing adequate designs and safeguards for your hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of the Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption.

4. Do not use or otherwise make available the Product or related technology or any information contained in this document for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction weapons). When exporting the Products or related technology or any information contained in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. The Products and related technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations.

5. Please contact AKM sales representative for details as to environmental matters such as the RoHS compatibility of the Product. Please use the Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. AKM assumes no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations.

6. Resale of the Product with provisions different from the statement and/or technical features set forth in this document shall immediately void any warranty granted by AKM for the Product and shall not create or extend in any manner whatsoever, any liability of AKM.

7. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of AKM.

Date

(yy/mm/dd)

Manual

Revision

Board

Revision

Reason Page Contents

15/01/09 KM120200 0 First edition

16/03/23 KM120201 1 Modification Schematic Changed.

16/03/23 KM120201 1 Modification Add Measurement Results.

18/07/11 KM120202 2 Modification Parts replacement(BNC→RCA).

18/07/11 KM120202 2 Modification Update Measurement Results.

- 28-

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AOUT2R

AOUT2L

AOUT3L

AVDD

VREFH

VREFL

CA

D0I2

C/C

SN

/DIF

CA

D0-S

PI/P

S

DA

C-P

DN

AO

UT

1R

AO

UT

1L

CD

TI/S

DA

/TD

M0

CC

LK

/SC

L/T

DM

1

SM

UT

E/C

AD

1

LRCK

SDTI1

MCLK

BICK

SDTI2

SDTI3

SDTI4

DZF

AO

UT

3R

AO

UT

4R

AO

UT

4L

TV

DD

I2C

VSS2

VS

S1

VS

S2

VSS1

VS

S1

Title

Size Document Number Rev

Date: Sheet of

AK4438 2

<AKD4438-SA>

A3

1 6Monday, June 05, 2017

Title


Date: Sheet of

AK4438 2

<AKD4438-SA>

A3


Title


Date: Sheet of

AK4438 2

<AKD4438-SA>

A3


R10147k

+

C101

47u(A)

C111100p

C109 10p

C103

0.01u(F)

+C10547u(A)

C106 2.2u

C1101000p

C1040.01u(F)

C112100p

C113 100p

C1070.01u(F)

U101

AK4438

MCLK1

BICK2

LRCK3

SDTI14

SDTI25

SDTI36

SDTI47

DZF8

PD

N9

SM

UT

E/C

AD

110

SD

A/C

DT

I/T

DM

011

CA

D0I2

C/C

SN

/DIF

013

PS

/CA

D0S

PI

14

AO

UT

L1

15

AO

UT

R1

16

AOUTL217

AOUTR218

VREFH19

VREFL20

VCOM21

VSS222

AVDD23

AO

UT

L4

26

AO

UT

R4

27

TE

ST

28

I2C

29

TV

DD

30

VS

S1

31

LD

OO

32

SC

L/C

CLK

/TD

M1

12

AOUTL324

AO

UT

R3

25

TA

B33

C1022.2u

+

C10847u(A)

- 29-

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AOUT3R

AOUT3L

AOUT1R

AOUT1L

AOUT4R

AOUT4L

AOUT2R

AOUT2L

Title


Date: Sheet of

Analog Out 2

<AKD4438-SA>

A3


Title


Date: Sheet of

Analog Out 2

<AKD4438-SA>

A3


Title


Date: Sheet of

Analog Out 2

<AKD4438-SA>

A3

2 6Monday, June 05, 2017+

C204 10u(A)

J204 AOUT2L

1 2345

J203 AOUT1L

1 2345

R207open

R201open

J208 AOUT4L

1 2345

J201 AOUT1R

1 2345

C21010p

R205open

C21110p

C21310p

+

C207 10u(A)

J207 AOUT3L

1 2345

+

C205 10u(A)

R202open

C21610p

J202 AOUT2R

1 2345

+

C202 10u(A)

C21510p

J206 AOUT4R

1 2345

R203open

J205 AOUT3R

1 2345

+

C203 10u(A)

R206open

C20910p

C21410p

R208open

+

C206 10u(A)

+

C201 10u(A)

C21210p

R204open

+

C208 10u(A)

- 30-

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

OCKS0

H

L

DIF2

DIF1

DIF0

OCKS1

1:MCLK 2:GND3:BICK 4:GND5:LRCK 6:GND7:SDTI1 8:GND9:SDTI2 10:GND11:SDTI3 12:GND13:SDTI4 14:GND

DIF0DIF1DIF2

INT0

D3.3

V

DIR-PDN

D3.3

V

D3.3

V

D3.3V

DIF0

DIF1

DIF2

OCKS1OCKS0 MCLK

BICK

SDTI3

SDTI4

OCKS0OCKS1

D3.3V

SDTI1

SDTI2

D3.3V

LRCK

DGND

DGND

DG

ND

VS

S1

VS

S1

VS

S1

VSS1

Title


Date: Sheet of

DIR 2

<AKD4438-SA>

A3


Title


Date: Sheet of

DIR 2

<AKD4438-SA>

A3


Title


Date: Sheet of

DIR 2

<AKD4438-SA>

A3


R30175

R303 open

R326

10k

C307 0.01u(F)

R324

10k

PORT303

HEADER 7X2

1357

24689

10

11

13

12

14

R322

10k

R313

open

PORT302

OPT

OUT1

VCC3

GND2

+

C302 47u(A)

R30510k

R309 5.1

R304 470

R330 0

C301 1u

R318

10k

R331 0

R320

10k

R312

open

SW301

SW DIP-5

1 2 3 4 5

10

9 8 7 6

R316

open

R319

10k

R317

10k

C3040.01u(F)

C308 0.01u(F)

R327

10k

R306 10

R325

10k

R307 0

+ C305

10u(A)

R311

open

R315

open

C3060.01u(F)

C312 47p

C303 0.01u(F)

+

C309 10u(A)

C311 10p

AK4118AU301

AK4118A

IPS01

NC2

DIF03

TEST24

DIF15

VSS16

DIF27

IPS18

P/SN9

XTL010

XTL111

VIN12

TV

DD

13

NC

14

TX

015

TX

116

BO

UT

17

CO

UT

18

UO

UT

19

VO

UT

20

DV

DD

21

VS

S2

22

MC

KO

123

LR

CK

24

SDTO25BICK26MCKO227DAUX28XTO29XTI30PDN31CM032CM133OCKS134OCKS035INT036

INT

137

AV

DD

38

R39

VC

OM

40

VS

S3

41

RX

042

NC

43

RX

144

TE

ST

145

RX

246

VS

S4

47

RX

348

+C310 47u(A)

R332 0

R310

open

R308 0

R323

10k

PORT301

COAX

12345

R321

10k

R314

open

L301 10uH(DIP)

R302 10

R328

10k

- 31-

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

S=L : A=B1S=H : A=B2

S=L : A=B1S=H : A=B2

CSN/CAD0-I2C

CAD0-SPI/PS

NONE/PS

D3.3V

D3.3V

D3.3V

CSNCAD0-I2CCAD0-SPIPS

I2C

D3.3V

CAD0I2C/CSN/DIFDIF

CAD0-SPI/PS

D3.3V

I2CPS

TDM1DIF

TDM0

CAD1

CAD0-I2CCAD0-SPI

DIR-PDN

D3.3V

D3.3V

DAC-PDN

D3.3V

D3.3V

INT0 D3.3V

DZF

SMUTE

SMUTE/CAD1

CDTI/SDA/TDM0

CCLK/SCL/TDM1

SMUTECDTI/SDATDM0CCLK/SCLTDM1

CAD1

Title


Date: Sheet of

LOGIC 2

<AKD4438-SA>

A3


Title


Date: Sheet of

LOGIC 2

<AKD4438-SA>

A3


Title


Date: Sheet of

LOGIC 2

<AKD4438-SA>

A3


SW401

SW DIP-8

1 2 3 4 5 6 7 8

16

15

14

13

12

11

10

9U401

TC7MBL3257

S1

1B12

1B23

1A4

2B15

2B26

2A7

GND8

VCC16OE

15

4B114

4B213

4A12

3B111

3B210

3A9

C4010.01u(F)

R408

10k

R4181k

R405 51

C4050.01u(F)

R419 1k

R412

10k

LE402

INT0

2 1

C4030.01u(F) C404

0.01u(F)

R403 51

R42010k

U405

SN74LVC2G14

1A1

GND2

2Y4

VCC5

2A3

1Y6

R402 51

R4221k

C4060.01u(F)

SW4044118-PDN

HL

213

SW402PDN

HL

213

U406

SN74LVC2G14

1A1

GND2

2Y4

VCC5

2A3

1Y6

C4090.01u(F)

LE403

DZF

2 1

R401 51

R411

10k

R415

10k

U404

SN74LVC2G14

1A1

GND2

2Y4

VCC5

2A3

1Y6

LE401DAC-PDN

21

D403

KA

U403

SN74LVC2G14

1A1

GND2

2Y4

VCC5

2A3

1Y6

R407 51

D402

KA

D401

KA

R41710k

R404 51

C4070.01u(F)

C4080.01u(F)

U402

TC7MBL3257

S1

1B12

1B23

1A4

2B15

2B26

2A7

GND8

VCC16OE

15

4B114

4B213

4A12

3B111

3B210

3A9

R410

10k

R41610k

R414

10k

R421 1k

C4020.01u(F)

R406 51

312

SW403MUTE

ON : MUTEOFF : UNMUTE

LE404DIR-PDN

21

R409

10k

R413

10k

- 32-

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SILK-SCREEN1:VDD2:MCLR3:PGD4:PGC5:GND

CCLK/SCLCDTI/SDA

XTIXTO

USB-RST

SCL

SDA

CSN

D3.3

V

CDTI/SDA

CCLK/SCL

CSN

D3.3

V

Title


Date: Sheet of

PC-IF 2

<AKD4438-SA>

A3

5 6Monday, March 28, 2016

Title


Date: Sheet of

PC-IF 2

<AKD4438-SA>

A3


Title


Date: Sheet of

PC-IF 2

<AKD4438-SA>

A3


R515 51

R50710k

R519 0

U501 PCA9306DP1

GND1

VREF12

SCL13

SDA14

EN8

VREF27

SCL26

SDA25

PORT501

USB(B type)

VUSB1

D-2

D+3

GND4

+

C50310u(A)

C501 0.01u(F)

C507 0.01u(F)

R517 51

C5080.1u

R512100k

R506

10k

R502 4.7k

R510 51

R51310k

C5060.1u

R501100k

R518 51

C5020.01u(F)

X50120MHz

+

C50410u(A)

U503 PCA9306DP1

GND1

VREF12

SCL13

SDA14

EN8

VREF27

SCL26

SDA25

C5100.01u(F)

PIC18F4550TQFP 44-PIN

U502

PIC18F4550

RC7/RX/DT/SDO1

RD4/SPP42

RD5/SPP5/P1B3

RD6/SPP6/P1C4

RD7/SPP7/P1D5

VS

S0

6

VD

D0

7

RB0/AN12/INT0/FLT0/SDI/SDA8 RB1/AN10/INT1/SCK/SCL9 RB2/AN8/INT2/VMO

10 RB3/AN9/CPP2/VPO11 NC/ICCK/ICPGC

12

NC/ICDT/ICPGD13RB4/AN11/KBI0/CSSPP

14 RB5/KBI1/PGM15 RB6/KBI2/PGC16 RB7/KBI3/PGD17 MCLR_N/Vpp/RE3

18

RA0/AN019

RA1/AN120

RA2/AN2/Vref-/CVref21

RA3/AN3/Vref+22

RA4/T0CKI/C1OUT/RCV23

RA5/AN4/SS_N/HLVDIN/C2OUT24

RE0/AN5/CK1SPP25

RE1/AN6/CK2SPP26

RE2/AN7/OESPP27

VD

D1

28

VS

S1

29

OSC1/CLKI30

OSC2/CLKO/RA631

RC0/T1OSO/T13CKI32

NC/ICRST_N/ICVpp33

NC/ICPORTS34

RC1/T1OSI/CCP2/UOE_N35

RC2/CCP1/P1A36

VUSB37

RD0/SPP038

RD1/SPP139

RD2/SPP240

RD3/SPP341

RC4/D-/VM42

RC5/D+/VP43

RC6/TX/CK44

R51410k

R504

10k

R511100k

C5050.1u

R516 51

C511 22p

R50810k

R509 51

C512 0.47u

C509 22p

R505

10k

R520 0

R503

10k

JP501

12345

- 33-

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+12V-->+3.3V

+12V-->+3.3V

+12V-->+3.3V

AGND AGND

AVDD

D3.3V

VREFH

VREFL

DGND

VSS2

VSS1

VSS2

VSS2

TVDD

Title


Date: Sheet of

Power 2

<AKD4438-SA>

A3


Title


Date: Sheet of

Power 2

<AKD4438-SA>

A3


Title


Date: Sheet of

Power 2

<AKD4438-SA>

A3


T604 LM2937ET-3.3/NOPB

IN1

GN

D2

OUT3

J602AGND

1

C6160.01u(F)

+C60547u(A)

+C61447u(A)

R604 short

J601+12V

1


IN1

GN

D2

OUT3

C6080.01u(F)

C6070.01u(F)

+C601470u(A)

+C61747u(A)

R609 short

R601 short

R608 short

R605 short

C6030.01u(F)

C6181u

C6150.01u(F)

C6040.01u(F)


IN1

GN

D2

OUT3

+C60647u(A)

+C60247u(A)

+C60947u(A)

- 34-

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