GPS Vehicle Navigation System

CHAPTER 1

INTRODUCTION

0

INTRODUCTION

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1.1 HISTORY

Trying to figure out where you are is probably one of humankind's oldest

problems. Navigation and positioning are crucial to so many activities and yet the

process has always been quite cumbersome and inexact. In the earliest days mankind

used the stars to navigate. Early instruments also sited the stars to determine position.

The science of horology began in part because navigation depended on precise timing

the movement of the stars.

Over the years all kinds of technologies have tried to simplify the task but every

one has had some disadvantage. Finally, the U.S. Department of Defense decided that

the military had to have a precise form of worldwide positioning. Fortunately they had

the deep pockets it took to build something really good.

1

The result is the Global Positioning System, a system that's changed navigation

forever.The Global Positioning System (GPS) is a worldwide radio-navigation system

formed from a constellation of 24 satellites and their ground stations.GPS uses these

"man-made stars" as reference points to calculate positions accurate to a matter of

meters.

In fact, with advanced forms of GPS you can make measurements to better than

a centimeter!In a sense it's like giving every square meter on the planet a unique

address. GPS receivers have been miniaturized to just a few integrated circuits and so

are becoming very economical. And that makes the technology accessible to virtually

everyone.These days GPS is finding its way into cars, boats, planes, construction

equipment, movie making gear, farm machinery, even laptop computers

GPS allows users to determine their location on land, sea, and in the air around

the Earth. It does this using satellites and receivers. There are currently 24 satellites in

orbit operated by the US Department of Defense that provide worldwide coverage 24

hours a day, 7 days a week, in all weather. These satellites are equipped with atomic

clocks and send out radio signals as to the exact time and their location. These radio

signals from the satellites are picked up by the GPS receiver. Once the GPS receiver

locks on to four or more of these satellites

GPS helps you determine exactly where you are, but sometimes important to

know how to get somewhere else. GPS was originally designed to provide navigation

information for ships and planes. So it's no surprise that while this technology is

appropriate for navigating on water, it's also very useful in the air and on the land.

2

GPS VEHICLE NAVIGATING SYSTEM

With today’s global position system (GPS) receivers, we are able to pinpoint

our own position. But, what’s more useful about GPS receivers is that they can transmit

our position information to other receivers. We decided to use both of these features to

create a wireless vehicle navigation system.

To design the navigation system, we combine the GPS ability to pinpoint

location along with the ability of the global system for mobile (GSM) to communicate

with a remote system (Mobile Phone) in a wireless fashion. Information from the

Satellites is displayed on graphical LCD.

1.2 DESCRIPTION

Brief description of hardware modules

The module mainly consists of

Micro controller

GSM Modem

GPS Receiver

LCD Display unit

Power supply unit

MICRO CONTROLLER

The XA_G39 is a member of Philip’s 8051 XA (extended Architecture) family

of high performance 16-bit single-chip micro controllers.

The XA_G39 contains 32 Kbytes of Flash program memory, and provides three

general-purpose timers/counters, a watchdog timer, dual UARTs, and four general-

purpose I/O ports with programmable output configurations. The entire functionality of

the GSM and GPS is under the control of Micro controller.

3

GSM MODEM

GSM (Global System for Mobile communication) Mobile service provides the

user to receive a call, to call for the people at remote end, send SMS to remote areas

just by using GSM-SMS commands and Embedded systems. This device can be used to

receive a call and to call as many people as possible. GSM Mobile Interface can call to

remote areas and can receive a call from remote areas. GSM users can send and receive

data, at rates up to 9600 bps.

GPS RECEIVER

The Global Positioning System, usually called GPS, is the only fully-functional

satellite navigation system. A constellation of more than two dozen GPS satellites

broadcasts precise timing signals by radio, allowing any GPS receiver (abbreviated to

GPSr) to accurately determine its location (longitude, latitude and altitude) in any

weather, day or night, anywhere on Earth.

The GPS (Global Positioning System) is a "constellation" of 24 well-spaced

satellites that orbit the Earth and make it possible for people with ground receivers to

pinpoint their geographic location. The location accuracy is anywhere from 1 to 100

meters depending on the type of equipment used. The GPS is owned and operated by

the U.S. Department of Defense, but is available for general use around the world.

GPS receivers collect signals from satellites in view. They display the user's

position, velocity, and time, as needed for their marine, terrestrial, or aeronautical

applications. Some display additional data, such as distance and bearing to selected

waypoints or digital charts.

4

Calculating positions

GPS allows receivers to accurately calculate their distance from the GPS

satellites. The receivers do this by measuring the time delay between when the satellite

sent the signal and the local time when the signal was received. This delay, multiplied

by the speed of light, gives the distance to that satellite. The receiver also calculates the

position of the satellite based on information periodically sent in the same signal. By

comparing the two, position and range, the receiver can discover its own location.

LCD DISPLAY UNIT

Generation of LCD supply voltage (external supply The PCD8544 is a low

power CMOS LCD controller/driver, designed to drive a graphic display of 48 rows

and 84 columns. All necessary functions for the display are provided in a single chip,

including on-chip generation of LCD supply and bias voltages, resulting in a minimum

of external components and low power consumption.

POWER SUPPLY UNIT

Power supply unit is used to provide a constant 5Volts and 3.3volts supply to

different ICs and GPS Receiver. This is a standard circuit using external 12V DC

adopter and fixed 3-pin voltage regulator (7805).

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1.3 BLOCK DIAGRAM

Fig 1.1 Block diagram of the Project

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CHAPTER 2

DESCRIPTION OF

MICROCONTROLLER

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DESCRIPTION OF MICROCONTROLLER

___ ______________________________________________________________

Fig 2.1 Block Diagram of Micro controller

8

Fig 2.2 Logical Symbol of Micro controller

2.1. DESCRIPTION OF XA_G39 MICROCONTROLLER

The XA_G39 contains 32 Kbytes of Flash program memory. A default serial

loader program in the Boot Rom allows In-System Programming (ISP) of the flash

memory without the need for a loader in the Flash code. User programs may erase and

reprogram the Flash memory at will through the use of standard routines contained in

the Boot ROM (In-Application Programming).

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2.2. FEATURES

On-chip FLASH Program Memory

Speed up to 30 MHz

On-chip FLASH Program Memory

Supports off-chip program and data addressing up to 1 megabyte

Two enhanced UARTs with independent baud rates

Three 16-bit timers/counters T0, T1and additional T2

Seven interrupt sources

Four 8-bit input output ports

Eight interrupt priority levels

Watchdog Timer

Power control modes

-Clock can be stopped and resumed

-Idle mode

-Power down mode

Wakeup from power down by an external interrupt

Flash memory features

FLASH EPROM internal program memory with chip erases.

Up to 64K byte external program memory if the internal program memory is

disabled

Programmable security bits.

10,000 minimum erase/program cycles for each byte

10 year minimum data retention

Programming support available from many popular vendors.

10

Fig 2.3 Pin configuration of Micro controller

10: Reset Signal; The device is reset whenever a logic “0“ is applied to RST for at

least 10 microseconds, placing a low level on the pin re-initializes the on-chip logic.

Reset must be asserted when power is initially applied to the XA and held until the

oscillator is running. The duration of reset must be extended when power is initially

applied or when using reset to exit power down mode. This is due to the need to allow

the oscillator time to start up and stabilize. For most power supply ramp up conditions,

this time is 10 milliseconds.

11

Fig 2.4 Description of Reset pin

2–9: Port 1; Port 1 is an 8-bit I/O port with a user-configurable output type.

Pin 2:WRH: - Address bit 0 of the external address bus.

Pin 3: A1 - Address bit 1 of the external address bus.

Pin 4: A2 – Address bit 2 of the external address bus.

Pin 5: A3 – Address bit 3 of the external address bus.

Pin 6: RXD1 – Receiver input for serial port 1

Pin 7: TXD1–Transmitter output for serial port 1

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Pin 8: T2 –Timer/Counter 2 external count input/clock out.

Pin 9: T2EX – Timer/Counter 2 reload/capture/direction control

11,13-19: Port 3 as with Port 1, each of these pins can be used as universal input

or output. However, each pin of Port 3 has an alternative function.

Pin 11: RXD0 - Receiver input for serial port 0

Pin 13: TXD0 – Transmitter output for serial port 0

Pin 14: INT0 - input for interrupt 0

Pin 15: INT1 - input for interrupt 1

Pin 16: T0 - clock input of counter 0

in 17: T1 - clock input of counter 1

Pin 18: WRL - signal for writing to external (add-on) RAM memory

Pin 19: RD - signal for reading from external RAM memory.

20-21: X2 and X1; Input and output of internal oscillator. Quartz crystal

controlling the frequency commonly connects to these pins. Capacitances

within the oscillator mechanism (see the image) are not critical and are

normally about 22pF. Instead of a quartz crystal, miniature ceramic resonators

can be used for dictating the pace. In that case, manufacturers recommend using

somewhat higher capacitances (about 47 puffs). New Mucus works at

frequencies from 0Hz to 50MHz+.

13

Fig 2.5 Description of XTAL1 and XTAL2 pins

24-31: Port 2 Similar to Port 0, pins of Port 2 can be used as universal

input/output, if external memory is not used. If external memory is used, P2

behaves as address output (A0 – A7) when ALE pin is at high logical level, or

as data output (Data Bus) when ALE pin is at low logical level.

1,22: GND; Ground

36- 43: Port 0 if external memory is not present, pins of Port 2 act as universal

input/output. If external memory is present, this is the location of the higher

address byte, i.e. addresses A8 – A15. It is important to note that in cases when

not all the 8 bits are used for addressing the memory (i.e. memory is smaller

than 64kB), the rest of the unused bits are not available as input/output.

32: PSEN; MCU activates this bit (brings to low state) upon each reading of

byte (instruction) from program memory. If external ROM is used for storing

the program, PSEN is directly connected to its control pins.

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Of the external memory, MCU sends the lower byte of the address register

(addresses A0 – A7) to port P0 and activates the output ALE. External register

(74HCT373 or 74HCT375 circuits are common), memorizes the state of port P0

upon receiving a signal from ALE pin, and uses it as part of the address for

memory chip. During the second part of the mechanical MCU cycle, signal on

ALE is off, and port P0 is used as Data Bus. In this way, by adding only one

cheap integrated circuit, data from port can be multiplexed and the port

simultaneously used for transferring both addresses and data.

35: EA; Bringing this pin to the logical state zero (mass) designates the ports P2

and P3 for transferring addresses regardless of the presence of the internal

memory. This means that even if there is a program loaded in the MCU it will

not be executed, but the one from the external ROM will be used instead.

Conversely, bringing the pin to the high logical state causes the controller to use

both memories, first the internal, and then the external (if present).

23,44: VCC; Power +5V.

2.3 TIMERS

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XA-G39 TIMER/COUNTERS

The XA has two standard 16-bit enhanced Timer/Counters: Timer 0 and Timer

1. Additionally, it has a third 16-bit Up/Down timer/counter, T2. A central timing

generator in the XA core provides the time-base for all XA Timers and Counters. The

timer/event counters can perform the following functions:

– Measure time intervals and pulse duration

– Count external events

– Generate interrupt requests

– Generate PWM or timed output waveforms

All of the timer/counters (Timer 0, Timer 1 and Timer 2) can be independently

programmed to operate either as timers or event counters via the C/T bit in the TnCON

register. All timers count up unless otherwise stated. These timers may be dynamically

read during program execution.

The base clock rate of all of the timers is user programmable. This applies to

timers T0, T1, and T2 when running in timer mode (as opposed to counter mode), and

the watchdog timer. The clock driving the timers is called TCLK and is determined by

the setting of two bits (PT1, PT0) in the System Configuration Register (SCR). The

frequency of TCLK may be selected to be the oscillator input divided by 4 (Osc/4), the

oscillator input divided by 16 (Osc/16), or the oscillator input divided by 64 (Osc/64).

This gives a range of possibilities for the XA timer functions, including baud rate

generation, Timer 2 capture. Note that this single rate setting applies to all of the timers.

Timer 0 and Timer 1

Control bits C/T in the special function register TMOD select the “Timer” or

“Counter” function. These two Timer/Counters have four operating modes, which are

selected by bit-pairs (M1, M0) in the TMOD register. Timer modes 1, 2, and 3 in XA

are kept identical to the 80C51 timer modes for code compatibility. Only the mode 0 is

replaced in the XA by a more powerful 16-bit auto-reload mode. This will give the XA

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timers a much larger range when used as time bases. The recommended M1, M0

settings for the different modes are shown in Figure 6.

Table 2.1 System Configuration register

SCR (440h) – Not bit addressable

Reset Value – 00H

7 6 5 4 3 2 1 0

----- ----- ----- ----- PT1 PT0 CM PZ

Timer/Counter Control

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Table 2.2 Timer 0 and 1 Mode control register

TMOD (45Ch) – Not bit addressable

Reset Value – 00H

New Enhanced Mode 0

For timers T0 or T1 the 13-bit count mode on the 80C51 (current Mode 0) has

been replaced in the XA with a 16-bit auto-reload mode. Four additional 8-bit data

registers (two per timer: RTHn and RTLn) are created to hold the auto-reload values. In

this mode, the TH overflow will set the TF flag in the TCON register and cause both

the TL and TH counters to be loaded from the RTL and RTH registers respectively.

These new SFRs will also be used to hold the TL reload data in the 8-bit auto-reload

mode (Mode 2) instead of TH.The overflow rate for Timer 0 or Timer 1 in Mode 0 may

be calculated as follows:

Timer_Rate = Osc / (N * (65536 – Timer_Reload_Value))

Where N = the TCLK prescaler value: 4 (default), 16, or 64.

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Mode 1

Mode 1 is the 16-bit non-auto reload mode.

Mode 2

Mode 2 configures the Timer register as an 8-bit Counter (TLn) with automatic

reload. Overflow from TLn not only sets TFn, but also reloads TLn with the contents of

RTLn, which is preset by software. The reload leaves THn unchanged. Mode 2

operations is the same for Timer/Counter 0.The overflow rate for Timer 0 or Timer 1 in

Mode 2 may be calculated as follows:

Timer_Rate = Osc / (N * (256 – Timer_Reload_Value))

Where N = the TCLK prescaler value: 4, 16, or 64.

Mode 3

Timer 1 in Mode 3 simply holds its count. The effect is the same as setting TR1

= 0.

Timer 0 in Mode 3 establishes TL0 and TH0 as two separate counters. TL0 uses the

Timer 0 control bits C/T, GATE, TR0, and TF0 as well as pin INT0. TH0 is locked into

a timer function and takes over the use of TR1 and TF1 from Timer 1. Thus, TH0 now

controls the “Timer 1” interrupt. Mode 3 is provided for applications requiring an extra

8-bit timer. When Timer 0 is in Mode 3, Timer 1 can be turned on and off by switching

it out of and into its own Mode 3, or can still be used by the serial port as a baud rate

generator, or in fact, in any application not requiring an interrupt

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Table 2.3 Timer control register

TCON (410h) – bit addressable

7 6 5 4 3 2 1 0

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT1


Timer T2

Timer 2 in the XA is a 16-bit Timer/Counter, which can operate as either a

timer or as an event counter. This is selected by C/T2 in the special function register

T2CON. Upon timer T2 overflow/underflow, the TF2 flag is set, which may be used to

generate an interrupt. It can be operated in one of three operating modes: auto-reload

(up or down counting), capture, or as the baud rate generator (for either or both UARTs

via SFRs T2MOD and T2CON). These modes are

Table 2.4 Timer2 control register

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T2CON (418h) – bit addressable

Reset Value: 00H

7 6 5 4 3 2 1 0

TF2 EXF2 RCLK0 TCLK0 EXEN2 TR2 C/T2 CP/RL2


The timer2 operating modes

Table 2.5 Timer2 modes

Capture Mode

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In the capture mode there are two options, which are selected by bit EXEN2 in

T2CON. If EXEN2 = 0, then timer 2 is a 16-bit timer or counter, which upon

overflowing sets bit TF2, the timer 2 overflow bit. This will cause an interrupt when the

timer 2 interrupt is enabled. If EXEN2 = 1, then Timer 2 still does the above, but with

the added feature that a 1-to-0 transition at external input T2EX causes the current

value in the Timer 2 registers, TL2 and TH2, to be captured into registers RCAP2L and

RCAP2H, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON

to be set. This will cause an interrupt in the same fashion as TF2 when the Timer 2

interrupt is enabled.

Auto-Reload Mode (Up or Down Counter)

In the auto-reload mode, the timer registers are loaded with the 16-bit value in

T2CAPH and T2CAPL when the count overflows. T2CAPH and T2CAPL are

initialized by software. If the EXEN2 bit in T2CON is set, the timer registers will also

be reloaded and the EXF2 flag set when a 1-to-0 transition occurs at input T2EX

In this mode, Timer 2 can be configured to count up or down. This is done by

setting or clearing the bit DCEN (Down Counter Enable) in the T2MOD special

function register (see Table 4). The T2EX pin then controls the count direction. When

T2EX is high, the count is in the up direction, when T2EX is low; the count is in the

down direction.

Baud Rate Generator Mode

By setting the TCLKn and/or RCLKn in T2CON or T2MOD, the Timer 2 can

be chosen as the baud rate generator for either or both UARTs. The baud rates for

transmit and receive can be simultaneously different.

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Table 2.6. Timer2 Baud Rate Generator Mode

Table 2.7 Timer2 mode control register

T2MOD (419h) – bit addressable

Reset Value: 00H

7 6 5 4 3 2 1 0

----- ----- RCLK1 TCLK1 ----- ----- T2OE DCEN


2.4 SERIAL COMMUNICATION

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When a microprocessor communicates with the outside world, it provides data

in byte-sized chunks. In some cases, such as printers, the information is simply

grabbed from the 8-bit data bus and presented to the 8-bit data bus of the printer. This

can work only if the cable is not too long, since long cables diminish and ever distort

signals. Furthermore, and 8-bit data path is expensive. For these reasons, serial

communication is used for transferring data between two systems located at distances

of hundreds of feet to millions of miles apart.

The fact that in serial communication a single data line is used instead of the 8-

bit data line of parallel communication makes it not only much cheaper but also makes

it possible for two computers located in two different cities to communicate over the

telephone.

Serial data communication uses two methods, a synchronous and synchronous.

The synchronous method transfers a block of data at a time while the synchronous

transfers a single byte at a time. It is mean possible to write software to use either of

these methods, but the programs can be tedious and long. For this reason, there are

special IC chips made by many manufacturers for serial data communications. These

chips are commonly referred to as UART (universal asynchronous receiver-transmitter)

and USART (universal synchronous -asynchronous receiver-transmitter). The XA

chips has built-in UARTs, which is discussed

Fig 2.6 Serial Communication

2.4.1. Asynchronous serial communication and data framing

Sender Receiver

10100111001010

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The data coming in at the receiving end of the data line in a serial data transfer

is all 0's and 1's; it is difficult to make sense of the data unless the sender and receiver

agree on a set of rules, a protocol, on how the data is packed, how many bits constitute

the character, and when the data begins and ends.

2.4.2 Start and stop bits

Asynchronous serial data communication is widely used for character

orientation transmissions. In the asynchronous method, each character is placed in

between start and stop bits. This is the called framing. In data framing for

asynchronous communications, the data, such as ASCII characters, are packed in

between a start bit and a stop bits. The start bit is always one-bit but the stop bit can be

one or two bits. The start bit is always a 0 and the stop bit is 1.

2.4.3 Parity bit

In some systems in order to maintain data integrity, the parity bit of the

character byte is included in the data frame. This means that for each character we

have a single parity bit in addition to start and stop bits. The parity bit is odd or even.

In case of an odd parity bit the number of data bits of a book of including the parity bit,

is even.

2.4.4 Data transfer rate

The rate of data transfer in serial data communication is stated in bps (bits per

second). Another widely used terminology for bps is baud rate. Baud rate is defined as

the number of signal changes per second. As far as the conductor wire is concerned.

Fig 2.7 Data Framing

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Spacestopbit

0 1 0 0 0 0 0 1 Startbit mark

Goes out lastGoes out first

d7 d0

RS232 Level TTL Level

Fig 2.8 Data transfer between 89C51 and System

2.4.5 RS232 standards

To allow compatibility among the data communication equipment made by

various manufacturers; an interfacing standard called RS232, was set by the electronics

industries association (EIA) in 1960. RS 232 is the most widely used serial input-

output interfacing standard. In RS 232, a 1 is represented by -3 to -25V, while a 0 bit is

+ 3 to + 25V. To connect any RS 232 to a µc system, voltage converters such as Max

232are used. Max 232 IC chips are commonly referred to as line drivers.

System MicroController

MAX232

Line Driver/Voltage Converter

26

RS232 CONNECTORS

Fig 2.9 Pin Diagram of RS232 Connector

RS232 STANDARDS

RS232 PINS

Pin Description

1 Protective ground

2 Transmitted data (TxD)

3 Received data (RxD)

4 Request to send (RTS)

5 Clear to send (CTS)

6 Data set ready (DSR)

7 Signal ground (GND)

8 Data carrier detect (DCD)

9/10 Reserved for data setting

RS232P (DB9) RS232S (DB9)

RS232P (DB25)

1 13

14 251

1

27

11 Unassigned

12 Secondary data carrier

13 Secondary clear send

14 Secondary transmitted data

15 Transmit signal element timing

16 Secondary received data

17 Receive signal element timing

18 Unassigned

19 Secondary request to send

20 Data terminal ready (DTR)

21 Signal quality detector

22 Ring indicator

23 Data signal rate select

24 Transmit signal element timing

25 Unassigned

2.4.6 Max 232

The RS 232 is not compatible with micro controllers, so a line driver converts

the RS 232's signals to TTL voltage levels.

The MAX232 is a dual driver/receiver that includes a capacitive voltage

generator to supply TIA/EIA-232-F voltage levels from a single 5-V supply. Each

receiver converts TIA/EIA-232-F inputs to 5-V TTL/CMOS levels. These receivers

have a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept ±30-V

inputs.

Each driver converts TTL/CMOS input levels into TIA/EIA-232-F levels.

28

Fig 2.10 Describing the Function of Max 232

2.5 REGITERS USED FOR COMMUNICATION

The two serial ports on the XA-G39 are identical and are called serial port 0 and

serial port 1.

2.5.1 S0BUF Register:

S0BUF is an 8-bit register used solely for serial communication in the XA-G39.

For byte of data to be transferred via TxD0 line, it must be placed in S0BUF register.

S0BUF also holds the byte of data when it is received by the XA-G39’s RxD0 line.

The moment a byte is written into S0BUF, it is framed with the start and stop

bits and transferred serially via TxD0 line. Similarly when bits r received serially via

RxD0, the XA-G39 defames it by eliminating a byte out of the received, and then

placing it in the S0BUF.

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2.5.2S0CON (Serial control register 0)

Bit addressable.

Address location 420H

Table 2.8 Serial control register

7 6 5 4 3 2 1 0

SM0_0 SM1_0 SM2_0 REN_0 TB8_0 RB8_0 TI_0 RI_0

SM2_0 - Enables the multiprocessor communication feature in Modes 2 and 3. In Mode

2 or 3, if SM2 is set to 1, then RI will not be activated if the received 9th data bit (RB8)

is 0. In Mode 1, if SM2=1 then RI will not be activated if a valid stop bit was not

received. In Mode 0, SM2 should be 0.

REN_0 - Enables serial reception. Set by software to enable reception. Clear by

software to disable reception.

.

TB 8_0 - The 9th data bit that will be transmitted in Modes 2 and 3. Set or clear by

software as desired. The TB8 bit is not double buffered.

RB 8_0 - In Modes 2 and 3, is the 9th data bit that was received. In Mode 1, if SM2=0,

RB8 is the stop bit that was received. In Mode 0, RB8 is not used.

TI_0 - transmits interrupt flag. Set by hardware at the beginning of the stop bit in

mode 1. It must be cleared by software.

RI_0 -received interrupts flag. Set by hardware halfway through the stop bit time in

mode 1.It must be cleared by software.

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Table 2.9 Modes of S0CON

SM 0 SM1 Serial mode 0

0 0 Synchronous mode

0 1 8-bit data, 1 start bit, 1 stop bit, variable baud rate

1 0 9- bit data, 1 start bit, 1 stop bit, fixed baud rate

1 1 9- bit data, 1 start bit, 1 stop bit, variable baud rate

2.5.3 S1BUF Register

S1BUF is an 8-bit register used solely for serial communication in the XA-G39.

For byte of data to be transferred via TxD1 line, it must be placed in S1BUF register.

S1BUF also holds the byte of data when it is received by the XA-G39’s RxD1 line.

The moment a byte is written into S1BUF, it is framed with the start and stop

bits and transferred serially via TxD1 line. Similarly when bits r received serially via

RxD1, the XA-G39 defames it by eliminating a byte out of the received, and then

placing it in the S1BUF.

2.5.4 S1CON (Serial control register 1)

Bit addressable.

Address location 424H


7 6 5 4 3 2 1 0


31

SM2_0 - Enables the multiprocessor communication feature in Modes 2 and 3. In Mode

2 or 3, if SM2 is set to 1, then RI will not be activated if the received 9th data bit (RB8)

is 0. In Mode 1, if SM2=1 then RI will not be activated if a valid stop bit was not

received. In Mode 0, SM2 should be 0.

REN_1 - Enables serial reception. Set by software to enable reception. Clear by

software to disable reception.

.

TB 8_1-The 9th data bit that will be transmitted in Modes 2 and 3. Set or clear by

software as desired. The TB8 bit is not double buffered.

RB 8_1 - In Modes 2 and 3, is the 9th data bit that was received. In Mode 1, if SM2=0,

RB8 is the stop bit that was received. In Mode 0, RB8 is not used.

TI_1 -transmits interrupts flag. Set by hardware at the beginning of the stop bit in


RI_1 -received interrupts flag. Set by hardware halfway through the stop bit time in


Table 2.11 Modes of S1CON

SM 0 SM1 Serial mode 0

0 0 Synchronous mode

0 1 8-bit data, 1 start bit, 1 stop bit, variable baud rate

1 0 9- bit data, 1 start bit, 1 stop bit, fixed baud rate

1 1 9- bit data, 1 start bit, 1 stop bit, variable baud rate

2.6 INTERRUPTS

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A single micro controller can serve several devices. In the interrupt method,

whenever any device needs its service, the device notifies the micro controller by

sending it an interrupt signal. Upon receiving an interrupt signal, the micro controller

interrupts whatever it is doing and serves the device. The program associated with the

interrupt is called the interrupt service routine (ISR). The advantageous of interrupts is

that the micro controller can serve many devices based on the priority assigned to it.

XA-G3 Interrupts

The XA-G3 defines four types of interrupts:

• Exception Interrupts – These are system level errors and other very important

occurrences that include Stack

Overflow, Divide by 0, Breakpoint, Trace, User Mode RETI and Reset.

• Trap Interrupts – These are TRAP instructions, generally used to call system

services in a multi-tasking system.

• Event Interrupts – These are peripheral interrupts from devices such as UARTs,

timers, and external interrupt inputs.

• Software Interrupts – These are equivalent to hardware event interrupts, but are

requested only under software control and have fixed priority levels.

The XA-G3 supports 38 vectored interrupt sources. These include 9 maskable Event

Interrupts (for the various

XA-G3 peripherals), 7 Software Interrupts, 6 Exception Interrupts and 16 Traps.

Interrupt Enable (IE) registers

33

Table 2.12. Interrupt Enable high byte register(IEH):

7 6 5 4 3 2 1 0

----- ----- ----- ----- ETI1 ERI1 ETI0 ERI0

---- Not implemented, reserved for future use.




ETI1 enables or disables serial port 1 TX overflow interrupt.

ERI1 enables or disables serial port 1 RX interrupt 1.

ETI0 enables or disables serial port 0 TX overflow interrupt.

ERI0 enables or disables serial port 0 RX interrupt 0.

Table 2.13 Interrupt Enable low byte register (IEL):

7 6 5 4 3 2 1 0

EA ----- ----- ET2 ET1 EX1 ET0 EX0

EA disable all interrupts. If EA = 0, now interrupt is acknowledged. If EA = 1,

each interrupt source is individually enabled or disabled by setting or clearing its enable

a lap bit.



ET2 enables or disables timer 2 overflow or capturer interrupt.

ET1 enables or disables timer 1 overflow interrupt.

EX1 enables or disables external interrupt 1.

ET0 enables or disables timer 0 overflow interrupt.

34

EX0 enables or disables external interrupt 0.

2.6.1 Event Interrupts

Event interrupts in the XA-G3 can be grouped into three basic types:

1. External Interrupts

2. Timer Interrupts

3. Serial Port Interrupts

3.3.1. External Interrupts

External interrupts available on the XA-G3 are External Interrupt 0 and External

Interrupt 1. Bits in the TCON register as shown below control these external interrupts:

Timer control register


7 6 5 4 3 2 1 0

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IE1


External interrupts can be either falling edge triggered or low level triggered.

The Interrupt Type Control bits IT1/IT0 control this. If IT1/IT0 is set to “1” then that

interrupt will be set for falling edge trigger. If IT1/IT0 to “0” then that interrupt will be

set for low-level trigger. When an external interrupt is detected it will set the Interrupt

Edge Flag IE1/IE0. If the external interrupt is enabled the setting of this flag will

generate an External Interrupt 1 or External Interrupt 0. The IE1/IE0 flag will be

cleared when the interrupt is processed or it can be cleared by software at any time.

35

2.6.2 Timer Interrupts

Timer interrupts available on the XA-G3 are Timer 0 interrupt, Timer 1

interrupt and Timer 2 interrupt. Timer 0 and Timer 1 interrupts are identical and are

controlled by bits in the TCON register as shown below:

Timer control register


7 6 5 4 3 2 1 0

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT1


The timer is turned on by setting the Timer Run Control bit TR1/TR0 to “1”.

Setting the Timer Run Control bit TR1/TR0 to “0” turns off the timer. When the

timer/counter overflows it will set the Timer Overflow Flag

TF1/TF0. If the timer interrupt is enabled the setting of this flag will generate a

Timer 0 Interrupt or a Timer 1 interrupt. The TF1/TF0 flag will be cleared when the

interrupt is processed or it can be cleared by software at any time.Timer 2 on the XA-

G3 has additional functional modes over Timer 0 and 1 that will not be discussed here.

Bits in the T2CON register as shown below control timer 2 interrupts:

Timer 2 control register

T2CON (418h) – bit addressable

7 6 5 4 3 2 1 0

36

TF2 EXF2 RCLK0 TCLK0 EXEN2 TR2 C/T2 CP/RL2


Timer 2 is turned on by setting the Timer Run Control bit TR2 to “1”. Setting

the Timer Run turns off timer 2 Control bit TR2 to “0”. When the timer/counter

overflows it will set the Timer 2 Overflow Flag TF2. If the timer 2 interrupt is enabled,

the setting of this flag will generate a Timer 2 Interrupt. The TF2 flag will NOT be

cleared when the interrupt is processed so it must be cleared by software or the Timer 2

interrupt will reoccur. If RCLK1/RCLK0 or TCLK1/TCLK0 are set to “1”, then the

Timer 2 overflow rate is being used as a baud rate clock source for UART0 or UART1.

In this case the TF2 flag will NOT be set when the timer/counter overflows. If Timer 2

is enabled in external capture or reload mode, a negative transition on the T2EX pin

will set the Timer 2 external flag EXF2. If the Timer 2 interrupt is enabled, the setting

of the Timer 2 external flag EXF2 can also generate a Timer 2 Interrupt. The EXF2

flag will NOT be cleared when the interrupt is processed so it must be cleared by

software or the Timer 2 interrupt will reoccur.

2.6.3 Serial Port Interrupts

The two Serial Ports on the XA-G3 are identical and are called Serial Port 0 and

Serial Port 1. Each Serial Port has two interrupts – one for the transmitter and one for

the receiver. Notice that this is an enhancement over the Serial Port on the 8051 (which

37

had only a single shared interrupt for both the transmitter and receiver). This gives the

XA-G3 a total of four interrupts for the Serial Ports:

1. Serial Port 0 Rx

2. Serial Port 0 Tx

3. Serial Port 1 Rx

4. Serial Port 1 Tx

Bits in identical registers called S0CON and S1CON control this Serial Port interrupts.

To avoid confusion we will look only at S0CON as shown below:

S0CON (420h) – bit addressable


7 6 5 4 3 2 1 0


Serial Port 0 Control

The Serial Port 0 receiver is enabled by setting the Receiver Enable bit REN_0

to “1”. Setting the Receiver Enable bit REN_0 to “0” disables the Serial Port 0 receiver.

When Serial Port 0 receives a character the Receive Interrupt Flag RI_0 will be set. If

the Serial Port 0 Rx interrupt is enabled the setting of this flag will generate a Serial

Port 0 Rx Interrupt. The RI_0 flag will NOT be cleared when the interrupt is processed

so it must be cleared by software or the Serial Port 0 Rx interrupt will reoccur. When

Serial Port 0 transmits a character the Transmit Interrupt Flag TI_0 will be set. If the

Serial Port 0 Tx interrupt is enabled the setting of this flag will generate a Serial Port 0

Tx Interrupt. The TI_0 flag will NOT be cleared when the interrupt is processed so it

must be cleared by software or the Serial Port 0 Tx interrupt will reoccur. Serial Port 0

also has a Status Interrupt flag STINT0 that is contained in the Serial Port 0 Extended

Status Register (S0STAT). If the STINT0 flag is set to “1” the extended status flags

are enabled and any one of them can also generate a Serial Port 0 Rx Interrupt by

38

setting the RI_0 flag. These extended status flags include raming Error, Overrun Error

and Break Detect. Please refer to the XA-G3 data sheet for more details on these flags.

The RI_0 flag will NOT be cleared when the interrupt is processed so it must be

cleared by software or the Serial Port 0 Rx interrupt will reoccur. As mentioned earlier

the function of the Serial Port 1 Interrupts is identical to the Serial Port 0 Interrupts and

therefore will not be covered here.

39

CHAPTER 3

GSM MODEM

GSM MODEM

40

3.1 INTRODUCTION

Ana logic’s GSM Smart Modem is a multi-functional, ready to use, rugged

and versatile modem that can be embedded or plugged into any application. The Smart

Modem can be customized to various applications by using the standard AT commands.

The modem is fully type-approved and can directly be integrated into your projects

with any or all the features of Voice, Data, Fax, SMS, and Internet etc.

Smart Modem kit contains the following items

Ana logic’s GSM/GPRS Smart Modem

SMPS based power supply adapter.

3 dBi antenna with cable (optional: other types)

Data cable (RS232)

User manual

3.2. PRODUCT DESCRIPTION

The connectors integrated to the body, guarantee the reliable output and input

connections. An extractible holder is used to insert the SIM card (Micro-SIM type).

Status LED indicates the operating mode.

3.2.1. Physical Characteristics

Table 3.1 Physical characteristics

Dimensions 100 x 78 x 32 mm (excluding connectors)

41

Weight 125 grams

Housing Aluminum Profiled

3.2.2. Temperature Range

Operating temperature: from -200C to +550C

Storage temperature: from -250C to +700C

Fig 3.1

slot:

3.2.3. Installing the modem

To install the modem, plug the device on to the supplied SMPS Adapter. For

Automotive applications fix the modem permanently using the mounting slots (optional

as per your requirement dimensions).

42

3.2.4. Inserting/ Removing the SIM Card

To insert or Remove the SIM Card, it is necessary to press the SIM holder

ejector button with Sharp edged object like a pen or a needle. With this, the SIM holder

comes out a little, then pulls it out and insert or remove the SIM Card.

Figure 3.2 Inserting/ Removing of the SIM Card

Make sure that the ejector is pushed out completely before accessing the SIM

Card holder do not remove the SIM card holder by force or tamper it (it may

permanently damage). Place the SIM Card Properly as per the direction of the

installation. It is very important that the SIM is placed in the right direction for its

proper working condition.

3.2.5. Connecting External Antenna

Connect GSM Smart Modem to the external antenna with cable end with

SMA male. The Frequency of the antenna may be GSM 900/1800 MHz. The

antenna may be (0dBi, 3dBi or short length L-type antenna) as per the field

43

conditions and signal conditions.

Table 3.2 Parameter of the External Antenna

Parameters MIN Avg. Max

Supply Voltage 5 V 9 V 12 V

Peak Current at 5 V supply 1.8 A

(during

transmission)

Average Current at 5 V supply

in idle Mode

35 mA

Average Current at 5 V supply in

idle Mode and RS232 Power

Saving Activated

13 mA

3.2.6. Connecting Modem to external devices

RS232 can be used to connect to the external device through the D-SUB/ USB

(for USB model only) device that is provided in the modem.

44

3.2.7. Connectors

Table 3.3 Connectors and Its Function:

Connector Function

SMA RF Antenna connector

15 pin or 9 pin D-SUB

USB (optional)

RS232 link

Audio link (only for 15 D-SUB)

Reset (only for 15 D-SUB)

USB communication port (optional)

2 pin Phoenix tm Power Supply Connector

SIM Connector SIM Card Connection

RJ11

(For 9 D-SUB and USB only)

Audio link

- Simple hand set connection (4 wire)

- 2 wire desktop phone connection

3.3. DESCRIPTION OF THE INTERFACES

The modem comprises several interfaces:

- LED Function including operating Status

- External antenna (via SMA)

45

- Serial and control link

- Power Supply (Via 2 pin Phoenix tm contact)

- SIM card holder

3.4. LED STATUS INDICATOR

The LED will indicate different status of the modem:

- OFF Modem Switched off

- ON Modem is connecting to the network

- Flashing Slowly Modem is in idle mode

- Flashing rapidly Modem is in transmission/communication (GSM only)

3.5. 9-PIN D-SUB FEMALE CONNECTOR

Table 3.4 -PIN D-SUB Female Connector

46

PIN NAME Designation Type

1 X None NC NC

2 TX Transmit Data Input

3 Rx Receive Data Output

4 DSR Data Set Ready Output

5 GND Ground Ground

6 DTR Data Terminal Ready Input

7 CTS Clear to send Output

8 RTS Request to send Input

9 X None NC NC

AT COMMANDS

3.6 GSM SHORT MESSAGES AT COMMANDS

47

3.6.1. AT commands features

Line settings

A serial link handler is set with the following default values (factory settings):

Auto baud, 8 bits data, 1 stop bit, no parity, flow control.

Command line

Commands always start with AT (which means attention) and finish with a <CR>

character.

Information responses and result codes

Responses start and end with <CR><LF>,.

1 If command syntax is incorrect, an ERROR string is returned.

2 If command syntax is correct but with some incorrect parameters, the +CME

ERROR: <Err> or +CMS ERROR: <SmsErr> strings are returned with different

error codes.

3 If the command line has been performed successfully, an OK string is returned.

4 In some cases, such as “AT+CPIN?” or (unsolicited) incoming events, the

product does not return the OK string as a response.

3.6.2. Send message +CMGS

Description

The <address> field is the address of the terminal to which the message is sent.

To send the message, simply type, <ctrl-Z> character (ASCII 26). The text can contain

all existing characters except <ctrl-Z> and <ESC> (ASCII 27). This command can be

aborted using the <ESC> character when entering text. In PDU mode, only

hexadecimal characters are used (‘0’…’9’,’A’…’F’).

Syntax

Command syntax in text mode:

48

AT+CMGS= <da> [ ,<toda> ] <CR>

text is entered <ctrl-Z / ESC >

Command syntax in PDU mode:

AT+CMGS= <length> <CR>

PDU is entered <ctrl-Z / ESC >

Table 3.5 Illustration of Commands For Sending Message And Their Response

COMMAND POSSIBLE RESPONSES

AT+CMGS=”33146290800”<CR>

Please call me soon, FRED. <CTRL-Z>

Note: Send a message in text mode

+CMGS:<MR>

OK

Note: successful transmission

AT+CMGS=<LENGTH><CR><PDU><CTRL-

Z>

Note: Send a message in PDU mode

+CMGS:<MR>

OK

Note: Successful transmission

The message reference, <mr>, which is returned to the application, is allocated by the

product. This number begins with 0 and is incremented by one for each outgoing

message (successful and failure cases); it is cyclic on one byte (0 follows 255).

Note: This number is not a storage number - outgoing messages are not stored.

49

CHAPTER 4

GPS RECEIVER

50

GPS RECEIVER

4.1 GPS NAVIGATION:

Fig4.1 GPS Navigation

GPS satellites circle the earth twice a day in a very precise orbit and transmit

signal information to earth. GPS receivers take this information and use triangulation to

calculate the user's exact location. Essentially, the GPS receiver compares the time a

signal was transmitted by a satellite with the time it was received. The time difference

51

tells the GPS receiver how far away the satellite is. Now, with distance measurements

from a few more satellites, the receiver can determine the user's position and display it

on the unit's electronic map.

A GPS receiver must be locked on to the signal of at least three satellites to

calculate a 2D position (latitude and longitude) and track movement. With four or more

satellites in view, the receiver can determine the user's 3D position (latitude, longitude

and altitude). Once the user's position has been determined, the GPS unit can calculate

other information, such as speed, bearing, track, trip distance, distance to destination,

sunrise and sunset time and more.

ACCURACY:

The accuracy of the receivers is dependent on the number and quality of the signals it is

getting from the satellites and from a factor called Selected Availability. Department

of Defense deliberately interfering with the satellite signals to reduce positional

accuracy to around 30m - 100m. With Selective Availability receivers are divided into

two types:

1.precise positioning systems (PPS)

2.standard positioning systems (SPS).

PPS is encrypted and only available for authorized (military) users, and are not affected

by Selective Availability. SPS has been made available to the general public.The GPS

uses satellites and computers to compute positions anywhere on earth. The GPS is

based on satellite ranging. That means the position on the earth is determined by

measuring the distance from a group of satellites in space.

The Space vehicles (SVs) transmit two microwave carrier signals. The L1 frequency

(1575.42 MHz) carries the navigation message and the SPS code signals. The L2

frequency (1227.60 MHz) is used to measure the ionospheric delay by PPS equipped

receivers

52

4.2 GPS SEGMENTS

The current GPS consists of three major segments. These are the

Space segment (SS)

Control segment (CS)

User segment (US)

4.2.1 SPACE SEGMENT:

The space segment is composed of the orbiting GPS satellites, or Space

Vehicles (SV) in GPS parlance. The GPS design calls for 24 SVs to be distributed

equally among six circular orbital planes centered on the Earth and not rotating with

respect to the distant stars. The six planes have approximately 55° inclination (tilt

relative to the equatror) and are separated by 60° right ascension of the ascendirng node

(angle along the equator). The four SVs in each plane are normally spaced equally,

approximately 90 degrees apart.

Orbiting at an altitude of approximately 20,000 kilometers (11,000 nautical

miles), each SV makes two complete orbits relating to the distant stars each day, so it

passes over the same location on Earth once each day. The orbits are arranged so that at

least six satellites are always within line of sight from almost anywhere on Earth.

53

Fig 4.2 Simplified Representation Of Nominal GPS Constellation

4.2.2 CONTROL SEGMENT:

The flight paths of the satellites are tracked by monitoring stations .The tracking

information is sent to the Air Force Space Command's master control station. each GPS

satellite regularly with a navigational update (using the ground antennas. These updates

synchronize the atomic clocks on board the satellites to within one microsecond and

adjust the ephemeris of each satellite's internal orbital model. The updates are created

by a Kalman Filter which uses inputs from the ground monitoring stations, space

weatrher information, and other various

54

Fig 4.3 GPS Control

4.2.3 USER SEGMENT:

The user's GPS receiver is the user segment of the GPS system. In general, GPS

receivers are composed of an antenna, tuned to the frequencies transmitted by the

satellites, receiver-processors, and a highly-stable clock (often a crystal oscillator).

They may also include a display for providing location and speed information to the

user. A receiver is often described by its number of channels: this signifies how many

satellites it can monitor simultaneously

55

Many GPS receivers can relay position data to a PC or other device using the

NMEA 0183 protocol. means by which marine instruments and also most GPS

receivers can communicate with each other. NMEA 2000 is a newer and less widely

adopted protocol. Both are proprietary and controlled by the US-based National Marine

Electronics Association.(NMEA)

GPS satellites broadcast three different types of data in the primary navigation signal.

The first one is almanac and second one is empheric.

The high precision orbit parameters of a satellite are called ephemeris

parameters whereas a reduced precision subset of the ephemeris parameters is called a

satellite´s almanac. While ephemeris parameters must be evaluated to compute the

receiver´s position and clock offset, almanac parameters are used to check which

satellites are in view from a given receiver position at a given time. Each satellite

transmits its own set of ephemeris parameters and almanac parameters of all existing

satellites.

These monitor stations measure signals from the SVs which are incorporated

into orbital models for each satellites. The models compute precise orbital data

(ephemeris) and SV clock corrections for each satellite. The Master Control station

uploads ephemeris and clock data to the SVs. The SVs then send subsets of the orbital

ephemeris data to GPS receivers over radio signals

56

GPS works in six logical steps:

1. The basis of GPS is "triangulation" from satellites.

2. To "triangulate," a GPS receiver measures distance using the travel time of

radio signals.

3. To measure travel time, GPS needs very accurate timing which it achieves with

some tricks.

4. Along with distance, you need to know exactly where the satellites are in space.

High orbits and careful monitoring are the secret.

5. You must correct for any delays the signal experiences as it travels through the

atmosphere.

Triangulation

Position is calculated from distance measurements (ranges) to satellites.

Mathematically we need four satellite ranges to determine exact position.

Three ranges are enough if we reject ridiculous answers or use other tricks.

Suppose we measure our distance from a satellite and find it to be 10,000 miles.

Knowing that we're 10,000 miles from a particular satellite narrows down all the

possible locations we could be in the whole universe to the surface of a sphere that is

centered on this satellite and has a radius of 10,000 miles

Next, say we measure our distance to a second satellite and find out that it's 11,000

miles away. That tells us that we're not only on the first sphere but we're also on a

sphere that's 11,000 miles from the second satellite. Or in other words, we're

somewhere on the circle where these two spheres intersect.

If we then make a measurement from a third satellite and find that we're 12,000

miles from that one, that narrows our position down even further, to the two points

where the 12,000 mile sphere cuts through the circle that's the intersection of the first

two spheres.

57

So by ranging from three satellites we can narrow our position to just two points in

space. This arrangement of satellites is also called a "constellation".

To decide which one is our true location we could make a fourth measurement

Measuring Distance

1. Distance to a satellite is determined by measuring how long a radio signal takes

to reach us from that satellite.

2. To make the measurement we assume that both the satellite and our receiver are

generating the same pseudo-random codes at exactly the same time.

3. By comparing how late the satellite's pseudo-random code appears compared to

our receiver's code, we determine how long it took to reach us.

4. Multiply that travel time by the speed of light and you've got distance.

58

The timing problem is tricky. First, the times are going to be awfully short. If a

satellite were right overhead the travel time would be something like 0.06 seconds.

The signal coming from the satellite would be a little delayed because it had to travel

more than 11,000 miles.

If we wanted to see just how delayed the satellite's signal was, we could start delaying

the receiver's signal until they fell into perfect synchronus.

The amount we have to shift back the receiver's version is equal to the travel time of the

satellite's version. So we just multiply that time times the speed of light and voila!

we've got our distance to the satellite.

That’s Basically GPS Works.

Random Code:

The Pseudo Random Code (PRC) is a fundamental part of GPS. Physically it's

just a very complicated digital code, or in other words, a complicated sequence of "on"

and "off" pulses.The signal is so complicated that it almost looks like random electrical

noise. Hence the name "Pseudo-Random".

59

There are several good reasons for that complexity: First, the complex pattern helps

make sure that the receiver doesn't accidentally sync up to some other signal. The

patterns are so complex that it's highly unlikely that a stray signal will have exactly the

sameshape.

Since each satellite has its own unique Pseudo-Random Code this complexity also

guarantees that the receiver won't accidentally pick up another satellite's signal. So all

the satellites can use the same frequency without jamming each other. And it makes it

more difficult for a hostile force to jam the system. In fact the Pseudo Random Code

gives the Department of Defense a way to control access to the system.

But there's another reason for the complexity of the Pseudo Random Code, a reason

that's crucial to making GPS economical. The codes make it possible to use

"information theory" to "amplify" the GPS signal. And that's why GPS receivers don't

need big satellite dishes to receive the GPS signals.

Timing:

1. Accurate timing is the key to measuring distance to satellites.

2. Satellites are accurate because they have atomic clocks on board.

3. Receiver clocks don't have to be too accurate because an extra satellite range

measurement can remove errors.

60

On the satellite side, timing is almost perfect because they have incredibly

precise atomic clocks on board. Remember that both the satellite and the receiver

need to be able to precisely synchronushronize their pseudo-random codes to make

the system work. If our receivers needed atomic clocks (which cost upwards of

$50K to $100K) GPS would be a lame duck technology. Nobody could afford it.

To overcome this problem there one method is used that is one of the key

elements of GPS and as an added side benefit it means that every GPS receiver is

essentially an atomic-accuracy clock.

The secret to perfect timing is to make an extra satellite measurement. That's right,

if three perfect measurements can locate a point in 3-dimensional space, then four

imperfect measurements can do the same thing.

Extra Measurement Cures Timing Offset If receiver's clocks were perfect, then

all satellite ranges would intersect at a single point (which is our position). But with

imperfect clocks, a fourth measurement, done as a cross-check, will NOT intersect

with the first three.

The receiver looks for a single correction factor that it can subtract from all its

timing measurements that would cause them all to intersect at a single point. That

correction brings the receiver's clock back into synchronus with universal time.

Once it has that correction it applies to all the rest of its measurements and now

receiver got precise positioning.

One consequence of this principle is that any decent GPS receiver will need to

have at least four channels so that it can make the four measurements

simultaneously. with the pseudo-random code as a rock solid timing synchronus

pulse, and this extra measurement trick to get us perfectly synchronused to

universal time, we have got everything we need to measure our distance to a

satellite in space. But for the triangulation to work we not only need to know

distance, we also need to know exactly where the satellites are.

61

Satellite Tracking:

To use the satellites as references for range measurements we need to know

exactly where they are.

GPS satellites are so high up their orbits are very predictable.

Minor variations in their orbits are measured by the Department of Defense.

The error information is sent to the satellites, to be transmitted along with

the timing signals

That 11,000 mile altitude is actually a benefit in this case, because something that high

is well clear of the atmosphere. And that means it will orbit according to very simple

mathematics.

On the ground all GPS receivers have an almanac programmed into their computers

that tells them where in the sky each satellite is, moment by moment.

The basic orbits are quite exact but just to make things perfect the GPS satellites are

constantly monitored by the Department of Defense.

They use very precise radar to check each satellite's exact altitude, position and speed.

The errors they're checking for are called "ephemeris errors" because they affect the

satellite's orbit or "ephemeris." These errors are caused by gravitational pulls from the

62

moon and sun and by the pressure of solar radiation on the satellites.

The errors are usually very slight but if you want great accuracy they must be taken into

account.

Once the Department of Defense has measured a satellite's exact position, they relay

that information back up to the satellite itself. The satellite then includes this new

corrected position information in the timing signals it's broadcasting.

So a GPS signal is more than just pseudo-random code for timing purposes. It also

contains a navigation message with ephemeris information as well.

4.2.4 Handling Errors

1. The earth's ionosphere and atmosphere cause delays in the GPS signal that

translate into position errors.

2. Some errors can be factored out using mathematics and modeling.

3. The configuration of the satellites in the sky can magnify other errors.

4. Differential GPS can eliminate almost all error.

calculate distance to a satellite by multiplying a signal's travel time by the speed of

63

light. But the speed of light is only constant in a vacuum.

As a GPS signal passes through the charged particles of the ionosphere and

then through the water vapor in the troposphere it gets slowed down a bit, and this

creates the same kind of error as bad clocks.

Ionosphere

The ionosphere is the layer of the atmosphere ranging in altitude from 50 to 500

km.It consists largely of ionized particles which can exert a perturbing effect on GPS

signals.While much of the error induced by the ionosphere can be removed through

mathematical modeling, it is still one of the most significant error sources.

Troposphere

The troposphere is the lower part of the earth's atmosphere that encompasses

our weather.It's full of water vapor and varies in temperature and pressure.But as messy

as it is, it causes relatively little error.There are a couple of ways to minimize this kind

of error. For one thing we can predict what a typical delay might be on a typical day.

This is called modeling and it helps but, of course, atmospheric conditions are rarely

exactlytypical. Another way to get a handle on these atmosphere-induced errors is to

compare the relative speeds of two different signals. This "dual frequency"

measurement is very sophisticated and is only possible with advanced receivers.

Trouble for the GPS signal doesn't end when it gets down to the ground. The signal

may bounce off various local obstructions before it gets to our receiver.

This is called multi-path error and is similar to the ghosting you might see on a TV.

Good receivers use sophisticated signal rejection techniques to minimize thisproblem.

Trouble for the GPS signal doesn't end when it gets down to the ground. The signal

may bounce off various local obstructions before it gets to our receiver.

This is called multi-path error and is similar to the ghosting you might see on a TV.

Good receivers use sophisticated signal rejection techniques to minimize this problem.

4.2.5 DGPS: Differential Global Positioning System

64

Basic GPS is the most accurate radio-based navigation system ever developed. And for

many applications it's plenty accurate.

So some crafty engineers came up with "Differential GPS," a way to correct the various

inaccuracies in the GPS system, pushing its accuracy even farther. Differential GPS or

"DGPS" can yield measurements good to a couple of meters in moving applications and

even better in stationary situations.

That improved accuracy has a profound effect on the importance of GPS as a resource.

With it, GPS becomes more than just a system for navigating boats and planes around

the world. It becomes a universal measurement system capable of positioning things on

a very precise scale.

Differential GPS involves the cooperation of two receivers, one that's stationary and

another that's roving around making position measurements. The stationary receiver is

the key. It ties all the satellite measurements into a solid local reference.

So if two receivers are fairly close to each other, say within a few hundred kilometers,

the signals that reach both of them will have traveled through virtually the same slice of

atmosphere, and so will have virtually the same errors.

That's the idea behind differential GPS: We have one receiver measure the

timing errors and then provide correction information to the other receivers that are

65

roving around. That way virtually all errors can be eliminated from the system.Put the

reference receiver on a point that's been very accurately surveyed and keep it there.

This reference station receives the same GPS signals as the roving receiver but instead

of working like a normal GPS receiver it attacks the equations backwards.

Instead of using timing signals to calculate its position, it uses its known

position to calculate timing. It figures out what the travel time of the GPS signals

should be, and compares it with what they actually are. The difference is an "error

correction" factor. The receiver then transmits this error information to the roving

receiver so it can use it to correct its measurements.

Since the reference receiver has no way of knowing which of the many

available satellites a roving receiver might be using to calculate its position, the

reference receiver quickly runs through all the visible satellites and computes each of

their errors. Then it encodes this information into a standard format and transmits it to

the roving receivers.

The roving receivers get the complete list of errors and apply the corrections for

the particular satellites they're using.

66

CHAPTER 5

LIQUID CRYSTAL

DISPLAY

LIQUID CRYSTAL DISPLAY

67

5.1 LIQUID CRYSTAL DISPLAY [PCD8544]

The PCD8544 is a low power CMOS LCD controller/driver, designed to drive a

graphic display of 48 rows and 84 columns. All necessary functions for the display are

provided in a single chip, including on-chip generation of LCD supply and bias

voltages, resulting in a minimum of external components and low power consumption.

The PCD8544 interfaces to micro controllers through a serial bus interface. The

PCD8544 is manufactured in n-well CMOS technology.

As in recent years the LCD is finding widespread use replacing LED thesis due to the

following reasons:

The declining prices of LCD

The ability to display numbers, characters and graphics. This is in contrast to

LED, which are limited to numbers and a few characters.

Incorporation refreshing controller into the LCD, there by the easy relieving the

CPU of the task of refreshing the LCD. In contrast, the CPU, to keep the data

displaying, must refresh the LED.

Ease of programming for characters and graphics.

5.2 FEATURES:

Single chip LCD controller/driver

68

48 row, 84 column outputs

Display data RAM 48 ´ 84 bits

On-chip:

Generation of LCD supply voltage (external supply also possible)

Generation of intermediate LCD bias voltages

Oscillator requires no external components (external clock also

possible).

External RES (reset) input pin

Serial interface maximum 4.0 Mbits/s

CMOS compatible inputs

Mux rate: 48

Logic supply voltage range VDD to VSS: 2.7 to 3.3 V

Display supply voltage range VLCD to VSS

6.0 to 8.5 V with LCD voltage internally generated (voltage generator

enabled)

6.0 to 9.0 V with LCD voltage externally supplied (voltage generator

switched-off).

Low power consumption, suitable for battery operated systems

Temperature compensation of VLCD

69

Temperature range: -25 to +70 °C.

5.3 BLOCK DIAGRAM :

Figure 5.1 Block Diagram of Graphical LCD

70

5.4 FUNCTIONAL DESCRIPTION OF GRAPHICAL LCD

5.4.1 Oscillator

The on-chip oscillator provides the clock signal for the display system. No external

components are required and the OSC input must be connected to VDD. An external

clock signal, if used, is connected to this input.

5.4.2 Address Counter (AC)

The address counter assigns addresses to the display data RAM for writing. The X-

address X6 to X0 and the Y-address Y2 to Y0 are set separately. After a write

operation, the address counter is automatically incremented by 1, according to the V

flag.

5.4.3 Display Data RAM (DDRAM)

The DDRAM is a 48 ´ 84-bit static RAM which stores the display data. The RAM is

divided into six banks of 84 bytes (6 ´ 8 ´ 84 bits). During RAM access, data is

transferred to the RAM through the serial interface. There is a direct correspondence

between the X-address and the column output number.

5.4.4 Timing generator

The timing generator produces the various signals required to drive the internal circuits.

Internal chip operation is not affected by operations on the data buses.

5.4.5 Display address counter

The display is generated by continuously shifting rows of RAM data to the dot matrix

LCD through the column outputs. The display status (all dots on/off and normal/inverse

video) is set by bits E and D by the ‘display control’ command.

5.4.6 LCD row and column drivers

71

The PCD8544 contains 48 row and 84 column drivers, which connect the appropriate

LCD bias voltages in sequence to the display in accordance with the data to be

displayed. Figure 2 shows typical waveforms. Unused outputs should be left

unconnected.

Fig 5.2 Serial bus protocol – transmission of one byte

Fig 5.3 Serial bus protocol – transmission of several bytes

72

Fig 5.4 Chip Selection function

Fig 5.5 Serial Bus Reset function

Table 5.1: LCD Pin Description

SYMBOL DESCRIPTION

73

R0 to R47 LCD ROW DRIVER OUTPUTS

C0 to C83 LCD COLUMN DRIVER OUTPUTS

VSS1,VSS2 GROUND

VDD1,VDD2 SUPPLY VOLTAGE

VLCD1,VLCD2 LCD SUPPLY VOLTAGE

T1 TEST 1 INPUT

T2 TEST2 OUTPUT

T3 TEST3 INPUT/OUTPUT

T4 TEST4 INPUT

SDIN SERIAL DATA INPUT

SCLK SERIAL CLOCK INPUT

D/C DATA/COMMAND

SCE CHIP ENABLE

OSC OSCILLATOR

RES EXTERNAL RESET INPUT

DUMMY1, 2,3,4 NOT CONNECTED

5.5 LCD PIN DESCRIPTIONS

5.3.1 R0 TO R47 ROW DRIVER OUTPUTS

These pads output the row signals.

5.3.2 C0 TO C83 COLUMN DRIVER OUTPUTS

These pads output the column signals.

5.3.3 VSS1, VSS2: NEGATIVE POWER SUPPLY RAILS

Supply rails VSS1 and VSS2 must be connected together.

5.3.4 VDD1, VDD2: POSITIVE POWER SUPPLY RAILS

Supply rails VDD1 and VDD2 must be connected together

5.3.5 VLCD1, VLCD2: LCD POWER SUPPLY

Positive power supply for the liquid crystal display. Supply

Rails VLCD1 and VLCD2 must be connected together.

5.3.6 T1, T2, T3 AND T4: TEST PADS

74

T1, T3 and T4 must be connected to VSS, T2 is to be left

Open. Not accessible to user.

5.3.7 SDIN: SERIAL DATA LINE

Input for the data line.

5.3.8 SCLK: SERIAL CLOCK LINE

Input for the clock signal: 0.0 to 4.0 Mbits/s.

5.3.9 D/C: MODE SELECT

Input to select either command/address or data input.

5.3.10 SCE: CHIP ENABLE

The enable pin allows data to be clocked in. The signal is

active LOW.

5.3.11 OSC: OSCILLATOR

When the on-chip oscillator is used, this input must be

Connected to VDD. An external clock signal, if used, is

Connected to this input. If the oscillator and external clock

are both inhibited by connecting the OSC pin to VSS, the

Display is not clocked and may be left in a DC state.

To avoid this, the chip should always be put into

Power-down mode before stopping the clock.

5.3.12 RES: RESET

This signal will reset the device and must be applied to

Properly initialize the chip. The signal is active LOW.

75

Figure 5.6 Application Diagram

76

Figure 5.6 Application Diagram

5.6 ADDRESSING

Data is downloaded in bytes into the 48 by 84 bits RAM data display matrix of

PCD8544, as indicated in Figs. 7.6, 7.7, 7.8 and 6. The address pointer addresses the

columns. The address ranges are: X 0 to 83 (1010011), Y 0 to 5 (101). Addresses

outside these ranges are not allowed. In the vertical addressing mode (V = 1), the Y

address increments after each byte (see Fig.5). After the last Y address (Y = 5), Y

wraps around to 0 and X increments to address the next column. In the horizontal

addressing mode (V = 0), the X address increments after each byte (see Fig.7..). After

77

the last X address (X = 83), X wraps around to 0 and Y increments to address the next

row. After the very last address (X = 83 and Y = 5), the address pointers wrap around to

address (X = 0 and Y = 0).

DATA STRUTURE

Fig 5.8 Ram format Address

Fig 5.9 Sequence of writing data bytes into RAM with Vertical

addressing (V=1)

78

Fig 5.10 Sequence of writing data bytes into RAM with horizontal

addressing (V=0)

79

TABLE 5.2: INSTRUCTION SET

Table 5.3: Explanation of Symbol

5.7 DESCRIPTION OF INSTRUCTION SET

5.7.1 Initialization

Immediately following power-on, the contents of all internal registers and of the RAM

are undefined. A RES pulse must be applied. Attention should be paid to the possibility

that the device may be damaged if not properly reset.

All internal registers are by applying an external RES pulse (external low) at pad 31,

within the specified time. However, the RAM contents are still undefined. The state

after reset is described in section below

80

The RES input must be ≤0.3VDD when VDD reaches VDDmin (or higher) within a

maximum time of 100ms after VDD goes HIGH.

5.7.2 Reset Function

After reset, the LCD driver has the following state:

● Power-down mode (bit PD=1)

● Horizontal addressing (bit V=0) normal instruction set (bit H=0)

● Display blank (bit E=D=0)

● Address counter X5 to X0 = 0; Y2 to Y0 = 0

● Temperature control mode (TC1 TC0 = 0)

● Bias system (BS2 to BS1 = 0)

● VLCD is equal to 0, the HV generator is switched off (Vop6 to Vop0)

● After power-on, the RAM contents are undefined.

5.7.3. Function Set

5.7.3a BIT PD

● All LCD outputs at Vss (display off)

● Bias generator and VLCD generator off, VLCD can be disconnected

● Oscillator off (external clock possible)

● Serial bus, command, etc. function

● Before entering power-down mode, the RAM needs to be filled with ‘0’s to

ensure the specified current consumption.

5.7.3b BIT V

When V=0, the horizontal addressing is selected. the data is written into the

DDRAM as shown in Fig.6. When V=1, the vertical addressing is selected. The

data is written into the DDRAM,

81

5.7.3c BIT H

When H=0 the commands ‘display control’, ‘set Y address’ and ‘set X address’

can be performed’, when H=1, the others can be executed. the ‘write data’ and

‘function set’ commands can be executed in both cases.

5.7.4 Display Control

BITS D AND E

Bits D and E select the display mode

5.7.5 Set Y Address Of RAM

Yn defines the Y vector addressing of the display RAM.

TABLE 5.4 Y vector addressing

Y2 Y1 Y0 BANK

0 0 0 0

0 0 1 1

0 1 0 2

0 1 1 3

1 0 0 4

1 0 1 5

5.7.6 Set X Address Of RAM

The X address points to the columns. The range of X is 0 to 83(53H).

5.5.7 Temperature Control

Bits TC1 and TC0 select the temperature coefficient of VLCD.

5.7.8 Bias Value

82

The bias voltage levels are set in the ratio of R-R-nR-R-R, giving a 1/(n + 4) bias

system. Different multiplex rates require different factors n (see Table 4). This is

programmed by BS2 to BS0. For mux 1:48, the optimum bias value n, resulting in 1/8

bias, is given by:

n = root of 48-3 = 3.928= 4

APLLICATION INFORMATION

TABLE 5.5: PROGAMMING EXAMPLE

83

84

The pinning is optimized for single plane writing e.g. for chip-on-glass modules.

Display size 48by 84 pixels.

The required minimum value for the external capacitors is: Cext = 1.0uf

Higher capacitor values are recommended for ripple reduction.

85

CHAPTER 6

APPLICATION

APPLICATIONS

86

6.1 GPS APPLICATIONS:

Basically, GPS is usable everywhere except where it's impossible to receive the signal

such as inside most buildings, in caves and other subterranean locations, and

underwater. The most common airborne applications are for navigation by general

aviation and commercial aircraft. At sea, GPS is also typically used for navigation by

recreational boaters, commercial fishermen, and professional mariners. Land-based

applications are more diverse. The scientific community uses GPS for its precision

timing capability and position information.

Surveyors use GPS for an increasing portion of their work. GPS offers cost savings by

drastically reducing setup time at the survey site and providing incredible accuracy.

Basic survey units, costing thousands of dollars, can offer accuracies down to one

meter. More expensive systems are available that can provide accuracies to within a

centimeter.

Recreationa and sports i.e. hikers, hunters, snowmobilers, mountain bikers, and cross-

country skiers, just to name a few. And some other like

Science :

87

Archaeology

Atmospheric Science

Environmental

Oceanography

Transportation:

Aviation

Marine

Space

Military:

Intelligence & Target Location

Navigation

Weapon Aiming & Guidance and some miscellaneous

Industry:

Mapping & GIS Data Collection

Public Safety

Surveying

Telecommunications

88

CHAPTER 7

FLOW

CHART,SCHEMATICS &

PICTURES OF THE

MODEL

89

7.1 FLOW CHART FOR GPS / GSM VEHICLE NAVIGATION

7.2 SCHEMATIC DIAGRAM’S

90

Initialise LCDDisplay Names

Start

Initialise Serial Port 0 for GSM Interfacing with 9600 BPS.

Initialise Serial Port 1 for GPS Interface for 9600 BPS.

Start ( Move ) Vehicle

Initialise GSM ModemAT AT+COPS=0AT+COPS=3,0

Receive GPS Information From GPS

ModuleEx: GGA,GPRMC Data

Is it Time Reaches 2

Min?

No

Yes

Send GPS, GPRMC Data to GSM Server :-AT+CMGS=“Number”

Fig 7.1 Microcontroller Schematic 1

91

Fig 7.2 Microcontroller Schematic 2

92

7.3 PICTURES OF THE MODEL

93

Fig 7.3Receiving Signal from GPS satellites

OUTPUT

94

Fig 7.4 Output of the project

7.4 Real view of the kit

95

Fig 7.5 Real view of the kit

96

CHAPTER 8

PROJECT CODE

8.1 PROJECT CODE:

97

#include<regxag3.sfr>

#define crystal_freq 22118400

#define baud_rate 9600

#define prescaler 4

#define uart_reload 65536U - (crystal_freq / (baud_rate * prescaler * 16UL))

#define ticks_per_sec 200

#define timer_reload 65536U - (crystal_freq /(ticks_per_sec *prescaler))

#define cmoff 0x00 // SCR value to turn off 8051 com

#define page0off 0x00 //SCR value to turn off Page Zero

#define time4 0x00 // SCR value for timer rate = clk

#define scr_value (cmoff | page0off | time4)

#define wdoff 0x00 // WDCON value to turn off watchdog timer.

#define waiten 0x00 // bcr value to deactivate Wait Disable.

#define busen 0x00 // bcr value to deactivate Bus Disable.

#define bus_d8a20 0x02 // bcr value for 8-bit data, 20-bit address bus.

#define bus_slow_l 0xcf // configure bcrl for longest bus cycles,

#define bus_slow_h 0xff // configure bcrh for longest bus cycles.

#define tx0_prio 0 //UART Tx0 priority

#define rx0_prio 6 //UART Rx0 priority(modem)

#define tx1_prio 0 //UART Tx0 priority

#define rx1_prio 6 //UART Rx0 priority(debugging)

_sfrbit LCD_SCLK _at(0x387); //P0.7

98

_sfrbit LCD_SDIN _at(0x386); //P0.6

_sfrbit LCD_D_C _at(0x385); //P0.5

_sfrbit LCD_SCE _at(0x384); //P0.4

_sfrbit LCD_RESET _at(0x383); //P0.3

char d[60];

void check(void);

unsigned int k=0,y,z,x,n,temp1;

_bitbyte gpsdata;

_bit disp _atbit( gpsdata,0 );

_bit rmcok _atbit( gpsdata,1 );

_bit GSMOK _atbit( gpsdata,2 );

typedef unsigned char uc;

void LCD_INIT(void);

void LCD_STRING(char *);

void LCD_GOTOXY(uc,uc);

void LCD_PUTS(char);

void LCD_CMND(char);

void LCD_DATA(char);

void LCD_CLEAR(void);

void DELAY1SEC(unsigned int);

void DELAYGSM(unsigned int);

99

void DELAYMS(unsigned int);

void CMND_SEND(char *);

void SER_CHAR(char );

void display(void);

void display1(void);

unsigned int i;

unsigned int cnt=0;

char b[40];

void GSM_INIT(void);

uc _rom LTab[96][5]=

{

{ 0x00, 0x00, 0x00, 0x00, 0x00 }, //sp

{ 0x00, 0x00, 0x2f, 0x00, 0x00 }, // !

{ 0x00, 0x07, 0x00, 0x07, 0x00 }, // "

{ 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // #

{ 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $

{ 0xc4, 0xc8, 0x10, 0x26, 0x46 }, // %

{ 0x36, 0x49, 0x55, 0x22, 0x50 }, // &

{ 0x00, 0x05, 0x03, 0x00, 0x00 }, // '

{ 0x00, 0x1c, 0x22, 0x41, 0x00 }, // (

{ 0x00, 0x41, 0x22, 0x1c, 0x00 }, // )

{ 0x14, 0x08, 0x3E, 0x08, 0x14 }, // *

100

{ 0x08, 0x08, 0x3E, 0x08, 0x08 }, // +

{ 0x00, 0x00, 0x50, 0x30, 0x00 }, // ,

{ 0x10, 0x10, 0x10, 0x10, 0x10 }, // -

{ 0x00, 0x60, 0x60, 0x00, 0x00 }, // .

{ 0x20, 0x10, 0x08, 0x04, 0x02 }, // /

{ 0x3E, 0x51, 0x49, 0x45, 0x3E }, // 0

{ 0x00, 0x42, 0x7F, 0x40, 0x00 }, // 1

{ 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2

{ 0x21, 0x41, 0x45, 0x4B, 0x31 }, // 3

{ 0x18, 0x14, 0x12, 0x7F, 0x10 }, // 4

{ 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5

{ 0x3C, 0x4A, 0x49, 0x49, 0x30 }, // 6

{ 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7

{ 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8

{ 0x06, 0x49, 0x49, 0x29, 0x1E }, // 9

{ 0x00, 0x36, 0x36, 0x00, 0x00 }, // :

{ 0x00, 0x56, 0x36, 0x00, 0x00 }, // ;

{ 0x08, 0x14, 0x22, 0x41, 0x00 }, // <

{ 0x14, 0x14, 0x14, 0x14, 0x14 }, // =

{ 0x00, 0x41, 0x22, 0x14, 0x08 }, // >

{ 0x02, 0x01, 0x51, 0x09, 0x06 }, // ?

{ 0x32, 0x49, 0x59, 0x51, 0x3E }, // @

{ 0x7E, 0x11, 0x11, 0x11, 0x7E }, // A

101

{ 0x7F, 0x49, 0x49, 0x49, 0x36 }, // B

{ 0x3E, 0x41, 0x41, 0x41, 0x22 }, // C

{ 0x7F, 0x41, 0x41, 0x22, 0x1C }, // D

{ 0x7F, 0x49, 0x49, 0x49, 0x41 }, // E

{ 0x7F, 0x09, 0x09, 0x09, 0x01 }, // F

{ 0x3E, 0x41, 0x49, 0x49, 0x7A }, // G

{ 0x7F, 0x08, 0x08, 0x08, 0x7F }, // H

{ 0x00, 0x41, 0x7F, 0x41, 0x00 }, // I

{ 0x20, 0x40, 0x41, 0x3F, 0x01 }, // J

{ 0x7F, 0x08, 0x14, 0x22, 0x41 }, // K

{ 0x7F, 0x40, 0x40, 0x40, 0x40 }, // L

{ 0x7F, 0x02, 0x0C, 0x02, 0x7F }, // M

{ 0x7F, 0x04, 0x08, 0x10, 0x7F }, // N

{ 0x3E, 0x41, 0x41, 0x41, 0x3E }, // O

{ 0x7F, 0x09, 0x09, 0x09, 0x06 }, // P

{ 0x3E, 0x41, 0x51, 0x21, 0x5E }, // Q

{ 0x7F, 0x09, 0x19, 0x29, 0x46 }, // R

{ 0x46, 0x49, 0x49, 0x49, 0x31 }, // S

{ 0x01, 0x01, 0x7F, 0x01, 0x01 }, // T

{ 0x3F, 0x40, 0x40, 0x40, 0x3F }, // U

{ 0x1F, 0x20, 0x40, 0x20, 0x1F }, // V

{ 0x3F, 0x40, 0x38, 0x40, 0x3F }, // W

{ 0x63, 0x14, 0x08, 0x14, 0x63 }, // X

102

{ 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y

{ 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z

{ 0x00, 0x7F, 0x41, 0x41, 0x00 }, // [

{ 0x55, 0x2A, 0x55, 0x2A, 0x55 }, // 55

{ 0x00, 0x41, 0x41, 0x7F, 0x00 }, // ]

{ 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^

{ 0x40, 0x40, 0x40, 0x40, 0x40 }, // _

{ 0x00, 0x01, 0x02, 0x04, 0x00 }, // '

{ 0x20, 0x54, 0x54, 0x54, 0x78 }, // a

{ 0x7F, 0x48, 0x44, 0x44, 0x38 }, // b

{ 0x38, 0x44, 0x44, 0x44, 0x20 }, // c

{ 0x38, 0x44, 0x44, 0x48, 0x7F }, // d

{ 0x38, 0x54, 0x54, 0x54, 0x18 }, // e

{ 0x08, 0x7E, 0x09, 0x01, 0x02 }, // f

{ 0x0C, 0x52, 0x52, 0x52, 0x3E }, // g

{ 0x7F, 0x08, 0x04, 0x04, 0x78 }, // h

{ 0x00, 0x44, 0x7D, 0x40, 0x00 }, // i

{ 0x20, 0x40, 0x44, 0x3D, 0x00 }, // j

{ 0x7F, 0x10, 0x28, 0x44, 0x00 }, // k

{ 0x00, 0x41, 0x7F, 0x40, 0x00 }, // l

{ 0x7C, 0x04, 0x18, 0x04, 0x78 }, // m

{ 0x7C, 0x08, 0x04, 0x04, 0x78 }, // n

{ 0x38, 0x44, 0x44, 0x44, 0x38 }, // o

103

{ 0x7C, 0x14, 0x14, 0x14, 0x08 }, // p

{ 0x08, 0x14, 0x14, 0x18, 0x7C }, // q

{ 0x7C, 0x08, 0x04, 0x04, 0x08 }, // r

{ 0x48, 0x54, 0x54, 0x54, 0x20 }, // s

{ 0x04, 0x3F, 0x44, 0x40, 0x20 }, // t

{ 0x3C, 0x40, 0x40, 0x20, 0x7C }, // u

{ 0x1C, 0x20, 0x40, 0x20, 0x1C }, // v

{ 0x3C, 0x40, 0x30, 0x40, 0x3C }, // w

{ 0x44, 0x28, 0x10, 0x28, 0x44 }, // x

{ 0x0C, 0x50, 0x50, 0x50, 0x3C }, // y

{ 0x44, 0x64, 0x54, 0x4C, 0x44 } // z

};

void main(void)

{

EA = 0; //disable interrupts during start up

WDCON = wdoff; //off watch dog timer

WFEED1 = 0xA5;

WFEED2 = 0x5A;

SCR = 0; //prescalar = 4

104

BCR = waiten+busen+bus_d8a20; //8bit data & 20bit address(0x12)

BTRH = bus_slow_h;

BTRL = bus_slow_l;

/*---------------------------------------------------------------*/

TMOD &= 0x0f;

TH1 = (uart_reload >> 8);

TL1 = (uart_reload & 0x00ff);

RTH1 = (uart_reload >> 8);

RTL1 = (uart_reload & 0x00ff);

TR1 = 1;

/*-------------------------------GPS-------------------------------*/

S0CON = 0X72;

IPA4 = (tx0_prio << 4) | (rx0_prio);

ERI0 = 1;

/*-----------------------------GSM-------------------------------*/

S1CON = 0x72; //UART for 8 bit mode

IPA5 = (tx1_prio << 4) | (rx1_prio);

ERI1 = 1; //enable serial port interrupt

PSWH &= 0xf0;

LCD_CLEAR();

LCD_INIT();

LCD_GOTOXY(0x40,0x80);

105

LCD_STRING("VEHICLE NAVIGATION SYSTEM");

DELAYMS(500);

DELAYMS(500);

LCD_CLEAR ();


EA=1;

while(1)

{

if(disp==1)

{

EA=0;

disp=0;

DELAY1SEC(100);

LCD_CLEAR();


LCD_STRING("TIME:");

LCD_GOTOXY(0x40,0x9e); //hrs

for(k=5;k<=6;k++)

{

LCD_PUTS(d[k]);

}

LCD_GOTOXY(0x40,0xaa);

106

LCD_STRING(":");

LCD_GOTOXY(0x40,0xb0); //min

for(k=7;k<=8;k++)

{

LCD_PUTS(d[k]);

}

LCD_GOTOXY(0x40,0xbc);

LCD_STRING(":");

LCD_GOTOXY(0x40,0xc2); //sec

for(k=9;k<=10;k++)

{

LCD_PUTS(d[k]);

}


LCD_STRING("LATITUDE:");

LCD_GOTOXY(0x41,0xb6);

for(k=17;k<=27;k++)

{

LCD_PUTS(d[k]);

}


LCD_STRING("LONGITUDE:");

LCD_GOTOXY(0x43,0xbc);

107

for(k=29;k<=40;k++)

{

LCD_PUTS(d[k]);

}


LCD_STRING("SPEED:");

LCD_GOTOXY(0x45,0xA4);

for(k=42;k<=45;k++)

{

LCD_PUTS(d[k]);

}

DELAYGSM(100);

if(cnt==50)

{

cnt=0;

GSM_INIT();

}

k=0;

EA=1;

}

}

}

/*---------------GSM INITIALIZATION------------------------*/

108

void GSM_INIT(void)

{

LCD_CLEAR();


LCD_STRING("MSG SENDING..");

DELAYMS(50);

LCD_STRING(".");

DELAYMS(50);

LCD_STRING(".");

DELAYMS(50);

LCD_STRING(".");

DELAYMS(50);

LCD_STRING(".");

DELAYMS(50);

CMND_SEND("AT");

SER_CHAR(0x0D);

DELAYMS(500);

DELAYMS(500);

LCD_STRING(".");

DELAYMS(500);

DELAYMS(500);

CMND_SEND("AT+CMGS=");

109

SER_CHAR('"');

LCD_STRING(".");

CMND_SEND("+919966425597");

SER_CHAR('"');

SER_CHAR(0x0D);

CMND_SEND("TIME:");

//hrs

for(k=5;k<=6;k++)

{

SER_CHAR(d[k]);

}

SER_CHAR(0x3a); //min

for(k=7;k<=8;k++)

{

SER_CHAR(d[k]);

}

SER_CHAR(0x3a); //sec

for(k=9;k<=10;k++)

{

SER_CHAR(d[k]);

}

110

SER_CHAR(0X0D);

CMND_SEND("LONGITUDE:");

SER_CHAR(0X0D);

for(k=17;k<=27;k++)

{

SER_CHAR(d[k]);

}

SER_CHAR(0X0D);

CMND_SEND("LATITUDE:");

SER_CHAR(0X0D);

for(k=29;k<=40;k++)

{

SER_CHAR(d[k]);

}

SER_CHAR(0X0D);

CMND_SEND("SPEED(in Knots):");

SER_CHAR(0X0D);

for(k=42;k<=45;k++)

{

SER_CHAR(d[k]);

}

111

SER_CHAR(0x1A);

LCD_CLEAR();

LCD_STRING("MSG SENT");

DELAYMS(100);

}

/*...................send at commands fuction........................*/

void CMND_SEND(char *letter)

{

while(*letter)

{

S0BUF = *letter;

DELAYMS(100);

letter++;

}

}

/*................................................................................*/

void SER_CHAR(char z)

{

S0BUF = z;

DELAYMS(138);

DELAYMS(138);

112

TI_0 = 0;

}

/*........................serial intrrupt programm…………….............*/

_interrupt(40) _using(0x8f00)

void rcv_gsm(void)

{

while(TI_0!=0)

{

TI_0=0; //clear interrupt

}

while(RI_0!=0)

{

RI_0=0; //clear interrupt

b[i]=S0BUF;

i++;

}

}

/*--------------------------------------------------------------------*/

_interrupt(42) _using(0x8f00)

113

void rcv_gps(void)

{

while(TI_1!=0)

{

TI_1=0;

}

while(RI_1!=0)

{

RI_1=0;

temp1=S1BUF;

check();

if(rmcok==1)

{

d[k]=temp1;

k++;

if(k==60)

{

rmcok=0;

disp=1;

}

}

}}

114

/*----------------------------------------------------------------------*/

void check(void)

{

if (temp1=='R')

{

d[k]=temp1;

k++;

}

if( (d[0]=='R')&( temp1=='M'))

{

d[k]=temp1;

k++;

}

if((d[0]=='R')&(d[1]=='M')& (temp1=='C'))

{

d[k]=temp1;

k++;

rmcok=1;

}

}

/*.........................lcd initialization program……………..........*/

115

void LCD_INIT()

{

LCD_RESET = 1;

#pragma asm

nop

nop

#pragma endasm

LCD_RESET = 0;

#pragma asm

nop

nop

#pragma endasm

LCD_RESET = 1;

LCD_CMND(0x21);

LCD_CMND(0x06);

LCD_CMND(0x13);

LCD_CMND(0xC8);

LCD_CMND(0x20);

LCD_CMND(0x0C);

LCD_CMND(0x80);

LCD_CMND(0x40);

}

/*.....................lcd string display..........................................*/

116

void LCD_STRING(char *ptr)

{

while(*ptr)

{

LCD_PUTS(*ptr);

ptr++;

}

}

/*..........................................................................................*/

void LCD_PUTS(char str)

{

unsigned int i;

unsigned char POS;

POS = str-0x20;

for(i=0;i<5;i++)

{

LCD_DATA(LTab[POS][i]);

}

LCD_DATA(0x00);

}

/*...................................lcd command program.........................*/

117

void LCD_CMND(char temp)

{

unsigned char i;

LCD_SCLK = 0;

LCD_SCE = 0;

LCD_D_C = 0;

for(i=0;i<8;i++)

{

LCD_SDIN = temp&0x80?1:0;

temp=temp << 1;

LCD_SCLK = 1;

#pragma asm

nop

nop

#pragma endasm

LCD_SCLK = 0;

}

}

/*.........................................lcd data program..............................*/

118

void LCD_DATA(char temp)

{

unsigned char i;

LCD_SCLK = 0;

LCD_SCE = 0;

LCD_D_C = 1;

// P3=temp;

for(i=0;i<8;i++)

{

LCD_SDIN = temp&0x80?1:0;

temp=temp << 1;

LCD_SCLK = 1;

#pragma asm

nop

nop

#pragma endasm

LCD_SCLK = 0;

}

}

/*..............................lcd display routine.....................................*/

119

void LCD_GOTOXY(uc x,uc y)

{

LCD_CMND(x);

LCD_CMND(y);

}

//*....................................lcd clear program...................................*/

void LCD_CLEAR(void)

{

int i=0;

for(i=0;i<=0x1f8;i++)

LCD_DATA(0x00);

}

/*...............................delay routine program.......................................*/

void DELAY1SEC(unsigned int itime)

{

unsigned int i,j;

for(i=0;i<itime;i++)

for(j=0;j<1275;j++);

}

/*..........................delay routine program.....................................................*/

120

void DELAYMS(unsigned int itime)

{

unsigned int i,j;


for(j=0;j<1275;j++);

}

/*.........................delayfor gsm routine program............................................*/

void DELAYGSM(unsigned int itime)

{

unsigned int i,j;


for(j=0;j<1275;j++);

cnt++;

}

121

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GPS Vehicle Navigation System