FLL FLL &

Addressing Modes&&

Intro to Op Amp System

430F2013 Clock Module

It is hard to get fast accurate MCLK without XT2accurate MCLK without XT2.

This is not a problem for the types of designs used by 2013 (smoke alarms, thermostats….)

4618 Clock Module

The “10‐bit Frequency Integrator” is just an up down counterjust an up‐down counter.

It counts the difference between the 32768 kHz crystal (+) and the DCO Clock divided by (N+1) and, optionally a divider of 1, 2, 4, or 8.

This is the integral of frequency (ifThis is the integral of frequency (if DCO/(N+1) = 32765, the output of the counter increases at 2 counts per second).

If the difference is non‐zero, it changes the frequency of the DCO.

For those who took E58 – since there is an integrator in the loop, the DC error is zero.

FLL Registers

0 | 2 // 2 4 i lSCFI0 |= FN_2; // x2 DCO, 4MHz nominal DCOSCFQCTL = 74; // (74+1) x 32768 = 2.45Mhz

Addressing Modes Review• Register {Rx}: Valid for source and destination

0xF81E: 4F0E MOV.W R15,R14 ;1 cycle

• Immediate {#}: Valid for source only0xF81C: 403F 123A MOV.W #0x123a,R15 ;2 cycles(1) Fetch instruction(2) Fetch immediate operand and store in R15

• Absolute {&}: Valid for source and destination0xF820: 425F 0020 MOV.B &P1IN,R15 ;2 cycles0xF822: 40F2 00F3 0021 MOV.B #0x00f3,&P1OUT ;5 cycles

• Symbolic: Valid for source and destination0xF80A: 5290 F842 09F2 ADD.W &myWord,myWordVar1 ;6 cycles(1) Fetch instruction(2) Fetch source address (F842)(3) Fetch word at memory location F842(4) Fetch destination address (PC+09F2)(5) Fetch word at memory location PC+09F2(6) Write destination(6) Write destination

New Addressing Modes

• Indexed {D(Rx)}: Valid for source and destination0xF810: 40B6 123A 0006 MOV.W #0x123a,0x0006(R6)

– Add 6 to the contents of R6, and use this as a memory address.– Useful for array addressing. D is the address of the array, and Rx is the index.

• Indirect Register {@Rx}: Valid for source onlyg {@ } y0xF816: 4AA2 0021 MOV.W @R10,&Port_1_2_P1OUT

– Use R10 as a memory address.– Equivalent to 0(R10), but faster.– Can fake mode in destination with “0(Rx)” – but this is slower( )

• Indirect Autoincrement {@Rx+}: 0xF81A: 4AB2 0021 MOV.W @R10+,&Port_1_2_P1OUT

Use R10 as a memory address and increment after execution – Use R10 as a memory address and increment after execution (increment by 1 for byte instruction, by 2 for word).

– No time penalty for autoincrement.– Can fake mode in destination with two instructions “0(Rx)” followed by “inc.w Rx”

Speed of Double Operand Instructions

Note (for next slide):  using an immediate operand is slower than using a register operand.

Constant GenerationConsider two ways to increment a register:

532F incd.w R15 ;1 cycle532F add.w #02h, R15 ;1 cycle

Different instruction yield the same machine code.  Why?

Now consider a seemingly unrelated instruction:532F add w @R3 R15 ;1 cycle532F add.w @R3, R15 ;1 cycle

Let’s try a varitey of additions:533F add.w #-1, R15 ;1 cycle530F add w #0 R15 ;1 cycle530F add.w #0, R15 ;1 cycle531F add.w #1, R15 ;1 cycle532F add.w #2, R15 ;1 cycle503F add.w #3, R15 ;2 cycles, 2 memory locations0003 522F add.w #4, R15 ;1 cycle503F add.w #5, R15 ;2 cycles, 2 memory locations0005 503F add.w #6, R15 ;2 cycles, 2 memory locations00060006 523F add.w #8, R15 ;1 cycle

R2 (SR) and R3 as Constant GeneratorsGenerators

R3 is always a constant generator, the addressing mode determines the constant:530F add.w #0, R15530F add w R3 R15 ; Use R3 in Register mode we get "0“530F add.w R3, R15 ; Use R3 in Register mode, we get 0

532F incd.w R15532F add.w #2, R15532F add.w @R3, R15 ; Indirect mode gives "2"

533F add.w #-1, R15533F add.w @R3+, R15 ; Indirect autoincrement i s"-1"

Using various addressing modes, R3 can represent 0, 1, 2, or ‐1

R2 is the status register, so it doesn’t make sense to be used as an address.   Those addressing modes (indexed, indirect, and indirect autoincrement) are used to represent absolute addressing made (X(0)) 4 and 8absolute addressing made (X(0)), 4 and 8. 

The 0, 1, 2, and 3 bit (0x01, 0x02, 0x04, 0x08) are easily tested.  This is where important (often tested) bits are placed in registers and ports (e.g., interrupt flags)

Addressing Modes and Constant GenerationConstant Generation

Emulated InstructionsMany instructions are emulated.  For example the “inc R15” instruction – this is the same as “add #1, R15”, where , ,the #1 is generated by R3.

“clr x” is emulated by “mov #0,x”

Variables and C

.bss, _bss, ig:0x0200: 00F2 .word 0x00F2

jg:0x0202: 00F2 .word 0x00F2

kg:0 0204 3333 JN (0 006 )0x0204: 3333 JN (0x006c)

5 main(){.text, _text, main:

0xF800: 8031 0006 SUB.W #0x0006,SP8 i=2; // variable i is at 0(SP)

Unintialized data in RAM

Initialize stack pointer

int ig, jg, kg;

main(){int i, j, k;

i 2;// variable i is at 0(SP)

; // ( )0xF804: 43A1 0000 MOV.W #2,0x0000(SP)9 j=3; // j is at 2(SP)0xF808: 40B1 0003 0002 MOV.W #0x0003,0x0002(SP)11 i += 1; // increment i0xF80E: 5391 0000 INC.W 0x0000(SP)13 i 3 // dd i di t t ii=2;// variable i is at 0(SP)

j=3;// j is at 2(SP)

i += 1;// increment i

i += 3;// add immediate to i

13 i += 3; // add immediate to i0xF812: 50B1 0003 0000 ADD.W #0x0003,0x0000(SP)15 k = i+j; // add j and i to 4(SP)0xF818: 411F 0002 MOV.W 0x0002(SP),R150xF81C: 512F ADD.W @SP,R150xF81E: 4F81 0004 MOV.W R15,0x0004(SP);//

k = i+j;// add j and i to 4(SP)

ig=2;// variable ig is at 0x0200jg=3;// variable jg is at 0x0202

, ( )17 ig=2; // variable ig is at 0x02000xF822: 43A2 0200 MOV.W #2,&.bss18 jg=3; // variable jg is at 0x02020xF826: 40B2 0003 0202 MOV.W #0x0003,&jg20 ig += 1; // increment0 F82C 5392 0200 INC W & b

ig += 1;// increment

ig += 3;// add

kg = ig+jg;// add jg ig to 0x0204

0xF82C: 5392 0200 INC.W &.bss22 ig += 3; // add0xF830: 50B2 0003 0200 ADD.W #0x0003,&.bss24 kg = i+j; // add j and i to 0x02040xF836: 421F 0202 MOV.W &jg,R150xF83A: 521F 0200 ADD.W &.bss,R15kg = ig+jg;// add jg, ig to 0x0204

}

,0xF83E: 4F82 0204 MOV.W R15,&kg F83625 }0xF840: 430C CLR.W R120xF842: 5031 0006 ADD.W #0x0006,SP0xF846: 4130 RET

Clean up stack pointer

Op Amp Module

Analog Signal Chain

Microphone input

Midband gain = ‐150/1 = ‐150

Hi‐pass frequency  =  629 18

1 1 338.6 Hz2 R C 2 470 10−= =π π ⋅

Lo‐pass frequency  =  630 21

1 1 44.4 kHz2 R C 2 2.25 10−= =π π ⋅

Resources UsedResources Used• http://focus.ti.com/lit/ug/slau056j/slau056j.pdf (MSP430X4XX Family User’s Guide)• http://focus ti com/lit/ug/slau144e/slau144e pdf (MSP430X2XX Family User’s Guide)• http://focus.ti.com/lit/ug/slau144e/slau144e.pdf (MSP430X2XX Family User s Guide)• http://www.ti.com/lit/zip/slac118 (Example code MSP430FG461X) • http://focus.ti.com/lit/ug/slau213a/slau213a.pdf (MSP430FG4618/F2013 Experimenter’s Board User's Guide)

• http://focus.ti.com/lit/ug/slau131e/slau131e.pdf (MSP430 Assembly Language Tools User's Guide)• http://en.wikipedia.org/wiki/Operational_amplifier_applications (Op amp applications)