# Extrinsic Capacitance - Gonzaga Extrinsic Capacitance . Extrinsic Capacitance 2 Extrinsic Capacitance

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• Claudio Talarico Gonzaga University

Fall 2014

Source: most slides provided by B. Murmann

Extrinsic Capacitance

• Extrinsic Capacitance 2

Extrinsic Capacitance

§  Overlap capacitance (Cov) –  Gate to source and gate to drain

§  Junction capacitance –  Source to bulk (Csb) and drain to bulk (Cdb)

L L

• Extrinsic Capacitance 3

Overlap Capacitance

§  Two components –  Direct overlap ~ CoxWLoverlap –  Additional component due to fringing field

•  Non-negligible in modern technology (gate thickness is large compared to other feature sizes)

§  Simple model equation Cov = Cov' · W §  Stanford’s EE114 technology:

–  Cov’ = 0.5fF/µm for both NMOS and PMOS –  Spice model parameters: CGSO=0.5n, CGDO=0.5n

Cov’ = overlap capacitance per unit length

D irect overlap

Cov−GS = CGSO ⋅W

Cov−GD = CGDO ⋅W

fringing

• Extrinsic Capacitance 4

Junction Capacitance (1)

S D G

L

W

Ldiff Ldiff €

AS =W ⋅Ldiff PS =W + 2Ldiff

AD =W ⋅Ldiff PD =W + 2Ldiff

Cjdb = AD ⋅CJ

1+ VDB PB

# \$ %

& ' ( MJ +

PD ⋅CJSW

1+ VDB PBSW

# \$ %

& ' ( MJSW

Cjsb = AS ⋅CJ

1+ VSB PB

# \$ %

& ' ( MJ +

PS ⋅CJSW

1+ VSB PBSW

# \$ %

& ' ( MJSW

C j = C j 0

1+ VR φB

C j 0 = ε si q 2

NAND NA + ND

1 φB

VR

CJ

For  long  channel    transistors   the  side  of  the  perimeter     abutted  to  the  gate  is     shielded  by  the  electrons     in  the  channel

• Extrinsic Capacitance 5

Geometry parameters for calculating junction cap.

+ +

• Extrinsic Capacitance 6

Junction Capacitance (2)

MJSW DB

MJ DB

jdb

PB V CJSWPD

⎟ ⎠ ⎞⎜

⎝ ⎛ +

⋅+

⎟ ⎠ ⎞⎜

⎝ ⎛ +

⋅= 11

EE114 Technology CJ CJSW MJ MJSW PB

NMOS 0.1 fF/µm2 0.5 fF/µm 0.5 0.33 0.95V

PMOS 0.3 fF/µm2 0.35 fF/µm 0.5 0.33 0.95V

MJSW SB

MJ SB

jsb

PB V CJSWPS

PB V CJASC

⎟ ⎠ ⎞⎜

⎝ ⎛ +

⋅+

⎟ ⎠ ⎞⎜

⎝ ⎛ +

⋅= 11

• Extrinsic Capacitance 7

MOS transistor’s caps: Summary

Subthreshold Triode Saturation Cgs Cov ½WLCox+Cov ⅔WLCox+Cov Cgd Cov ½WLCox+Cov Cov Cgb

0 0

Csb Cjsb Cjsb+½CCB Cjsb+⅔CCB Cdb Cjdb Cjdb+½CCB Cjdb

7

1 CCB

+ 1

WLCox

"

# \$

%

& '

−1

extrinsic cap. intrinsic cap.

CCB = εsi Xd

⋅WL Xd  is  the  width  of  the     depletion  region     at  the  silicon  interface

• Extrinsic Capacitance 8

MOS Capacitance Simulation

§  Note gradual transition in capacitance values

0 1 2 3 4 5 0

0.5

1

1.5

2

2.5 x 10 -14 NMOS 10/1, VDS=0.5V

VGS [V]

C [F

]

Cgs Cgd Cgb

• Extrinsic Capacitance 9

Small Signal Model with Capacitances

roCgs gmvgs

D

S

G + vgs -

Cgd

B

CsbCgb @  0 Cdb≈0

• Extrinsic Capacitance 10

Transit Frequency with Extrinsic capacitances

ωT = gm

Cgs +Cgd

Cgs+Cgd

Iout Iin ω=ωT

= 1

• Extrinsic Capacitance 11

Parameter Summary (1)

Parameter Purpose EE 114 Technology

NMOS PMOS

KP µCox 50 µA/V2 25 µA/V2

COX εox/tox 2.3 fF/µm2 2.3 fF/µm2

VTO Threshold Voltage 0.5 V −0.5 V

LAMBDA Channel length modulation 0.1 V-1µm/L 0.1 V-1µm/L

CGDO, CGSO Gate-drain/source overlap capacitance per length

0.5 fF/µm 0.5 fF/µm

CJ Zero bias area capacitance 0.1 fF/µm2 0.3 fF/µm2

CJSW Zero bias sidewall capacitance 0.5 fF/µm 0.35 fF/µm

• Extrinsic Capacitance 12

Parameter Summary (2)

Parameter Purpose EE 114 Technology

NMOS PMOS

PB Junction Potential 0.95 V 0.95 V

MJ Area Junction Grading Coefficient 0.5 0.5

MJSW Area Junction Grading Coefficient 0.33 0.33

HDIF Half-length of S/D diffusion (=Ldiff/2) 1.5 µm 1.5 µm

GAMMA Bulk Threshold Parameter 0.6 V1/2 0.6 V1/2

PHI Surface Potential (2Φf) 0.8 V 0.8 V

Needed Later

• Extrinsic Capacitance 13

Common Source Amplifier (Revisited)

vi

VI

Ri

“Transducer” Vo

VB

RIB VB = 2.5V VI = 1.394V

IB = 500mA

W/L = 20µm/1µm

R = 5kΩ

Ri = 50kΩ

• Extrinsic Capacitance 14

Small-Signal Model

roCgs gmvgs + vgs -

+ vo -

R

Ri

vi Cdb

Cgd

fFfF.CWC 'ovgd 105020 =⋅=⋅=

fF.

. . fF.

. . fF.

PB V CJSWPD

PB V CJADC ..MJSW

DB MJ

DB db 611

950 521

5026

950 521

1060

11 33050 =

⎟ ⎠ ⎞⎜

⎝ ⎛ +

⋅+

⎟ ⎠ ⎞⎜

⎝ ⎛ +

⋅=

⎟ ⎠ ⎞⎜

⎝ ⎛ +

⋅+

⎟ ⎠ ⎞⎜

⎝ ⎛ +

⋅=

fF.fFfF.CWLCC ovoxgs 674010321203 2

3 2 =+⋅⋅=+=

• Extrinsic Capacitance 15

.AC SPICE Simulation

§  Extrinsic caps reduce bandwidth from 103 MHz to 32 MHz !

§  There also seems to be a second pole

106 107 108 109 1010 -60

-40

-20

0

20

f [Hz]

|H (f)

| [ dB

]

106 107 108 109 1010 -50

0

50

100

150

200

f [Hz]

ph as

e[ H

(f) ] [

de g]

Intrinsic cap only Intrinsic + extrinsic caps

Intrinsic cap only Intrinsic + extrinsic caps

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