1

Modeling of Cu Electrodeposition for Advanced

Interconnects

Ph.D. Thesis Manuscript

Liu Yang

Revision 20140129

Table of content

Abstract

1. Introduction

1.1 Integrated Circuits and Interconnects

1.2 Cu Electroplating for Metallization

1.3 A Multi-Scale Overview

1.4 Modeling and Numerical Simulation

2. Challenges and Objectives

2.1 Plating Uniformity on Wafers

2.2 Filling of Recessed Features

2.3 Microscopic Processes

2.4 Objectives

3. Wafer-Scale Plating Uniformity

3.1 Experiments

3.2 Numerical Model and Implementation

3.3 Modeling of Wafer-Scale Plating Uniformity

3.4 Improvement of Plating Uniformity

3.5 Conclusions

4. Bottom-Up Filling of Through Silicon Vias

4.1 The Role of Suppressor

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4.2 Numerical Model

4.3 Modeling of TSV Bottom-Up Filling

4.4 Improvement of Filling Performance

4.5 Conclusions

5. Suppressor Desorption and Adsorption

5.1 Experiments

5.2 Numerical Model

5.3 Stochastic Modeling of PEG as a Suppressor

5.4 Conclusions

6. Direct Cu Plating

6.1 Experiments

6.2 Numerical Model for Nucleation

6.3 Implementation

6.4 Multi-Scale Modeling of Direct Cu Plating

6.5 Conclusions

7. Conclusions, Achievements and Future Work

Appendix

I. Nomenclature

II. List of Publications

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1. Introduction

1.1 Integrated Circuits and Interconnects

Integrated circuit (IC) is inarguably the essential building block of modern life. The advancement

of information technology is only made possible by the mass production of highly sophisticate,

highly reliable ICs designed for numerous applications. Manufacture of ICs starts with

unprocessed wafers. The processing steps of IC fabrication are generally divided into two phases,

namely the front-end-of-line (FEOL) and the back-end-of-line (BEOL). During the FEOL phase,

individual semiconductor devices are fabricated. These devices are then connected through

multiple layers of metal interconnects and vias to form circuits. The processing steps employed

in the formation of interconnects are generally referred to as the BEOL. After the BEOL

processing, the wafers are diced into small dies which are subsequently packaged as individual

chips, or ICs.

The interconnects in earlier generations of ICs use aluminum (Al). Sputtered Al layer is etched to

form patterns. Compared with Al, Copper (Cu) has more desirable properties such as its high

conductivity and resistance to electromigration. Cu interconnects were realized using the so-

called Damascene processing \cite{cc1andricacos98}. Figure \ref{fc1damascene} illustrates the

processing flow of one single layer of Damascene interconnects. The interconnect pattern is first

transfer to the substrate and etched to form trenches. A thin barrier layer is deposited to prevent

Cu from diffusing into the substrate. On top of the barrier layer, a thin Cu seed layer is formed

using deposition techniques such as physical vapor deposition (PVD). The trenches are then

filled with Cu using electrodeposition. Lastly, the extruded Cu overburden, as well as the

excessive Cu deposited on the top surface, is removed using chemical-mechanical planarization

(CMP). Multiple interconnect layers can be fabricated sequentially by repeating these processes.

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Figure {fc1damascene} Schematic of the Damascene processing flow.

Driven by the ever-increasing demand for faster processing speed, larger storage volume, lower

power consumption and smaller devices, the feature size has been reduced aggressively during

the scaling-down of IC. As it is increasingly difficult to further reducing the feature size, the idea

of 3-dimensional integrated circuits (3D IC) emerged [ref]. During the past few years, 3-D

integration has been evolving steadily from blueprints to practical products. Multiple integration

schemes were proposed and validated. The stacking of multiple dies or wafers rely on one

critical component, the Through-Silicon Via (TSV), to achieve interconnect on the third

dimension.

As suggested by its name, a TSV is a via which penetrates the silicon wafer (after thinning) , thus

realizing direct interconnect of multiple stacked dies. Figure \ref{fc1tsv3d} briefly illustrates the

processing flow of staking two layers. Similar to the Damascene interconnects, the fabrication of

TSVs start with patterning of the silicon substrate and etching, followed by deposition of thin

liner & barrier layers and a thin Cu seed layer. These cavities, or “blind holes” as they are named,

are then filling using Cu electroplating. Subsequently, the overburden is removed using CMP.

The heights of typical TSVs are in the range of tens of micrometers to one hundred micrometers,

which is not large enough to go through a normal wafer. Additional thinning steps are applied to

reduce the thickness of the die / wafer from the backside, thus revealing the TSVs for stacking.

Others features, such as the so-called micro-bumps (µBumps) and landing pads, are introduced

for the manufacturability of stacking [ref].

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Figure {fc1tsv3d} Schematic process flow of 3D integration.

1.2 Cu Electroplating for Metallization

The metallization processes in BEOL interconnect, both the smaller Damascene interconnect and

the larger TSVs and µBumps, are fabricated using Cu electroplating. A typical acidic Cu plating

bath contains CuSO4 and H2SO4 as supporting electrolyte. Also included in the plating bath are

small concentrations of additives. The surface to be plated works as the cathode while the anode

is normally pure bulk Cu metal. On the cathodic, Cu2+ ions are reduced to Cu and deposit on the

electrode as solid Cu. The overall electrochemical reaction is:

Cu2+ + 2e- = Cu {ec1cured}

The plating rate is proportional to the plating current density, known as Faraday’s law. On the Cu

anode, the reaction proceeds in the reverse direction. The Cu metal is dissolved in to the

electrolyte as Cu2+, thus replenishing Cu2+ consumed on the cathode.

Figure {fc1ivcurve} A typical i-η curve of Cu electroplating.

Without the complicating of additives, the reaction rate is dependent on both the concentration of

Cu2+ in the vicinity of the electrode and the potential difference across the electrode-electrolyte

interface, i.e. the overpotential η. A typical i - η curve of Cu electroplating is shown in Figure

\ref{fc1ivcurve}. Three regions can be identified in the cathodic region (η < 0). For increasing |η|

start from 0V, the plating rate first increases linearly with |η|. Coming next is an exponential

region where the plating rate increases exponentially with |η|. After a transition region, the

plating rate reaches a plateau due to the diffusion limitation of Cu2+ from the bulk of the

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electrolyte to the electrode surface. For a typical application of Cu electroplating, the bath

composition, as well as the convection condition, is fixed during plating. The overall plating rate

is adjusted through the potential applied. Depending on the parameter controlled, the plating

process can be either galvanostatic with fixed plating currents (thus fixed plating rate) or

potentiostatic with fixed potentials.

When applied to the fabrication of BEOL interconnects, the wafer to be processed functions as

the working electrode / cathode. In a typical plating process, a thin Cu layer is formed prior to

the electroplating. As the substrate underneath the Cu seed layer is typically very resistive, this

thin Cu layer functions as both a seed layer for Cu plating and a conductive layer for the current

applied. The plating tool can be roughly approximated by a cylinder. The wafer to be plated is

placed at one end while an anode with the same circular shape is placed at the other end. Figure

\ref{fc1tool} illustrated the cross-section of a wafer-plating tool. The space between the two

electrodes is filled with electrolyte. The electric contact is made on the edge of the wafer with a

ring-shaped contact. Externally applied current flows from the anode (normally a solid Cu disk)

through the electrolyte to the surface of the cathode (the wafer to be plated), and leaves the wafer

through the contact made on the edge of the wafer.

Figure {fc1tool} A schematic cross-section of the wafer plating tool.

As introduced in the previous section, there are various BEOL features on the wafer surface.

These features are fabricated during the Cu electroplating process. Figure \ref{fc1blindvshole}

illustrates two different electrodeposition techniques. The extruded feature, such as µBumps, are

generally fabricated using the so-called through-mask plating [ref]. The mask, which can be the

developed photoresist, also functions as a mold for the feature to be formed. Deposition happens

only on the exposed area, thus Cu grows upward from the bottom. For the recessed features, as

the Cu seed layer covers the entire wafer, deposition happens everywhere on the surface.

Additional measures, such as the addition of certain additives in the plating bath, must be taken

to achieve a void-free filling.

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Figure {fc1blindvshole} Illustration of Cu electroplating for (a). through-mask plating and (b)

blind hole. The red arrows show where deposition happens.

1.3 A Multi-Scale Overview

The Cu electroplating processes involve an extremely wide length range, from plating on the

wafer-scale (~10cm) to the filling of TSVs (~10µm) and Damascene features (~10nm).

Moreover, knowledge of the microscopic processes, such as Cu nucleation on non-Cu substrates

and the adsorption/desorption of suppressor additive, is also indispensable for understanding the

macroscopic plating behaviors.

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Figure {fc1multiscaleview} A figure showing the length scales involved in this study: wafer

scale (>10cm), feature scale (10nm~10µm) and molecule scale (<10nm).

Figure \ref{fc1multiscaleview} illustrate the length scales involved in this study. Due to the

multi-scale nature of the topic studied, a number of sub-topics can be defined for each length

scale. It is important to note that these topics, though independently definable, are all relevant.

The plating process as a whole is governed by a set of physicochemical mechanisms. The

dominant mechanism is dependent on the length-scale examined. As a result, the dominant

phenomenon also changes with the length-scale.

The degree of abstraction in modeling and the numerical method applicable varies as well with

the length scale under study. For the electric conduction on the wafer scale, the partial

differential equations describing the domain as a continuum can be solved using numerical

methods such as finite element method (FEM). For the modeling of microscopic processes such

as the desorption/adsorption of additives, stochastic methods are more suitable for tracking the

essentially discrete process. Moreover, the interdependency between the microscopic and the

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macroscopic mechanisms intensifies with the progressive scaling down process. Multi-scale

modeling approaches which couple simulations on multiple length scales become necessary.

1.4 Modeling and Numerical Simulation

Although this work contains an extensive set of experimental studies involving various aspects

of Cu electroplating for BEOL interconnects, the focus of this thesis, however, is on the

modeling of these phenomena and the underlying mechanisms.

Compared to the experimental approach, modeling provides an intuitive way to study important

parameters and critical processes that are too difficult or even impossible to observe

experimentally. For example, while it would be extremely difficult (if only possible) to measure

the real-time concentration profile of additives inside a TSV, such a task is just a routine

operation using a numerical simulator. Numerical simulation can also be employed to facilitate

experimental explorations that are too expensive or too time-consuming to be carried out in full

scale. As an example, when studying the wafer-scale plating uniformity, a capable simulation

program may significantly reduce the number of plating experiments (which are both expensive

and time-consuming) required to find the lower limit of seed layer thickness under given

conditions by prediction the dependency using coupon-scale measurements (which are

significantly easier to perform and cost only a tiny fraction of the wafer-scale experiments) .

Nevertheless, experimental measurements are indispensable for modeling as they serve as both

input and validation for the simulation program. As a general approach employed in the sub-

projects of this thesis, models are developed based on the observation of experimental

measurements. Simulation programs using the proposed model are then implemented. The

simulation results are validated against corresponding experiments and parameters are calibrated

before the modeling approaches can be employed for further study or making any prediction.

References

[cc1andricacos98] P.C. Andricacos, C. Uzoh, J.O. Dukovic, J. Horkans, H. Deligianni,

Damascene copper electroplating for chip interconnections, IBM J. Res. Dev. 42(1998) 567.

references to be fixed....

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2. Challenges and Objectives

As introduced in the previous chapter, various length scales are involved in the Cu electroplating

process. Depending on the length scale examined, multiple challenges lie in the Cu electroplating

process. These challenges, as well as the objectives of this thesis, are discussed in this chapter.

2.1 Plating Uniformity on Wafers

As the feature size of advanced interconnects decreases, the thickness of the Cu seed layer

becomes comparable with the feature width. As a result, the seed layer further reduces the

opening width of the recessed features, thus increases the aspect ratio (AR) of the trenches,

making it more difficult to achieve void-free filling in the electroplating process. Consequently,

the Cu seed layer is also reduced aggressively during the scaling-down process. Seed layer as

thin as 5nm has been used in experimental studies \cite{cc2armini10}. Due to its high sheet

resistance, such an extremely thin Cu seed layer results in a significant potential drop from the

wafer edge to the wafer center when electric current is applied, known as the terminal effect

\cite{cc2armini10, cc2vereecken06}. This terminal effect becomes even more significant on

larger wafers due to the longer path of electric conduction (thus higher resistance). As a result,

the post-plating thickness profile is no longer uniform, as illustrated by Figure

\ref{fc2terminaleffect}.

Figure {fc2terminaleffect} Wafer-scale plating non-uniformity on resistive wafers due to the

terminal effect.

The disadvantage of an extremely thin Cu seed layer is two-fold. On the one hand, void-free

filling of recessed features is only achievable within a certain current window which depends on

various conditions. A significant potential drop from the wafer edge to the wafer center makes it

difficult to keep the plating conditions of the entire wafer inside the void-free process window.

On the other hand, corrosion of the seed layer within the time scale of plating becomes

comparable with extremely thin seed layers of a few nanometers. On a large wafer, e.g. 300 mm

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in diameter, a strong terminal effect may lead to very low plating current in the wafer center.

Without the protection of a cathodic current, the corrosion process may lead to net thickness

reduction or even complete removal of the seed layer after plating. Therefore, a thinner Cu seed

layer is increasingly more vulnerable to corrosion due to stronger terminal effect. Once the seed

layer is completely corroded and the substrate exposed, it would be very difficult to cover it

again through Cu nucleation on the non-Cu barrier layer. Therefore, complete corrosion of the

Cu seed layer, i.e. exposure of the substrate, must be avoided in the plating process. Various

additives are used in the plating bath in order to achieve super-conformal filling of the recessed

features \cite{cc2vereecken05}. The complex reaction mechanisms, which are still under active

study, introduce additional difficulty to the modeling of wafer scale Cu plating uniformity.

2.2 Filling of Recessed Features

One primary objective of Cu electroplating is to fill the recessed features without internal voids.

Any void may lead to reliability issues and/or deterioration of performance. Figure

\ref{fc2fibvoidfree} However, electroplating into recessed features is not necessarily void-free.

Figure \ref{fc2fillmodes} illustrates the three possible growth modes.

Figure {fc2fibvoidfree} Focused ion beam (FIB) images showing (a). void-free filling and (b)

internal voids of Ø5µm × 40µm TSVs. Image courtesy of Alex Radisic, imec Belgium.

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Figure {fc2fillmodes} Illustration of the growth modes. (a). Sub-conformal, (b). Conformal, (c).

Super-conformal.

When plating into a recessed feature, a concentration gradient of Cu2+ exists along the depth

direction of the feature due to the consumption of Cu2+ inside the feature. The near-surface

concentration of Cu2+ is higher at the top of the TSV than at the bottom. For high aspect ratio

TSVs with depths of tens of micrometers, this concentration difference may become significant.

As the Cu plating rate is proportional to the near-surface concentration of the reactant, Cu2+, the

Cu plating rate would be higher at the via top than at the via bottom in a plating bath contains

only CuSO4 and H2SO4. The result is then sub-conformal. Reducing the plating rate may help

reduce the concentration difference between the via top and the via bottom, thus lead to more

conformal growth. Nevertheless, it cannot lead to super-conformal growth.

Void-free filling is only achieved when the growth is super-conformal. In order to achieve void-

free filling, various additives, both organic and inorganic, were added to the plating bath.

Depending on the effect of these organic additives on Cu plating, they are generally categorized

as “suppressor”, “accelerator”, etc.. The additives that act as “suppressors” reduce the Cu plating

rate on Cu surface when adsorbed. Polyethylene Glycol (PEG), as an example, is one of the most

widely studied suppressors. It adsorbs onto the Cu surface in the presence of Cl- and significantly

reduces the Cu plating rate on the covered area. The “accelerators” compete with the suppressors

for adsorption sites on the Cu surface but do not (or only slightly) reduce the Cu plating rate

compared to the additive-free case. For example, bis(3-sulfopropyl) disulfide (SPS) is a widely

studied accelerator.

Void-free filling under various conditions has been achieved with the help of such additives

\cite{cc2ole09, cc2ole10, cc2alex11, cc2hayashi12}. Studies of the underlying mechanism are

also abundant. Various models were proposed to explain the super-conformal filling. The

curvature-enhanced accelerator concentration (CEAC) model \cite{cc2moffat06ceac,

cc2moffat07} is arguably one of the most successful. Figure \ref{fc2ceac} gives an illustration of

the model. The key assumption of the CEAC model states that, the decrease of surface area

during Cu deposition, such as the lower corners shown in Figure \ref{fc2ceac}, leads to an

increase of local accelerator coverage until the surface is saturated with adsorbed accelerator.

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Figure {fc2ceac} Super-conformal filling mechanism of the CEAC model.

Start from uniform suppressor coverage and accelerator coverage everywhere along the surface

as initial condition, the surface area at the lower corners decreases as Cu deposition proceeds.

According to the CEAC model, such an area decrease leads to higher local accelerator

concentrations and subsequently, higher local Cu deposition rates. As a result, super-conformal

filling is achieved.

For the Damascene interconnects with widths of a few tens of nanometers, the filling of such

small features takes as short as a few seconds to complete. As the surface profile changes

significantly during this process, the filling behavior is mainly determined by the CEAC

mechanism. Good match has been shown between numerical simulation of the filling of

Damascene interconnects and the corresponding experiments [ref].

The TSVs are significantly larger than the Damascene interconnects and take much longer time

to fill. The time of TSV electroplating can be as long as a few thousand seconds. Consequently,

the dominant filling mechanism, as well as the plating conditions for void-free filling, is different

from the Damascene interconnects. Models and numerical modeling works for TSV super-

conformal filling exist in abundance \cite{cc2alan01, cc2chalupa02, cc2li07, cc2rusli07,

cc2qin08}.

Figure {fc2bottomupmode} Illustration of the bottom-up filling process. The growth of the top /

lateral surface is significantly suppressed while the bottom grows fast toward the via top.

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One phenomenon recently comes to attention is the so-called “bottom-up filling” observed

during the filling of high aspect ratio TSVs \cite{cc2alex12}. In such a growth mode, deposition

on the top / lateral surface is significantly suppressed while deposition at the via bottom still

proceeds at a significantly higher unsuppressed rate. As a result, the bottom grows upward and

fills the via (thus the derivation of the name bottom-up filling). Such a bottom-up growth was

also observed in smaller features with PEG as suppressor {cc2hayase02}. The fast growth at via

bottom may happen at the early stage of TSV plating without significant change in the surface

area. Instead of gradual variations of additive coverage along the via depth direction, a clear

division exists between the fast growing bottom and the significantly suppressed lateral wall.

Modeling of the TSV bottom-up filling thus asks for suitable models and modeling approaches.

2.3 Microscopic Processes

For both the wafer scale and the feature scale, the domains studied can be treated as continuums.

The systems, as well as the physicochemical processes involved, are described by a set of partial

differential equations. However, it is apparent that the macroscopic phenomena observed, such

as the uniformity of an electroplated wafer and the filling profile of a TSV, are the manifestation

of microscopic processes. In order to gain better understanding of these macroscopic phenomena,

knowledge of the underlying microscopic processes is necessary. Two microscopic processes,

one relevant to the wafer-scale plating uniformity and the other relevant to the TSV bottom-up

filling, are studied in this thesis.

Figure {fc2coalescence} Illustration of the coalescence process. Cu-on-Cu plating starts with

individual nuclei which grow large and coalescence to form continuous films.

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Figure {fc2directplating} Cu propagation during direct plating on a 200mm wafer covered with

5nm Pt. (a). 30 s plating time, (b) 60 s plating time. Rs = 38 Ω, 0.27 M CuSO4 +1.8 M H2SO4 +

50 ppm HCl, iavg = -5 mA cm-2, 40 rpm rotation speed.

For the wafer-scale plating uniformity, one microscopic process of practical interest is the

nucleation of Cu on non-Cu substrates. As discussed in the preceding sections, the scaling down

process is a strong driving force for further reduction of the Cu seed layer thickness. Apparently,

the thickness of the Cu seed layer cannot be reduced without a limit. The probability to

completely eliminate this seed layer was thus explored. Direct plating onto non-Cu substrates has

drawn much attention as an option for future electroplating methods used for advanced

interconnect in the integrated circuit fabrication \cite{cc2armini11}. In direct plating, copper

deposition starts with a nucleation process on the foreign substrate. Individual nuclei are formed

and eventually coalesce with each other to form a continuous copper film. This process is

illustrated in Figure \ref{fc2coalescence}. Because of the resistivity of the substrate, this

coalescence process starts at the wafer edge and propagates toward the wafer center

\cite{cc2alex10}. Figure \ref{fc2directplating} shows this process. In order to apply the direct

plating technique for advanced interconnects, the coalescence thickness of the deposited film

must be small enough to enable filling of small features \cite{cc2alex10, cc2moffat06,

cc2nagar10}. Meanwhile, as a general requirement for the BEOL copper metallization, the

current density has to stay within a fixed range to assure successful feature fill. During the

plating process, the wafer-scale plating uniformity determines the overpotential distribution on

the wafer surface, thus affects the microscopic nucleation. The microscopic nucleation and

coalescence process in turn affects the plating uniformity on the wafer scale. In order to simulate

the direct plating process, a multi-scale approach which couples the wafer-scale plating

uniformity and the atomic-scale nucleation / coalescence is required. On the wafer scale, a model

that describes the copper front propagation and current distribution is needed. On the atomic

scale, a suitable model of the nucleation / coalescence is required. Such a model should catch the

essence of the nucleation process but also be amenable to practical implementation in a multi-

scale simulation scheme.

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Figure {fc2hysteresis} Cyclic Voltammogram showing the desorption and re-adsorption process.

Cu RDE at 1000rpm, 50 mV s-1. 1M H2SO4 + 0.25M CuSO4 + 300ppm PEG 4000 + 2ppm HCl.

For the bottom-up filling of high aspect ratio TSVs, knowledge of the additives used is

indispensable. As introduced in the preceding sections, bottom-up filling is only achievable with

the help of additives. It is apparent that the properties of additives play a key role in the bottom-

up filling. The suppressors, however, exhibit complex dependencies on the plating conditions

\cite{cc2hebert05, cc2willey07, cc2tanya11}. Figure \ref{fc2hysteresis} shows the cyclic

voltammogram (CV) measured in a plating bath containing 0.25M CuSO4, 1M H2SO4, 300ppm

PEG 4000 and 2ppm HCl. The details of the experimental setup are given in Chapter 5. The

electrode surface is saturated by adsorbed PEG at the beginning of the scan. During the sweep

toward the negative direction, the current density curve first follows the fully suppressed kinetics.

Around a certain critical potential, a transition to the unsuppressed kinetics happens within a

very narrow potential range, leaving a steep drop in the i-V curve. Such a transition is believed to

be the result of the desorption of adsorbed PEG from the Cu surface. During the sweep toward

the positive direction, PEG can adsorb back onto the Cu surface and lead to another transition

from the unsuppressed curve to the suppressed curve. However, the re-adsorption happens at a

potential more positive than the desorption potential, which results in a hysteresis in the CV

curve. As discussed in Chapter 4, this hysteresis is critical for the bottom-up filling of TSVs.

Naturally, we look into the microscopic regime for the underlying mechanism of the behaviors

observed.

2.4 Objectives

The overall objective is to understand Cu electroplating employed for BEOL interconnect in IC

fabrication through experimental study and numerical modeling. More specifically, multiple sub-

projects are defined to tackle various aspects of the challenges introduced in the preceding

sections. The objectives include:

---Experimental study and numerical modeling of the wafer-scale plating uniformity on

thin Cu seed layers.

---Modeling of the bottom-up filling of higher-AR TSVs under controlled currents.

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---Experimental study and stochastic modeling of PEG desorption / adsorption during Cu

electroplating and its dependency on various plating conditions.

---Experimental study and numerical modeling of Cu direct plating on the wafer scale.

Following the multi-scale structure illustrated in Figure \ref{fc1multiscaleview}, the succeeding

chapters of this thesis is organized as follows: Chapter 3 is about the modeling of wafer-scale

plating uniformity. Chapter 4 introduces the modeling of TSV bottom-up filling. The stochastic

modeling of PEG as a suppressor in Cu electroplating is shown in Chapter 5. The multi-scale

modeling of Cu direct plating is discussed in Chapter 6.

References

[cc2armini11] S. Armini, S. Demuynck, Z. El-Mekki, J. Swerts, M. Nagar, A. Radisic, N.

Heylen, G. Beyer, L. Leunissen, P.M. Vereecken, Direct copper electrochemical deposition on

Ru-based substrates for advanced interconnects target 30 nm and 1/2 pitch lines: From coupon to

full-wafer experiments, ECS Trans. 35, 117(2011).

[cc2armini10] S. Armini and P. M. Vereecken, Impact of “terminal effect” on Cu plating: theory

and experimental evidence, ECS Trans. 25, 185(2010).

[cc2vereecken06] P. M. Vereecken, P. Andricacos, H. Deligianni, K. T. Twietniak, C.

Andricacos, US 2006/0163055.

[cc2vereecken05] P.M. Vereecken, R.A. Binstead, H. Deligianni, P.C. Andricacos, The

chemistry of additives in damascene copper plating, IBM J. Res. & Dev. 49, 3(2005).

[cc2alex10] A. Radisic, M. Nagar, K. Strubbe, S. Armini, Z. El-Mekki, H. Volders, W.

Ruythooren, P.M. Vereecken, Copper Plating on Resistive Substrates, Diffusion Barrier and

Alternative Seed Layers, ECS Trans. 25, 175(2010).

[cc2moffat06] T.P. Moffat, M. Walker, P.J. Chen, J.E. Bonevich, W.F. Egelhoff, L. Richter, C.

Witt, T. Aaltonen, M. Ritala, M. Leskelä, D. Josell, Electrodeposition of Cu on Ru barrier layers

for damascene processing, J. Electrochem. Soc. 153, C37(2006).

[cc2nagar10] M. Nagar, P.M. Vereecken, A. Radisic, K. Strubbe, ECS Trans. 28, 9(2010).

[cc2ole09] O. Lühn, A. Radisic, P.M. Vereecken, C. Van Hoof, W. Ruythooren, J.-P. Celis,

Changing Superfilling Mode for Copper Electrodeposition in Blind Holes from Differential

Inhibition to Differential Acceleration, Electrochem. Solid-State Lett., 12, D39 (2009).

[cc2ole10] O. Lühn, A. Radisic, C. Van Hoof, W. Ruythooren, J.-P. Celis, Monitoring the

Superfilling of Blind Holes with Electrodeposited Copper, J. Electrochem. Soc., 157, D242

(2010).

[cc2alex11] A. Radisic, O. Lühn, H.G.G. Philipsen, Z. El-Mekki, M. Honore, S. Rodet, S.

Armini, C. Drijbooms, H. Bender, W. Ruythooren, Microelectron. Eng., 88, 701 (2011).

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[cc2hayashi12] T. Hayashi, K. Kondo, M. Takauchi, Y. Suzuki, T. Saito, N. Okamoto, M.

Marunaka, T. Tsuchiya, M. Bunya, High Speed Copper Electrodeposition for Through Silicon

Via (TSV), ECS Trans., 41(43), 45 (2012).

[cc2moffat06ceac] T.P. Moffat, D. Wheeler, S.-K. Kim, D. Josell, Curvature Enhanced

Adsorbate Coverage Model for Electrodeposition, J. Electrochem. Soc., 153, C127 (2006).

[cc2moffat07] T.P. Moffat, D. Wheeler, S.-K. Kim, D. Josell, Curvature enhanced adsorbate

coverage mechanism for bottom-up superfilling and bump control in damascene processing,

Electrochim. Acta, 53, 145 (2007).

[cc2alan01] A.C. West, S. Mayer, J. Reid, A Superfilling Model that Predicts Bump Formation,

Electrochem, Electrochem. Solid-State Lett., 4, C50 (2001).

[cc2chalupa02] R. Chalupa, Y. Cao, A.C. West, Unsteady diffusion effects on electrodeposition

into a submicron trench, J. Appl. Electrochem., 32, 135 (2002).

[cc2li07] X. Li, T.O. Drews, E. Rusli, F. Xue, Y. He, R. Braatz, R. Alkire, Effect of Additives on

Shape Evolution during Electrodeposition I. Multiscale Simulation with Dynamically Coupled

Kinetic Monte Carlo and Moving-Boundry Finite-Volume Codes, J. Electrochem. Soc., 154,

D230 (2007).

[cc2rusli07] E. Rusli, F. Xue, T.O. Drews, P.M. Vereecken, P. Andricacos, H. Deligianni, R.D.

Braatz, R.C. Alkire, Effect of Additives on Shape Evolution during Electrodeposition II.

Parameter Estimation from Roughness Evolution Experiments, J. Electrochem. Soc., 154, D584

(2007).

[cc2qin08] Y. Qin, X. Li, F. Xue, P.M. Vereecken, P. Andricacos, H. Deligianni, R.D. Braatz,

R.C. Alkire, Effect of Additives on Shape Evolution during Electrodeposition III. Trench Infill

for On-Chip Interconnects, J. Electrochem. Soc., 155, D223 (2008).

[cc2alex12] A. Radisic, L. Yang, C. Drijbooms, H. Bender, The Bottom-Up Copper Fill of

Ø5µm × 40µm Vias Using 2-Component Model Chemistry, ECS Trans., 41(43), 53 (2012).

[cc2hayase02] M. Hayase, M. Taketani, K. Aizawa, T. Hatsuzawa, K. Hayabusa, Copper

bottom-up deposition by breakdown of PEG-Cl inhibition, Electrochem. Solid-State Lett., 5, C98

(2002).

[cc2hebert05] K.R. Hebert, Role of Chloride Ions in Suppression of Copper Electrodeposition by

Polyethylene Glycol, J. Electrochem. Soc., 152, C283 (2005).

[cc2willey07] M.J. Willey, A.C. West, SPS adsorption and desorption during copper

electrodeposition and its impact on PEG adsorption, J. Electrochem. Soc., 154, D156 (2007).

[cc2tanya11] T.A. Atanasova, K. Strubbe, P.M. Vereecken, Adsorption/Desorption of

Suppressor Complex on Copper: Description of the Critical Potential, ECS Trans., 33 (37), 13

(2011).

19

3. Wafer-Scale Plating Uniformity

In this chapter the wafer-scale plating uniformity in Damascene Cu plating is studied. Wafer

scale experiments with various seed layer thickness are performed on 300mm wafers covered

with thin Cu seed layers. The uniformity issue, together with the corrosion, is demonstrated. A

numerical modeling approach is introduced following the experimental observation. The plating

uniformity with various thin Cu seed layer thicknesses is simulated using the program developed

and verified against the experimental measurements. Possible means of improvement are also

discussed.

3.1 Experiments

All experiments were performed at room temperature. Wafer-scale plating experiments were

performed on a 300 mm wafer Semitool/AMAT Raider ECD310™ plating tool. 300 mm wafers

with 4 nm, 5 nm and 10 nm Cu seed layers were used in the experiments. The Cu seed layer was

deposited in the AMAT Endura™ PVD tool on top of a layer of 1.5 nm TiN. Sheet resistances

were measured at different stages using a KLA-Tencor RS100™ resistivity measurement tool

with a 49-point pattern. The average sheet resistance of the TiN layer was measured to be 760 Ω.

The sheet resistances prior to the plating were measured to be 46-53 Ω, 27-31 Ω, and 5-7 Ω for

the targeted thickness of 4nm, 5nm, and 10nm, respectively. The ranges of the pre-plating sheet

resistance indicate that the Cu seed layers were continuous and uniform for all the three targeted

thicknesses. The post-plating thickness was calculated from the sheet resistance measurement

using the piecewise linear approximation of thin Cu film conductivity explained in the Model

section. The Raider electroplating systems for 300 mm single wafer is an automated

electrochemical deposition tool. The plating bath contained 0.01 M CuSO4, 1.8 M H2SO4, 10

ppm HCl, 2.0 mL L-1 ViaForm® I suppressor and 8.5 ml L-1 ViaForm® I accelerator. The rotation

rate was 80 rpm. A wet contact ring was made on the edge of the wafer. The contact was

protected from the plating bath by a circular seal which covers a width of about 2mm. The

plating cell has the wafer facing down; the anode compartment contains the inert anode pellets

facing up with a cationic membrane in front, holding the Cu plating bath in between. During the

immersion step the wafer was introduced into the plating solution under a five degrees angle in

order to avoid air bubble formation. The duration of this immersion step (<1 s) is negligible

compared to the plating time (>100s). A fixed total input current of -0.536 A (-0.76 mA cm-2

average current density) was applied for 105 s. The ratio between deposition current density and

process duration was chosen such that the average thickness of the plated film will be around 30

nm. After the Cu deposition, the sheet resistance of the wafer surface was measured. The

thickness of the Cu film was calculated from the resistance value. In addition, wafer-scale

roughness maps are obtained after plating from haze measurement using a Kla-Tencor Surfscan

SP2™ tool.

Measurement of the j-η curve was carried out in a conventional glass three-electrode plating cell.

The working electrode was a polished platinum (Pt) rotating disk electrode (RDE) with an area

of 0.0707 cm2. A saturated mercury/mercurous sulfate electrode (SMSE) was used as reference

electrode. The Pt RDE was pre-deposited with 500nm of copper prior to the measurement. The

same plating bath as used in the wafer-scale experiments was used.

3.2 Numerical Model and Implementation

20

As shown in Figure \ref{fc1tool}, the wafer plating tool can be approximated by a cylinder, with

the wafer located at the base and the counter electrode at the opposite end. A ring-shaped sealed

electrode contact is made at the edge of the wafer. Therefore, the region to be simulated can be

reduced to a two-dimensional, axisymmetric problem. Figure \ref{fc3simgeom} shows a

schematic view of the axisymmetric geometry simulated. The r-direction is defined along the

radial direction of the wafer and the y-direction along the axis of symmetry of the cylinder. The

width of the simulated region corresponds to the wafer radius r0 and the height d is the distance

between the wafer and the anode. In the (r,y) coordinate system, the anode is located at y = d

while the wafer is located at y = 0. The point (0,0) corresponds to the wafer center while the

point (r0, 0) corresponds to the wafer edge where the electric contact is made.

Figure {fc3simgeom} The axisymmetric geometry assumed in simulation. Drawing not to scale.

The geometry shown in Figure \ref{fc3simgeom} consists of two coupled domains, the two-

dimensional electrolyte and the one-dimensional wafer, both of them are axisymmetric. These

two domains are coupled through the electrochemical reaction on the wafer surface.

In the electrolyte, the governing equation for the electric potential in the electrolyte is:

01 ss

yyrr

rr

{ec3pdesol}

The corresponding boundary conditions are:

dyfor

yforfiy

0

0

s

s

{ec3bndsol}

In Equations \ref{ec3pdetool} and \ref{ec3bndsol}, m and s are the electric potentials on the

wafer and in the electrolyte, κ is the conductivity of the plating bath. The overpotential η is given

by the potential difference between the wafer and the electrolyte as η = ( m – s ). The plating

current density i is a function of the overpotential, i = f(η).

21

On the wafer surface, a coupling of Ohm’s law and conservation of charge leads to the governing

equation \cite{cc3matlosz92, cc3liu12}:

fdr

drs

dr

d

r

m1

{ec3pdewafer}

where s is the film conductivity of the wafer surface attributed to both the substrate and the

plated copper. In a wafer-plating tool, the total current is typically controlled instead of the

electric potential. Thus, for the wafer surface, the boundary conditions are:

00

m

m

for5.0

0for0

rrrir

rr

avg

{ec3bndwafer}

where 0.5iavgr0 gives the input current density on the wafer edge, assuming controlled-current

(galvanostatic when constant current) operation.

The wafer surface consists of stacked layers of barrier material and copper. This layer of copper

includes both the initial seed layer and the deposited Cu during electroplating. Therefore, the

film conductivity s, as involved in Equation \ref{ec3pdewafer}, changes during the plating

process. For a given Cu thickness, the film conductivity is calculated by:

)(1

)( Cu

s

rbR

rs

{ec3filmconductivity}

where Rs is the sheet resistance of the non-Cu substrate, b is the thickness of the Cu layer, and

σCu is the copper conductivity.

The conductivity of ultra-thin Cu films deviates from the bulk conductivity of Cu, as both

observed in our measurement of various Cu seed layers and reported in the study \cite{cc3li06}.

In this study, when the thickness of the seed is only a few nanometers, the conductivity of the Cu

seed layer can be significantly lower than the bulk conductivity of Cu. In order to simulate the

evolution of the thickness profile, it is necessary to take such a deviation of conductivity into

account. In this study, the conductivity is assumed to be a piecewise linear function with turning

points at 1nm, 4nm, 5nm, 10nm and 150nm. For a film thinner than 1nm, the conductivity was

fixed at 2×106 S. For a film thicker than 150nm, the conductivity was fixed at 5.9×107 S (the

bulk conductivity of Cu). For a film between 1nm and 150nm, the conductivity was calculated

from linear interpolation using the two nearest turning points. The measured conductivity values

of the three intermediate points were used to give the same sheet resistances as measured

experimentally at 4nm, 5nm and 10nm. Such a piecewise function gives a reasonably good

approximation to the conductivity variation of thin Cu film while keeping the calculation

procedure simple. The governing partial differential equation, Equation \ref{ec3pdesol} and

\ref{ec3pdewafer}, are solved using finite element method (FEM) \cite{cc3zinkiewicz05} under

the boundary conditions specified in Equation \ref{ec3bndsol} and \ref{ec3bndwafer}.

22

Figure {fc3expiv} The i-η curve measured on a Cu RDE at 80 rpm. The dashed line shows the

extrapolated diffusion limited current density. The plating bath contains 0.01 M CuSO4, 1.8 M

H2SO4, 10 ppm HCl, 2.0 mL L-1 ViaForm® I suppressor and 8.5 ml L-1 ViaForm® I accelerator,

5 mV s-1 scan rate.

The reaction kinetics is described by the dependency of i on η as i = f(η). However, analytical

expressions of such dependencies are not necessarily available. The complex reaction kinetics

brought by the additives pose a major difficulty to the modeling of plating uniformity. Even the

most widely used two-component chemicals, PEG as suppressor and SPS as accelerator, are still

under active study \cite{cc3vereecken05, cc3moffat06, cc3mendez09, cc3willey07, cc3tanya11}.

This difficulty was overcome by using experimental kinetic information in the simulation. For

the same plating bath as used in the wafer-scale tool, a linear sweep is performed on a rotating-

disk electrode (RDE) at the same rotation speed as in the wafer-scale plating tool. The i-η curve

recorded was then used directly in the simulation as a table of values for the kinetic relationship i

= f(η). Figure \ref{fc3expiv} gives the RDE measurement result. Since in this study we are

interested in the wafer-scale uniformity under various conditions, such a modeling approach is

more desirable and more flexible compared with the use of a complex reaction model. While it is

impractical to develop a new reaction model every time when a new additive is introduced to the

plating bath, the linear sweep experiment can be readily performed in a beaker in any

electrochemical lab. The cost of such a routine experiment is trivial compared to the expensive

and time-consuming wafer-scale plating experiments. Such a modeling approach even requires

no knowledge of the additive composition, making it especially suitable for the development of

new plating chemicals.

For simplicity, the corrosion rate rc is assumed to be constant across the whole wafer and does

not depend on the applied electric condition. The seed layer can be corroded by dissolved oxygen

according to the reaction \cite{cc3vereecken05}:

2Cu + O2 + 4H+ = 2Cu2+ + 2H2O {ec3corrosionoxygen}

The Cu2+ ions are also an oxidizer for copper itself as follows in the comproportionation reaction:

Cu + Cu2+ = 2Cu+ {ec3comproportion}

23

As discussed in \cite{cc3volov12}, both of these two reactions contribute to the dissolution of

the copper seed. In the presence of sufficient O2, the bulk concentration of Cu+ is kept zero due

to the reaction:

4Cu+ + O2 + 4H+ = 4Cu2+ + 2H2O {ec3cuprousoxidization}

Thus Reaction \ref{ec3comproportion} and Reaction \ref{ec3cuprousoxidization} result in the

same overall reaction as Reaction \ref{ec3corrosionoxygen}. Similarly, the possible formation of

copper oxides also leads to Reaction \ref{ec3corrosionoxygen} as copper oxides will eventually

dissolve in an acidic plating bath. Note that O2 can also be reduced electrochemically at negative

overpotentials through the reaction:

O2 + 4H+ +4e- = 2H2O {ec3oxygenreduction}

Nevertheless, from a mathematical point of view, there is no difference of rc whether O2 is

reduced electrochemically (through Reaction \ref{ec3oxygenreduction}) or chemically (through

Reaction \ref{ec3corrosionoxygen}). Both of these reactions lead to transfer of electrons to O2

from either oxidization of Cu or external supply. Therefore, the corrosion of Cu seed layer is

ultimately determined by the consumption of dissolved O2. The net deposition (or removal) rate

is the summation of the plating rate obtained from the i-η curve and the corrosion rate.

As the wafer surface can be very resistive with very thin Cu seed layer, the plating current near

the wafer center can be very low due to the terminal effect. Without the protection of sufficient

cathodic plating current, an extremely thin Cu seed layer may be completely corroded away

before the plating process finishes, leaving the non-Cu substrate exposed. In this case, the

substrate may be re-covered through Cu nucleation. Although direct Cu plating on non-Cu

substrates has been exploited as an alternative metallization method \cite{cc3armini11,

cc3moffat06nuc}, it has been shown that special plating conditions are required to achieve high

island density and fast coalescence \cite{cc3liu12, cc3radisic10, cc3nagar10, cc3nagar12a,

cc3nagar12b}. In the presence of a Cu seed layer, the plating conditions are different from the

conditions required for direct plating. As a result, the nucleus density is not high enough for the

formation of a thin, continuous film. Therefore, even though it is possible to re-cover the

exposed non-Cu substrate through Cu nucleation and coalescence, the quality of the plated Cu

film would be unacceptable within the once-exposed region. The exposure of the substrate must

be avoided in the first place through optimization of the plating conditions. In this study we

assumed a constant coalescence thickness, bcoal as used in \cite{cc3willey07nuc}. For an exposed

substrate, the plated Cu is assumed to accumulate and the equivalent thickness beq is calculated

according to Faraday’s law:

i

tiF

Mb ii

Cu

eq2

{ec3beq}

Where MCu ≈ 64 g mol-1 is the molar weight of Cu, F ≈ 96485 C mol-1 is the Faraday constant,

and ρ ≈ 8.9 g cm-3 is the density of solid Cu, ii and Δti are the current density and step time of the

i-th time step. The factor of 2 gives the number of electrons involved in the oxidation of each Cu

atom. The surface is treated as an uncovered substrate (b = 0) until the equivalent thickness

reaches the coalescence thickness, bcoal. For beq > bcoal, the surface is treated as covered by a

uniform Cu film with thickness b = beq.

24

3.3 Modeling of Wafer-Scale Plating Uniformity

Figure \ref{fc3expthickness} shows the post-plating thickness along the radial direction

measured on 300 mm wafers with 4 nm, 5 nm and 10 nm Cu seed layers. For the 4 nm and 5 nm

cases, the corrosion near the wafer center is evident. Due to the high resistance of the thin seed

layer, the wafer center was not protected by the cathodic current. The post-plating thickness near

the wafer center is even smaller than the initial seed layer thickness. The 4 nm case shows a

wider region of net corrosion due to its higher resistance. Net increase of Cu thickness is limited

in a ring-shaped area near the wafer edge. For the 10 nm case, the seed layer is more conductive.

However, the thickness in the wafer center remains more or less unchanged after plating. The

corresponding post-plating roughness maps are also shown as inserts in Figure

\ref{fc3expthickness}. Darker color corresponds to smoother surface while brighter color

corresponds to rougher surface. Note that the colors were normalized for each measurement and

not directly comparable between different measurements. For the 10 nm case, the roughness is

uniform across the entire wafer, as the entire wafer was protected by cathodic current. For the

5nm case, the higher defect density near the wafer center corroborates the conclusion that

corrosion happens near the wafer center. As the wafer center was almost completely corroded, a

small region at the wafer center exhibited a slightly darker haze. For the 4 nm case, the dark

region near the wafer center corresponds to the smoother substrate exposed, showing that the

seed layer was completely corroded around the center.

Figure {fc3expthickness} Post-plating thickness profile with various seed layer thicknesses, with

the corresponding defect maps shown. 300 mm wafer after 105 s plating with -0.536 A input

current (iavg = -0.76 mA cm-2) at 80 rpm rotation speed. The plating bath contains 0.01 M CuSO4,

1.8 M H2SO4, 10 ppm HCl, 2.0 mL L-1 ViaForm® I suppressor and 8.5 ml L-1 ViaForm® I

accelerator.

Following the experimental conditions, a 300 mm wafer was assumed in the simulation. The

geometrical parameters were set to r0 = 0.15 m, d = 0.1 m. The electrolyte conductivity κ = 40 S

m-1. Seed layer thickness of 10 nm, 5 nm and 4 nm were used in the simulation. The coalescence

thickness was set to 10 nm in all the simulations.

25

The composition of the electrolyte has a significant effect on the current distribution. For

example, a lower exchange current density leads to more uniform current distribution

\cite{cc3liu12, cc3willey07nuc, cc3takahashi00}. Though simplified kinetics were used in these

studies, as a general rule, lower Cu2+ concentration and the introduction of suppressor additive

may lead to a lower exchange current density, and possibly a more uniform current distribution.

In the rest of this study a low Cu2+ concentration plating bath was used in both the experiments

and the modeling to study wafer-scale plating uniformity. It also allows a clearer demonstration

of the seed layer corrosion as the low diffusion-limited plating rate is comparable with the

corrosion rate. The i-η curve is shown in Figure \ref{fc3expiv}. For overpotential values more

negative than the range shown, the curve was extrapolated at the diffusion-limited current

density. Void-free filling using such a low Cu2+ concentration plating bath has been

demonstrated for 30nm trenches \cite{cc3tanya12}. Nevertheless, it is worth noticing that the

proposed modeling approach is not limited to specific plating bathes. Instead, it is especially

suitable for the study of various plating bath compositions, even with unknown reaction

mechanism.

Figure {fc3levichoxygen} Levich plot of the diffusion limited current with (squares) and without

(triangles) purging with N2, measured on a Cu RDE. 0.01 M CuSO4 + 1.8 M H2SO4.

Before the modeling approach can be applied to the study of the wafer plating process, one

critical parameter, the Cu corrosion rate rc, is yet to be determined. It is possible to estimate the

corrosion rate from the diffusion limited supply rate of O2 to the Cu surface. Figure

\ref{fc3levichoxygen} shows the Levich plot of the diffusion limited current density for a plating

bath with 10mM CuSO4 + 1.8M H2SO4, with or without purging with N2 gas. The dissolved O2

was removed through purging with N2 gas. As O2 is consumed through Reaction

\ref{ec3oxygenreduction} at negative overpotentials, the difference between the two diffusion

limited currents at the same rotation speed gives the diffusion limited O2 reduction current idiff.

For a rotation speed of 80 rpm, the two diffusion limited currents were calculated from

extrapolation of the measurements at higher rotation rate. The diffusion limited O2 reduction

current was then calculated to be |idiff| = 0.22 mA cm-2. According to Faraday’s law, if O2 is

consumed at the same rate but through Reaction \ref{ec3corrosionoxygen}, the corrosion rate of

Cu can be calculated by:

26

F

Mir

2

|| Cudiff

c {ec3rc}

This gives a corrosion rate of 0.083 nm s-1 at 80 rpm.

However, the actual corrosion rate inside a specific plating tool also depends on various

conditions such as the convection of electrolyte and the flow of air. Therefore, the corrosion rate

in the plating tool was determined from a fitting procedure. The value of rc was adjusted to fit the

simulated post-plating thickness profile to a corresponding experimental measurement until a

best match was achieved. The 5 nm case was used to extract the corrosion rate. The corrosion

rate found from this fitting procedure was 0.07 nm s-1, which matches well with the corrosion

rate estimated from the diffusion-limited oxygen reduction.

Figure {fc3simthickness} Simulated (solid line) and experimental (symbol with dashed line)

post-plating thickness profile for seed layer thickness of (a) 10 nm, (b) 5 nm and (c) 4 nm. The

corrosion rate used was 0.07 nm s-1. 300 mm wafer after 105 s plating with -0.536 A input

27

current. The plating bath contains 0.01 M CuSO4, 1.8 M H2SO4, 10 ppm HCl, 2.0 mL L-1

ViaForm® I suppressor and 8.5 ml L-1 ViaForm® I accelerator.

Using this corrosion rate obtained from the fitting procedure, simulations were performed for all

the seed layer thicknesses used. The simulated post-plating thickness profiles are compared with

the corresponding experimental measurements in Figure \ref{fc3simthickness}. A good overall

agreement was shown between the simulation and the experiments. As the potential can get very

negative near the wafer edge for thinner seed layer, the larger difference near the wafer edge is

likely due to low current efficiency, which was not considered in the simulation. As shown by

the defect map of the 4nm case in Figure \ref{fc3expthickness}, the corroded region is not

located in the center of the wafer. Such an eccentric pattern is probably responsible for the larger

deviation in the 4nm case.

Figure {fc3detail5nm}The normalized current distribution and (b). the thickness profile after

various plating times on a 300 mm wafer with 5 nm Cu seed layer, plated at -0.536 A for 105 s.

From the numerical simulation we are able to extract detailed information at any intermediate

time. Figure \ref{fc3detail5nm} shows the plating current distribution, as well as the thickness

profile, along the radial direction for various plating times. At the beginning of the plating

process, due to the high resistivity of the thin seed layer, the potential is much more negative

near the wafer edge than the wafer center. For a plating bath with very low Cu2+ concentration,

such a negative potential leads to diffusion limitation near the wafer edge. On the current density

curve of 20 s plating time in Figure \ref{fc3detail5nm}a, the diffusion-limited region is clearly

visible as the small plateau near the wafer edge. Therefore, voids are likely to form in the

trenches within this diffusion-limited region. Contrary to the wafer edge, the current density near

the wafer center is very low, as shown by the same curve at 20s. The corrosion current density is

also shown for comparison. It can be seen that the plating current density near the wafer center is

even lower than the corrosion current density. As a result, even though the plating current is

cathodic, the overall effect is corrosive near the wafer center. The thickness of the seed layer

decreases within this region.

As the plating process continues, for the region where the plating rate is higher than the

corrosion rate, the thickness of the Cu layer increases, thus the surface becomes more conductive.

Therefore, the terminal effect gradually diminishes, especially in the region near the wafer edge

where the plating rate is the highest. As shown by the curve of 40 s in Figure

28

\ref{fc3detail5nm}a, although the current distribution is still very non-uniform, the current

density near the wafer edge decreases and the current density near the wafer center increases.

The potential near the wafer edge becomes positive enough to leave the diffusion-limited region,

thus the diffusion-limited current plateau disappears. However, for the central region where the

plating rate is lower than the corrosion rate, the Cu layer thickness continues to decrease and the

surface becomes even more resistive.

Due to the high deposition rate near the wafer edge and the corrosion near the wafer center, the

thickness profile becomes very non-uniform at the end of the 105 s plating, as shown in Figure

\ref{fc3detail5nm}b. The initial seed layer is also shown for comparison. It is clearly visible that,

due to the corrosion, the Cu layer thickness within a wide area near the wafer center, about 7 cm

in radius in this case, is even lower than the initial seed layer thickness. The worst corrosion

happens at the wafer center as it is furthest away from the contact. For this test case, the Cu seed

layer in the wafer center is severely corroded but still not yet completely removed. As the plating

condition is not optimized for nucleation, exposure of the underlying barrier layer must be

avoided.

Figure {fc3cmpcenter} Simulated time evolution of (a) Cu thickness and (b) plating current at

the wafer center (r = 0) during a 105 s plating at -0.536 A, with 4 nm, 5 nm and 10 nm seed layer

thicknesses.

For the 10 nm case, the thickness in the wafer center remains almost unchanged after plating.

The time evolution of the Cu thickness in the wafer center is shown in Figure

\ref{fc3cmpcenter}a. At the beginning of the plating, the wafer center is corroded and the

thickness decreases. After about 60 s the thickness reaches a minimum value and increases

slowly henceforth. Such a transition is due to the changing current distribution. Figure

\ref{fc3cmpcenter}b shows the plating current density as a function of time at the wafer center.

The corrosion current density is also shown for comparison. At the beginning, the plating current

density at the wafer center is slightly lower than the corrosion current density, thus the thickness

decreases. Thus corrosion only occurs within a small region near the wafer center, most of the

wafer surface is protected and the Cu thickness increases. Since most of the wafer becomes more

conductive as the plating continues, the current distribution becomes more uniform. The plating

current at the wafer center increases slowly. After about 60 s, the plating current in the wafer

29

center surpasses the corrosion current and the thickness starts to increase. As a result, a minimum

value is observed on the corresponding thickness curve.

For the 5 nm case, as the wafer surface is considerably more resistive than the 10 nm case, it is

shown in Figure \ref{fc3cmpcenter}b that the plating current in the wafer center never exceeds

the corrosion current during the entire plating process. Thus the central thickness decreases

monotonically. At the end of the plating, the seed layer is not yet completely corroded. However,

according to the plating current at the wafer center, it is expected that the Cu layer in the wafer

center will eventually disappear if the plating duration is extended.

With a further decrease of seed layer thickness, from 5 nm to 4 nm, the current density at the

wafer center is even lower. The seed layer at the wafer center is completely corroded before the

end of the plating, as shown in Figure \ref{fc3cmpcenter}a. Beside the stronger terminal effect,

such a thin layer also exhibits an unwanted positive “feedback”. Since the seed layer is already

extremely thin, corrosion leads to a significant increase of sheet resistance within a wide surface

area, which in turn reduces the plating current near the wafer center and leads to even faster

corrosion. Such a process is shown by the current density curve in Figure \ref{fc3cmpcenter}b.

Contrary to the monotonic increase of current density in the case of 10 nm seed layer and the

small change in the case of 5 nm seed layer, a quick decrease of plating current density before

the complete removal of seed layer is shown in the case of 4 nm seed layer. Therefore, further

reduction of the seed layer thickness requires new tool design and ingenious technique to protect

the seed layer from corrosion and counteract the terminal effect.

3.4 Improvement of Plating Uniformity

Although the challenges in wafer-scale uniformity introduced by thin Cu seed layers are apparent,

such a reduction of thickness is likely inevitable as long as Cu interconnect (and its

manufacturing using Cu electroplating) is employed in IC interconnects. Beside the apparent

effect of seed layer thickness, the plating uniformity is also affected by other factors such as the

design and configuration of the plating tool.

Figure {fc3smallanode} Illustration of the controlling effect of anode on the current distribution.

As the electrolyte is not a perfect conductor, potential drops as current is conducted through the

electrolyte from the anode to the wafer surface. In the simulations reported in the previous

sections, the anode was assumed to be a Cu disk with the same circular shape as the wafer to be

plated. Reducing the radius of the anode introduces differences between the conduction route

30

from the anode to the wafer edge and the conduction route from the anode to the wafer center,

thus introducing a potential drop difference. It would be possible to utilize this potential drop in

the electrolyte to partially compensate the potential drop within the wafer, which improves the

plating uniformity. Such a difference can be further enhanced by reducing the distance between

the anode and the wafer, or equivalently, by introducing an insulator shield. These designs are

illustrated in Figure \ref{fc3smallanode}.

However, the compensation effect of a single reduced-size anode becomes excessive as the wafer

turns more conductive during plating. A segmented anode would allow adaptive control of the

current density distribution. In such a plating cell setup, the anode is divided to multiple

concentric ring-shape segments on which the input currents can be controlled separately. Figure

\cite{fc3segmentedanode} shows a schematic cross-section of an anode configuration with three

concentric segments. Cylindrical insulator anode shields were used to further isolate the anode

segments and enhance the control of current distribution.

Figure {fc3segmentedanode} Illustration of the segmented anode with insulator shields.

In order to better demonstrate the improvement of plating uniformity using segmented anode, a

high Cu concentration plating bath which contains 0.75M CuSO4 was used in simulation to allow

the use of higher plating currents. The plating bath contains both suppressor and accelerator

additives. Three segments with w1 = 0.2r0 (center), w2 = 0.3r0 (middle), w3=0.4r0 (edge) are

assumed. Figure \ref{fc3segmentcontrol} compares the deposition current distribution for each

of the three segments, with the same average plating current density of -5 mA cm-2. On a highly

conductive substrate of 0.1 Ω, the effect of each anode segment on the distribution of plating

current density is distinctive. The maximum deposition current density appears near the center of

the segment used. Even on a resistive substrate with a sheet resistance of 25 Ω (~5nm Cu seed

layer), such control effects are still evident but significantly weaker due to the strong terminal

effect. The distance between the anode shield and the wafer surface, d, also affect the current

31

distribution. Smaller d results stronger control effect. The number of segments, width of each

segment and height of each shield can also be adjusted for better control. The plating uniformity

can thus be improved by controlling the input current on different anode segments.

Figure {fc3segmentcontrol} Current distribution with each of the anode segments in a

segmented-anode configuration on both conductive (0.01 Ω, solid lines) and resistive (25 Ω,

dashed lines) substrates. Three segments with w1 = 0.2r0 (center), w2 = 0.3r0 (middle), w3=0.4r0

(edge) are assumed.

During the plating process, as copper is being deposited on the substrate, the wafer becomes

more conductive and the effect of anode segments changes with time. Therefore, the

configuration of current allocation among the segments may need to be adjusted during the

plating process to better compensate the terminal effect. To demonstrate this approach, the

electroplating of a 300mm wafer with 5nm Cu seed layer was simulated with and without

utilizing the segmented anode. The same segmented anode as used in Figure

\ref{fc3segmentcontrol} was assumed. Figure \ref{fc3segmentcurrent} shows the current

distribution used on the segmented anode. Figure {fc3cmpsegment} compares the post-plating

thickness profile after electroplated for 120s with iavg = -2.5 mA cm-2. For the non-segmented

case, the post-plating thickness profiles are very non-uniform. Moreover, the Cu seed layer at the

wafer center has been completely corroded. By employing the segmented anode and controlling

the current allocation on the anode segments, the wafer center is protected. The post-plating

uniformity is also obviously improved. Neverless, a large thickness variation along the radial

direction still exists in this case. More anode segments and adaptive current distribution among

these segments would allow further improvement of the plating uniformity.

32

Figure {f3csegmentcurrent} Time-dependent current distribution on the anode segments during a

120s plating duration.

Figure {fc3cmpsegment} Post-plating thickness profile with and without segmented anodes. In

the non-segmented case, the Cu seed layer at wafer center is completely corroded. 0.75 M CuSO4

+ 1 M H2SO4 + 100 ppm PEG + 5ppm SPS + 6ppm HCl. 80 rpm.

33

3.5 Conclusions

The wafer scale plating uniformity with thin Cu seed layer was studied. Plating experiments

were performed on 300mm wafers with very thin Cu seed layers. Measurements showed that the

plating rate can be very non-uniform. The strong terminal effect and the dissolved oxygen lead to

seed layer corrosion in the center of the wafer. In the case of extremely thin seed layer of 4nm,

the wafer center was shown to be completely corroded due to dissolved oxygen. A modeling

methodology was developed to study the Cu plating uniformity on the wafer scale. A good match

between the experimental measurement and the numerical simulation has been shown. The

developed simulation program was then employed to study the plating uniformity. The

utilization of segmented anode was proposed as an effective approach to improve the plating

uniformity. Using just a relatively simple 3-segment anode, effective protection of the thin cu

seed layer and clear improvement of plating uniformity were demonstrated in simulation. Still, it

is challenging to achieve good uniformity on resistive substrates. The reduction of seed layer

thickness is necessary as the maximum seed layer thickness is limited by the ever-shrinking

feature size. A balance point is thus necessary for both plating uniformity and void-free filling.

The proposed modeling approach can be employed to assess the viability of Cu plating with

given seed layer thickness and bath composition.

References

[cc3liu13corrosion] L. Yang, A. Radisic, J. Deconinck, A. West, P. Vereecken, Wafer-scale Cu

plating uniformity on thin Cu seed layers, Electrochimica Acta 104, 242(2013).

[cc3andricacos98] P.C. Andricacos, C. Uzoh, J.O. Dukovic, J. Horkans, H. Deligianni,

Damascene copper electroplating for chip interconnections, IBM J. Res. Dev. 42, 567(1998).

[cc3armini10] S. Armini and P. M. Vereecken, Impact of terminal effect on Cu plating: theory

and experimental evidence, ECS Trans. 25, 185(2010).

[cc3vereecken06pat] P. M. Vereecken, P. Andricacos, H. Deligianni, K. T. Twietniak, C.

Andricacos, US 2006/0163055.

[cc3vereecken05] P.M. Vereecken, R.A. Binstead, H. Deligianni, P.C. Andricacos, The

chemistry of additives in damascene copper plating, IBM J. Res. & Dev. 49, 3(2005).

[cc3liu12] L. Yang, A. Radisic, M. Nagar, J. Deconinck, P. Vereecken, A. West, Multi-scale

modeling of direct copper plating on resistive non-copper substrates, Electrochim. Acta, 78,

524(2012).

[cc3matlosz92] M. Matlosz, P.H. Vallotton, A.C. West, D. Landolt, Nonuniform current

distribution and thickness during electrodeposition onto resistive substrates, J. Electrochem. Soc.

139, 752(1992).

34

[cc3moffat06] T.P. Moffat, D. Wheeler, S.K. Kim, D. Josell, Curvature enhanced adsorbate

coverage model for electrodeposition, J. Electrochem. Soc. 153, C127(2006).

[cc3mendez09] J. Mendez, R. Akolkar, U. Landau, Polyether suppressors enabling copper

Metallization of high aspect ratio interconnects, J. Electrochem. Soc. 156, D474(2009).

[cc3willey07] M.J. Willey, A.C. West, SPS adsorption and desorption during copper

electrodeposition and its impact on PEG adsorption, J. Electrochem. Soc. 154, D156(2007).

[cc3tanya11] T.A. Atanasova, K. Strubbe, P.M. Vereecken, Adsorption / Desorption of

suppressor complex on copper: description of the critical potential, ECS Trans. 33, 13(2011).

[cc3li06]Z. Li and R. G. Gordon, Thin, continuous, and conformal copper films by reduction of

atomic layer deposited copper nitride, Chem. Vap. Deposition, 12, 435(2006).

[cc3volov] I. Volov, E. Swanson, B. O’Brien, S.W. Novak, R. van den Boom, K. Dunn, A.C.

West, Pulse-plating of copper-silver alloys for interconnect applications, J. Electrochem. Soc.

159, D677(2012).

[cc3armini11] S. Armini, S. Demuynck, Z. El-Mekki, J. Swerts, M. Nagar, A. Radisic, N.

Heylen, G. Beyer, L. Leunissen, P.M. Vereecken, Direct copper electrochemical deposition on

Ru-based substrates for advanced interconnects target 30 nm and 1/2 pitch lines: From coupon to

full-wafer experiments, ECS Trans. 35, 117(2011).

[cc3moffat06nuc] T.P. Moffat, M. Walker, P.J. Chen, J.E. Bonevich, W.F. Egelhoff, L. Richter,

C. Witt, T. Aaltonen, M. Ritala, M. Leskelä, D. Josell, Electrodeposition of Cu on Ru barrier

layers for damascene processing, J. Electrochem. Soc. 153, C37(2006).

[cc3radisic10] A. Radisic, M. Nagar, K. Strubbe, S. Armini, Z. El-Mekki, H. Volders, W.

Ruythooren, P.M. Vereecken, Copper plating on resistive substrates, diffusion barrier and

alternative seed layers, ECS Trans. 25, 175(2010).

[cc3nagar10] M. Nagar, P.M. Vereecken, A. Radisic, K. Strubbe, Tailoring copper island density

for copper plating on a RuTa substrate, ECS Trans. 28, 9(2010).

[cc3nagar12a] M. Nagar, P.M. Vereecken, K. Strubbe, A. Radisic, Nucleation and growth of

copper on Ru-based substrates: I. The effect of the inorganic components, ECS Trans. 41,

75(2012).

[cc3nagar12b]M. Nagar, A. Radisic, K. Strubbe, P.M. Vereecken, Nucleation and growth of

copper on Ru-based substrates: II. The effect of the suppressor additive, ECS Trans. 41,

99(2012).

[cc3willey07nuc] M.J. Willey, A.C. West, Nucleation on resistive substrates: Analysis of effect

on film uniformity, Electrochim. Acta 52, 6484(2007).

[cc3takahashi00] K.M. Takahashi, Electroplating copper onto resistive barrier films, J.

Electrochem. Soc. 147, 1414(2000).

35

[cc3tanya12] T.A. Atanasova, L. Carbonell, R. Caluwaerts, Z. Tokei, K. Strubbe, P.M.

Vereecken, Ultra-low copper baths for sub-35nm copper interconnects, ECS Trans. 41, 83(2012).

[cc3zinkiewicz05] O.C. Zienkiewicz, R.L. Taylor, J.Z. Zhu, The Finite Element Method, 6th

edition, Elsevier Butterworth-Heinemann (2005).

36

4. Bottom-Up Filling of Through Silicon Vias

A model is proposed for the bottom-up filling of TSVs in this chapter. The suppressor adsorption

/ desorption is implemented together with other physico-chemical processes in the numerical

simulation of TSV electroplating. The model is introduced in detail in Section 2, with simulation

results presented in Section 3. The bottom-up filling process, as well as other super-conformal or

sub-conformal cases, is demonstrated using the proposed model and confronted with existing

experimental results.

4.1 The Role of Suppressor

As introduced in Section 2.2, bottom-up filling is only achievable with the addition of additives.

Bottom-up filling has been reported in suppressor-only plating bathes \cite{cc4alex12,

cc4hayase02, cc4moffat12, cc4josell12}. Recent detailed studies of suppressor

adsorption/desorption behavior could provide insight into the cause of the bottom-up filling

mode \cite{cc4hebert05, cc4willey07, cc4tanya11}. Figure \ref{fc2hysteresis} shows the

current-potential curves with various Cl- concentrations in a plating bath with PEG as the only

organic additive. A hysteresis is visible in each curve. The forward scan starts on a surface

already saturated with adsorbed PEG. Desorption happens at a critical desorption potential Udes,

as shown by the steep transition from the suppressed curve to the unsuppressed curve. The value

of Udes has been shown to depend on the concentration of solution components, such as Cu2+ and,

especially, Cl-. The reverse scan starts with a PEG-free surface. Re-adsorption of PEG starts only

at a critical adsorption potential Uads, which is more positive than Udes. As a result, a hysteresis is

shown in the curve. Similar to Udes, the value of Uads also exhibits a dependency on the bath

components. Hysteretic suppressor adsorption/desorption behavior, and its dependency on

various experimental parameters has been examined in details by T.A. Atanasova et al.

\cite{cc4tanya11}. Due to the diffusion limitation inside the TSV, the local bath composition can

vary significantly from the via top to the via bottom during plating, which may result in bottom-

up filling.

37

Figure {fc4hysteresis} (a). Current-potential characteristic for Cu RDE in 1 M H2SO4 + 0.25 M

CuSO4 + 300 ppm PEG solution with various Cl- concentrations. The reference electrode was a

saturated mercury / mercurous sulfate electrode (SMSE). 1000 rpm rotation speed and 20 mV s-1

scan rate. The arrows indicate the forward scan. (b). An idealized current-potential behavior with

suppressor adsorption-desorption. The open arrows indicate the forward scan and the solid

arrows indicate the reverse scan. The desorption potential Udes, the re-adsorption potential Uads

and the corresponding current ic (assumed to be the same for both Udes and Uads) are shown.

The adsorption / desorption of suppressor is controlled by the local concentration of various bath

components. The local critical desorption potential Udes is calculated from the local

concentrations of Cl-, suppressor and Cu2+ according to the dependency found in

\cite{cc4tanya11}:

)log(log

1)log(0592.0 22 CuCuSClCld0des cdc

ccbUU {ec4udes}

The potential Ud0 and the coefficients b, c and d were evaluated experimentally and shown to be

dependent on the bath composition. The average values of b = 3, c = 10 and d = 2 were used in

this study. Ud0 = -0.36 V vs. saturated hydrogen electrode (SHE). The activity coefficients γi also

depend on the bath composition. For the plating bath used in this simulation, constant activity

coefficients of 0.5 and 0.1 were assumed for Cl- and Cu2+, respectively \cite{cc4tanya11}.

4.2 Numerical Model

A two component plating bath with a PEG-like suppressor and a SPS-like accelerator is assumed.

Figure \ref{fc4simgeom} illustrates the axisymmetric geometry used in the simulation. Fick’s

law of diffusion applies for each of the bulk species considered in the simulation. Isotropic

diffusion coefficients are assumed for all the species involved. The bulk species included in the

simulation are suppressor, accelerator, Cu2+ and Cl-. For the i-th bulk species, the governing

equation is:

ii cDt

ci

{ec4diffpde}

Where ci is concentration, Di is the diffusion coefficient. No homogeneous reaction was

considered in the simulation. For each bulk species, it is assumed that the initial concentration

equals the bulk concentration everywhere in the electrolyte at t = 0 s. The initial conditions and

boundary conditions of Equation \ref{ec4diffpde} are thus given by:

surfaceCu on the

boundarylayer diffusion on the

0at eelectrolyt in the

iii

ib,i

ib,i

rncD

cc

tcc

{ec4diffbnd}

Where cb,i is the bulk concentration and n

denotes the normal to the boundary. The consumption

rate ri on the copper surface will be given for each species in the following part of this section.

38

Figure {fc4simgeom} Illustration of the axisymmetric geometry assumed in the diffusion

simulation. The filled area (on the right of the symmetry axis) indicates the geometry used in the

calculation. The key parameters are also indicated.

Cu is deposited through the electrochemical reduction of Cu2+:

Cu2+ + 2e- = Cu {ec4cured}

The plating current density is given by the Butler-Volmer equation with diffusion taken into

account \cite{cc4bard01}:

RTFRTFe

c

ceiFri

/

Cub,

Cu/

0Cu

c

2

2a

22

{ec4butlervolmer}

Where αa and αc are the anodic and cathodic transfer coefficients, F is the Faraday constant, R is

the gas constant and T is the temperature in Kelvin. The overpotential η is defined as the

difference between the applied potential and the reduction potential of Reaction \ref{ec4cured},

U0, at a given bulk Cu2+ concentration. The additives, both suppressor (subscript S) and

accelerator (subscript A) may adsorb to the Cu surface and affect the exchange current density i0.

Therefore, i0 is given by:

A0,AS0,Sfree0,free0 iiii {ec4avgi0}

Where i0,free, i0,S and i0,A gives the exchange current density on uncovered Cu surface, suppressor

covered surface and accelerator covered surface at equilibrium, respectively. θfree, θS and θA are

the corresponding surface coverage. The uncovered surface fraction, θfree, is given by:

39

ASfree 1 {ec4freesurf}

In a typical wafer plating tool, the total input current is fixed instead of the potential. Therefore, a

galvanostatic condition is assumed in this simulation. The average current density iavg as

calculated for a blanket wafer is thus fixed. For every time step, the diffusion simulation is

performed first to update the concentration profiles of bulk species and the surface coverage of

adsorbed additives. The local plating current density i along the Cu surface is calculated using

the updated surface coverage and near-surface concentrations. The simulated geometry has a

fixed radius of rsim which is smaller than the half distance, d/2, between neighboring TSVs. The

current density on the top surface outside the simulated region is assumed to be the same as the

current density calculated on the edge of the simulated area (r = rsim). The average current

density (as evaluated on a flat surface) is calculated using equation:

22

sim

2

edgekavg 2 drdiliri k

k

k

{ec4iavg}

Where the summation applies for every surface element, iedge gives the current density calculated

on the top surface with r = rsim. As galvanostatic plating condition is assumed in the simulation,

an outer iteration is performed to adjust the potential until the specified average current density is

found.

Due to the i-R drop in the electrolyte, the near-surface potential in the electrolyte is slightly more

positive at the via top than at the via bottom. For a plating bath contains 0.8 M CuSO4 and 1 M

H2SO4 at room temperature, the conductivity of the electrolyte was estimated to be about 25 S m-

1 \cite{cc4price80}. The highest local current density involved in this study was about -70 mA

cm-2 at the bottom of the via, as shown in Section 3. Assuming the worst-case scenario, such a

current density leads to a potential drop smaller than 1 mV from the top to the bottom of the 5

µm × 40 µm TSV assumed in this study. Although the conductivity can be lower at the bottom of

the via due to diffusion limitation, the potential difference between the via top and the via bottom

due to i-R drop is still two orders smaller compared with the typical overpotential applied during

TSV plating, which is in the order of 100 mV. Therefore, the potential drop in the electrolyte is

neglected. The overpotential was assumed to be the same everywhere along the Cu surface.

For simplicity, the current density at the onset of desorption (on a fully suppressed Cu surface) is

assumed to be the same as the current density at the onset of re-adsorption (on an additive-free

Cu surface). This current density is defined as the critical current density ic, which is illustrated

in Figure \ref{fc4hysteresis}b. The difference between Udes and Uads thus equals the polarization

between the suppressed curve and the unsuppressed curve. With such an assumption, one single

critical current density ic, instead of two critical potentials, is used to characterize the hysteric

suppressor desorption / adsorption process. Desorption of adsorbed suppressor only happens

when the local applied current density |i| is larger than the local critical current density |ic|.

Suppressor re-adsorption only happens when |i| is smaller than |ic|. For each mesh node on the

TSV surface, the local Udes is updated at every time step according to Equation \ref{ec4udes}

using local concentrations solved from Equation \ref{ec4diffpde}. Then the value of local ic is

calculated using Equation \ref{ec4butlervolmer} with i0 = i0,S and η = Udes – U0.

The consumption rates of the additives on the Cu surface are given by:

40

only) (for 11

cASrSfreeSS

0S iickn

ckdt

dN

nr

{ec4rsup}

ASrAfreeAA

0A ckckdt

dNr

{ec4racc}

Where kS and kA are the adsorption rate coefficients of suppressor and accelerator, N0 is the

density of adsorption sites, kr is the rate coefficient for the replacement of adsorbed suppressor

by accelerator. An area factor n was introduced to account for the sterical hinder of the large

sized suppressor molecules. In both Equation \ref{ec4rsup} and Equation \ref{ec4racc}, the first

terms are due to adsorption, while the second terms are due to the replacement of adsorbed

suppressor by accelerator. Suppressor desorption is assumed to happen instantaneously on the

mesh nodes where |i| ≥ |ic|. The adsorbed accelerator is assumed to stay on the surface and does

not desorb. There is no leveler in the solution.

Additives are known to get incorporated into the plated Cu \cite{cc4philippe04, cc4hayase05,

cc4zhang05}. The concentration of incorporated chloride can reach over 100 ppm

\cite{cc4hayase05} while the concentration of incorporated organic additives was shown to be

10 to 100 times smaller \cite{cc4zhang05}. Therefore, in this study the incorporation of chloride

only is considered. The Cl- ion is consumed through the adsorption of Suppressor-[Cu+-Cl-]

complex as well as the incorporation of chloride into deposited Cu. The total consumption rate of

Cl- is given by:

2- CuClC2SClC1Clrckrnckr {ec4rcl}

The first term only contributes to the total consumption rate during suppressor adsorption, while

the second term accounts for the Cl- incorporated in the deposited Cu. The value of kC1 was

chosen to give roughly 100 ppm of incorporated Cl- in deposited Cu. In every diffusion

simulation, Equations \ref{ec4rcl}, together with Equations \ref{ec4butlervolmer}, \ref{ec4rsup}

and \ref{ec4racc}, are evaluated and put back to Equation 2 as boundary conditions for Cl-, Cu2+,

suppressor and accelerator, respectively. The time-dependent diffusion of the bulk species

described by Equation \ref{ec4diffpde} is solved using Finite Element Method (FEM)

\cite{cc4zienkiewicz05}.

The evolution of the TSV surface profile is simulated using fast marching level-set method

\cite{cc4sethian96}. The level-set equation of the TSV surface described by the zero level set of

0),,( tyr is given by:

v

t {ec4levelset}

The growth speed v is calculated from the consumption rate of Cu2+ by:

Cu

CuCu

Mrv {ec4v}

41

Where MCu = 0.0635 kg mol-1 is the molar weight of Cu and ρCu = 8900 kg m-3 is the density of

solid Cu.

The simulation step time was non-uniform for both the diffusion and the profile evolution, with

shorter step time at the beginning of plating for higher precision and longer step time at the later

stage to reduce the simulation time. Non-uniform mesh with triangular elements was used in the

FEM solution. The maximum mesh size was set to 256 nm and the minimum mesh size was set

to 32 nm, with finer meshes distributed near the surface of the via. The mesh was updated

dynamically with changing surface profile. The meshing algorithm was designed to general a

few layers of fine regular meshes along the TSV surface. These layers of fine meshes were then

used in the simulation of profile change.

4.3 Modeling of TSV Bottom-Up Filling

The fixed parameters used in the simulations are listed in Table \ref{tc4param}. Please note that

many of these parameters may vary with bath composition and temperature \cite{cc4moffat06,

cc4moffat07, cc4li07, cc4rusli07, cc4qin08, cc4willey07, cc4woolf70}. The diffusion layer

thickness δ was set to 50 µm. Plating is started as soon as the sample is immersed into the plating

bath.

Figure {fc4simprofilebottomup} Simulated time evolution of surface profile for 5 µm × 40 µm

TSVs plated at -3 mA cm-2 average current density. The pattern density is 400 mm-2. The time

42

interval between two curves is 200 s. The plating bath contains 0.8 M Cu2+, 10 µM suppressor, 2

µM accelerator and 1.2 mM Cl-.

Figure {fc4simtdbottomup} (a). time evolution of surface profile and (b). suppressor coverage

along the vertical direction of the simulation shown in Figure \ref{fc4simprofilebottomup}.

Figure \ref{fc4simprofilebottomup}a shows the simulated profile of 5 µm (diameter) × 40 µm

(depth) TSVs plated at an average current density of iavg = -3 mA cm-2. The center-to-center

distance between neighboring TSVs is set to d = 50 µm, which gives a square pattern density of

400 TSVs per mm2. The plating bath contains 0.8 M Cu2+, 10 µM suppressor, 2 µM accelerator

and 1.2 mM Cl-. As the center-to-center distance is rather larger in comparison with the via

diameter, only a fraction of the repeating unit is shown in the Figures throughout the paper. The

initiation of bottom-up growth mode, as well as the void-free filling process, is shown clearly by

the profile change. Figure \ref{fc4simtdbottomup}a shows the corresponding time evolution of

suppressor coverage inside the via. Figure \ref{fc4simtdbottomup}b shows the time evolution of

Cu deposition current density i and the critical current density ic. The sequence of events during

plating is considered the following: Plating starts immediately when the sample is immersed in

the plating bath. At the beginning of the plating, suppressor is depleted inside the TSV due to the

fast adsorption, slow diffusion and low concentration. As a result, suppressor adsorption only

continues at the via top until the top surface is saturated by adsorbed species. As the suppressor

molecules diffuse from the bulk into the via, the boundary of saturated surface area moves

gradually toward the via bottom. This process of diffusion limited suppressor adsorption is

shown in Figure \ref{fc4simtdbottomup}a by the moving boundary between high and low

suppressor coverage. In this case it took about 200 s for the suppressor to reach the via bottom.

As the accelerator diffuses faster but has slower adsorption kinetics than the suppressor, it

competes with the suppressor for adsorption sites. This competitive diffusion-adsorption process

\cite{cc4akolkar09} leads to increasing accelerator coverage from the via top to the via bottom,

thus a lower saturated suppressor coverage as indicated by the sloped curves of θS.

Consequently, the applied current is forced into the via as shown by the curves of i in Figure

\ref{fc4simtdbottomup}b. As the uncovered surface area decreases for a fixed iavg, the current

density increases significantly with time at the via bottom. Also, due to the consumption of

suppressor and Cl- at the via bottom, |ic| is smaller near the via bottom (see the ic curves in Figure

\ref{fc4simtdbottomup}b). Both effects happen at the via bottom. Depending on the plating

43

condition, |i| may exceed |ic| at the via bottom and suppressor desorption happens within this

region. For the case studied, this event happens around 200s, as indicated in both Figure

\ref{fc4simtdbottomup}a by the drop of suppressor coverage to zero and in Figure

\ref{fc4simtdbottomup}b by the intersection between the curves of i and ic. Consequently, a

suppressor-free area is created at the via bottom as a collective effect of both suppressor

desorption and the disruption of suppressor adsorption. With appropriate plating conditions, this

area is limited only to the via bottom while the remainder of the via is covered by adsorbed

suppressor. After suppressor desorption at the via bottom, accelerator continues to adsorb onto

the exposed region and prevents suppressor adsorption. The lateral growth is suppressed due to

high suppressor coverage on the side wall, while the suppressor-free Cu of the via bottom grows

upward in a bottom-up filling mode.

The bottom-up filling is only possible within a certain process window. It has been shown

experimentally that the filling results can be significantly different with different suppressor

concentrations \cite{cc4alex12}. The focused ion beam (FIB) images in Figure \ref{fc4fibvoid}

show the post-plating cross-sections of 5 µm × 40 µm TSVs. The plating baths consist of 0.8 M

CuSO4, 0.7 M H2SO4, 1.7 mM Cl- and various additive concentrations. For the case with lowest

PEG concentration (Figure \ref{fc4fibvoid}a), the filling process is nearly conformal. With

higher PEG concentration (Figure \ref{fc4fibvoid}b), the bottom-up growth mode was observed

as indicated by the flat bottom visible in the cross section. However, void-free filling was not

achieved in this case as the via top closed before the growing bottom could reach the top opening.

A further increase of PEG concentration (Figure \ref{fc4fibvoid}c) led to an unique growth

mode, with two wedge-shaped voids at both the via bottom and the via top. The flat bottom of

the top void indicates that the growth mode after the formation of the bottom void is still bottom-

up. With a lower accelerator concentration, a “cut-off” happens midway along the depth

direction of the TSV, leaving a big void a the via bottom as shown in Figure \ref{fc4fibvoid}d.

44

Figure {fc4fibvoid} FIB images of 5µm by 40µm TSVs plated at -3 mA cm-2 in a plating bath

contains 0.8 M CuSO4, 0.7 M H2SO4, 1.7 mM Cl- and additive concentrations of (a). 2.4 ppm

SPS, 4 ppm PEG, (b). 2.4 ppm SPS, 8 ppm PEG, (c). 2.4 ppm SPS, 12 ppm PEG and (d) 1.2 ppm

SPS, 8ppm PEG. Image courtesy of Alex Radisic, imec Belgium.

45

Figure {fc4simvoid} Simulated time evolution of surface profile for 5 µm × 40 µm TSVs plated

at -3 mA cm-2. The pattern density is 400 mm-2. 0.8 M Cu2+, 1 mM Cl-, accelerator and

suppressor concentration of (a). 5 µM + 4 µM (b). 5 µM + 12 µM, (c). 5 µM + 48 µM and (d)

46

2.5 µM + 12 µM. The time interval between two curves is 200 s for figures (a), (b), (c) and 50s

for figure (d). Voids are highlighted.

Analogous to the experimental study shown in Figure \ref{fc4fibvoid}, simulations were

performed with varying suppressor concentration while all other conditions were kept unchanged.

The simulation results are shown in Figure \ref{fc4simvoid}. Although the parameters used in

the simulation do not directly correspond to the properties of the specific additives used in these

experiments, a qualitative comparison can be already made. A very good match can be found

when comparing these simulation results with the experimental study. Not only the various

filling modes / void formation, but also the dependency on bath composition (suppressor

concentration) as observed in plating experiments, were shown in simulation.

Starting from the lowest suppressor concentration (Figure \ref{fc4simvoid}a), the growth mode

is nearly conformal. Due to the low suppressor concentration, it takes a long time for the

suppressor to cover the via top and propagates to the via bottom. The accelerator additive can

thus coverage a larger fraction on both the top surface and inside the via. As a result, the applied

current density at the via bottom is not high enough to initiate suppressor desorption. The filling

process is dominated by the diffusion-adsorption competition between the suppressor and the

accelerator.

For a higher suppressor concentration (Figure \ref{fc4simvoid}b), the fractional coverage of

suppressor on the top surface is higher. The competitive diffusion-adsorption process takes a

shorter time. Therefore, the accelerator coverage is lower everywhere along the Cu surface. The

bottom-up growth starts when the local current density at the via bottom exceeds the local

critical current density. Due to the replacement of adsorbed suppressor by accelerator, the growth

rates on the top surface and on the lateral wall increase gradually. Similar to the experimental

case shown in Figure \ref{fc4fibvoid}b, the via top closes before the bottom arrives, leaving a

wedge-shaped void with a flat bottom at the via top.

A further increase of suppressor concentration in the simulation leads to the formation of an

additional void at the via bottom (Figure \ref{fc4simvoid}c). The higher suppressor

concentration results even higher suppressor coverage on the via top and on the lateral wall, thus

the applied current density at the via bottom can become even higher. Desorption of adsorbed

suppressor happens within a wider region compared with the previous case. Cu plating within

this desorbed region at the via bottom is equivalent to a “sub-TSV” with the same radius but

smaller aspect ratio. As the current density within this region is much higher than the applied

average current density, the plating of this sub-TSV is severely diffusion limited. This leads to

the formation of the bottom void. After the formation of the bottom void, the via bottom grows

upward in a bottom-up mode. Like the previous case (Figure \ref{fc4simvoid}b), the via top

closes before the bottom arrives, thus the formation of the second void with a flat bottom near

the via bottom.

Figure \ref{fc4simvoid}d demonstrates the formation of a large “cut-off” region inside the TSV

which corresponds to the experimental observation shown in Figure \ref{fc4fibvoid}.

Immediately after the sample to be plated is emerged into the plating bath, suppressor and

accelerator competes for the adsorption sites on the top surface. Although the top surface is

strongly suppressed due to fast suppressor adsorption, a small fraction is still covered by

adsorbed accelerator. Reducing the accelerator concentration will lead to a decrease of

47

accelerator coverage on the top surface, leading to even stronger suppression on the top surface

and force higher current density into the TSV. Due to the higher plating current density,

suppressor desorption may happen in the middle of the TSV rather than the bottom. Once such a

desorption happens, the consumption of Cu2+ leads to even lower Cu2+ further down into the

TSV. According to Equation \ref{ec4udes}, Udes is more negative with lower Cu2+ concentration.

Therefore, suppressor adsorption continues on the surface below the desorbed region. The

substantial plating rate difference between the desorbed region and the suppressed region below

it leads to the cut-off appearance.

4.4 Improvement of Filling Performance

Based on the simulation discussed in the previous section, the desirable properties of the

additives can be summarized. For the suppressor, a very strong suppression effect would result in

a larger deposition rate difference between the suppressed region and the unsuppressed region,

thus enabling the filling of TSVs with higher aspect ratios. In order to create a suppressor

concentration gradient along the depth direction (thus leads to a suppressor coverage difference

between the TSV top and the TSV bottom), the suppressor concentration should be small while

having a small diffusion coefficient. The suppressor adsorption should be relatively fast to

achieve an initial deplete of suppressor inside the TSV. More importantly, the suppressor

desorption should exhibit a dependency on the plating condition (e.g. overpotential applied,

concentration of other species in the plating bath) so that suppressor desorption may happen at

the bottom of the TSV. For the accelerator, it should compete with suppressor for adsorption

sites, thus maintain a stable gradient of suppressor coverage along the depth direction. For this

reason, the accelerator should have a large diffusion coefficient and a relatively slow adsorption

coefficient so that it can diffuse to the via bottom where the suppressor is depleted there.

The accelerator, however, requires a closer examination. For the bottom-up filling in a plating

bath with both suppressor and accelerator, the role of the accelerator additive actually deviates

from the role suggested by its name as “accelerating”. In the presence of accelerator, the via

bottom is covered by accelerator after suppressor desorption, which protects the growing via

bottom from been re-covered by suppressor. Bottom-up filling was also achieved using one-

component plating bath with suppressor additive only \cite{cc4hayase02, cc4moffat12}. Figure

\ref{fc4simprofilesuponly} shows the simulated profile with suppressor as the only organic

additive in the plating bath. The plating bath contains 0.8 M Cu2+, 10 µM suppressor and 1.35

mM Cl-. The bottom-up filling process similar to the experimental observation is demonstrated

using the proposed model. Figure \ref{fc4simtdsuponly}a and Figure \ref{fc4simtdsuponly}b

show the corresponding time evolution of θS, i and ic. By choosing the plating conditions

carefully, the input potential, Uin, is kept between Udes and Uads all the way to the end after the

initiation of bottom-up growth. On the desorbed surface at the via bottom, Cu plating follows the

unsuppressed kinetic. As shown in Figure \ref{fc4hysteresis}, the current density is always

higher than the critical current density with Uin < Uads, thus re-adsorption is not possible within

this unsuppressed region. On the top surface and the lateral wall of the via, Cu plating follows

the suppressed kinetic as this region is still covered by adsorbed suppressor. As the plating

current density does not exceed the critical current density with Uin > Udes, desorption cannot

happen within the suppressed region. As a result, the bottom-up growth is self-sustained as long

48

as Uin is kept in the middle of the hysteresis. Neither desorption on the suppressed surface nor

adsorption on the unsuppressed surface may happen. The bottom-up filling was still achieved

solely due to the hysteretic nature of suppressor adsorption / desorption.

Figure {fc4simprofilesuponly} Simulated time evolution of surface profile for 5 µm × 40 µm

TSVs plated at -3 mA cm-2 average current density. The pattern density is 400 mm-2. The time

interval between two curves is 200 s. The plating bath contains 0.8 M Cu2+, 10 µM suppressor

and 1.35 mM Cl-.

When compared with the 2-component case shown in Figure \ref{fc4simprofilebottomup}, it can

be seen clearly that the width of the flat bottom, i.e. the radius of the opening, is larger in the

suppressor-only case. The addition of accelerator leads to a small fractional accelerator coverage

everywhere along the TSV surface. Therefore, the growth on the top surface / lateral wall is not

fully suppressed. The replacement of adsorbed suppressor by accelerator further reduces the

suppression effect on the top surface and the lateral wall. When the accelerator is excluded from

the plating bath, the via top and the lateral wall is solely covered by suppresser as shown in

Figure \ref{fc4simtdsuponly}a. Cu plating within this region is fully suppressed. For the same

iavg, the current density at the via bottom is higher. The via is thus filled in a shorter time. As

long as the bottom-up process can be sustained, the removal of accelerator is actually beneficial

for the void-free filling of high aspect ratio TSVs, as shown by both simulation and experiments.

49

Figure {fc4simtdsuponly} (a). time evolution of surface profile and (b). suppressor coverage

along the vertical direction of the simulation shown in Figure \ref{fc4simprofilesuponly}.

4.5 Conclusions

Based on the adsorption / desorption behavior of suppressor additive, a model was developed for

the bottom-up filling of TSVs. The progression of suppressor coverage from the via top toward

the via bottom leads to high current density at the via bottom. The suppressor adsorption is

interrupted at the via bottom and could ultimately lead to a suppressor-free copper area at the via

bottom being plated at high rates, thus filling the TSV in the bottom-up mode. The proposed

model is applicable to any additive which exhibits such an adsorption/desorption behavior. The

major difference between the proposed modeling approach and most of the existing models is

that the differential suppression is not the result of accelerator accumulation, but the suppressor

desorption near the via bottom. It is worth noting that the proposed model does not contradict the

existing models. Due to the complex nature of the filling process, different mechanisms may

become dominant depending on the plating condition and feature dimensions.

Using the proposed model, the numerical simulation of 5 µm × 40 µm TSVs Cu filling was

demonstrated. A qualitative comparison was made between the simulation results and existing

experimental data for feature-filling with 2-component chemistry. Various filling modes / void

formations observed experimentally were replicated in numerical simulation using our model.

The simulated dependency of filling mode on the suppressor concentration was shown to match

well with the experimental observation. The bottom-up filling mode is only possible within a

certain process window within which the applied current density exceeds the critical current

density at the bottom of the via. Bottom-up filling in plating baths with suppressor additive only

was also shown in simulation. The hysteretic nature of suppressor adsorption-desorption enables

stable fast bottom-up growth in the absence of accelerator. The simulation result matches

qualitatively with the extreme bottom-up filling observed in experiments with suppressor as the

only additive.

It is important to note that in the real-world scenarios, the distribution of the TSVs could be

highly non-uniform. Depending on the layout of the integrated circuit been fabricated, there may

be small blocks of high density TSVs while the rest of the wafer / die has much lower TSV

density. Thus, one can expect the vias in the high-density region and the low-density region

50

exhibit some difference in filling behavior. The proposed modeling approach could be applicable

to such a non-uniform situation through multiple coupled simulations with different pattern

densities.

References

[cc4liu13] L. Yang, A. Radisic, J. Deconinck, P. Vereecken, Modeling the Bottom-Up Filling of

Through-Silicon Vias Through Suppressor Adsorption / Desorption Mechanism, J. Electrochem.

Soc. 160, D3051 (2013).

[cc4ole09] O. Lühn, A. Radisic, P.M. Vereecken, C. Van Hoof, W. Ruythooren, J.-P. Celis,

Changing Superfilling Mode for Copper Electrodeposition in Blind Holes from Differential

Inhibition to Differential Acceleration, Electrochem. Solid-State Lett., 12, D39 (2009).

[cc4ole10] O. Lühn, A. Radisic, C. Van Hoof, W. Ruythooren, J.-P. Celis, Monitoring the

Superfilling of Blind Holes with Electrodeposited Copper, J. Electrochem. Soc., 157, D242

(2010).

[cc4alex11] A. Radisic, O. Lühn, H.G.G. Philipsen, Z. El-Mekki, M. Honore, S. Rodet, S.

Armini, C. Drijbooms, H. Bender, W. Ruythooren, Copper Plating for 3D Interconnects,

Microelectron. Eng., 88, 701 (2011).

[cc4hayashi12] T. Hayashi, K. Kondo, M. Takauchi, Y. Suzuki, T. Saito, N. Okamoto, M.

Marunaka, T. Tsuchiya, M. Bunya, High Speed Copper Electrodeposition for Through Silicon

Via (TSV), ECS Trans., 41, 45 (2012).

[cc4moffat06] T.P. Moffat, D. Wheeler, S.-K. Kim, D. Josell, Curvature Enhanced Adsorbate

Coverage Model for Electrodeposition, J. Electrochem. Soc., 153, C127 (2006).

[cc4moffat07] T.P. Moffat, D. Wheeler, S.-K. Kim, D. Josell, Curvature enhanced adsorbate

coverage mechanism for bottom-up superfilling and bump control in damascene processing ,

Electrochim. Acta, 53, 145 (2007).

[cc4akolkar09] R. Akolkar, U. Landau, Mechanistic Analysis of the “Bottom-Up” Fill in Copper

Interconnect Metallization, J. Electrochem. Soc., 156, D351 (2009).

[cc4alan01] A.C. West, S. Mayer, J. Reid, A Superfilling Model that Predicts Bump Formation,

Electrochem, Solid-State Lett., 4, C50 (2001).

[cc4chalupa02] R. Chalupa, Y. Cao, A.C. West, Unsteady diffusion effects on electrodeposition

into a submicron trench, J. Appl. Electrochem., 32, 135 (2002).

[cc4li07] X. Li, T.O. Drews, E. Rusli, F. Xue, Y. He, R. Braatz, R. Alkire, Effect of Additives on

Shape Evolution during Electrodeposition I. Multiscale Simulation with Dynamically Coupled

Kinetic Monte Carlo and Moving-Boundry Finite-Volume Codes, J. Electrochem. Soc., 154,

D230 (2007).

51

[cc4rusli07] E. Rusli, F. Xue, T.O. Drews, P.M. Vereecken, P. Andricacos, H. Deligianni, R.D.

Braatz, R.C. Alkire, Effect of Additives on Shape Evolution during Electrodeposition II.

Parameter Estimation from Roughness Evolution Experiments, J. Electrochem. Soc., 154, D584

(2007).

[cc4qin08] Y. Qin, X. Li, F. Xue, P.M. Vereecken, P. Andricacos, H. Deligianni, R.D. Braatz,

R.C. Alkire, Effect of Additives on Shape Evolution during Electrodeposition III. Trench Infill

for On-Chip Interconnects, J. Electrochem. Soc., 155, D223 (2008).

[cc4alex12] A. Radisic, L. Yang, C. Drijbooms, H. Bender, The Bottom-Up Copper Fill of

Ø5µm × 40µm Vias Using 2-Component Model Chemistry, ECS Trans., 41(43), 53 (2012).

[cc4hayase02] M. Hayase, M. Taketani, K. Aizawa, T. Hatsuzawa, K. Hayabusa, Copper

bottom-up deposition by breakdown of PEG-Cl inhibition, Electrochem. Solid-State Lett., 5, C98

(2002).

[cc4moffat12] T.P. Moffat, D. Josell, Extreme Bottom-Up Superfilling of Through-Silicon-Vias

by Damascene Processing: Suppressor Disruption, Positive Feedback and Turing Patterns J.

Electrochem. Soc., 159, D208 (2012).

[cc4josell12] D. Josell, D. Wheeler, T.P. Moffat, Modeling Extreme Bottom-Up Filling of

Through Silicon Vias, J. Electrochem. Soc., 159, D570 (2012).

[cc4hebert05] K.R. Hebert, Role of Chloride Ions in Suppression of Copper Electrodeposition by

Polyethylene Glycol, J. Electrochem. Soc., 152, C283 (2005).

[cc4willey07] M.J. Willey, A.C. West, SPS adsorption and desorption during copper

electrodeposition and its impact on PEG adsorption, J. Electrochem. Soc., 154, D156 (2007).

[cc4tanya11] T.A. Atanasova, K. Strubbe, P.M. Vereecken, Adsorption/Desorption of

Suppressor Complex on Copper: Description of the Critical Potential, ECS Trans., 33 (37), 13

(2011).

[cc4bard01] A. Bard, L. Faulkner, "Electrochemical Methods. Fundamentals and Applications".

2nd edition, John Wiley and Sons, Inc. (2001).

[cc4price80] D.C. Price, W.G. Davenport, Densities, electrical conductivities and viscosities of

CuSO4/H2SO4 solutions in the range of modern electrorefining and electrowinning electrolytes,

Metall. Trans. B, 11, 159 (1980).

[cc4philippe05] P.M. Vereecken, B. Baker, H. Deligianni, R.O. Henry, K. Kwietniak, C. Parks,

S.-C. Seo, I. Shao, Room temperature resistance transient of electrodeposited copper, abstract

#330, 207th ECS meeting (2005).

[cc4hayase05] M. Hayase, T. Hatsuzawa, K. Hayabusa, Incorporation of Cl- into Copper Deposit

at Initial Plating Period, Abstract #1113, 206th ECS meeting (2005).

[cc4zhang05] W. Zhang, S.H. Brongersma, N. Heylen, G. Beyer, W. Vandervorst, K. Maex,

Geometry Effect on Impurity Incorporation and Grain Growth in Narrow Copper Lines, J.

Electrochem. Soc., 152 (12), C832 (2005).

52

[cc4zinkiewicz05] O.C. Zienkiewicz, R.L. Taylor, J.Z. Zhu, The Finite Element Method, 6th

edition, Elsevier Butterworth-Heinemann (2005).

[cc4sethian96] J. A. Sethian, A fast marching level set method for monotonically advancing

fronts, Proc. Natl. Acad. Sci. USA, 93, 1591(1996).

[cc4woolf70] L.A. Woolf, A.W. Hoveling, Mutual Diffusion Coefficients of Aqueous Copper(II)

Sulfate Solutions at 25oC, J. Phys. Chem., 74, 2406 (1970).

53

5. Suppressor Desorption and Adsorption

It has been shown in the preceding chapter that the suppressor desorption / interruption of

suppressor adsorption within the TSV is responsible for the bottom-up filling. The hysteretic

behaviour of the suppressor desorption / adsorption has been known for a longer time

\cite{cc5moffat01, cc5alan01, cc5hebert01}. Modeling of the PEG desorption and its

dependency on Cl- concentration was reported in \cite{cc5hgarrido09a, cc5hgarrido09b}.

Qualitative study of the dependency of PEG desorption potential on bath composition is also

available \cite{cc5tanya11}. As will be shown in the following sections, both the desorption and

the adsorption exhibit complex dependencies on the bath composition, the size & shape of the

PEG molecule and some other factors. Due to its critical role in the bottom-up filling,

understanding the underlying mechanism would give insight into the void-free filling of higher

aspect-ratio TSVs.

A stochastic model for the desorption / adsorption of PEG during Cu electroplating is introduced

in this chapter. Using the proposed model, a time-dependent simulation program is developed to

study the transient process of PEG desorption / adsorption. As a verification of the proposed

model, plating experiments are also performed to study the desorption-adsorption process and its

dependency on various conditions. The experimental setup is explained in Section 2. Section 3

gives a detailed introduction to the proposed stochastic model. The results, both experimental

and modeling, are given in Section 4. The simulated curves are compared side-by-side to the

corresponding experimental measurements. The conclusion is made in Section 5.

5.1 Experiments

In order to estimate the kinetic parameters for Cu reduction, experiments were performed using a

rotating ring-disk electrode (RRDE) setup. The RRDE consists of a platinum (Pt) disk and a Pt

ring. The disk electrode has a radius of 2mm (12.57 mm2 surface area). The ring electrode has an

inner radius of 2.5mm and an outer radius of 3.5mm (18.85 mm2 surface area). The collection

efficiency of the RRDE was calculated to be about 0.42 \cite{cc5bard01}. Before each

measurement, the Pt disk was plated with 500 nm Cu from an additive-free plating bath, which is

considered to be thick enough to exhibit the same property as bulk Cu. A Cu foil was used as the

counter electrode. The reference electrode was a saturated mercury/mercurous sulfate electrode

(SMSE). The potential of the ring electrode was set at 0.25 V versus the reference electrode to

effectively oxidize Cu+ back to Cu2+. The plating bath was purged with N2 for 10 minutes prior

to the measurement. The purging was not applied during the measurement to avoid any

interference from the air bubbles. In order to minimize the re-dissolution of oxygen from the

ambient during the measurement, the plating cell was sealed by a cap with openings designed

specifically to accommodate the electrodes and the N2 tubes. Rotating-ring-disk voltammogram

(RRDV) measurements were performed at a scan rate of 5mV s-1.

The dependency of PEG desorption on various parameters is studied using a Pt rotating disk

electrode (RDE) with a radius of 2mm (12.57 mm2 surface area). Similar to the RRDE

experiments, the Pt disk was plated with 500 nm Cu from an additive-free plating bath prior to

each measurement.

54

All experiments were performed at room temperature. A water-jacketed glass plating cell was

used with circulating water to maintain a stable temperature. Before each measurement, the

potential of the Cu disk was monitored until a steady value was reached for at least 10s. The

reported current-overpotential curves are corrected for IR drop.

5.2 Numerical Model

The Cu2+ ions are reduced to Cu+ and subsequently to solid Cu through two one-electron

electrochemical reactions on the Cu working electrode:

CuCu2 e {ec5redstep1}

CuCu e {ec5redstep2}

For Reactions \ref{ec5redstep1} and \ref{ec5redstep2}, the cathodic / anodic reaction rates are

given by:

RTFUckUr c /exp)( 1Cu(II)1c1 {ec5rc1}

RTFUckUr /)1(exp)( 1Cu(I)a1a1 {ec5ra1}

RTFUckUr /exp)( 2Cu(I)c2c2 {ec5rc2}

RTFUckUr /)1(exp)( 2Cu(0)a2a2 {ec5ra2}

The subscribes “c” and “a” stand for cathodic and anodic, respectively. In these equation, kc1 and

ka1 are the rate coefficients for Reaction \ref{ec5redstep1}, kc2 and ka2 are the rate coefficients for

Reaction \ref{ec5redstep2}, α1 and α2 are the cathodic transfer coefficients, U is the applied

potential, F is the Faraday constant, R is the gas constant and T is the temperature in Kelvin.

Note that potential, instead of overpotential, is used in these equations. Therefore, the values of

the rate coefficients are dependent on the reference electrode used for U. As the rates are given

for half reactions, the deposition rate of Cu is rCu = (rc2 – ra2). Note that in the previous chapters,

the electrochemical reduction of Cu2+ to Cu was treated as a simplified one-step, two-electron

reaction (Reaction \ref{ec1cured}, Reaction \ref{ec4cured}). Such a simplification is no longer

applicable for the modeling of suppressor desorption / adsorption as the intermediate product,

Cu+, is involved explicitly.

For Cu2+ and Cu+, the diffusion process is governed by Fick’s law of diffusion. At steady state,

the conservation of mass requires:

/)( )()(11 IICuIIbCuac ccDrr {ec5diffcu2}

/)( )()(2211 ICuIbCucaac ccDrrrr {ec5diffcu1}

55

where the same diffusion coefficient D is assumed for both Cu2+ and Cu+, σ is the diffusion layer

thickness. As Cu+ is unstable in the presence of dissolved O2, the bulk concentration of Cu+ is

assumed to be zero. For simplicity, the dissolved CuSO4 is assumed to disassociate completely.

In the presence of Cl-, PEG is generally believed to adsorb onto the Cu surface through the

formation of a complex with Cu+ and Cl-, with (OCH2CH2)a[Cu(I)Clb](b-1)- as the repeating unit

\cite{cc5stoychev96, cc5feng03, cc5tanya11, cc5long06}. Various a values of 2 ~ 4 and b values

of 1 ~ 3 were reported. The reaction is assumed to be:

2)1(

2222 Cu][Cu(I)Cl)CHOCH(ClCuCu(II))CHOCH( b

adsbaa b {ec5ads}

The surface coverage of adsorbed suppressor additive, θS, thus varies with plating condition and

the bath composition. The suppression effect of adsorbed PEG on Cu plating is described by the

change of rate coefficients of Reactions \ref{ec5redstep1} and \ref{ec5redstep2}. It is assumed

that the rate coefficients of Reactions \ref{ec5redstep1} and \ref{ec5redstep2} on the PEG-

covered Cu surface are only a fraction (κ) of the corresponding values on additive-free Cu

surface. Therefore, κ characterize the suppression strength of PEG. The closer κ is to zero, the

stronger the suppression effect is. The consumption of PEG is assumed to be negligible. The

concentration of PEG remains the same as the bulk concentrations everywhere in the electrolyte.

Although Cl- may get incorporated into the plated Cu and lead to a Cl- concentration gradient

along the depth direction of a TSV \cite{cc5liu03}, the concentration difference between the

electrode surface and the bulk of the electrolyte is very small on a featureless RDE under good

convection conditions. Therefore, the concentration of Cl- is assumed to be constant everywhere

in the electrolyte as well.

According to the PEG adsorption / desorption mechanism described above, the repeating unit

[(OCH2CH2)a] functions as an adsorption point for the PEG molecule. For example, assuming a

= 4, a PEG molecule with a molecular weight (MW) of 4000 has about 22 such repeating units.

However, not all the repeating units function as an effective adsorption points. Apparently, only

those in the vicinity of the Cu surface can be functional. The exact value of effective adsorption

points, n, is thus expected to be just a fraction of the number of repeating units calculated from

the MW. For a given molecule, the number of adsorption points, n, depends on both its size and

shape. A larger molecule with a higher MW has a larger n value compared to a smaller one with

the same shape, while a flat molecule has a larger n value compared to a spherical molecule with

the same MW. Moreover, the increase of n is not proportional to the increase of MW. Assuming

the same shape, doubling the MW will only lead to a 22/3 times larger n. It would be increasingly

difficult to obtain larger n by increasing the MW. Such an adsorption point has two states,

adsorbed or desorbed. These points are assumed to have the same properties. The adsorption /

desorption of one adsorption point does not depend on its past status or the status of other points.

A molecule is treated as adsorbed on the Cu surface if at least one of its n adsorption points is

adsorbed. An adsorbed molecule desorbs from the Cu surface if, and only if, all of its n

adsorption points desorb from the Cu surface. As long as the molecule is adsorbed, Cu plating is

suppressed within the region covered by the entire molecule.

56

Figure {fc5illustration} Illustration of the state transition for a PEG molecule with n = 6.

Consider an arbitrary location on the Cu surface, define Sm (m = 0, 1, ..., n) as the state in which

this location is covered by a molecule with m of its n points adsorbed. Therefore, S0 is the only

state that the surface is not covered by an adsorbed PEG. A random variable S can be used to

describe the variation of the surface state, Sϵ{S0, S1, ..., Sn}. Given the assumptions introduced

above, the evolution of S with time is a continuous-time Markov process. A probability

distribution p(t) = [p0, p1, ..., pn] can be defined for all the possible states. Its element pm(t) gives

the probability that a random location on the electrode surface is covered by a molecule in the

state Sm at time t, i.e. with m of its n adsorption points adsorbed. Assume that the electrode

surface can be completely covered by the PEG molecule without overlap, the stationary coverage

of PEG is equivalent to the probability that S ≠ S0, i.e. a state with at least one point adsorbed:

0

,...,1

1 ppni

iS

{ec5covsup}

Starting from a given initial probability distribution p(t) at time t, the probability distribution

p(t+Δt) after a time interval of Δt can be calculated using:

)()()( tttt Ppp {ec5p}

where P(Δt) is the transition probability matrix. Its entry pij gives the transition probability from

the initial state Si to the final state Sj over a time interval of Δt. P(Δt) can be solved from the

Kolmogorov forward equation \cite{cc5norrisbook}. The solution is given by:

)exp()( QP tt {ec5equP}

The transition rate matrix Q is a (n+1) × (n+1) matrix to be constructed from the desorption /

adsorption rates. The entry qi,j of Q gives the transition rates from state Si to state Sj in the units

of s-1. As the time interval can be infinitely divided to have only one adsorption or desorption

event within a given time interval Δt, Q has only non-zero elements in the main diagonal and its

two neighboring diagonals, i.e. Q is a tri-diagonal matrix. Starting from an adsorbed initial state

Sm (m > 0), there are three possible final states: S(m+1) through the adsorption of one adsorption

57

point (for m < n), S(m-1) through the desorption of one adsorbed point, and Sm if no adsorption /

desorption event happens. The non-zero elements of the m-th row of Q are thus given by:

)1(,)1(,,

des)1(,

ads)1(, )(

mmmmmm

mm

mm

qqq

mrq

rmnq

{ec5q}

In these expressions, rads and rdes are the discrete adsorption and desorption rates, or jump rates,

of Reaction \ref{ec5ads}. The physical meaning of rads is the average number of adsorption event

per second for one adsorption site, while rdes is the average number of desorption events per

second for one adsorbed point. These rates are given in the units of s-1 by:

ClCu(I)apadsads ccckr {ec5rads}

)( CuCu(II)desdes rfckr {ec5rdes}

where kads and kdes are the discrete adsorption and desorption coefficients, respectively. In the

expression of rads, the concentration of adsorption points cap, instead of the concentration of PEG,

is used in order to distinguish the adsorption of the first point (S0 S1) from the rest. For the

transition from the desorbed initial state S0 to the adsorbed state S1, since the initial state is a

molecule floating near the Cu surface, the adsorption rate is proportional to the concentration of

PEG, cPEG. For the adsorption event with a non-zero initial m, the molecule as a whole is already

adsorbed on the surface, thus the adsorption points are in the vicinity of the electrode surface.

Therefore, the equivalent concentration of solid species, 1 mol L-1, is used for cap instead:

othersfor M 1

state initialfor 0Scc

PEG

ap {ec5cap}

As will be shown in Section 4, the desorption process is potential dependent. Such a potential

dependency was reported in existing studies as well \cite{cc5willey07, cc5walker07}. Therefore,

a function of the Cu plating rate, f(rCu), is introduced in Equation 12 as a dimensionless factor to

take into account this potential dependency. Although it is reasonable to conjecture that the faster

morphology change of the Cu surface at a higher plating rate leads to a higher desorption rate of

PEG, the exact dependency may be very complex. Any detailed study of such a dependency

would involve the atomic scale interaction, thus well exceed the scope of this work. Since we

focus on the modeling of the hysteretic PEG adsorption / desorption process in this study, the use

of a simplified f(rCu) is necessary. A linear function of f(rCu) = rCu was used in an earlier model of

PEG desorption in \cite{cc5hgarrido09a}. As a higher rCu leads to a higher rdes, which in turn

results in an even higher rCu, this positive feedback led to a much steeper transition than

observed in the experimental CV of Figure \ref{fc5hysteresis}. Instead, a concave function of

f(rCu) = rCu0.5 is a better approximation as it leads to more realistic CVs by avoiding an extremely

steep transition from the suppressed state to unsuppressed state. More discussion is given in

Section 4.

For each time step of the simulation, the final probability distribution of the previous time step is

used as the current initial distribution. The near-surface concentration of Cu2+ and Cu+ are solved

58

first from Equations \ref{ec5diffcu2} and \ref{ec5diffcu1}, using the surface coverage calculated

from the previous time step. The transition rate matrix Q is then assembled using the adsorption

and desorption rates calculated from Equations \ref{ec5q} to \ref{ec5cap} using the updated

near-surface Cu2+ and Cu+ concentrations. The probability distribution at the end of the current

time step is solved using Equation \ref{ec5p} and \ref{ec5equP} for a given step time Δt. The

surface coverage is updated at the end of this simulation step. By setting the input potential U as

a function of time, CVs can be simulated.

5.3 Stochastic Modeling of PEG as a Suppressor

The diffusion layer thickness is set to σ = 20 µm in all the calculations. The stoichiometric

number b is assumed to be 1. A constant κ value of 0.05 is assumed for all the PEG molecules

involved in this study. The reaction rates of Equation 3 on a PEG-covered surface are thus 1/20

of the corresponding rates on an additive-free surface. The diffusion coefficients of both Cu2+

and Cu+ ions are assumed to be DCu = 5 × 10-10 m s-1. The transfer coefficients α1 and α2 are set to

0.5.

Figure {fc5rrde} Current-potential response measured using a Pt ring-Cu disk RRDE setup. The

partial current density iCu(I) has been corrected for the disk/ring electrode area and the collection

coefficient. 1000 rpm, 20 mV s-1. 0.45M H2SO4 + 0.25M CuSO4.

As multiple unknown kinetic parameters are involved in the equations, a good estimation of

these parameters is essential for the numerical modeling. In order to extract the rate coefficients

in Equation \ref{ec5rc1} to \ref{ec5ra2}, RRDE experiments are performed using an additive-

free plating bath. Figure \ref{fc5rrde} shows the measured rotating ring-disk voltammogram.

When rotating, Cu+ as an intermediate product formed on the disk electrode is conveyed to the

ring electrode due to convection. By controlling the potential on the ring electrode, Cu+ is

oxidized back to Cu2+ on the ring electrode. Therefore, the concentration of Cu+ intermediate

near the disk electrode surface can be calculated from iCu(I), the partial current density of Cu+

measured on the ring, using:

FDic /Cu(I)Cu(I) {ec5ccu1}

59

Two disk potentials, U1 ≈ -0.4V and U2 ≈ -0.46V, are selected for the estimation of coefficients.

The first disk potential U1 is the potential of zero disk current. As Cu+ diffuses from the electrode

surface to the bulk, both Reaction 1 and Reaction 2 proceed toward the generation of Cu+ at the

same rate to maintain the Cu+ concentration near the disk electrode. Since the ring current

density due to the diffusion of Cu+ from the disk surface is very small, the differences between

the cathodic and anodic rates of both Reaction 1 and Reaction 2 are negligible, thus:

)()( 1a11c1 UrUr {ec5paramequ1}

)()( 1a21c2 UrUr {ec5paramequ2}

The second disk potential U2, which is more negative than U1, is selected in the exponential

region. Therefore, the anodic rates ra1(U2) and ra2(U2) are negligible compared to the

corresponding cathodic rates rc1(U2) and rc2(U2), thus:

)()(2 2disk2c1 UiUFr {ec5paramequ3}

)()(2 2disk2c2 UiUFr {ec5paramequ4}

As the disk current density is small for both U1 and U2, the near-surface concentrations of Cu2+ is

approximately the same as the bulk concentration. The four rate coefficients can thus be solved

from Equations \ref{ec5paramequ1} to \ref{ec5paramequ4}. The values calculated from this

procedure are rc1 = 3.4×10-11 m s-1, ra1 = 0.23 m s-1, rc2 = 2.2×10-7 m s-1 and ra2 = 2.6×10-4 m s-1.

Figure {fc5transient} Current density variation with step potential. The potential is changed at

10s. The start potentials are given vs. SMSE. The solid curve shows the desorption process, the

dashed curve shows the adsorption process. 1000rpm, 1M H2SO4 + 0.25M CuSO4 + 300ppm

PEG 4000 + 2ppm HCl.

The rate coefficients kads and kdes, are yet to be determined. Although various adsorption /

desorption coefficients of PEG were reported in modeling studies, they cannot be used directly in

this study. The reaction rates in Equation \ref{ec5q} are discrete jump rates for one adsorption

point rather than a measure of the reaction rate on a continuum surface. The values of kads and

kdes are thus estimated from experimental measurements. Figure \ref{fc5transient} shows the

60

transient of plating current density with potential steps. The electrolyte contains both PEG and

Cl-. The potential change happens at 10 s. For the solid curve, the start potential is more positive

than the desorption potential, thus the surface is saturated by adsorbed suppressor before the

potential step. As the end potential is more negative than the desorption potential, suppressor

desorption happens after the potential step. Therefore, suppressor desorption leads to a transition

from unsuppressed surface to suppressed surface after the potential step, as evidently shown by

the increase of | i | over a few seconds after the potential step. For the dashed curve, the start

potential is negative enough to induce suppressor desorption and maintain a nearly additive-free

surface. The end potential is more positive than the re-adsorption potential. Therefore,

suppressor adsorption happens after the potential step and results in further decrease of | i | until

the surface is saturated. In the parameter fitting process, the adsorption coefficient kads is adjusted

first to give roughly the same transition time of about 1s for the re-adsorption process (the

dashed curve). The desorption coefficient kdes is then adjusted to give roughly the same transition

time of about 4s for the desorption process ( the solid curve). The resulting values are kads =

3.4×103 mol-3 m9 s-1, kdes = 1.2×102 mol-1 m3 s-1, with the number of adsorption points set to n = 6.

Figure {fc5hysteresis} Cyclic Voltammogram showing the desorption and re-adsorption process.

Cu RDE at 1000rpm, 50 mV s-1. 1M H2SO4 + 0.25M CuSO4 + 300ppm PEG 4000 + 2ppm HCl.

The proposed modeling approach is first applied in the simulation of the case shown in Figure

\ref{fc5hysteresis}. The plating bath assumed in simulation contains 0.25 M Cu2+, 2 ppm HCl

and 0.075 mM PEG. As it will be shown later in Figure \ref{fc5mw}, the difference between the

desorption / adsorption potentials, or the width of the hysteresis, exhibits clear dependency on n,

the number of adsorption points. A value of n = 6 was found for PEG 4000 as it leads to roughly

the same hysteresis shown in Figure {fc5hysteresis}. As expected, this value is much smaller

than the 22 repeating units calculated for a PEG 4000 molecule. The simulation results are

shown in Figure \ref{fc5sim}. The simulated CV shown in Figure \ref{fc5sim}a corresponds

well with the experimental measurement shown in Figure \ref{fc5hysteresis}. The steep current

density change around a critical potential as observed in the experimental measurements, as well

as the merging of backward scan with the suppressed curve, is shown clearly in the simulated

result.

61

Figure {fc5sim} Simulation result (a) CV, (b) coverage during the forward scan and (c)

probability distribution of adsorption points around the critical potential. 0.25M Cu2+ + 2ppm

HCl + 0.075mM suppressor with n = 6.

This steep current density change during the forward scan is the result of suppressor desorption.

Figure \ref{fc5sim}b shows the simulated potential dependency of PEG coverage during the

forward scan. The adsorbed PEG desorbs almost completely within a very narrow potential range.

The probability distribution of three potentials, namely A, B and C, are shown in Figure

\ref{fc5simc}c. Potential A is selected around the onset of the desorption process. The small p0

(~ 0.1) indicates that, from a macroscopic viewpoint, the majority of the Cu surface is still

covered by adsorbed PEG. Moreover, the surface is mostly covered by PEG molecules with most

of the 6 adsorption points attached. The plating kinetic still resembles the fully-suppressed curve.

Though potential B is only slightly more negative than potential A, the equilibrium already

shifted significantly toward desorption as p0 reaches about 0.5. As shown by the change of

histogram from A to B, the increase of p0 comes mainly from the probability decrease of p6 and

p5, i.e. the states with most of the adsorption points attached. Reducing the potential from B to C

results further shift of the equilibrium toward desorption. As p0 is close to 1 at potential C, most

of the surface is not covered. The i-V curve merges to the unsuppressed case.

As the desorption and adsorption processes are time-dependent, the hysteresis in the CV is

dependent on the scan rate. Figure \ref{fc5scanrate}a shows the measured CV curves with three

difference scan rates. The corresponding simulation is shown in Figure \ref{fc5scanrate}b. The

62

desorption potential shifts toward the negative direction with a higher scan rate. As shown earlier

in Figure \ref{fc5sim}c, the change of surface coverage comes mainly from the desorption of

molecules with large initial m values. Since it takes a short time for such a transition to complete,

the onset of desorption shifts to a more negative potential with a higher scan rate. The re-

adsorption process starts around the same potential, but the slope of the transition becomes

smaller at a higher scan rate due the shorter transition time for the same potential change. Such

trends are shown clearly in the simulation and match the experiments well.

Figure {fc5scanrate} (a) Experimental and (b) simulated CVs with various scan rates. 1000rpm,

1M H2SO4 + 0.25M CuSO4 + 300ppm PEG 4000 (experiment) or 0.075mM suppressor with n =

6 (simulation) + 2ppm HCl.

The transients of suppressor desorption were studied under controlled potentials. Similar to the

measurements shown in Figure \ref{fc5potstep}, a potential step with various amplitudes was

applied after 10s during the current density measurement. The transient processes measured are

shown in Figure \ref{fc5potstep}a. All the measurements start from the same potential which is

not negative enough to induce PEG desorption, the surface is saturated with adsorbed PEG. After

plating for 10s, the potential was decreased for various amplitudes. For a small potential decrease

of 35mV, the current density still follows the suppressed kinetics. The associated current density

increase is limited. For a slightly larger potential decrease of 65mV, the desorption process is

evidently shown by the variation of current density with time. After an initial delay, the

amplitude of the current density increases exponentially for a short period of time, followed by a

slow transition to a steady-state value. For an even larger potential decrease of 95mV, this

transition happens within a significantly shorter time, clearly indicating that the desorption

process is potential dependent. Figure \ref{fc5potstep}b gives the corresponding simulation

result. The transient behavior of suppressor desorption, as well as the potential dependency, is

clearly present. For the cases showing suppressor desorption, the simulated results show steeper

transition to the steady-state current density compared to the experiments. Such a difference

likely comes from the use of f(rCu) = rCu0.5 in Equation {ec5rdes} as an approximation for the

complex dependency of PEG desorption on Cu plating rate. Nevertheless, The simulated curves

catch the important characteristics observed experimentally.

63

Figure {fc5potstep} (a) Experimental and (b) simulated current density variation with step

potential. The potential is changed at 10s. The start potential is given vs. SMSE. 1000rpm, 1M

H2SO4 + 0.25M CuSO4 + 300ppm PEG 4000 (experiment) or 0.075mM suppressor with n = 6

(simulation) + 2ppm HCl.

The desorption potential has been shown to depend on the concentration of various species in the

electrolyte, including the concentration of Cl-. Figure \ref{fc5cl}a shows the CV curves

measured with two different Cl- concentrations. The critical potential shifts toward the negative

direction with increasing Cl- concentration. Corresponding simulations were performed using the

same Cl- concentrations as used in the experiments. The simulation results are shown in Figure

\ref{fc5cl}b. The dependency of critical potential on Cl- concentration is shown by the proposed

model. Note that the stoichiometric number b, the number of Cl- involved in each adsorbed point

as given in Reaction \ref{ec5ads} , has a significant effect on the dependency. A larger b results

a larger shift of desorption potential for the same change of Cl- concentration.

Figure {fc5cl} (a) Experimental and (b) simulated CVs with various HCl concentrations.

1000rpm, 50mV s-1, 1M H2SO4 + 0.25M CuSO4 + 300ppm PEG 4000(experiment) or 0.075mM

suppressor with n = 6 (simulation).

Higher Cu2+ concentration, as shown by the experimental result in Figure \ref{fc5cu2}a, leads to

easier desorption. With all other conditions remaining unchanged, both the desorption potential

64

and the re-adsorption potential shifted to more positive values with a higher Cu2+ concentration.

Figure \ref{fc5cu2}b gives the simulated result for two different Cu2+ concentrations. The same

dependency is shown in simulation. Such a shift is a natural result of the Reaction \ref{ec5ads}

assumed for PEG adsorption as the desorption rate is proportional to the Cu2+ concentration. A

lower Cu2+ concentration of 0.5M , instead of the experimental value of 0.8M, was used in the

simulation as in the real case CuSO4 is not fully disassociation.

Figure {fc5cu2} (a) Experimental and (b) simulated CVs with various Cu2+ concentrations.

1000rpm, 50mV s-1, 1M H2SO4 + 300ppm PEG 4000(experiment) or 0.075mM suppressor with

n = 6 (simulation) + 2ppm HCl.

The molecular weight also affects the adsorption-desorption behavior. Figure \ref{fc5mw}a

shows the measured CV curves for two different PEG molecules, one larger (MW ≈ 4000) and

the other one smaller (MW ≈ 600). The mass concentration is kept the same for these two cases

to give roughly the same number of ethylene groups, thus the same number of adsorption points.

For the same Cl- concentration and the same PEG mass concentration, a smaller molecules

desorbs much easier as shown by the obvious shift of the desorption potential toward the anodic

end. The change of the re-adsorption process, however, is not as significant. The result is a

narrower hysteresis. The effect of MW is simulated using the proposed modeling approach.

Assuming the same molecular shape, a molecule with larger molecular weight has more

available adsorption points, thus a larger n value. Figure \ref{fc5mw}b shows the simulation

result for two different n values. Similar to the experiments, the molar concentration of PEG was

set higher for the smaller n value in order to maintain the same mass concentration. Note that, as

discussed in Section 3, the exact change of molar concentration depends not only on the value of

n but also the shape of the molecule. The dependency observed in the experimental

measurements is shown by the simulation as well. Such a dependency on molecular weight is

understandable with the proposed model. Start from a PEG-covered surface, a larger molecule

with more adsorption points has a better chance to have at least one point attached to the surface,

thus remain adsorbed until a more negative potential during the forward scan. The backward

scan starts with a PEG-free surface. According to Equation \ref{ec5cap}, the effect of small n is

partially compensated by the increase of molar concentration, thus the onset of re-adsorption

shifts less toward the anodic end.

65

Figure {fc5mw} (a) Experimental and (b) simulated CVs with various PEG molecule weights.

1000rpm, 20mV s-1, 1M H2SO4 + 0.25M CuSO4 + 300ppm PEG (experiment) or 0.075mM (n =

6) / 0.45mM (n = 4) suppressor (simulation) + 2ppm HCl.

5.4 Conclusions

A stochastic model has been developed for the desorption / adsorption of suppressor additive

during Cu electroplating. The proposed model has been applied in the simulation of PEG as a

model suppressor. The hysteretic desorption / adsorption process during CV scans has been

demonstrated. The dependencies of PEG desorption / adsorption on various factors, such as the

scan rate, the bath composition (the concentration of Cu2+ and Cl-) and the PEG molecular

weight, were simulated and compared with the corresponding experimental measurements. The

credence of the proposed model is supported by the overall good match shown in the comparison.

Although PEG was assumed in the simulation, the desorption / adsorption behavior discussed

may also be found for other suppressor additives. Therefore, the proposed model is not only

limited to PEG, but can be also applicable to suppressors used in the bottom-up filling of TSVs

in general. Since the proposed modeling approach is time-dependent in nature, it would be

possible to couple the proposed methodology with feature scale filling simulation to study the

transient processes involved in the early stage of bottom-up filling.

References

[cc5hebert05] K.R. Hebert, Role of Chloride Ions in Suppression of Copper Electrodeposition by

Polyethylene Glycol, J. Electrochem. Soc. 152, C283(2005).

[cc5willey06] M.J. Willey, A.C. West, Microfluidic Studies of Adsorption and Desorption of

Polyethylene Glycol during Copper Electrodeposition, J. Electrochem. Soc. 153, C728(2006).

[cc5willey07] M.J. Willey, A.C. West, SPS Adsorption and Desorption during Copper

Electrodeposition and Its Impact on PEG Adsorption, J. Electrochem. Soc. 154, D156(2007).

[cc5walker07] Marlon L. Walker, Lee J. Richter, Thomas P. Moffat, Competitive Adsorption of

PEG, Cl−, and SPS/MPS on Cu: An In Situ Ellipsometric Study, J. Electrochem. Soc. 153,

C557(2007).

66

[cc5hgarrido09a] M.E. Huerta Garrido, M.D. Pritzker, Inhibition of Copper Deposition by

Polyethylene Glycol and Chloride I. Model Development and Parameter Estimation, J.

Electrochem. Soc. 156(1) D36(2009).

[cc5hgarrido09b] M.E. Huerta Garrido, M.D. Pritzker, Inhibition of Copper Deposition by

Polyethylene Glycol and Chloride II. Analysis and Application, J. Electrochem. Soc. 156(5)

D175(2009).

[cc5gallaway08] J.W. Gallaway, A.C. West, PEG, PPG, and Their Triblock Copolymers as

Suppressors in Copper Electroplating, J. Electrochem. Soc. 155, D632(2008).

[cc5willey09] M.J. Willey, E.J. McInerney, Adsorption and Desorption Kinetics of a Block

Copolymer Wetting Agent Used in Copper Electroplating, J. Electrochem. Soc. 156, D98(2009).

[cc5ole09] O. Lühn, A. Radisic, P.M. Vereecken, C. Van Hoof, W. Ruythooren, J.-P. Celis,

Electrochem. Solid-State Lett., 12, D39 (2009).

[cc5ole10] O. Lühn, A. Radisic, C. Van Hoof, W. Ruythooren, J.-P. Celis, J. Electrochem. Soc.,

157, D242 (2010).

[cc5alex11] A. Radisic, O. Lühn, H.G.G. Philipsen, Z. El-Mekki, M. Honore, S. Rodet, S.

Armini, C. Drijbooms, H. Bender, W. Ruythooren, Copper plating for 3D interconnects,

Microelectronic Engineering, 88, 701(2011).

[cc5moffat12] T.P. Moffat, D. Josell, Extreme Bottom-Up Superfilling of Through-Silicon-Vias

by Damascene Processing: Suppressor Disruption, Positive Feedback and Turing Patterns, J.

Electrochem. Soc. 159, D208(2012).

[cc5alex12] A. Radisic, L. Yang, C. Drijbooms, H. Bender, The Bottom-Up Copper Fill of

Ø5µm×40µm Vias Using 2-Component Model Chemistry, ECS Trans. 41, 53(2012).

[cc5josell12] D. Josell, D. Wheeler, T.P. Moffat, Modeling Extreme Bottom-Up Filling of

Through Silicon Vias, J. Electrochem. Soc. 159, D570(2012).

[15] M. Hayase, M. Taketani, K. Aizawa, T. Hatsuzawa, K. Hayabusa, Copper Bottom-up

Deposition by Breakdown of PEG-Cl Inhibition, Electrochem. Solid-State Lett. 5, C98(2002).

[cc5liu13] L. Yang, A. Radisic, J. Deconinck, P.M. Vereecken, Modeling the Bottom-up Filling

of Through-Silicon Vias Through Suppressor Adsorption/Desorption Mechanism, J. Electrochem.

Soc. 160, D3051(2013).

[cc5alan01] A.C. West, S. Mayer, J. Reid, A Superfilling Model that Predicts Bump Formation,

Electrochem. and Solid-State Lett. 4, C50(2001).

[cc5moffat01] T.P. Moffat, D. Wheeler, W.H. Huber, D. Josell, Superconformal

Electrodeposition of Copper, Electrochem. and Solid-State Lett. 4, C26(2001).

[cc5hebert01] K.R. Hebert, Analysis of Current-Potential Hysteresis during Electrodeposition of

Copper with Additives, J. Electrochem. Soc. 148, C726(2001).

67

[cc5tanya11] T.A. Atanasova, K. Strubbe, P.M. Vereecken, Adsorption/Desorption of

Suppressor Complex on Copper: Description of the Critical Potential, ECS Trans. 33, 13(2011).

[cc5bard01] A. Bard, L. Faulkner, Electrochemical Methods. Fundamentals and Applications, 2nd

edition, John Wiley and Sons Inc. (2001).

[cc5stoychev96] D. Stoychev, C. Tsvetanov, Behaviour of poly(ethylene glycol) during

electrodeposition of bright copper coatings in sulfuric acid electrolytes, J. Appl. Electrochem. 7,

741(1996)

[cc5feng03] Z.V. Feng, X. Li, A.A. Gewirth, Inhibition Due to the Interaction of Polyethylene

Glycol, Chloride, and Copper in Plating Baths: A Surface-Enhanced Raman Study, J. Phys.

Chem. B 107, 9415(2003).

[cc5long06] J.G. Long, P.C. Searson, P.M. Vereecken, Electrochemical Characterization of

Adsorption-Desorption of the Cuprous-Suppressor-Chloride Complex during Electrodeposition

of Copper, J. Electrochem. Soc. 153, C258(2006).

[cc5norrisbook] J.R. Norris, Markov Chains, Cambridge University Press (1998).

[cc5walker07] M.L. Walker, L.J. Richter, T.P. Moffat, Potential Dependence of Competitive

Adsorption of PEG, Cl- and SPS/MPS on Cu, J. Electrochem. Soc. 154, D277(2007).

68

6. Direct Cu Plating

Direct plating starts with the nucleation of Cu on a foreign substrate. Cu nucleation on various

foreign substrates, e.g. Ru, RuTa and TaN, has been studied extensively \cite{cc6alex10,

cc6moffat06, cc6nagar10, cc6pat05, cc6alex01, cc6lane03, cc6alex03, cc6alex06lett, cc6alex06,

cc6alex08}. The dependency of nucleus density and island morphology on various conditions,

including applied potential and organic additives have been shown experimentally. A wide range

of numerical models and simulations has been developed to explain the nucleation process

\cite{cc6cao01, cc6hyde03, cc6guo05, cc6emekli10}. Direct plating experiments have also been

performed on the wafer scale \cite{cc6armini11, cc6malhotra04}. Because the substrate is very

resistive, the current density varies with distance to the contact; this phenomenon is sometimes

known as the terminal effect. It has been shown that the uniformity of the direct plating process

depends on various parameters, such as the substrate sheet resistance and the electrolyte

composition. The current distribution on resistive substrates has been calculated using different

methods and the deposition uniformity was studied \cite{cc6matlosz92, cc6desprez98,

cc6takahashi00, cc6drews05}. Willey and West \cite{cc6willey07} included the impact of metal

nucleation and coalescence in the numerical simulation by introducing an assumed and pre-

specified equivalent coalescence thickness. The coalescence thickness has a significant impact

on the macroscopic uniformity of the deposited film and is directly correlated with the nucleus

density, which depends strongly on multiple factors. Due to the nonuniform potential distribution

on a resistive substrate, the coalescence thickness itself may vary with distance from the contact,

and this is one focus of the present study. A multi-scale modeling approach is thus necessary for

the simulation of direct Cu plating.

6.1 Experiment

The direct plating experiments were conducted using a wafer plating tool made in-house. The

plating tool is designed for 200mm wafers. A ring-shaped wet contact was made on the wafer

edge. The contact pins are protected by water-tight sealing which covers a width of about 2mm

on the edge of the wafer. A circular platinum web with the same radius was used as the anode.

During plating the wafer faces down and rotates at a rotation speed of 40 rpm. The plating

chamber is connected to a electrolyte reservoir. The solution is constantly pumped from the

reservoir to the plating chamber during the plating process. 200 mm Si wafers covered with 5nm

PVD Pt layer was used in the plating experiment. The sheet resistance was measured to be about

38 Ω. The plating bath contains 0.27M CuSO4 and 1.8M H2SO4. Experiments were performed

under controlled current condition. The input current was fixed at -1.418A, which gives an

average current density of -5 mA cm-2 on a 200mm wafer. After plating, the wafers were rinsed

immediately using deionised water and dried. Multiple sheet resistance measurements were

performed along the radial direction. Thicknesses of the Cu layer were calculated using the

median values.

6.2 Numerical Model for Nucleation

A cylinder can approximate the tool within which the wafer is plated, with the wafer located at

the base and the counter electrode at the opposite end. A ring-shaped sealed electrode contact is

made at the edge of the wafer. Therefore, the region to be simulated can be reduced to a two-

dimensional, axisymmetric problem. Figure \ref{fc6geom} shows a schematic view of the cross-

69

section and the region simulated. The r-direction is defined along the radial direction of the

wafer and the y-direction along the axis of symmetry of the cylinder. The width of the simulated

region corresponds to the wafer radius r0 and the height d is the distance between the wafer and

the anode.

Figure {fc6geom} A schematic diagram showing the assumed cell geometry. The Cu film

thickness is not drawn to scale to illustrate more clearly the coalescence thickness bcoal and the

position of the Cu front, which is the boundary between a coalesced and non-coalesced Cu

deposit.

This wafer-scale mathematical model contains two coupled domains, the two-dimensional

electrolyte and the one-dimensional wafer. These two domains are coupled through the

electrochemical reaction on the wafer surface. As shown by Figure \ref{fc6geom} and Figure

\ref{fc3geom} in Chapter 3, the wafer-scale problem (the continuum) is very similar to the

modeling problem defined in Chapter 3. The major difference was that, the surface property is

obtained dynamically from multiple micro-scale nucleation simulations. Therefore, the

governing equations on the wafer-scale are also similar to the governing equations define in

Chapter 3. In the electrolyte, the governing equation for the solution potential is:

01 ss

yyrr

rr

{ec6pdesol}

And the boundary conditions are:

dyfor

yforfy

0

0

s

sms

{ec6bndsol}

Where m and s are the electrical potentials on the wafer and in the electrolyte, κ is the

conductivity of the plating bath. The potential difference ( m – s ) = η is the overpotential and

f( m – s ) describes the plating kinetics. In the modeling of wafer-scale plating uniformity on

70

thin Cu seed layers (Chapter 3), the experimentally measured i-η curves are used as a table in the

numerical simulation. However, in order to model the nucleation-coalescence process in the

multi-scale simulation, an explicit analytical expression of f( m – s ) is necessary. Since only

suppressor is included in the plating bath, the Butler-Volmer equation \cite{cc6bard01} provides

a good approximation for f( m – s ). For Cu-on-Cu electrodeposition, the exchange current

density is denoted as i0. The current density is then given by

RTFRTF ca eeifi//

0)(

{ec6butlervolmer}

Where αa and αc are the anodic and cathodic transfer coefficients, F is the Faraday’ constant, R is

the gas constant and T is temperature. The Butler-Volmer equation is also used for the Cu-on-

substrate deposition. However, the exchange current density may be different and is denoted as

i0,sub.

On the wafer surface, a coupling of Ohm’s law and conservation of charge leads to the governing

equation \cite{cc6matlosz92}:

smm1

f

dr

drs

dr

d

r

{ec6pdewafer}

where s is the film conductivity of the wafer surface attributed to both the substrate and the

plated copper. In a wafer-plating tool, the total current is typically controlled instead of the

electric potential. Thus, for the wafer surface, the boundary conditions are:

00

m

m

for5.0

0for0

rrrir

rr

avg

{ec6bndwafer}

where 0.5iavgr0 gives the input current density on the wafer edge, assuming controlled-current

(galvanostatic when constant current) operation.

On the foreign substrate, Cu nuclei form and grow until they coalesce into a continuous Cu film.

The coalescence process happens first on the wafer edge and then moves toward the wafer center.

As illustrated in Figure \ref{fc6geom}, the division between copper islands and coalesced copper

is defined as the position of the copper front, rfront. The equivalent thickness at the moment of

coalescence is defined as the coalescence thickness, bcoal.

In order to predict the position-dependent bcoal for different conditions, a suitable nucleation

model is required. Such a model should catch the essence of the nucleation process but also be

amenable to practical implementation. The following conditions are assumed for the nucleation

model proposed in this work:

- Hemispherical nucleation islands start with the same initial size.

- Islands do not interact with each other because growth rates are much lower than

mass-transfer-controlled rate \cite{cc6cao01, cc6emekli10}.

71

- The nucleation is assumed to be instantaneous with a density given by a Tafel-like

relationship \cite{cc6alex03, cc6alex06lett, cc6alex06, cc6alex08}:

nuc

nuc

/

pre

for0

for)(

RTFeNN

{ec6nuc}

Figure \ref{fc6nuc} illustrates the different deposition paths that are envisioned in the model.

The Cu2+ ions are reduced to Cu0 on both the copper island and the substrate surfaces. Cu0

generated on an existing Cu-island leads to island growth, shown as path 1. When new nuclei

arise, Cu0 generated on the substrate forms new islands through path 2. Otherwise Cu0 adatoms

diffuse to a neighboring island through path 3. Due to the additional energy required to form a

nucleus on a foreign substrate \cite{cc6michev02}, a nucleation overpotential ηnuc is introduced

in Equation \ref{ec6nuc} as a cutoff overpotential. No nucleation happens when the

overpotential is more positive than ηnuc. As a general requirement for direct plating, the

nucleation process should be very fast to allow fast coalescence of the islands. Therefore, the

formation of new islands is assumed to be instantaneous. It is worth noting that Equation 6 is

also applicable to progressive nucleation. The saturated island density of progressive Cu

nucleation was shown to depend exponentially on potential as well \cite{alex06}. However,

when the time to reach a saturation island density is comparable or longer than the time step

describing Cu front propagation, the model needs to be adapted accordingly to reflect the

progressive nucleation process. This exceeds the scope of this study.

Figure {fc6nuc} An illustration of the film growth and nucleation model. Copper deposition can

occur via growth of an existing island, nucleation of a new island, or reduction on the exposed

substrate, following by adatom diffusion to an existing island.

For one position on the wafer, the overpotential changes with time during the plating process. If

the overpotential η at the present time step exceeds the most negative overpotential ηmin this

position has experienced, new islands form on the uncovered surface with a density ΔN = N(η) -

N(ηmin). Thus the total density of islands increases and the island size distribution is recorded.

The islands grow as deposition continues. When the Cu-surface coverage, i.e. the bottom area of

all the hemisphere islands within a unit substrate surface area, equals 1, the Cu film is considered

to be coalesced. The detailed approach is described in the appendix. Once the substrate surface is

covered, it is treated as a continuous Cu film with an equivalent thickness b. Therefore, the

coalescence thickness bcoal is obtained at the moment of coalescence. Because the temporal

72

variation of overpotential at different locations on a wafer can vary, bcoal may also vary with

position.

Due to the length-scale difference between the nucleation and the macroscopic plating problems,

a multi-scale simulation approach is required to couple them. The nucleation simulation is

performed for every mesh node on the electrolyte-electrode interface. The conductivity of the

substrate is updated at each time step for these mesh nodes. Following the approach of Willey

and West \cite{cc6willey07}, when the surface is not yet coalesced, the electronic resistance of

the cathode is assumed to be the sheet resistance of the substrate. When the surface is coalesced,

the equivalent thickness b of the deposited Cu film is used to estimate the film conductivity of

the wafer surface:

)(coalesced for)(1

coalesced)(not for1

)(

frontCu

s

front

s

rrrbR

rrR

rs

{ec6s}

where Rs is the sheet resistance of the non-copper substrate, and σCu is the copper conductivity.

Organic additives, including suppressors such as polyethylene glycol (PEG) are used in the

plating bath both for feature filling and for driving the copper front forward \cite{cc6alex10,

cc6moffat06, cc6nagar10, cc6alex06, cc6emekli10, cc6willey08, cc6willey06, cc6nagar12a,

cc6nagar12b}. The copper deposition rate on copper decreases due to suppressor adsorption onto

the copper surface (inhibition). The rate of this adsorption is fast, as shown by Willey and West

[24], and we thus assume instantaneous adsorption upon formation of an island. Note that also

nucleation is fast and thus the adsorption kinetics and type of suppressor will affect the

nucleation rate and nucleation density \cite{cc6nagar12a, cc6nagar12b}. The morphology of the

islands may also be affected by suppressors. With the Cu-on-Cu deposition being suppressed,

one may expect the hemisphere islands grow into a flat “disk-like” shape. However, the cross-

section SEM images of the Cu islands deposited using plating baths with suppressor showed

hemispherical shapes instead of flat disks \cite{cc6alex11}. We believe that the growth

mechanism is not yet fully understood when the island size is comparable to, or smaller than the

size of the suppressor molecule. Since the in-depth understanding of such a growth process is

outside the scope of this study, we assume that the deposited Cu on an existing island, both from

Cu-on-Cu deposition and Cu-on-substrate deposition, distributes uniformly on the surface of the

island. Thus the islands remain as hemispheres during growth with or without suppressor

additives in the bath. Such an assumption conforms to the experimental observation and

significantly simplifies the modeling approach.

The suppression effect can be accounted for by assuming that the exchange current density is

reduced. One approach to explain this reduction is to assume that the suppressor reduces

available sites where charge transfer can occur. The fractional area blocked by a suppressor, θsup,

can be used as an indicator of suppression strength. The exchange current density for covered

surface is then replaced by:

no0,sup0 1 ii

{ec6supi0}

73

where i0,no is the exchange current density in make-up solution with no additives. The closer (1 -

θsup) is to zero, the stronger is the suppression. For a given suppressor, this value can be

determined experimentally. By measuring the steady-state potential E1 in additive-free solution

and the steady-state potential E2 in solution contains suppressor additive at the same fixed

current on a Cu electrode, (1 - θsup) is calculated by:

RTEEFe

/)(

sup12c1

{ec6supcov}

Note that for the alternative approach where the reduction in j0 is explained by a reduction in

electron tunneling probability due to the lesser approach of cupric ions to the metal interface

with an adsorbed suppressor layer, a similar proportionality as this in Equation \ref{ec6supj0}

may hold. One final key assumption is that the suppression only affects the Cu-on-Cu deposition

rate, with no influence on the Cu-on-substrate rate. For copper deposition on Ru-based substrates,

distinctive suppression peaks in cyclic voltammograms, as well as steps in potential transients

have been attributed to differential inhibition \cite{cc6alex08, cc6nagar12a, cc6nagar12b}.

Equations \ref{ec6butlervolmer} to \ref{ec6nuc} contain several parameters, many of which are

known because Cu electrodeposition has been studied so extensively. The pre-exponential factor

Npre is related to an intrinsic nucleation rate of a given substrate in a given makeup solution. It

can be extracted from experimental data. Details of this model are given in the appendix. In the

present case, the proposed nucleation model was compared to experimental linear-sweep

voltammograms on a RuTa surface, as shown in Figure \ref{fc6nuciv}. Due to the transition

from exposed substrate to suppressor-covered copper surface, a plateau or local minimum is

observed experimentally. At the end of this transition, which is around -0.2V in the curve shown

in Figure \ref{fc6nuciv}, the islands are assumed to be coalesced. The value of Npre is adjusted to

give roughly the same charge transfer before coalescence. A reasonably good match is shown in

the comparison. For other substrates, such as Ru and Pt, the same procedure can be applied to

extract the corresponding values. The divergence after coalescence is probably due to the

necessarily coarse manner in which the fraction of Cu surface is simulated.

Figure {fc6nuciv} Experimental and simulated linear-sweep voltammetry curves on a RuTa

rotating disk electrode. An electrolyte containing 0.27M CuSO4, 1.8M H2SO4, 50 ppm HCl, with

suppressor was used. The scan rate was 25 mV s-1, and a rotation rate of 100rpm was used.

Curve fitting gives Npre ~ 8×1010 cm-2.

74

6.3 Implementation

The simulations couple two length scales, i.e. the continuous-film propagation at the macro scale

and the nucleation simulation at the micro scale. At each time step, the macro scale simulation is

performed first and the potential distribution is obtained. Next, for each node on the interface, the

micro scale nucleation simulation is performed (see the appendix for details) using the potential

values passed down from the macro scale. The deposition thickness and the sheet resistance are

also updated during this process. After the nucleation simulation, the surface coverage is

obtained for each interfacial node and passed back to the wafer scale as electrode boundary

conditions for the propagation simulation at the next time step. The time evolution of the

thickness profile across the wafer is obtained by repeating this process for every time step, and

the copper front propagates from the wafer edge toward the wafer center.

For the propagation simulation, a finite element method (FEM) was used to solve the system

described by Equation \ref{ec6pdesol} and Equation \ref{ec6pdewafer}. The 2nd order triangle

element was used for the electrolyte domain, and a 2nd order one-dimensional segment was used

for the substrate phase

The current distribution on a resistive wafer was solved analytically in reference

\cite{ec6takahashi00} by assuming a perfectly conductive electrolyte and linear j-η kinetic.

Using very low total input current and high electrolyte conductivity to approximate these

assumptions, the initial current distributions for various conditions were solved numerically in

this study and compared with the analytical solutions. The numerical results match with the

reported analytical solutions.

Figure {fc6convergence} The relative error dependency of η(r0) on the number of elements used

in the r-direction. The number of elements along y-direction was fixed to 20.

The potential drop within a resistive wafer surface can be very steep. Therefore, although the

requirement of mesh number along the y-direction is less stringent, it is important to have a

sufficient number of mesh points along the r-direction. This number strongly depends on the

simulation conditions such as substrate resistance. For a fixed total current, the overpotential at

the wafer edge is most sensitive to the number of mesh points. The edge overpotential η(r0), was

thus employed as the criterion to quantify the mesh dependency. For two substrate Rs values, the

75

dependency of η(r0) on the r-direction mesh number is shown in Figure \ref{fc6convergence}.

While coarser meshes would be sufficient for a conductive overpotential distribution, very fine

meshes are required to precisely capture a steep potential drop on a resistive substrate. Therefore,

a nonuniform mesh distribution is employed to distribute more elements near the wafer edge.

The total number of meshes can thus be reduced for faster simulation. For all results reported

here, the working electrode boundary is discretized by 401 elements, and the total degrees-of-

freedom is 33642. This is believed to minimize numerical errors for the reported results.

6.4 Multi-Scale Modeling of Direct Cu Plating

A 200-mm wafer is assumed in the simulations, with an assumed anode-cathode distance d = r0.

At these distances, the current distribution does not depend significantly on the exact position of

the anode \cite{cc6matlosz92}. A high-acid bath is assumed with κ = 40 S m-1, i0,no = 1.5 mA

cm-2. The anodic transfer coefficient αa =1.5 and the cathodic transfer coefficient αc = 0.5 for a

two-electron process are used \cite{cc6mattsson59}. According to data obtained for

galvanostatic copper deposition on RuTa \cite{cc6nagar10, cc6nagar12a, cc6nagar12b}, we

assume that i0,sub is ten times smaller than i0,no. The as-deposited Cu film conductivity, σCu =

5×107 S m-1, is assumed to be smaller than the bulk Cu conductivity \cite{cc6wu04}. The

simulation was performed with ηnuc = -25mV, α = 0.5.

The simulation program is first verified against experimental measurement. The simulated post-

plating thickness profiles are compared with the corresponding experimental measurements in

\ref{fc6simvsexp}, for both 30s plating time and 60s plating time. An overall good match is

shown in these confrontations.

Figure {fc6simvsexp} Thickness profile after plating for (a) 30s and (b) 60 s. 200mm wafer

covered with 5nm Pt, Rs = 38 Ω, iavg = -5 mA cm-2, Npre = 5×1010 cm-2.

Using the developed simulation tool, the effects of different parameters were studied. In order to

demonstrate the dependency of plating result on various parameters, a set of simulation

conditions are devised. The parameters are shown in Table 1. For case 1, an Rs of 20 Ω is chosen

as an average value of various conditions reported in plating experiments on blanket wafers

\cite{cc6armini11}. Compared with the values shown earlier, Npre = 5×109 cm-2 in case 1

76

corresponds to a surface rather difficult for the nucleation of Cu. Keeping all other parameters

listed for case 1 constant, either one or two parameters were changed in cases 2-5, as outlined in

Table 1. The input current was fixed with iavg = -5 mA cm-2 for the plating bath with CuSO4 and

sulfuric acid only. In Case 5 a time-varying current is applied to illustrate the effect of current

ramps on uniformity.

Case Npre

(cm-2)

θsup Rs

(Ω)

iavg

(mA cm-2)

1 5×109 --- 20 -5

2 5×1010 --- 20 -5

3 5×109 0.99 20 -5

4 5×109 0.99 200 -5

5 5×109 0.99 200 -5 to -25

Table 1 Summary of the assumed parameters for cases 1-5. For all the cases, the following

parameters (c.f., equations 1-7) are also used: αa =1.5, αc = 0.5, κ = 40 S m-1, i0,no = 1.5 mA cm-2,

σCu = 5×107 S m-1, ηnuc = -25mV, α = 0.5

The current density and thickness profile of deposited copper for case 1 are shown in Fig. 5 for

various deposition times. Due to the terminal effect, most of the copper is deposited at the wafer

edge. The thickness profiles are nonuniform. Since most of the current flows from the anode to

the copper-covered wafer surface, the potential drop from the anode to the wafer surface is

higher near the copper-covered surface than the exposed substrate. Therefore, a current peak can

be observed at the Cu front in Figure \ref{fc6simtd}a. As the copper front propagates toward the

wafer center, the current distribution becomes more uniform due to the increasing copper

coverage and film conductivity. The current density peak at the copper front gradually disappears.

Even after 90s, the wafer is not completely covered by a continuous copper film.

77

Figure {fc6simtd} (a) Normalized current density and (b) deposition thickness, b, as a function

of normalized radial position for case 1 after different deposition times. The time-average plating

current density iavg = -5mA cm-2.

The corresponding micro-scale nucleation results of Case 1 were also obtained from the

simulation. The coalescence thicknesses are predicted by the nucleation simulation for different

radial positions, as shown in Figure \ref{fc6cmp}c. The coalescence thickness varies

significantly with radial position in this case. Due to the terminal effect, the potential at the

copper front drops as the front propagates toward the wafer center. According to the nucleation

model, the island density decreases at the front as it propagates toward wafer center. As a result,

the corresponding coalescence thickness increases. This increase of coalescence thickness in turn

slows down the copper front propagation, as shown in Figure \ref{fc6cmp}b.

Figure {fc6cmp} (a) Normalized deposition thickness as a function of normalized radial position

with 0 the wafer center and 1 the wafer edge (b) normalized front position (the boundary

between coalesced and non-coalesced film) as a function of time, and (c) coalescence thickness

as a function of radial position. Results in figures (a), (b) and (c) are shown for cases 1, 2 and 3

in Table 1. Results in figures (a) and (c) are shown for situation after 90s of deposition.

78

The substrate and the solution make-up can significantly change the nucleus density, keeping

other parameters the same. For example, an appropriate pretreatment step can significantly

improve the nucleus density \cite{cc6alex10, cc6alex08}. Such a difference in the nucleus

density is incorporated into Npre in the nucleation model. A larger Npre implies a higher island

density at the same overpotential, thus faster coalescence. Case 2 shows an order of magnitude

increases in Npre while the other parameters remain unchanged compared to Case 1. The results

are shown in Figure \ref{fc6cmp}. A higher Npre results in a lower coalescence thickness. With

the same input current, the copper front propagates much faster, and the thickness profile is more

uniform in case 2.

Figure {fc6simnuc} Island size histograms at points A (distance rA=0.9r0 from wafer center) and

B (distance rB=0.6r0 from wafer center) for cases (a) 3, (b) 4 and (c) 5 in Table 1 (r0=200mm).

The corresponding overpotential curves as a function of time are also shown.

Due to the terminal effect, the magnitude of the overpotential drops from the wafer edge to the

wafer center. It has been shown that for Rs values above 15Ω the overpotential drops more than

90% within a centimeter from the edge \cite{cc6pat05}. As the nucleation overpotential defines

a certain cut-off for copper deposition, most of the deposition current is initially distributed near

the wafer edge. Suppressor additives selectively block the copper surface and reduce the

deposition rate on copper but not on the substrate (hence the peak in the linear sweep

voltammogram of Figure \ref{fc6nuciv}. As the coverage with copper increases rapidly with

79

time (especially for high Npre), the magnitude of the overpotential must be increased to deliver

the specified total current. Consequently, the coalescence thickness is reduced and the thickness

uniformity is improved. Case 3 uses the same parameters as case 1 but a suppressor is added.

The value of θsup is set to 0.99 according to measurements for PEG in high-acid Cu bath reported

in reference \cite{cc6nagar10}. The results are shown in Figure \ref{fc6cmp} and Figure

\ref{fc6simnuc}a. A significant improvement is shown when compared with other cases. With a

much lower coalescence thickness, the copper front propagates faster and gives a more uniform

thickness profile. After 90s of plating, the front reaches the wafer center, and the entire wafer is

covered by a continuous copper film.

For case 3, the micro-scale nucleation results are shown in detail in Figure \ref{fc6simnuc}a.

The predicted island size distributions at two different positions on the wafer are compared. The

point A is closer to the wafer edge with rA = 0.9r0, and the point B is closer to the wafer center

with rB = 0.6r0. While the suppressor improves the thickness uniformity, a bi-modal distribution

is shown in the island-size histogram. Such a phenomenon has already been shown in

experiments \cite{cc6alex08}. Because the potential drop on the substrate (near the Cu front) is

not steep enough, there is a current “tail” which extends into the uncovered region toward the

wafer center. This effect is shown in the overpotential curves in Figure \ref{fc6simnuc}a. At the

beginning of the plating process, the overpotential is very negative. If the substrate is not

resistive enough, even a point close to the wafer center may sense an overpotential sufficiently

negative to start nucleation. Before the front reaches this point, these islands formed at the

beginning may have already grown very large, leading to the bi-modal size distribution. Since it

takes longer time for the front to arrive, for the point closer to the wafer center, the initial islands

grow even larger and the size distribution is broader. Such a phenomenon is undesirable for the

direct plating application as it results in a rough film and consequently defects on patterned

wafers.

Case 4 keeps the other parameters used in case 3, but with a substrate ten times more resistive

with Rs = 200 Ω. Such a resistance corresponds to about 2 nm RuTa produced by physical vapor

deposition (PVD) \cite{cc6nagar10, cc6malhotra04}. Figure \ref{fc6simnuc}b shows the nucleus

size histogram at different positions. The differences are obvious when compared with case 3

shown in Figure \ref{fc6simnuc}a. While the total nucleus density is increased for both positions

in case 4, the density of large islands is clearly reduced and the majority of the islands are small.

A very resistive substrate results in an extremely steep potential drop on the uncovered substrate.

As shown in the corresponding overpotential curves in Figure \ref{fc6simnuc}b, with a more

resistive substrate, the potential decreases steeper. The initial overpotential of a point near the

wafer center is more positive than the nucleation overpotential. Therefore, nucleation is only

happening within a narrow region near the Cu front. For the point closer to the wafer center,

nucleation only starts when the Cu front approaches. The bi-modal distribution is thus reduced

by a more resistive substrate and the nucleus density is improved.

The time-dependent front position and the coalescence thickness of case 4 are compared with

case 3 in Figure \ref{fc6cmp2}. Although a highly resistive substrate reduces the coalescence

thickness, it slows down the Cu front propagation. The wafer is not completely covered by

coalesced copper after a 90s plating time. For a point close to the wafer center, it takes longer for

the copper front to arrive. The large islands in the bi-modal distribution have more time to grow

80

before the front arrives. Such factors undermine the benefit gained from a more resistive

substrate.

Figure {fc6cmp2} (a) Normalized deposition thickness as a function of normalized radial

position for cases 3, 4, and 5 in Table 1 (b) normalized front position (the boundary between

coalesced and non-coalesced film) as a function of time, and (c) coalescence thickness as a

function of normalized radial position. Results in figures (a) and (c) are shown for situation after

90s (cases 3 and 4) or 30s (case 5) of deposition. r/ro is 1 at the edge and 0 at the center of wafer.

The input current can be ramped to overcome these difficulties \cite{cc6pat05, cc6alex08}. In a

ramping-current plating process, the total input current is changed during the plating process.

Case 5 starts from the same initial average current density of -5 mA cm-2 but decreases linearly

to -25 mA cm-2 in a 30s plating time, giving a time-average plating current density of -15 mA

cm-2. The total charge was kept the same for all cases. Other parameters remain the same as in

Case 4. The results are shown in Figure \ref{fc6cmp2}. The coalescence thickness is maintained

low across the entire wafer. The copper front propagates faster and covers the entire wafer within

30s of plating time. The corresponding island size distribution at different positions is shown in

Figure \ref{fc6simnuc}c. A comparison with case 4 shows further improved nucleus size

distribution. The corresponding overpotential curves are significantly steeper when compared

with previous cases. As the Cu front propagates faster, the time difference from the onset of

81

nucleation to the coalescence of islands is shortened. For each position, the growth of islands is

confined within a short time. Therefore, the islands coalesce at small sizes, resulting small

coalescence thickness.

Figure {fc6goodtd} (a) Normalized current density and (b) deposition thickness, b, as a function

of normalized radial position for case 5 after different deposition times. The time-average plating

current density iavg = -15mA cm-2.

Figure \ref{fc6goodtd} shows the plating current and deposition thickness after different plating

times for case 5. The differences are obvious when compared with the same set of curves for

case 1, shown in Fig. 5. A sharp current peak can be observed around the Cu front. The plating

current on the rest of the wafer is kept low due to the suppression on Cu surface (on the right of

the peak) or the steep potential drop in the highly resistive substrate (on the left of the peak). The

area of Cu-covered surface increases as the Cu front propagates toward the wafer center.

Consequently, the ratio between Cu-on-Cu deposition and Cu-on-substrate deposition increases.

The current ramp helps to maintain a high current at the propagating Cu front. Therefore, the

nucleus size and nucleus density are kept approximately unchanged across the entire wafer. As a

result, a more uniform coalescence thickness can be achieved across the entire wafer. Both the

nucleus uniformity and the propagation rate are significantly improved with ramping current. In

practice, the ramp would need to be designed such that, the current density at the Cu front is high

for low coalescence thickness while the copper-on-copper current density is maintained constant

to allow void-free filling of feature.

6.5 Conclusions

82

A multi-scale modeling approach was developed for direct copper plating onto resistive

substrates. The copper propagation on the wafer surface, as well as the nucleation at every mesh

node, was simulated. It has been shown that the coalescence thickness may vary significantly

with the distance from the wafer edge. The simulation tool was applied to study different factors

involved in the plating process, including facility to nucleate on the substrate, suppressor

additives, substrate conductivity and input current. The collective effects of these factors were

investigated. The plating conditions were then adjusted for improved result. As none of the

parameters discussed can be modified without a limit, a tradeoff among them is necessary for

better direct plating.

References

[cc6armini11] S. Armini, S. Demuynck, Z. El-Mekki, J. Swerts, M. Nagar, A. Radisic, N.

Heylen, G. Beyer, L. Leunissen, P.M. Vereecken, Direct copper electrochemical deposition on

Ru-based substrates for advanced interconnects target 30 nm and 1/2 pitch lines: From coupon to

full-wafer experiments, ECS Trans. 35, 117(2011).

[cc6alex10] A. Radisic, M. Nagar, K. Strubbe, S. Armini, Z. El-Mekki, H. Volders, W.

Ruythooren, P.M. Vereecken, Copper Plating on Resistive Substrates, Diffusion Barrier and

Alternative Seed Layers, ECS Trans. 25, 175(2010).

[cc6moffat06] T.P. Moffat, M. Walker, P.J. Chen, J.E. Bonevich, W.F. Egelhoff, L. Richter, C.

Witt, T. Aaltonen, M. Ritala, M. Leskelä, D. Josell, Electrodeposition of Cu on Ru barrier layers

for damascene processing, J. Electrochem. Soc. 153, C37(2006).

[cc6nagar10] M. Nagar, P.M. Vereecken, A. Radisic, K. Strubbe, Tailoring copper island density

for copper plating on a RuTa substrate, ECS Trans. 28, 9(2010).

[cc6pat05] P. Andricacos, H. Deligianni, W.J. Horkans, K.T. Kwietniak, M. Lane, S.G. Malhotra,

F.R. McFeely, C. Murray, K.P. Rodbell, P.M. Vereecken, U.S. Patent Application Pub. No.

US20050199502 A1.

[cc6alex01] A. Radisic, J.G. Long, P.M. Hoffmann, P.C. Searson, Nucleation and growth of

copper on TiN from pyrophosphate solution, J. Electrochem. Soc. 148, C41(2001).

[cc6lane03] M.W. Lane, C.E. Murray, F.R. McFeely, P.M. Vereecken, R. Rosenberg, Liner

materials for direct electrodeposition of Cu, Appl. Phys. Lett. 83, 2330(2003).

[cc6alex03] A. Radisic, Y. Cao, P. Taephaisitphongse, A.C. West, P.C. Searson, Direct copper

electrodeposition on TaN barrier layers, J. Electrochem. Soc. 150, C362(2003).

[cc6alex06lett] A. Radisic, P.M. Vereecken, J.B. Hannon, P.C. Searson, F.M. Ross, Quantifying

electrochemical nucleation and growth of nanoscale clusters using real-time kinetic data, Nano

Lett. 6, 238(2006).

[cc6alex06] A. Radisic, P.M. Vereecken, P.C. Searson, F.M. Ross, The morphology and

nucleation kinetics of copper islands during electrodeposition, Surf. Sci. 600, 1817(2006).

83

[cc6alex08] A. Radisic, P. Boelen, A. Rosenfeld, J.L. Hernandez, G.P. Beyer, P.M. Vereecken,

Electrochemical Nucleation and Growth of Copper on Resistive Substrates, ECS Trans. 11,

25(2008).

[cc6cao01] Y. Cao, P.C. Searson, A.C. West, Direct numerical simulation of nucleation and

three-dimensional, diffusion-controlled growth, J. Electrochem. Soc. 148, C376(2001).

[cc6hyde0] M.E. Hyde, R.G. Compton, A review of the analysis of multiple nucleation with

diffusion controlled growth, J. Electroanal. Chem. 549, 1(2003).

[cc6guo05] L. Guo, A. Radisic, P.C. Searson, Kinetic Monte Carlo simulations of nucleation and

growth in electrodeposition, J. Phys. Chem. B 109, 24008(2005).

[cc6emekli10] U. Emekli, A.C. West, Simulation of the Effect of Additives on Electrochemical

Nucleation, J. Electrochem. Soc. 157, D479(2010).

[cc6malhotra04] S.G. Malhotra, D. Canaperi, S. Chiras, L. Deligianni, G. Johnson, M. Krishnan,

M. Lane, F. McFeely, C. Murray, S. Ponoth, A. Simon, T. Spooner, P. Vereecken, J. Yurkas,

Conference Proceedings of AMC 2004, 525.

[cc6matlosz92] M. Matlosz, P.H. Vallotton, A.C. West, D. Landolt, Nonuniform current

distribution and thickness during electrodeposition onto resistive substrates, J. Electrochem. Soc.

139, 752(1992).

[cc6desprez98] P. Desprez, M. Matlosz, J.D.L. Yang, A.C. West, Estimation of Front Velocity in

Electrodeposition onto Highly Resistive Substrates, J. Electrochem. Soc. 145, 165(1998).

[cc6takahashi00] K.M. Takahashi, Electroplating copper onto resistive barrier films, J.

Electrochem. Soc. 147, 1414(2000).

[cc6drews05] T.O. Drews, S. Krishnan, Jr.J.C. Alameda, D. Gannon, R.D. Braatz, R.C. Alkire,

Multiscale simulations of copper electrodeposition onto a resistive substrate, IBM J. Res. & Dev.

49, 49(2005).

[cc6willey07] M.J. Willey, A.C. West, Nucleation on resistive substrates: Analysis of effect on

film uniformity, Electrochim. Acta 52, 6484(2007).

[cc6emekli10] U. Emekli, A.C. West, Electrochemical Nucleation of Copper: The Effect of Poly

(ethylene glycol), J. Electrochem. Soc. 157, D257(2010).

[cc6michev02] A. Michev, Electrocrystallization: Fundamentals of Nucleation and Growth,

Kluwer Academic Publishers, Boston/Dordrecht/London, 2002.

[cc6willey08] M.J. Willey, U. Emekli, A.C. West, Uniformity effects when electrodepositing Cu

onto resistive substrates in the presence of organic additives, J. Electrochem. Soc. 155,

D302(2008).

[cc6willey06] M.J. Willey, A.C. West, Microfluidic studies of adsorption and desorption of

polyethylene glycol during copper electrodeposition, J. Electrochem. Soc. 153, C728(2006).

84

[cc6nagar12a] M. Nagar, P.M. Vereecken, K. Strubbe, A. Radisic, Nucleation and Growth of

Copper on Ru-Based Substrates: I. The Effect of the Inorganic Components, ECS Trans. 41,

75(2012).

[cc6nagar12b] M. Nagar, A. Radisic, K. Strubbe, P.M. Vereecken, Nucleation and Growth of

Copper on Ru-Based Substrates: II. The Effect of the Suppressor Additive, ECS Trans. 41,

99(2012).

[cc6mattsson59] E. Mattsson, J.O'M. Bockris, Galvanostatic studies of the kinetics of deposition

and dissolution in the copper+ copper sulphate system, Trans. Faraday Soc. 55, 1586(1959).

[cc6wu04] W. Wu, S.H. Brongersma, M. Van Hove, K. Maex, Influence of surface and grain-

boundary scattering on the resistivity of copper in reduced dimensions, Appl. Phys. Lett. 84,

2838(2004).

[cc6bard01] A. Bard, L. Faulkner, "Electrochemical Methods. Fundamentals and Applications".

2nd edition, John Wiley and Sons, Inc. (2001).

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7. Conclusions, Achievements and Future Work

The semiconductor industry has been constantly evolving toward two opposite ends regarding

the length scale. On the one hand, the everlasting craving for lower manufacturing cost is a

strong driving force to go to larger wafers due to the higher processing throughput on larger

wafers. The past few decades saw a quick shifting of Si wafer diameter from 150 mm to 300 mm,

with 450 mm projected for the near future. On the other hand, continuation of the relentless

scaling-down of IC has pushed the sizes of both the transistors and their interconnects to the

nanometer regime. The movement toward both of these two extreme ends, the “scaling-up” to

larger wafers and the “scaling-down” to smaller devices, pose numerous challenges to the

semiconductor industry and involve every step of the entire IC fabrication flow. As a

consequence of the extreme complexity and high cost accompanied, utilization of advanced

numerical modeling tools becomes increasingly important for timely research and development.

For the metallization of BEOL interconnects alone, numerical modeling may provide invaluable

understanding to the challenges foreseeable on both ends of the length scales. The scaling-up of

wafer size raises various uniformity issues as discussed in Chapter 3 and Chapter 6. The

modeling methodology developed can be readily applied in the prediction of these uniformity

issues on a larger wafer. Moreover, the capability of simulating various geometries, as

demonstrated by the modeling of segmented anodes, may help facilitate the design of better

plating tools. In order to contend with the challenges brought by the scaling-down of feature size,

new metallization technologies other than Cu electroplating has been proposed. These alternative

metallization methods, such as the electroless deposition of Cu and alternative metals, are under

active study and showed great promise. Although this thesis only deals with the metallization

using Cu electroplating, the numerical methods and the modeling methodology employed are not

limited to Cu electroplating only. The model and the simulation framework introduced in

Chapter 4 are also applicable for the filling of recessed features using these novel techniques.

Numerical modeling can surely find its application in these emerging technologies by revealing

the underlying mechanisms and promptly predicting the outcomes under various conditions.

Although this thesis presents a rich collection of the modeling of Cu electrodeposition for

advanced interconnects, they are, however, only a fraction of the topics in BEOL interconnect

that may benefit from numerical modeling. It would be redundant to list all the possible aspects

worthy of future study here. One important element worth noting, however, is the necessity of

multi-scale simulation in future modeling studies. Such an attempt has already been made in

Chapter 6 of this thesis. The atomic-scale nucleation process was coupled with the wafer-scale

uniformity problem. The outcome is a multi-scale modeling approach that takes the

interdependency between multiple mechanisms into account. Other topics discussed in this thesis

may also benefit significantly from a similar multi-scale approach. For example, the coupling of

wafer-scale uniformity simulation (Chapter 3) and feature-filling simulation (Chapter 4) may

enable the study of wafer-scale variation of feature-filling behavior. The coupling of feature-

filling simulation (Chapter 4) and stochastic simulation of additive (Chapter 5) would render the

simulation much more realistic by following the transients of suppressor adsorption / desorption

on the TSV surface. Implementation of the simulation program has been a major obstacle of the

multi-scale modeling approach. Nevertheless, such a coupling would immensely expand the

scope of current modeling activities. It is imperative that future modeling programs are capable

of coupling multiple mechanisms across different length scales.

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Appendix

I. Nomenclature

II. Publications

Journal Articles:

1. Liu Yang, Alex Radisic, Johan Deconinck, Philippe Vereecken, “Modeling the bottom-up filling of through-

silicon vias through suppressor adsorption/desorption mechanism”, Journal of the Electrochemical Society, 160,

D3051(2013)

2. Liu Yang, Alex Radisic, Johan Deconinck, Alan West, Philippe Vereecken, “Wafer-scale Cu plating uniformity

on thin Cu seed layers”, Electrochimica Acta, 104, 242(2013)

3. Liu Yang, Alex Radisic, Magi Nagar, Johan Deconinck, Philippe Vereecken, Alan West, “Multi-scale modeling

of direct copper plating on resistive non-copper substrates”, Electrochimica Acta, 78, 524(2012)

International Conferences:

1. Liu Yang, Alex Radisic, Johan Deconinck, Philippe Vereecken, “Copper plating uniformity on resistive

substrates with segmented anode”, 224th ECS Meeting, 2013 San Francisco, CA, U.S.

2. Liu Yang, Alex Radisic, Johan Deconinck, Philippe Vereecken, “Bottom-up filling of through-silicon vias due to

suppressor desorption”, 224th ECS Meeting, 2013 San Francisco, CA, U.S.

3. Liu Yang, Wouter Marchal, Alex Radisic, Johan Deconinck, Philippe Vereecken, “Role of oxygen and cuprous

ions in copper electroplating”, Materials for Advanced Metallization 2013, Leuven, Belgium

4. Liu Yang, Alex Radisic, Magi Nagar, Johan Deconinck, Philippe Vereecken, Alan West, “Multi-scale modeling

of direct copper plating on resistive non-copper substrates”, 222nd ECS Meeting, 2012 Honolulu, Hawaiian

Contribution to Publications:

1. Alex Radisic, Liu Yang, Christel Drijbooms, Hugo Bender, “The Bottom-Up Copper Fill of Ø5µm × 40µm Vias

Using 2-Component Model Chemistry”, ECS Transaction, 41(43) 53(2011)