Efficient Alternate Test Generation for RF Transceiver ... Efficient Alternate Test Generation for RF

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  • Efficient Alternate Test Generation for RF Transceiver Architectures

    A Thesis Presented to

    The Academic Faculty

    By

    Achintya Halder

    In Partial Fulfillment of the Requirements for the Degree

    Doctor of Philosophy in the School of Electrical and Computer Engineering

    Georgia Institute of Technology

    August 2006

    Copyright 2006 by Achintya Halder

  • Efficient Alternate Test Generation for

    RF Transceiver Architectures

    Approved by: Dr. Abhijit Chatterjee, Advisor School of Electrical and Computer Engineering Georgia Institute of Technology

    Dr. John Papapolymerou School of Electrical and Computer Engineering Georgia Institute of Technology

    Dr. Madhavan Swaminathan School of Electrical and Computer Engineering Georgia Institute of Technology

    Dr. Shamkant Navathe College of Computing Georgia Institute of Technology

    Dr. David Keezer School of Electrical and Computer Engineering Georgia Institute of Technology

    Date approved: April 27, 2006

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    ACKNOWLEDGMENTS

    I would like to convey my sincere gratitude to Prof. Abhijit Chatterjee for his invaluable guidance throughout this research. His deep insight and versatile ideas provided an excellent ground for research and learning. I will always remain indebted to him for his constant encouragement and support that helped me to complete this thesis. I would also like to thank the members of my dissertation committee, Prof. Madhavan Swaminathan, Prof. David Keezer, Prof. John Papapolymerou, and Prof. Shamkant Navathe for providing insightful feedback on my research. I am greatly indebted to Dr. Soumendu Bhattacharya, for his time and selfless effort in taking care of the final examination related logistics on my behalf. Thanks are also due to Dr. P. N. Variyam, Dr. S. Chakraborty, and J. Ridley (Texas Instruments); G. Srinivasan, S. S. Akbay, and D. H. Han (Georgia Tech), for their valuable suggestions on various aspects of my work. I am also grateful to E. Wirtz and J. Lucas (National Semiconductor) for their support in my visiting Georgia Tech for the final presentation of my research. Above all, I am thankful to the sacrifice and encouragement from my parents, which made the pursuit of my doctoral study possible.

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    TABLE OF CONTENTS ACKNOWLEDGMENTS............................................................................................... iii

    LIST OF TABLES ......................................................................................................... viii

    LIST OF FIGURES ......................................................................................................... ix

    LIST OF ABBREVIATIONS ..................................................................................... xviii

    SUMMARY .................................................................................................................... xxi

    CHAPTER 1: INTRODUCTION.................................................................................... 1 1.1. Production Testing of Wireless Devices and Systems .................................. 2 1.2. Cost of Production Testing for Wireless Devices and Systems .................... 4 1.3. Previous Work ............................................................................................... 7 1.4. Alternate Testing: Basic Concepts .............................................................. 10 1.5. Overview of Wireless Transceiver Architectures........................................ 12 1.6. Research Contributions ............................................................................... 17 References .......................................................................................................... 19

    CHAPTER 2: SPECFICATION TESTING OF BASEBAND AND IF ANALOG

    CIRCUITS........................................................................................................ 25 2.1. Previous Work ............................................................................................. 25

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    2.2. Basic Concepts of Alternate Testing ........................................................... 27 2.3. Test Architecture ......................................................................................... 30 2.4. Test Generation Approach and Algorithms................................................. 36 2.5. Experimental Results................................................................................... 45 2.6. Limitations and Trade-offs .......................................................................... 53 References .......................................................................................................... 54

    CHAPTER 3: SPECIFICATION TESTING OF WIRELESS RECEIVER FRONT-

    ENDS................................................................................................................. 57 3.1. Specification Testing Problems for RF Front-ends ..................................... 57 3.2. Basic Concepts ............................................................................................ 59 3.3. Test Architecture and Test Approach.......................................................... 61 3.4. System-Level Behavioral Simulation for Test Generation ......................... 62 3.5. Test Generation and Test Validation........................................................... 72 3.6. Experimental Results................................................................................... 77 References .......................................................................................................... 81

    CHAPTER 4: SYSTEM-LEVEL SPECIFICATION TESTING OF WIRELESS

    RECEIVERS.................................................................................................... 83 4.1. End-to-end Production Testing of RF Receivers......................................... 83 4.2. Background of BER and EVM Testing for RF Receivers .......................... 86 4.3. Alternate Tests for BER and EVM Testing................................................. 93 4.4. Test Architecture ......................................................................................... 97 4.5. Test Generation ........................................................................................... 98

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    4.6. Experimental Results................................................................................. 103 References ........................................................................................................ 129

    CHAPTER 5: SYSTEM-LEVEL SPECIFICATION TESTING OF WIRELESS

    TRANSMITTERS ......................................................................................... 133 5.1. Production Testing Problems for RF Transmitters.................................... 133 5.2. System Specifications of a Wireless Transmitter ...................................... 135 5.3. Basic Concepts .......................................................................................... 140 5.4. Test Architecture ....................................................................................... 141 5.5. Test Stimulus Selection ............................................................................. 142 5.6. Experimental Results................................................................................. 146 References ........................................................................................................ 161

    CHAPTER 6: SYSTEM-LEVEL LOOP-BACK TESTING APPROACH FOR

    WIRELESS TRANSCEIVERS .................................................................... 163 6.1. Previous Work in Loop-back RF Testing.................................................. 163 6.2. Alternate Testing using Loop-back Stimuli .............................................. 165 6.3. Test Architecture and Test Approach........................................................ 167 6.4. Behavioral Modeling of the System .......................................................... 168 6.5. System-Level Test Generation .................................................................. 170 6.6. Experimental Results................................................................................. 172 References ........................................................................................................ 181

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    APPENDIX A: DEVICE INTERFACE BOARD DIAGNOSTIC TECHNIQUE

    USING STRAY CAPACITANCE MEASUREMENT.............................. 183

    A.1. Stray Capacitance on Device Interface Boards........................................ 183

    A.2. Motivation................................................................................................ 185

    A.3. Theoretical Analysis ................................................................................ 185

    A.4. Experimental Setup.................................................................................. 188

    A.5. Non-Idealities........................................................................................... 192

    A.6. Measurement Results ............................................................................... 195

    A.7. Applications ............................................................................................. 201

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    LIST OF TABLES

    Table 2.1. Dynamic ranges and quantization steps wi