Dynamically Re-configurable Processors

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    Dynamically ReconfigurableProcessors

    Department of Electrical and ComputerEngineering

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    Introduction

    Classification

    Examples

    Summary

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    Introduction

    What is runtime reconfiguration ?

    Runtime : Processor is running and executing programs

    Reconfigurations : Processor can change its design/instructions

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    Introduction

    How are Reconfigurable Processors built?Recipe 1

    Take Field Programmable Gate Arrays (FPGAs)

    Take a conventional processor Combine both

    Through PCI-X,Memory,Co-processor

    Interface,..Recipe 2

    Use a soft-core Processor on a FPGA

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    Introduction : What is a FPGA ?

    Hardware to implement one or many logic functions

    Logic of functions can be changed after production

    Consist of Configurable Logic Blocks

    Configuration is loaded with Bit files

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    Introduction : Reconfiguration

    Special feature of FPGAs (Xilinx : Partial Reconfiguration)

    Parts of FPGA can be changed while other parts are computing

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    Introduction : A Very SimpleProcessor

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    Classification : What Kind ofarchitecture exist ?

    Functional Unit based

    Different kinds of Fus

    ALU, Multiplier,...

    No direct memory access

    Mostly no internal state

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    Classification : Co-processor Based

    Co-processor interface used (ARM based)

    RAM interface used (x86 based)

    Often internal state available

    Version:2 Direct memory access

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    Classification : Soft/Hardcore based

    Hardcore based : Everything till now

    Soft-core based : Processor configured onto FPGA

    simpler adaption of core

    flexible reconfiguration

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    Classification : Multicore

    many heterogeneous cores

    Possible processor cores build out of arepertory of components different processor types(ARM, x86, Mips, . . . )

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    Example:Intel Atom+Altera FPGA

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    Example : Convey HC1

    memory space is shared between host and FPGAs c interface to communicate with application engines FPGA configuration file is loaded dynamically no scheduling of application engines

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    Example : Reconfigurable Minimips

    RM can be ALU, MUL, F-ALU, F-MUL, Register

    compiler support is needed

    special reconfiguration instruction

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    Summery

    FPGAs are used as configurable hardware

    different types of runtime reconfigurableprocessors

    Functional Unit , Co-processor,Soft-/Hardcore and

    Single-/Multicore based

    example architectures: Atom/Altera, HC1,miniMips,

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    Thank You