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Design of RF CMOS Low Design of RF CMOS Low Noise Amplifiers Using a Noise Amplifiers Using a Current Based MOSFET Current Based MOSFET
ModelModel
Virgínia Helena Varotto Baroncini
Oscar da Costa Gouveia Filho
OUTLINEOUTLINE
1. Introduction
2. MOSFET Model
3. High-Frequency Noise Model
4. LNA Analysis
5. LNA Design Example
6. Conclusion
IntroductionIntroduction
• Submicrometer CMOS technology allows the
integration of RF circuits.
• Low voltage and low power operation → moderate
inversion
• Model valid from weak to strong inversion
MOSFET MODEL MOSFET MODEL
S
D
B
G I(VG,VS)
I(VG,VD)
DGSGRFD V,VIV,VIIII
T'ox
'DIS
2
T'ox
'DIS
2T'
oxRF nC
Q2
nC
Q
L
W
2CμnI
IF= forward current
IR= reverse current
Normalized currentsNormalized currents
tox
DISrf Cn
Qi
)()( 11
S
Frf I
Ii )(where are the normalized currents
LW
CnI toxS 2
..2
' and is the normalization current
Operation Regions of the MOS transistorOperation Regions of the MOS transistor
ir
if 10-3 10-11 100 102 103
10-3
10-1
100
102
103
forward saturationif > 100 ir
reverse saturation ir > 100 if
stro
ng
wea
k
mod
erat
e
strong
moderate
weak
triode
Small signal parametersSmall signal parameters
112
ft
sms i
Ig
n
gg ms
m
211
2111
32
f
ffoxgs
i
iiCWLC
gsoxgb CCWLn
nC
1
Transconductances
Capacitances
High- Frequency Noise High- Frequency Noise ModelModel
SvRg Sig Sid
Rg
Cgb Cgs
gmsVsbgmVgb
B B
S S
GD
Channel Thermal NoiseChannel Thermal Noise
10-3 10-2 10-1 100 101 102 10310-29
10-28
10-27
10-26
10-25
10-24
10-23
if
Sid (
A2 /
Hz)
11i1
32
1i11
4kTgS ff
msid2I
id LQ4kTμ
S
Induced Gate NoiseInduced Gate Noise
ms
2gs
ig 5g
ωCδkTS 4
4
f
2
ff
T0
'ox
32
ig1i1
2i11i1
nμ
CLWωδkT
458
S
10-3
10-2
10-1
100
101
102
103
10-51
10-50
10-49
10-48
10-47
10-46
10-45
Sig
(A2/H
z)
inversion level
W /L=1000W /L=2000W /L=3000W /L=4000W /L=5000
LNA AnalysisLNA Analysis
LS
Lg
Ld
Vin
Vb
VDD
M1
M2
Cascode LNA with inductive source degeneration
Impedance MatchingImpedance Matching
Lg
Ls
Cgb Cgs
gmbVsb gmsVgs
Zin Z1
mgss
gsmgss
gCL
CjgCLZ
2
21
1
11
Z1 can be viewed as the parallel of a resistor R with the capacitance Cgs
gsgb20
g CCω1
L
gs
gbgs
T
ss C
CC
ω
RL
Simplified small signal model for the LNA
222
22
222 1
1
1 CR
CLCRLj
CRR
Z ggin
matching is achieved simply by making the real part of Zin equal to the source resistance and its imaginary part equal to zero.
Noise FigureNoise Figure
sourcethetoduenoiseoutputTotalnoiseoutputTotal
F
LNA small-signal model for noise calculations
Definition
The noise figure can be expressed as a function of if
500 1000 1500 2000 2500 3000 3500 4000 4500 50001
1.5
2
2.5
3
3.5
4N
oise
Fig
ure
(dB
)
W/L
if=15if=20if=25if=30if=35
Noise figure versus W/L for several inversion levels at 2.5 GHz
LNA Design ExampleLNA Design Example
Resonance frequency 2,5 GHz
Supply voltage 2,5 V
Length 0,35 m
Source resistance 50 Noise Figure < 2dB
LNA Design Parameters
1. Choice of the inversion level
if=35
ProcedureProcedure
2. Ls for impedance matching
2111
2111211143
2
22
ff
fff
TSs
ii
iiiLn
nRL
3. Transistor width for minimum noise figure
500 1000 1500 2000 2500 3000 3500 4000 4500 50001
1.5
2
2.5
3
3.5
4
Noi
se F
igur
e (d
B)
W/L
if=15if=20if=25if=30if=35
Noise figure versus W/L for several inversion levels at 2.5 GHz
4. Lg to satisfy the resonance frequency
2'2
0
2
111321112
113
fffox
fg
iniiWLC
inL
5. Ld to adjust the gain and the output resonance frequency
LNA Design ResultsLNA Design Results
W/L W ID Rs Ls Lg Ld
1500 525 m 4,1 mA 50 0,7 nH 7,6 nH 2,5 nH
Ls
Lg
Ld
RS CL
RLd
M1
M2
Vout
Vin +Vbias
VDD
Simulation resultsSimulation results
Input impedance
Noise Figure
ConclusionsConclusions
The main advantage of this methodology is that is valid in all regions of the operation of the MOS transistors;
It is possible to move the operation point of RF devices from strong inversion to moderate inversion taking advantage of higher gm/ID ratio, without degrading the noise figure;