Design and VLSI Implementation of High Performance Face ... 1 Design and VLSI Implementation of High

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  • 1

    Design and VLSI Implementation of High Performance

    Face Recognition System

    A report submitted to department of Electrical & Electronic

    Engineering, BRAC University in partial fulfillment of the

    requirements for thesis work.

    Priyanka Das Dewan - 10221078

    Tasnim Harun Shamma – 09221032

    Afifa Abbas - 10221073

    Raktim Kumar Mondol - 09221232

    April 2013

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    Declaration

    We do hereby declare that the thesis titled ―Design and VLSI Implementation of High

    Performance Face Recognition System‖ is submitted to the Department of Electrical and

    Electronics Engineering of BRAC University in partial fulfillment of the Bachelor of Science

    in Electronics and Electrical Engineering. This is our original work and was not submitted

    elsewhere for the award of any other degree or any other publication.

    Date:

    Supervisor

    ___________________________________

    __________________________

    (Priyanka Das Dewan)

    Student‘s ID: 10221078

    ___________________________

    (Tasnim Harun Shamma)

    Student ID: 09221032

    ___________________________

    (Afifa Abbas)

    Student ID: 10221073

    ___________________________

    (Raktim Kumar Mondol)

    Student ID: 09221232

    Professor Dr. A. B. M Harun- Ur- Rashid

    raktim.live@gmail.com

    priyanka.bracu@gmail.com

    afifa.abbas118@gmail.com

    tasnim.h.shamma@gmail.com

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    Abstract:

    In this paper, we have proposed a novel hardware architecture for face-recognition system. In

    order to make the system cost effective we have used a simple yet efficient algorithm of face-

    recognition system. We have designed, implemented and verified the algorithm in a cyclone

    III Field Programmable Gate Array (FPGA) chip. Altera DE0 development board which

    contains a cyclone III chip on it have been used for debugging purpose. We have also ensured

    for low power consumption such that the chip could be used universally in a wide range of

    security systems.

    To develop a simple yet efficient face recognition algorithm (such as PCA, FFT etc.) on

    digital hardware, we have researched on various face recognition algorithms using Matlab

    codes and studied their detection efficiency under various posture and background and also

    the complexity of the algorithm. To save hardware resource and at the same time to obtain an

    acceptable level of recognition we have chosen to use Fast Fourier Transform.

    The search database is developed by taking pictures of BRAC University students in various

    background and postures and used them to evaluate the developed face recognition system.

    Images were captured using TRDB_D5M camera module and digital data from the camera

    was transferred to the SDRAM of the DE0 board using GPIO interface. A NIOS2

    microprocessor was synthesized in the cyclone III chip which controlled the total recognition

    system and the communication between the FFT core, SDRAM and On-chip memory. The

    performance of the hardware is now under evaluation.

    Keywords:

    FFT, FPGA, Face Recognition, Nios2, TRDB_D5M.

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    Preface:

    One of the most important reasons for choosing this task as our undergraduate thesis is that it

    gave us the possibility to use the theory and knowledge that we have gained over the years to

    make something useful and practical. We also believed that the design task would be good

    preparation for the future challenges. We have always been fascinated by electronics and the

    wide area of application this technology presents. Since our interest include both VLSI and

    working with FPGA, this project became a great opportunity to combine our interest and

    education.

    The reason behind choosing FPGA is that in our country very few people worked with this

    board and we took it as a challenge. This challenge was the most effective way to learn new

    things. We have learned a lot about image processing, DE0 board, TRDB_D5M camera,

    Quartus12.0 and NIOSII. The Altera DE0 platform was a very good platform to work with.

    Many projects can be implemented using this board.

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    Acknowledgements:

    This thesis is submitted to BRAC University in partial fulfillment of the requirements for the

    degree of bachelor in Electrical and Electronic Engineering.

    We are thankful to our Almighty Allah for his blessings upon us and bestowing us courage to

    go with such task, and also our parents for their support, love and patience.

    This project would not have been possible without all the help and the support we have

    received. We would like to thank our supervisor, Professor Dr. A. B. M Harun- Ur- Rashid

    (Bangladesh University of Engineering and Technology) for all the help, support, fresh

    perspectives we have got. We are also thankful to Sir Jahangir Alam , Lecturer of BRAC

    University for his constant guidance, when we were stuck. We highly appreciate the

    assistance and guidance of Shafiur Rahman, student of BUET and Ahsan Ashfaq, an Alumni

    of Halmstad University, Sweden, throughout the process.

    April 13, 2013.

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    Abstract…………………………………………………………………………3

    Preface…………………………………………………………………………..4

    Acknowledgement…………………………………………………………...…5

    Table of Contents…………………………………………………………...….7

    Table List…………………………………………………………………….....8

    Figure List………………………………………………………………...……9

    Table of Contents

    Chapter 1 Introduction………………………………………………….……………….10 1.1 Background………………………………………………………………………………10

    1.2 Motivation and objectives………………………………………………………………..11

    1.3 Research Goal ……………………………………………………………………………11

    1.4 Problem Formulation …………………………………………………………………….12

    Chapter 2

    2.1 Algorithms for Face Recognition……………………………….…….…13 2.1.1 Principle Component Analysis(PCA)........................................................................13-22

    2.1.2 Linear Discriminant Analysis (LDA) ……………………………………………....….23

    2.1.3 Independent Component Analysis (ICA)........................................................................23

    2.1.4 Trace Transform……………………………………………………………….……23-24

    2.1.5 Neural Network…………………………………………………………………...……24

    2.2 Fast Fourier Transform (FFT)……………………………………………………………25

    2.3 How does FFT works…………………………………………………………………26-29

    2.4 FFT algorithms………………………………………………………………….………..30

    2.4.1 FFT Implementation in NIOS II using Cooley-tukey algorithm…………………...30-31

    2.5 Applying FFT on an image………………………………………………………………32

    2.6 Applications……………………………………………………………………….……..36

    2.7 Benefits of using FPGA…………………………………………………………….……37

    Chapter 3

    MATLAB Implementation…………...………………………………...……38 3.1 Basic Approach……………………………………………………………………..……38

    3.2 Two dimensional FFT on an image…………………….………………………….……..41

    3.3 Functions used in Matlab…………………………………………………………...……43

    Chapter 4

    DE0 board and TRDB_D5M Specifications…..……………….……………47 4.1 Introduction to FPGA …………………………………..……………………...…...……47

    4.2 Cyclone III FPGA: Architecture…………………………..……………………..………