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esign and Implementation of VLSI System (EN1600) Lecture 27: Datapath Subsystems 3/4 Prof. Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison Wesley – Rabaey/Pearson]

Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

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Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4. Prof. Sherief Reda Division of Engineering, Brown University Spring 2008. [sources: Weste/Addison Wesley – Rabaey/Pearson]. Manchester carry adder. Using transmission gates Using dynamic gates. - PowerPoint PPT Presentation

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Page 1: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

Design and Implementation of VLSI Systems(EN1600)

Lecture 27: Datapath Subsystems 3/4

Prof. Sherief RedaDivision of Engineering, Brown University

Spring 2008

[sources: Weste/Addison Wesley – Rabaey/Pearson]

Page 2: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

Manchester carry adder

• Using transmission gates • Using dynamic gates

Page 3: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

Manchester carry chains

Critical path involves a series propagate transistor for each bit a significant over carry-ripple (which used majority or AND-OR gate)

Page 4: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

Equivalence circuits for Manchester carry chain

Page 5: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

Carry skip adder

If (P0 & P1 & P2 & P3 = 1) then Co,3 = Ci,0 otherwise the block itself kills or generates the carry internally

A0 B0

S0

Ci,0FA

A1 B1

S1

FA

A2 B2

S2

FA

A3 B3

S3

FACo,3

Co,3

BP = P0 P1 P2 P3 “Block Propagate”

Page 6: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

Carry-skip adder

Cin+

S4:1

P4:1

A4:1 B4:1

+

S8:5

P8:5

A8:5 B8:5

+

S12:9

P12:9

A12:9 B12:9

+

S16:13

P16:13

A16:13 B16:13

CoutC4

1

0

C81

0

C121

0

1

0

• Carry-ripple is slow through all N stages• Carry-skip allows carry to skip over groups of n bits

– Decision based on n-bit propagate signal

Original design by Charles Babbage

Page 7: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

Carry-lookahead adder

Similar to the carry-skip adder, but computes generate signals as well as group propagate signals to avoid waiting for a ripple to determine if the group generates a carry.

Page 8: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

Carry-select adder

• One adder calculates the sums assuming a carry-n of 0 while the other calculates the sums assuming a carry-in of 1.

• The actual carry triggers a multiplexer that chooses the appropriate sum

Page 9: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

II. Comparators

A. 0’s detector and 1’s detectors

B. Equality comparator: A = B

C. Magnitude comparator: A < B

Page 10: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

A. 1’s and 0’s detectors

• 1’s detector: N-input AND gate• 0’s detector: NOTs + 1’s detector (N-input NOR)

A0

A1

A2

A3

A4

A5

A6

A7

allones

A0

A1

A2

A3

allzeros

allones

A1

A2

A3

A4

A5

A6

A7

A0

When is this circuit structure a good idea?

Page 11: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

B. Equality comparator

• Check if each bit is equal (XNOR, aka equality gate)• 1’s detect on bitwise equality

A[0]B[0]

A = B

A[1]B[1]

A[2]B[2]

A[3]B[3]

Page 12: Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4

C. Magnitude comparator

A0

B0

A1

B1

A2

B2

A3

B3

A = BZ

C

A B

N A B

Compute B-A and look at signB-A = B + ~A + 1For unsigned numbers, carry out is sign bit