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CS701 – High Performance Computing IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi Shetty, CSE, NITK

CS701 – High Performance Computing IS860 – High ...bt.nitk.ac.in/c/16b/cs701/notes/Class-Zero.pdf · IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi

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Page 1: CS701 – High Performance Computing IS860 – High ...bt.nitk.ac.in/c/16b/cs701/notes/Class-Zero.pdf · IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi

CS701 – High Performance Computing IS860 – High Performance Computing for Security

Basavaraj Talawar, Srinidhi Shetty, CSE, NITK

Page 2: CS701 – High Performance Computing IS860 – High ...bt.nitk.ac.in/c/16b/cs701/notes/Class-Zero.pdf · IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi

The Compute Stack

Computer architecture is the design of the

abstraction/implementation layers that allow

us to execute information processing

applications efficiently using manufacturing

technologies

Application

Algorithm

Programming Language

Operating System/Virtual Machines

Instruction Set Architecture

Microarchitecture

Register-Transfer Level

Gates

Circuits

Devices

Physics

Page 3: CS701 – High Performance Computing IS860 – High ...bt.nitk.ac.in/c/16b/cs701/notes/Class-Zero.pdf · IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi

Course Syllabus● Technology Trends: Moore's Law. Delay, Power, Energy.

Performance Quantification.● Instruction Level Parallelism: Pipelining, Hazards, Branch

prediction, Static and Dynamic Scheduling, Speculation.● Thread Level Parallelism: Symmetric and Distributed

architectures. Programming models – Shared memory vs. Message passing. Cache coherence – Distributed, snoopy. Synchronization. Memory consistency models. Transactional memory.

● The Memory System: Memory Hierarchy, Cache tradeoffs, Basic and Advanced optimizations, Virtual Memory, DRAM.

● Interconnection Networks: Architectures, Topologies, Performance, Routing, Flow control, Future of NoCs.

Page 4: CS701 – High Performance Computing IS860 – High ...bt.nitk.ac.in/c/16b/cs701/notes/Class-Zero.pdf · IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi

References● Primary

– John L Hennessy and David Patterson. Computer Architecture, A Quantitative Approach, MK, 5ed, 2012.

– Mark Hill/Margaret Martonosi (eds.). Synthesis Lectures on Computer Architecture, Morgan and Claypool, 2006 – 2014.

– Classic/Recent publications

● Others– John Shen & Mikko Lipasti. Modern Processor Design,

Waveland Press, 2013.

– Bruce Jacob, Spencer Ng, David Wang. Memory Systems: Cache, DRAM, Elsevier, 2007.

– William Dally and Brian Towles. Principles and Practices of Interconnection Networks, MK, 2004.

Page 5: CS701 – High Performance Computing IS860 – High ...bt.nitk.ac.in/c/16b/cs701/notes/Class-Zero.pdf · IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi

The Course● 10 Qtorials – 20%

– Quizzes + Tutorials, 10, Solve problems in class, Team activity.

● Assignments (includes a course project) – 20%● Quizzes + Midsem + Endsem – 60%

Page 6: CS701 – High Performance Computing IS860 – High ...bt.nitk.ac.in/c/16b/cs701/notes/Class-Zero.pdf · IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi

Single Processor Performance

RISC

Hennessy & Patterson, CA-QA, 5ed. MK, 2013

CISC

ILP

Superscalar

Multiprocessors

EPIC

Page 7: CS701 – High Performance Computing IS860 – High ...bt.nitk.ac.in/c/16b/cs701/notes/Class-Zero.pdf · IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi

Architecture vs. Microarchitecture● Architecture

– Instruction Set Architecture

– Programmer visible state (Memory & Register)

– Operations (Instructions and how they work)

– Execution Semantics (interrupts)

– Input/Output

– Data Types/Sizes

● Microarchitecture/Organization:– Tradeoffs on how to implement ISA for some metric (Speed,

Energy, Cost)

– Examples: Pipeline depth, number of pipelines, cache size, silicon area, peak power, execution ordering, bus widths, ALU widths

Page 8: CS701 – High Performance Computing IS860 – High ...bt.nitk.ac.in/c/16b/cs701/notes/Class-Zero.pdf · IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi

Definition● Computer Architecture is the science and art of

selecting and interconnecting hardware components to create computers that meet functional, performance and cost goals.

● Computer Architecture– Specific requirements of the target machine

– ISA design

– Cache and memory hierarchy

– I/O, storage

– Multiprocessors, networked systems

Page 9: CS701 – High Performance Computing IS860 – High ...bt.nitk.ac.in/c/16b/cs701/notes/Class-Zero.pdf · IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi

Definition● RISC

– add R3, R1, R2

● CISC– add R3, R1, (R2)

Page 10: CS701 – High Performance Computing IS860 – High ...bt.nitk.ac.in/c/16b/cs701/notes/Class-Zero.pdf · IS860 – High Performance Computing for Security Basavaraj Talawar, Srinidhi

Next Class● Performance Evaluation, Power, Energy