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CompactPCI 9030RDK-LITE Hardware Reference Manual
CompactPCI 9030RDK-LITE Hardware Reference Manual
Version 1.2
October 2004
Website: http://www.plxtech.comTechnical Support: http://www.plxtech.com/support/
Phone: 408 774-9060 800 759-3735
Fax: 408 774-2169
© 2004 PLX Technology, Inc. All rights reserved. PLX Technology, Inc. retains the right to make changes to this product at any time, without notice. Products may have minor variations to this publication, known as errata. PLX assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of PLX products. PLX Technology and the PLX logo are registered trademarks of PLX Technology, Inc. Other brands and names are the property of their respective owners. Order Number: CPCI 9030/LITE-RDK-HRM-P1-1.2 Printed in the USA, October 2004
PREFACE
NOTICE This document contains PLX Confidential and Proprietary information. The contents of this document may not be copied nor duplicated in any form, in whole or in part, without prior written consent from PLX Technology, Inc. PLX provides the information and data included in this document for your benefit, but it is not possible to entirely verify and test all the information, in all circumstances, particularly information relating to non-PLX manufactured products. PLX makes neither warranty nor representation relating to the quality, content, or adequacy of this information. The information in this document is subject to change without notice. Although every effort has been made to ensure the accuracy of this manual, PLX shall not be liable for any errors, incidental, or consequential damages in connection with the furnishing, performance, or use of this manual or examples herein. PLX assumes no responsibility for damage or loss resulting from the use of this manual, for loss or claims by third parties, which may arise through the use of the RDK, or for any damage or loss caused by deletion of data as a result of malfunction or repair.
ABOUT THIS MANUAL This document describes the PLX CompactPCI 9030RDK-LITE, a Reference Design Kit, from a hardware perspective. It contains a description of all major functional circuit blocks on the board and also is a reference for the creation of software for this product. This manual also includes the complete schematics and bill of materials.
REVISION HISTORY
Date Version Comments
May 2000 1.0 Hardware Reference Manual release • Updated Schematics • Other minor changes
March 2003 1.1 • Updated Table 3-2 with new value for offset 7Ah • Updated Bill of Materials • Updated Schematics
October 2004 1.2 • Updated EEPROM table, Manual and BOM
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. i
TABLE OF CONTENTS
1. GENERAL INFORMATION...................................................................................................1 1.1 FEATURES...................................................................................................................................... 2 1.2 RDK INSTALLATION ........................................................................................................................ 2
2. SYSTEM ARCHITECTURE...................................................................................................3
3. HARDWARE ARCHITECTURE ............................................................................................5 3.1 HARDWARE MEMORY MAP .............................................................................................................. 6 3.2 PCI 9030....................................................................................................................................... 6 3.3 SERIAL EEPROM .......................................................................................................................... 7 3.4 SYNCHRONOUS DUAL-PORT RAM (DPRAM) ................................................................................ 10 3.5 HOT SWAP CONTROL CIRCUIT....................................................................................................... 10
3.5.1 Hardware Connection Control ............................................................................................. 10 3.5.2 Software Connection Control............................................................................................... 10
3.6 TEST HEADERS ............................................................................................................................ 11 3.7 PLX OPTION MODULE CONNECTOR .............................................................................................. 11 3.8 HARDWARE MODULES .................................................................................................................. 11
3.8.1 RS232 Serial Port ................................................................................................................ 11 3.8.2 Debug and Status LEDs ...................................................................................................... 11 3.8.3 Reset Circuitry ..................................................................................................................... 11 3.8.3.1 Power-on-Reset ...............................................................................................................................11 3.8.3.2 Reset Pushbutton Switch .................................................................................................................11 3.8.4 Flash ROM Socket............................................................................................................... 11
3.9 PROTOTYPING AREA..................................................................................................................... 11 3.9.1 Thirty-three (33) Surface Mount Footprints ......................................................................... 12 3.9.2 The Common BGA Landscape............................................................................................ 13
3.10 CONFIGURING THE RDK BOARD .................................................................................................... 14 3.10 CONFIGURING THE RDK BOARD .................................................................................................... 14 3.11 MEMORY ACCESS TO THE DPRAM ............................................................................................... 14
4. PCB LAYOUT CONSIDERATION ......................................................................................15 4.1 REQUIREMENTS OF STANDARDS.................................................................................................... 15 4.2 μBGA FOOTPRINT LAYOUT ........................................................................................................... 15
5. CONVERTING THE 6U BOARD TO A 3U BOARD ...........................................................16
6. CUSTOMER SUPPORT......................................................................................................16
7. REFERENCES ....................................................................................................................16
8. ABEL CODE / BILL OF MATERIALS / SCHEMATICS......................................................17 8.1 ABEL CODE FOR U13................................................................................................................... 17
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. iii
Contents / Figures / Tables
LIST OF FIGURES
FIGURE 1-1. COMPACT PCI 9030RDK-LITE LAYOUT DIAGRAM (6U/4HP CARD) ..........................1
FIGURE 2-1. COMPACTPCI 9030RDK-LITE SYSTEM ARCHITECTURE...........................................3
FIGURE 3-1. COMPACTPCI 9030RDK-LITE HARDWARE BLOCK DIAGRAM....................................5
FIGURE 3-2. BGA LANDSCAPES ................................................................................................13
LIST OF TABLES
TABLE 3-1. COMPACTPCI 9030RDK-LITE MEMORY MAP.............................................................6
TABLE 3-2. CONTENTS OF THE SERIAL EEPROM .........................................................................8
TABLE 3-3. PROTOTYPING FOOTPRINTS AND PROTOTYPING AREA ON THE
COMPACTPCI 9030RDK-LITE BOARD .....................................................................12
TABLE 8-1. BILL OF MATERIALS ..................................................................................................19
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 iv © 2004 PLX Technology, Inc. All rights reserved.
1. General Information
5VCC
3.3V
GND
3.3V
GND
16 pinSOIC
16 pinSOIC
16 pinSOIC
16 pinSOIC
20 pinSSOIC
20 pinSOIC
20 pinSOIC
20 pin SOIC
208/144/80
PQFP
footprints
44 pinTQFP
20 pinPLCC
54 pin TSOP54 pin TSOP
84/68/44/28
PLCC
footprints
25x25 0.1" through holeprototyping area
176/100/48
PQFP
footprints
48 pinSSOP
48 pinSSOP
24 pinSSOP
24 pinSSOP
LAH
1
LAH
2
DPRAMU8
16 pinSSOP
16 pinSSOP
28 pin SOIC28 pin SOIC
48 pinSSOP
48 pinSSOP
LEDs
Hot SwapCircuit
POM ConnectorLA
H1
LAH
2
DPRAMU12
DPRAMU11
J3
LAH3
LAH4LAH6
LAH5GAL
PCI9030Blue
LED
switch
DB 9Connector reset circuit
RS232 Port
FlashROM
Socket
60MHzOSC
LED's
CP
CI c
onne
ctor
J1
26x26 0.05"pitch BGAlandscape
SerialEEPROM
Figure 1-1. CompactPCI 9030RDK-LITE Layout Diagram (6U/4HP Card)
The CompactPCI 9030RDK-LITE Reference Design Kit (RDK) is a CompactPCI bus target prototyping kit, which can be used for custom design development such as networking, telecom, imaging, industrial, and storage applications using the PLX PCI 9030 SMARTarget™ I/O Accelerator chip. The reference design kit allows customers to create designs with or without a microprocessor.
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. 1
Section 1 General Information RDK Installation
1.1 Features The CompactPCI 9030RDK-LITE Reference Design Kit (RDK) is a 6U CompactPCI Bus Target Prototyping Kit, which contains a six-layer, assembled PC board with the dimensions of 6.30” L x 9.19” W and the following features: • PLX PCI 9030 SMARTarget™ I/O
Accelerator in 180-pin 0.8mm pitch μBGA package.
• Socketed serial EEPROM for configuring PCI 9030
• Supports both multiplexed and non-multiplexed bus modes
• Thirty-three (33) surface mount prototyping footprints and a 0.05” pitch BGA landscape, which can be used with different FPGAs, CPLDs, SDRAMs, SRAMs, data transceivers and general-purpose logic devices.
• Socketed 32-pin PLCC footprint provides designers with a place for their flash boot ROM.
• On-board, up to 32-bit synchronous dual-port, SRAM plus a small 20-pin programmable GAL demonstrating PCI 9030 continuous burst read/write features. It allows the user to plug the board into a PCI system and be operational immediately.
• Four (4) green user defined status/debug LEDs and one (1) red power on LED.
• Built-in DB9 connector, RS232 transceiver, and UART for easy addition of a serial port to the Local bus.
• A push button switch and a reset generator are capable of generating reset signals to any device on the board.
• Socketed oscillator for Local bus clock and PLL, provide up to 60 MHz clock.
• The Hot Swap control circuit allows the orderly insertion and removal of the board without adversely affecting system operation.
• Six logic analyzer headers with standard HP footprints allow easy probing of Local bus signals.
• PLX Multiplexed bus mode Option Module (POM) connector provides connection to other PLX POMs or customer devices.
• A 25x25 0.1-inch grid through-hole area allows easy prototyping with through-hole components.
• By cutting the 6U front panel to 3U and detaching the upper portion of the PC board, the RDK can be converted to a 3U board
1.2 RDK Installation 1. Turn off the power of the
CompactPCI system.
2. Wear user-suitable grounding straps.
3. Align the 6U board with the top and bottom guide rails and slide the board into an available single slot.
4. Make sure the board is completely plugged in and lock both handles at the front panel.
5. Plug the power cord into the power receptacle again and turn on the power switch of the CompactPCI system.
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 2 © 2004 PLX Technology, Inc. All rights reserved.
2. System Architecture
CompactPCI BUS, 32-bit, 33MHz
PCI 9030(µBGA)
LOCAL BUS
POMConnector
TestHeaders
SerialPort
ResetCircuit
Flash ROMSocket
PrototypingArea &
Footprints
UsersDefinedLEDs
SynchronousDual-port
RAM4Kx18
SynchronousDual-port
RAM4Kx18
Separate Bus
Hot SwapControl Circuit
Back End Power
up to 32-bit, 60MHz
Localreset
ControlsBack EndPower
Early Power EjectorSwitch
BlueLED
EEPROM
Figure 2-1. CompactPCI 9030RDK-LITE System Architecture
As shown in Figure 2-1, the RDK board contains:
• A PCI 9030 SMARTarget™ I/O Accelerator
• Four components (two 4Kx18 Synchronous Dual-Port RAMs, Test Headers, and POM connector) that connect to the PCI 9030 Local bus
• Four commonly used hardware modules (Serial Port, Reset Circuit, LEDs, and Flash ROM Socket)
• A Hot Swap control circuit • Many carefully selected prototyping
footprints throughout 70% of the board area.
The RDK is shipped with one Synchronous Dual-Port RAM (DPRAM) on the board as the default. A PCI master adapter card residing on the PCI bus can perform single memory read/write cycles, and continuous
burst memory read/write from/to the left port of the DPRAM in direct slave mode. Four hardware modules on the RDK provide some basic hardware building blocks for almost any PCI 9030 design.
The Hot Swap control circuit controls the current rise when the components and circuits receive power at the local bus, providing backend power status to the system controller and the local reset signal to the PCI 9030 device.
The thirty-three (33) surface mount footprints include many SOIC, SSOP and TSOP footprints for common logic ICs and many PLCC and PQFP footprints for common FPGAs and CPLDs. Also, the BGA landscape and the through-hole prototyping area provide additional flexibility.
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. 3
3. Hardware Architecture This section provides a detailed description of the hardware of the CompactPCI 9030RDK-LITE. Figure 3-1 shows the hardware block diagram of the RDK.
PCI 9030Address Bus
Data Bus
Control Bus
SerialEEPROM
Local BusClock Circuit
60MHz
ADSLLW/RLCS0L
BLASTL16V8GAL
LOCAL BUSUp to 32-bit, 60MHz
CompactPCI BUS32-bit, 33MHz
CE0L
DPADSL
R/WL
Address Bus
Data bus
Control Bus
Resistor Networks to configure16 or 32 bit address bus
Synchronous Dual-Port RAM4Kx18
Left Port Right Port
Synchronous Dual-Port RAM4Kx18
Left Port Right Port
Separate Bus
POMConnector
TestHeaders
Hardware modules
Serial Port
Reset Circuit
Users defined LEDs
Flash ROM Socket
PrototypingArea &
Footprints
Hot Swap ControlCircuit
BD_Select#
Healthy#
PCI_Reset#
Local_Reset#3.3V Early Power
MOSFET
5 Volt Power
5V/3.3VLDO
2A To BackEnd
Circuits
EjectorSwitch
BlueLED
ENUM#
Figure 3-1. CompactPCI 9030RDK-LITE Hardware Block Diagram
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. 5
Section 3 Hardware Architecture PCI 9030
3.1 Hardware Memory Map
Table 3-1. CompactPCI 9030RDK-LITE Memory Map Address Range Device Chip Select Comments
FFF FFFF Programmable Unused Can be assigned to
CS2#-CS3# Available
Programmable 000 4000 POM connector CS1# Programmable
000 3FFF 000 0000
Two DPRAM (U11 and U12) CS0# 32-bit access
000 1FFF 000 0000
One DPRAM (U11only) CS0# 16-bit access
Note: If two DPRAMs (U11 and U12) are used for 32-bit access, the address range will be 000 0000 – 000 3FFFh.
3.2 PCI 9030 The PCI 9030, a 32-bit, 33MHz PCI Bus Target Interface chip with SMARTarget™ technology, is the most advanced feature rich, general-purpose, bus target device available in the market today.
• PCI v2.2 Compliant: The PCI 9030 enables up to 132 Mbytes/second in PCI burst transfers and up to 240 Mbytes/second burst transfers on the 60MHz Local bus.
• PCI Target Read Ahead Mode: The PCI 9030 will pre-fetch a programmable amount of data from the Local bus. The pre-fetched data can then be burst transferred on the PCI bus from the PCI 9030 internal PCI Target Read FIFO. The pre-fetched size can be programmed to match the PCI master burst length or can be used as PCI Target Read Ahead mode data. This feature allows for increased bandwidth and reduced read latency.
• PCI Target Programmable Burst: The PCI 9030 may be programmed for several burst lengths, including unlimited burst. This allows for maximum transfer rates on both PCI and Local buses.
• PCI Target Delay Write: The PCI 9030 supports PCI Target Delay Write mode where the PCI target write data is postponed in the PCI Target Write FIFO to allow uninterrupted burst transactions on the Local bus. This allows for a higher throughput for conditions in which the PCI clock frequency is slower than the local clock frequency or when Local bus bursting is desirable.
• Posted Memory Write: A PCI memory write can be posted to the PCI 9030 for later transfer to the Local bus. This allows for maximum PCI performance and avoids potential deadlock situations.
• Programmable Local bus operates up to 60MHz and supports both non-multiplexed and multiplexed 32-bit address/data and Dynamic Local Bus width control allowing slave accesses to 8-, 16-, or 32-bit devices.
• Supports 5 PCI to local address spaces. These spaces (Space 0, 1, 2, 3 and Expansion ROM space) allow a PCI Bus Master to access the local memory spaces with individually programmable wait states, bus widths, and burst capabilities.
• Up to 9 programmable General Purpose I/Os, which may be used for a variety of purposes.
• Four programmable chip selects eliminate external decode circuits.
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 6 © 2004 PLX Technology, Inc. All rights reserved.
Section 3 Serial EEPROM Hardware Architecture
• CompactPCI Hot Swap Ready: The PCI 9030 supports LEDon#, CPCISW, BD_SEL# and ENUM# signals as well as Hot Swap capabilities registers – HS_CNTL, HS_NEXT, and HS_CSR.
• Supports automatic on-the-fly Big Endian and Little Endian conversion for all operations and data types.
• Interrupt Generator can assert PCI interrupts from external and internal sources
• Fully supports the Vital Product Data (VPD) PCI v2.2 extension including New Capabilities Structure. Provides an alternate access method for user or system-defined parameters or configuration data.
3.3 Serial EEPROM The CompactPCI 9030RDK-LITE board can boot with or without the presence of the serial EEPROM. The RDK is shipped with a 2K-bit, 3.3V serial EEPROM which is used for PCI 9030 initialization. The serial EEPROM directly connects to the PCI 9030 through its four-pin interface. A total of 136 bytes of data is preprogrammed to the EEPROM to bring up the RDK after the system reset. The data includes the device and functional information for plug-and-play (PnP), PCI memory resource allocation and initial values of PCI 9030 internal registers. Also, it includes the PCI 9030 chip select programming, CS0L, which becomes active when the DPRAM is selected at the address range 0000000 to 0001FFFh and programs the wait states of DPRAM read/write cycles. Once the RDK initializes correctly, customers can perform memory read/write with the DPRAM, using PLXMon® to examine the serial EEPROM contents or reprogram it with user defined data files.
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. 7
Hardware Architecture Serial EEPROM
Table 3-2. Contents of the Serial EEPROMSerial
EEPROM Offset
Register Offset Register Description Register Bits Affected Register Values
(Hex)
00h PCI 02h Device ID PCIIDR[31:16] 30C1
02h PCI 00h Vendor ID PCIIDR[15:0] 10B5 04h PCI 06h PCI Status PCISR[15:0] 0290 06h PCI 04h PCI Command Reserved 0000 08h PCI 0Ah Class Code PCICCR[23:8] 0680 0Ah PCI 08h Class Code / Revision PCICCR[7:0] / PCIREV[7:0] 0001 0Ch PCI 2Eh Subsystem ID PCISID[15:0] 9030 0Eh PCI 2Ch Subsystem Vendor ID PCISVID[15:0] 10B5 10h PCI 36h Reserved Reserved 0000 12h PCI 34h Reserved / New Capability Pointer Reserved / CAP_PTR[7:0] 0040
14h PCI 3Eh (Maximum Latency and Minimum Grant are not loadable) Reserved 0000
16h PCI 3Ch Interrupt Pin / (Interrupt Line Routing is not loadable) PCIIPR[7:0] / PCIILR [7:0] 0100
18h PCI 42h MSW of Power Management Capabilities PMC[14:11, 5, 3:0] 4802
1Ah PCI 40h Power Management Next Capability Pointer / Power Management Capability ID PMNEXT[7:0] / PMCAPID[7:0] 4801
1Ch PCI 46h Power Management Data / PMCSR Bridge Support Extension Reserved 0000
1Eh PCI 44h LSW of Power Management Control/Status PMCSR[14:8] 0000 20h PCI 4Ah Hot Swap Control/Status Reserved 0000
22h PCI 48h LSW of Hot Swap Next Capability Pointer / Hot Swap Capability ID HS_NEXT[7:0] / HS_CNTL[7:0] 4C06
24h PCI 4Eh PCI Vital Product Data Address Reserved 0000
26h PCI 4Ch PCI Vital Product Data Next Capability Pointer/ PCI Vital Product Data Capability ID PVPD_NEXT[7:0] / PVPDCNTL[7:0] 0003
28h Local 02h MSW of Range for PCI-to-Local Address Space 0 LAS0RR[31:16] FFFF 2Ah Local 00h LSW of Range for PCI-to-Local Address Space 0 LAS0RR[15:0] E000 2Ch Local 06h MSW of Range for PCI-to-Local Address Space 1 LAS1RR[31:16] 0000 2Eh Local 04h LSW of Range for PCI-to-Local Address Space 1 LAS1RR[15:0] 0000 30h Local 0Ah MSW of Range for PCI-to-Local Address Space 2 LAS2RR[31:16] 0000 32h Local 08h LSW of Range for PCI-to-Local Address Space 2 LAS2RR[15:0] 0000 34h Local 0Eh MSW of Range for PCI-to-Local Address Space 3 LAS3RR[31:16] 0000 36h Local 0Ch LSW of Range for PCI-to-Local Address Space 3 LAS3RR[15:0] 0000 38h Local 12h MSW of Range for PCI-to-Local Expansion ROM EROMRR[31:16] 0000 3Ah Local 10h LSW of Range for PCI-to-Local Expansion ROM EROMRR[15:0] 0000
3Ch Local 16h MSW of Local Base Address (Remap) for PCI-to-Local Address Space 0 LAS0BA[31:16] 0000
3Eh Local 14h LSW of Local Base Address (Remap) for PCI-to-Local Address Space 0 LAS0BA[15:0] 0001
40h Local 1Ah MSW of Local Base Address (Remap) for PCI-to-Local Address Space 1 LAS1BA[31:16] 0000
42h Local 18h LSW of Local Base Address (Remap) for PCI-to-Local Address Space 1 LAS1BA[15:0] 0000
44h Local 1Eh MSW of Local Base Address (Remap) for PCI-to-Local Address Space 2 LAS2BA[31:16] 0000
46h Local 1Ch LSW of Local Base Address (Remap) for PCI-to-Local Address Space 2 LAS2BA[15:0] 0000
48h Local 22h MSW of Local Base Address (Remap) for PCI-to-Local Address Space 3 LAS3BA[31:16] 0000
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 8 © 2004 PLX Technology, Inc. All rights reserved.
Section 3 SERIAL EEPROM Hardware Architecture
Serial Register Register ValuesRegister Description Register Bits Affected EEPROM Offset Offset (Hex)
4Ah Local 20h LSW of Local Base Address (Remap) for PCI-to-Local Address Space 3 LAS3BA[15:0] 0000
4Ch Local 26h MSW of Local Base Address (Remap) for PCI-to-Local Expansion ROM EROMBA[31:16] 0000
4Eh Local 24h LSW of Local Base Address (Remap) for PCI-to-Local Expansion ROM EROMBA[15:0] 0000
50h Local 2Ah MSW of Bus Region Descriptors for Local Address Space 0 LAS0BRD[31:16] 0040
52h Local 28h LSW of Bus Region Descriptors for Local Address Space 0 LAS0BRD[15:0] 2081
54h Local 2Eh MSW of Bus Region Descriptors for Local Address Space 1 LAS1BRD[31:16] 0080
56h Local 2Ch LSW of Bus Region Descriptors for Local Address Space 1 LAS1BRD[15:0] 0000
58h Local 32h MSW of Bus Region Descriptors for Local Address Space 2 LAS2BRD[31:16] 0080
5Ah Local 30h LSW of Bus Region Descriptors for Local Address Space 2 LAS2BRD[15:0] 0000
5Ch Local 36h MSW of Bus Region Descriptors for Local Address Space 3 LAS3BRD[31:16] 0080
5Eh Local 34h LSW of Bus Region Descriptors for Local Address Space 3 LAS3BRD[15:0] 0000
60h Local 3Ah MSW of Bus Region Descriptors for Expansion ROM EROMBRD[31:16] 0000
62h Local 38h LSW of Bus Region Descriptors for Expansion ROM EROMBRD[15:0] 0000
64h Local 3Eh MSW of Chip Select (CS) 0 Base and Range CS0BASE[31:16] 0000 66h Local 3Ch LSW of Chip Select (CS) 0 Base and Range CS0BASE[15:0] 1001 68h Local 42h MSW of Chip Select (CS) 1 Base and Range CS1BASE[31:16] 0000 6Ah Local 40h LSW of Chip Select (CS) 1 Base and Range CS1BASE[15:0] 0000 6Ch Local 46h MSW of Chip Select (CS) 2 Base and Range CS2BASE[31:16] 0000 6Eh Local 44h LSW of Chip Select (CS) 2 Base and Range CS2BASE[15:0] 0000 70h Local 4Ah MSW of Chip Select (CS) 3 Base and Range CS3BASE[31:16] 0000 72h Local 48h LSW of Chip Select (CS) 3 Base and Range CS3BASE[15:0] 0000 74h Local 4Eh Serial EEPROM Write-Protected Address Boundary PROT_AREA[6:0] 0030 76h Local 4Ch Interrupt Control/Status Register INTCSR[15:0] 0000
78h Local 52h MSW of PCI Target Response, Serial EEPROM, and Initialization Control CNTRL[31:16] 807C
7Ah Local 50h LSW of PCI Target Response, Serial EEPROM, and Initialization Control CNTRL[15:0] 4000
7Ch Local 56h MSW of General Purpose I/O Control GPIOC[31:16] 0024 7Eh Local 54h LSW of General Purpose I/O Control GPIOC[15:0] 9000
80h Local 72h MSW of Hidden 1 Power Management Data Select PMDATA[7:0] hidden, D0 and D3hot Power Dissipated 0000
82h Local 70h LSW of Hidden 1 Power Management Data Select PMDATA[7:0] hidden, D0 and D3hot Power Consumed 0000
84h Local 76h MSW of Hidden 2 Power Management Data Scale Reserved 0000
86h Local 74h LSW of Hidden 2 Power Management Data Scale
PMCSR[14:13] hidden, Bits [7:0] are used as follows: [7:6] D3hot Power Dissipated,
[5:4] D0 Power Dissipated, [3:2] D3hot Power Consumed,
[1:0] D0 Power Consumed
0000
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. 9
Section 3 Hardware Architecture PLX Option Module Connector
3.4 Synchronous Dual-Port RAM (DPRAM)
The PCI 9030 is connected to (2) two Synchronous Dual–Port RAMs, U11 and U12, on the RDK board. These DPRAMs are 3.3V, 9 ns, 4Kx18 Cypress devices. However, the board is assembled with one DPRAM (U11) on board as a default.
The DPRAM serves two purposes on the RDK board. First, the left port of DPRAM U11, connects to the lower 16-bit data bus of the PCI 9030 with simple interface logic that resides in the 5ns, 20-pin programmable GAL device. A PCI bus master can perform 8- and 16-bit single memory cycles with the DPRAM through the PCI 9030. If the PCI bus master supports bursting, the PCI master can perform 16-bit continuous burst memory cycles with the DPRAM also. Second, the PCI 9030 is a PCI target chip with an output only address bus. If a customer’s design has a microprocessor or microcontroller, they can place these devices on the separate bus on the right port of the DPRAM. Also, if the customer wants to have 32-bit DPRAM, they can add the same Cypress chip to U12 and rearrange the resistor networks RN34, RN36 and RN38. (See page 5 of the Schematics for more details.)
The interface between the PCI 9030 and the DPRAMs is very straightforward. The left port of the DPRAM is configured in the pipelined mode. Three control input signals, chip enable 1 (CE1L), counter enable (CNTENLL), and output enable (OELL) are enabled and the counter reset signal (CNTRSTL) is disabled with related pull-up and pull-down resistors. Only two control input signals, address strobe (ADSLL) and chip enable (CE0L), are converted from PCI 9030 control signals. If the PCI 9030 local clock is running at 60MHz, the PCI 9030 needs two wait states for the single or the first data read of a burst memory read cycle, and zero wait states for the single or burst write cycle.
On the right port of the DPRAMs, all the input control signals are preset to idle states. A 29x2 header, J3, provides access to address, data, and control signals on the right port and nearby prototyping pads provide the connections to the customers’ designs in the separate bus on the right port of the DPRAMs.
3.5 Hot Swap Control Circuit The RDK is a full Hot Swap board that includes both hardware connection control and software connection control in accordance with the CompactPCI Hot Swap specifications. It can work on a range of systems from non-Hot Swap systems to High Availability systems.
3.5.1 Hardware Connection Control
The BD_SEL# signal at the J1 CompactPCI connector is connected to the BD_SELL input of PCI 9030 chip and ON# signal input of the Linear Technology LTC1643L Hot Swap Controller. An external 1.2K ohm pull-up resistor is connected to this signal pin and early VIO power. When the board is hot plugged into a CompactPCI system, before the J1 connector makes contact with the BD_SEL# pin on the backplane, the PCI 9030 chip is already powered-up with early 3.3V. The 1.2K-ohm external pull-up will activate the PCI 9030 internal pre-charge regulator and built-in 10K ohm pull-up resistors to precharge all required PCI I/O signals on the RDK to one Volt. This prevents erroneous system operation during Hot Swap insertion of the board.
The Board Healthy signal, HEALTHYL, is generated by the LTC1643L as the Power Good signal for the 5V power output. The Power-Good Threshold voltage is 4.40 to 4.75V. As long as the 5V power input reaches this range, the Power-Good signal – HEALTHYL—will be generated. Also the LTC1643L controls the current limit and the power up rate. In this RDK, the current limit is 3A (the capacity of the LDO of the LT1587CM-3.3) and the power up rate would be dv/dt = 50uA/0.1uF, or determined by the current limit and the load capacitance, whichever is slower.
With two logic gates, the Local PCI Reset signal, LOCAL_RSRL, was driven from the Platform Reset, PCIRSTL, from the system backplane and the Healthy signal, HEALTHYL from the LTC1643L to reset the PCI 9030.
3.5.2 Software Connection Control
A micro switch located at the lower ejector handle of the 6U RDK board is used to signal the insertion or impending extraction of the RDK. When the handle is unlocked, the CPCISW is pulled-up to 3.3V. That informs the PCI 9030 that the board is at the impending extraction state. When the handle is locked, CPCISW is
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 10 © 2004 PLX Technology, Inc. All rights reserved.
Section 3 HARDWARE MODULES Hardware Architecture
pulled down to ground. This informs the PCI 9030 that the board is fully inserted. Also, ENUML is generated to signal the status of the handle to the system Host.
A blue LED is located near the bottom handle of the 6U front panel. The anode is connected to a 5V power source through a 100-ohm series resistor. The cathode is connected to the LEDonL PCI 9030 pin. The blue LED lights up for a moment at the RDK power up, after which the blue LED is software driven.
3.6 Test Headers Six logic analyzer headers are implemented with a standard 0.1”, 2x10 Hewlett Packard configuration. In this RDK, they serve two different functions. One is for easy probing. All PCI 9030 Local bus signals, configuration and status signals are well arranged within these headers. Headers LAH1 and LAH2 contain Local bus address signals. Headers LAH3 and LAH4 contain Local bus data signals (or multiplexed address/data signals in the multiplexed mode). Headers LAH5 and LAH6 carry Local bus control and status signals. Designers can use these headers to connect to a standard board for additional prototyping. The headers do not provide any power source; therefore, this must be connected separately for prototyping daughterboards.
3.7 PLX Option Module Connector The PLX Option Module Connector resides directly on the 32-bit multiplexed mode Local Bus. A slave device may be connected to this connector. A programmable chip select, CS1L, is used to select the option module. A hardware interrupt, INTi1, is used for the option module to generate an interrupt to the CompactPCI bus master through the PCI 9030. The schematic provides information for all of the 100-pin connector signals. If desired, this connector can be used for expansion and prototyping.
3.8 Hardware Modules The RDK-LITE provides four hardware modules: 1) RS232 serial port, 2) debug and status LEDs, 3) reset circuitry, and 4) flash ROM socket.
These four modules are in addition to the clock generator used to provide up to 60MHz Local bus clock to the PCI 9030, synchronous Dual-Port RAM, and POM connector.
3.8.1 RS232 Serial Port
The RS232 Serial Port combines a DB9 male connector, a 3-output / 5 input DTE transceiver and a UART. The serial port provides the parallel interface to the PCI 9030 Local bus or the separate bus at the dual-port memory.
3.8.2 Debug and Status LEDs
There are four green user-defined LEDs near the top edge of the RDK board. Each LED anode is connected to 3.3VDC through a 150-ohm ¼ watt resistor. The LED cathode is connected to a prototyping pad. As long as an active low signal can sink 16 – 20 mA of current, it can directly drive the LEDs without changing the resistor value.
3.8.3 Reset Circuitry
3.8.3.1 Power-on-Reset
Power-on-reset is provided by an external 3.3V power supply supervisor. The valid power-on-reset period is 1ms, which is hardwired into the supply supervisor IC.
3.8.3.2 Reset Pushbutton Switch
The Reset Pushbutton switch allows the user to reset the Local Bus side of the board only. When this pushbutton switch is pressed, a manual reset can be generated to reset the devices on the PCI 9030 Local bus.
3.8.4 Flash ROM Socket
A 32-pin PLCC footprint and related PLCC socket is provided on the RDK. This can be used to install a 3.3V, 512KB byte-wide flash memory device. It can be used to store microprocessor or DSP code for booting the Local bus master devices. The flash ROM footprint is pre-connected to power and ground. The prototyping pads are provided for all control signal pins as well as all address and data lines.
3.9 Prototyping Area The RDK board contains a huge prototyping area as mentioned before. To make the prototyping area more user-friendly and cost effective, three key features have been implemented. The first is 30+ surface mount footprints, the second is the 0.05” pitch common BGA landscape and the last is a 25x25 0.1” grid through-hole prototyping area.
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. 11
Section 3 Hardware Architecture Prototyping Area
3.9.1 Thirty-three (33) Surface Mount Footprints
Table 3-3. Prototyping Footprints and Prototyping Area on the CompactPCI 9030RDK-LITE Board
Package Qty. Wide & Pitch Destination Remark 32-pin PLCC 1 0.05” pitch FP1 84-pin PLCC 1 0.05” pitch FP2 68-pin PLCC 1 0.05” pitch FP3 44-pin PLCC 1 0.05” pitch FB4 28-pin PLCC 1 0.05” pitch FP5
FP2 to FP5 co-exist at a 84-pin
PLCC area
20-pin PLCC 1 0.05” pitch FP6 16-pin SOIC narrow 4 .150”wide, 0.05” pitch FP7, 8, 15, 16
54-pin TSOP 2 0.8mm pitch FP9, 10 28-pin SOIC wide 2 .300” wide, 0.05” pitch FP11, 12
48-pin SSOP 4 .300”wide, 0.025” pitch FP13,14,23,24 20-pin SOIC wide 4 .300”wide, 0.05” pitch FP17,18,19,20
24-pin SSOP 2 .150”wide, 0.025” pitch FP21, 22 44-pin TQFP 1 0.8mm pitch FP25 16-Pin SSOP 2 .150” wide, 0.025” pitch FP26,27 208-pin PQFP 1 0.5mm pitch FP28 144-pin TQFP 1 0.5mm pitch FP29 80-pin TQFP 1 0.5mm pitch FP30
FP28, 29, 30 co-exist at a 208-pin PQFP area
176-pin PQFP 1 0.5mm pitch FP31 100-pin TQFP 1 0.5mm pitch FP32 48-pin TQFP 1 0.5mm pitch FP33
FP31,32,33 co-exist at a 176-pin PQFP area
26x26 BGA matrix 1 0.05” pitch 25x25 0.1” through hole area
2 @ 1x30 0.1” through hole rails for 3.3VCC 2 @ 1x30 0.1” through hole rails for GND 1 @ 1x30 0.1” through hole rail for 5VCC
As shown in Table 3-3, the surface-mount footprints are carefully selected based on three factors. 1) The footprints can be used for industry
standard, surface-mount logic devices.
2) The footprints accommodate current CPLDs and FPGAs.
3) If the designer wants to build a complex design on the Local bus or separate the bus at the DPRAMs, there are enough footprints for a CPU, memory, programmable control logic, bus transceivers and discrete devices.
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 12 © 2004 PLX Technology, Inc. All rights reserved.
Section 3 Prototyping Area Hardware Architecture
3.9.2 The Common BGA Landscape
This RDK provides a 0.05” common pitch BGA landscape in the prototyping area. BGA1 is a full matrix of 26x26 @ 0.05” pitch with the plated-hole size of 0.022” diameter +/- 0.001”. We suggest using Ironwood Electronics (web site: www.ironwoodelectronics.com) BGA Land Sockets and/or Minigrid Sockets. Designers can convert a BGA to a PGA and prototype a BGA chip on this RDK.
Refer to Figure 3-2; if designers use the BGA1 landscape; they can choose either a) or b):
a) 1. Buy the Minigrid Socket and BGA Land
Socket.
2. Solder the Minigrid Socket to the PC board.
3. Solder the BGA device to the Land Socket and plug the Land Socket to the Minigrid Socket.
b) 1. Buy BGA Land Sockets only.
2. Solder the BGA device on the top of the Land Socket and solder the Land Socket to the PC board.
BGA Device
Ironwood BGALand Socket
Ironwood MinigridSocket (Optional)
Target PCB
Solder
Plug
Solder
0.014"
0.018"
Figure 3-2. BGA Landscapes
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. 13
Section 3 Hardware Architecture Configuring the RDK board
3.10 Configuring the RDK board
Multiplexed Mode Install R27 Non-Multiplexed Mode (default) Install R29
16-bit DPRAM (default)
Install RN33, RN35, RN37 and R47
32-bit DPRAM Install RN34, RN36, RN38 and R47
Enable left port advanced counter of DPRAM(s) (default)
Install R59
Disable left port advanced counter of DPRAM(s)
R58
Configure left port of DPRAM to pipelined mode (default)
R61
Configure left port of DPRAM to flow-through mode
R62
Active high local interrupts Install R51 and R86
Active low local interrupts (default) Install R49 and R50
3.11 Memory Access to the DPRAM The data in the dual-port memory can be easily viewed, monitored or modified by using the function keys in the Memory Display dialog box. Refer to the PLXMon Software instructions included in the PLX PCI SDK for more information.
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 14 © 2004 PLX Technology, Inc. All rights reserved.
4. PCB Layout Considerations
4.1 Requirements of Standards In order to demonstrate the CompactPCI Hot Swap functions, board design rules of multiple standards have been considered in the RDK PCB layout. These major design rules are listed as follows: 1. PCI bussed signals, AD[0:31], C/BE[0:3]#,
PAR, FRAME#, IRDY#, TRDY, STOP#, LOCK#, IDSEL, DEVSEL#, PERR#, SERR# and RST#, from the CompactPCI connector, J1, should pass through a 10 ohm stub termination resistor and connect to the PCI 9030. (CompactPCI and Hot Swap Specifications)
2. The Trace length of PCI bussed signals from the CompactPCI connector J1 to the stub terminal resistor shall not exceed 15.2mm or 0.6 inch. (Hot Swap)
3. The total trace length from connector J1 through stub terminal resistor to PCI 9030 shall not exceed 38.1mm or 1.5 inches. (Hot Swap)
4. The trace characteristic impedance of CompactPCI signals shall be 65 ohm+/-10% (Hot Swap)
5. On Peripheral boards, the PCI clock signal length shall be 63.5mm+/-2.54mm (2.5 inches +/- 0.1 inches, and shall drive only one load on the board. (CompactPCI)
6. The J1 connector shall shield at row F on the board. (CompactPCI)
7. For unused power pins and power pin that do not connect directly to low impedance power planes, the decoupling shall be between 0.01 to 0.2uF high frequency ceramic capacitor per power pin. The trace from pin to the capacitor pad shall not be greater than 15.2mm or 0.6 inch with trace width at least 0.5mm or 0.02 inch. (Hot Swap)
8. A board that does not support the IEEE standard 1149.1 interface must hardwire the board’s TDI pin to its TDO pin (PCI Specification)
4.2 μBGA Footprint Layout The RDK is a six-layer CompactPCI board with a 0.8mm μBGA pitch and it includes a 180-pin PCI 9030 μBGA device. To maintain low cost 5mil trace/5mil gap requirements and to successfully route the traces out in three routing layers, the signals at the most outer two rings of the μBGA were routed on the component layer. The first inner layer routed signals at the third ring of the μBGA. The second inner layer routed the last two rings without the presence of vias on the first inter layer (see the attached gerber files for details). Also, the following pad, via and hole sizes were used. a. Pad size: 14mil (0.350mm) b. Via on the component size: 20mil
(0.508mm) c. Via on the internal routing layer: 25mil
(0.635mm) d. Via on the solder side: 25mil (0.635mm) e. The plated through hole is 6mil in diameter
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. 15
5. Converting the 6U board to a 3U board
a. At the component side, unplug the micro
switch from the Molex 3-pin header (A) b. Turn the board to the solder side c. Unscrew the three mounting screws used to
hold the PC board with the front panel (C) d. Follow the cut mark near the center of the
front panel, use a metal saw to cut out the upper 6U portion of the front panel (E)
e. Bend the PC board along the marked line near the metal strips until it separates into upper and lower portions (D)
f. Screw back the lower portion of the PC board with two screws (B)
6. Customer Support Prior to contacting customer support, please ensure you have the following information and are situated close to the computer that contains the CompactPCI 9030RDK-LITE.
1. Serial Number of the PLX CompactPCI 9030RDK-LITE
2. Type of processor on the evaluation board
3. Operating System and type
4. Description of problem You may contact PLX Technology, Inc. Customer Support at: Address: PLX Technology, Inc. 870 West Maude Avenue Sunnyvale, CA 94085 Phone: 408-774-9060 800-759-3735 Fax: 408-774-2169 Email: USA; http://www.plxtech.com/support/. Europe, Middle East and South Africa; [email protected] Asia Pacific, China & Australia; [email protected] Website: http://www.plxtech.com 7. References
1. PLX Technology, Inc. PCI 9030 Data Book PLX Technology, Inc., 870 West Maude Avenue, Sunnyvale, CA 94085 USA http://www.plxtech.com
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 16 © 2004 PLX Technology, Inc. All rights reserved.
8. ABEL Code / Bill of Materials / Schematics The following pages contain the ABEL code, Bill of materials, and the schematics for the CompactPCI 9030RDK-LITE circuit board.
8.1 ABEL code for U13 Module dpramctr Title 'DPRAM controller' "Special constants x,c,z = .X.,.C.,.Z.; "It is the control signals to the Dual-Port memory "on the PCI 9030RDK-LITE board. "2/9/2000 Declarations "inputs CLK,OE pin 1, 11; CS0L,ADSL,BLASTL,LWRL pin 2, 4, 5, 9; "outputs CE0LL,RWLL pin 19,12; CE0WL pin 18 is type 'reg'; DPRAMADSL pin 17 is type ' reg_d '; Q1,Q0 pin 13,14 is type'reg,invert'; SREG = [Q1,Q0]; "State Values S0 = [0,0]; S1 = [0,1]; S2 = [1,1]; Equations RWLL = !LWRL; DPRAMADSL := ADSL; !CE0LL = (!LWRL & !CS0L) # (LWRL & !CE0WL); [CE0WL,Q1,Q0,DPRAMADSL].CLK = CLK; [CE0WL,Q1,Q0,DPRAMADSL].OE = !OE; state_diagram SREG; state S0: if (LWRL & !CS0L & !ADSL) then S1 with CE0WL:=0; else S0 with CE0WL:=1; state S1: if (LWRL & !CS0L & BLASTL) then S1 with CE0WL:=0; if (LWRL & !CS0L & !BLASTL) then S2 with CE0WL:=1; state S2: if (LWRL & !CS0L & !ADSL) then S1 with CE0WL:=0; else S0 with CE0WL:=1; END dpramctr
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. 17
Section 8 ABEL Code / Bill of Materials / Schematics Bill of Materials
Table 8-1. Bill of Materials
Item No. Qty. Manufacturer Manufacturer's Part
Number Description Package Type Source Component Designator(s)
SURFACE MOUNT COMPONENTS 1 1 Linear Technology LTC1643LCGN IC, PCI Hot Swap controller 16-pin 0.15" SSOP Marshall U1
2 1 Fairchild Semi. NC7SZ04M5 IC, Tiny Logic single hex inverter 5-pin SOT23, SMT Arrow Elect. U2
3 1 Fairchild Semi. NC7SZ02M5 IC, Tiny Logic two input NOR gate 5-pin SOT23, SMT Arrow Elect. U3
4 1 Fairchild Semi. FDR4420A IC, single N channel MOSFET Super SOT-8 Digi-Key U4
5 1 Linear Technology LT1587CM-3.3 IC, 3A 5V to 3.3V LDO regulator
SMT, M package, 3-lead plastic DD PAK **Marshall U5
6 1 PLX PCI 9030-AA60BI IC, PCI I/O accelerator, 3.3V 180-pin 0.8mm pitch μBGA PLX provides U6
7 1 Cypress CY2305SC-1 IC, zero delay buffer, 3.3V, 250ps skew 8-pin 150-mil SOIC FAI U9
8 1 Cypress CY7C09349AV-9AC IC, Dual-port SRAM,
9 ns delay, 3.3V, Package name A100
100-pin TQFP, package name A100 FAI U11
9 1 Maxim MAX6306UK30D1-T IC, Reset Controller, 140ms reset SOT23-5 Digi-Key U15
10 1 M-Tron M213FGN1.8432MHz OSC, 3.3V 1.8432MHz oscillator
5.0x7.0x1.75mm,surface mount
M-Tron 800-762-8800 U16
11 1 Exar ST16C550CQ48 IC, UART with 16-byte FIFOs, 3.3V
100-pin TQFP, 0.5mm pitch
Nu Horizons, Arrow, Future
Electronics U17
12 1 Maxim MAX3245CAI IC, RS232 transceiver, 3T/5R, 3.3V 28-pin SSOP Digi-Key U18
13 1 Motorola 1SMA12CAT3 IC, 12V Zener diode SMA Case 403B-01 Plastic. SMT
Avnet, 408-435-3500 D1
14 1 Panasonic LNG901CFBW LED, blue, 500mcd T1 3/4, through hole Digi-Key D2 15 5 Hewlett Packard HSMG-C650 LED, green, SMT, 1206 Digi-key D3-D7
17 1 AMP 352068-1 Connector, 2mm hard metric PCB mount connector Z-PACK 2mm HM Newark J1
18 1 SPC DE-9P-FRS Connector, 9-pin, D-type, Male Right angle PCB mount Digi-key J5
19 1 AMP 1-104655-1 Header assembly, two row 100-pin, 50 mil pitch SMT Electrosonic J4
20 1 Samtec TSM-106-01-T-SV Terminal strip, 1x6, 0.1"oc, PCB mounted SMT FAI J2
21 6 Samtec TSM-110-01-T-DV Terminal strip, 2x10, 0.1"oc, PCB mounted SMT FAI LAH1 - LAH6
22 1 Samtec TSM-129-01-T-DV Terminal strip, 2x29, 0.1"oc, PCB mounted SMT FAI J3
23 3 Samtec ICF-308-T-O Socket, 8-pin DIP, 300 mil, for serial EEPROM SMT, 8-pin DIP FAI U8, U10, U14
24 1 Samtec PLCC-020-T-N Socket, 20-pin PLCC SMT, 20-pin PLCC FAI U13 25 1 Samtec PLCC-032-T-N Socket, 32-pin PLCC SMT, 32-pin PLCC FAI FP1 26 1 Molex 53398-0390 Header, 1.25mm pitch SMT, straight FAI S1 27 1 Omron B3S1002 Switch, Push Button SMT, Digi-key S2
28 1 Kemet C0805C473M5UAC Cap. ceramic, 0.047uF, 50V, 20% SMT, 0805 Electrosonic C12
29 30 Kemet C0805C103M5UAC Cap. ceramic, 0.01uF, 50V, 20% SMT, 0805 Electrosonic
C1-C8, C28-C35, C50-C54, C60-C64, C70-C73
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. 19
Section 8 ABEL Code / Bill of Materials / Schematics Bill of Materials
30 35 Kemet C0805C104M5UAC Cap. ceramic, 0.1uF, 50V, 20% SMT, 0805 Electrosonic
C9-C11, C13, C15, C18, C20-C27, C44-C49, C55-C59, C65-C69, C75-C79
31 10 Panasonic ECS-T1DC106R Cap. tantalum, 10uF, 20V, Ccase SMT, Ccase Newark C14, C16, C19,
C74, C91-C96 32 1 Steward L10805E400R Ferrite chip, 500mA SMT, 0805 Digi-Key L1
33 16 CTS 742-08-3-100-J-BK Res. Network, 10 ohm, 5%, 4R, isolated SMT, Ccase Digi-Key
RN1-RN13, RN33, RN35,
RN37
34 24 CTS 742-08-3-103-J-BK Res. Network, 10K, 5%, 4R, isolated SMT,Ccase Digi-Key
RN14-RN32, RN39, RN41-
RN44
35 1 CTS 766-14-3-103-G-SP Res. Network, 10K, 2%, 7R, isolated SMT, Ccase Digi-Key RN40
36 11 Panasonic ERJ-6GEYJ0R0V Res. zero ohm, 1/10W, 5% SMT, 0805 Digi-Key R29, R46, R65-R72, R76
37 1 Vishay WSL1206R010FRE4 Res. 0.01 ohm, 1/4W, 1% SMT 1206 Electrosonic R13
38 1 Vishay WSL2010R018FB43 Res. 0.018 ohm, 1/2W, 1% SMT, 2010 Electrosonic R10
39 2 Vishay WSL1206R100FRE4 Res. 0.1 ohm 1/10W, 1% SMT, 1206 Electrosonic R1-R2 40 4 Panasonic ERJ-14RQJR22 Res. 0.2 ohm, 1/10W, 5% SMT, 1210 Digi-Key R3-R6 41 1 Panasonic ERJ-6GEYJ100V Res. 10 ohm, 1/10W, 5% SMT, 0805 Digi-Key R11 42 6 Panasonic ERJ-6GEYJ220V Res. 22 ohm, 1/10W, 5% SMT, 0805 Digi-Key R18-R22, R52 44 2 Panasonic ERJ-6GEYJ101V Res. 100 ohm, 1/10W, 5% SMT, 0805 Digi-Key R12, R16 45 5 Panasonic ERJ-6GEYJ151V Res. 150 ohm, 1/10W, 5% SMT, 0805 Digi-Key R36-R40 46 1 Panasonic ERJ-6GEYJ102V Res. 1K, 1/10W, 5% SMT, 0805 Digi-Key R15, R23 47 1 Panasonic ERJ-6GEYJ122V Res. 1.2K, 1/10W, 5% SMT, 0805 Digi-Key R8 48 2 Panasonic ERJ-6GEYJ202V Res. 2K, 1/10W, 5% SMT, 0805 Digi-Key R7, R9 49 1 Panasonic ERJ-6GEYJ302V Res. 3K, 1/10W, 5% SMT, 0805 Digi-Key R14
50 29 Panasonic ERJ-6GEYJ103V Res. 10K, 1/10W, 5% SMT, 0805 Digi-Key
R17, R24-R25, R30-R35, R42-R45, R49, R51, R53-R57, R59-R61, R63, R73-R74, R77-R78,
R83
51 6 Panasonic ERJ-6GEYJ106V Re. 10M, 1/10W, 5% SMT, 0805 Digi-Key R79-R82, R84-R85
MANUALLY INSERTED COMPONENTS
52 1 Ecliptek EP1345HSPD-60.000M OSC, 60MHz clock oscillator, 3.3V, 50ppm, 40-60% duty
cycle 8-pin half size DIP Ecliptek U8
53 1 Lattice Semi. GAL16LV8-5LJ IC, PLD, 8in/8io, 5ns delay, 3.3V 20-pin PLCC FAI U13
54 1 Fairchild Semi. NM93CS56LN IC, 2Kb serial EEPROM, 3.3V 8-pin DIP Avnet, Arrow,
Future Electronics
U10
MISCELLANEOUS COMPONENTS
56 1 90-0015-100-A PCB, CompactPCI 9030RDK-LITE Rev. 100
57 2 Kycon JS-1000 Screw, Hex, Jack, 4-40 Kycon
58 1 One Stop Systems FP-6U-04HP-PLX01
Front Panel, 6U, 4HP two type 4 handles,
micro switch assembly, and center PCB holder
One Stop Systems
(760)745-9883
PARTS THAT SHOULD NOT BE ASSEMBLED
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 20 © 2004 PLX Technology, Inc. All rights reserved.
Section 8 ABEL Code / Bill of Materials / Schematics Bill of Materials
8 0 Cypress CY7C09349V-9AC IC, Dual-port SRAM, 9 ns
delay, 3.3V, Package name A100
100-pin TQFP, package name A100 FAI U12
60 0 Kemet C0805C101K5XAC Cap. Ceramic, 100pF, 50V, 10% SMT, 0805 Electrosonic C17
33 0 CTS 742-08-3-100-J-BK Res. Network, 10 ohm, 5%, 4R, isolated SMT, Ccase Digi-Key RN34, RN36,
RN38
50 0 Panasonic ERJ-6GEYJ103V Res. 1/10W, 10K, 5% SMT, 0805 Digi-Key R26-R27, R41, R48, R50, R58,
R62, R64 36 0 Panasonic ERJ-6GEYJ0R0V Res. zero ohm, 1/10W, 5% SMT, 0805 Digi-Key R28, R47, R75
61 0 - - 0.1" oc 2 pin single row jumper header 2-pin through hole type JP1-JP6
Second Source Information
11 1 CTS CB3LV-3C-1.8432 OSC, 3.3V, 50ppm, 1.8432MHz oscillator 5.0x7.0x1.8mm,SMT Digi-Key U16
8 1 Cypress CY7C09349V-9AC IC, Dual-port SRAM, 9ns delay 3.3V,
100-pin TQFP package name A100 FAI U11
Note 1: Insight: (800) 677-7716 Note 2: Marshall Industries: 408-942-4600 Note 3: Avnet Electronics Marketing: 408-435-3500 PLX Part #: 91-0015-105-A
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 © 2004 PLX Technology, Inc. All rights reserved. 21
Section 8 ABEL Code / Bill of Materials / Schematics Bill of Materials
CompactPCI 9030RDK-LITE Hardware Reference Manual v1.2 22 © 2004 PLX Technology, Inc. All rights reserved.
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
CompactPCI 9030RDK-LITE BLOCK DIAGRAM
ECN HISTORY
ECN NUMBER DATE NOTE
PCI 9030 PG4
LOCAL BUS
CPCI BUS (C PCI connector J1, PG 2)
Prototyping Flash ROM Socket PG 6
User DefinedStatus LEDs PG 4
Electrical Block Diagram
Testl Headers PG7
RS232 Port PG6
PrototypeFootprints PG 8-11
JPOMConnector PG6
000 4/12/2000
Reset Circuit PG 6
SynchronousDual-Port RAM& Interface PG5
board was transferred to manufacturing
Separate Busupto 32-bit 67MHz
Signal Headers PG5
Hot Swap Control Circuit PG 3
5VDC
3.3VDC
upto 32-bit 60MHz
32-bit 33MHz
001 6/22/2001 changed R83 at TRST# from puii-up to pull-down002 6/21/2002 Modified contents
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY, INC.870 Maude Ave, Sunnyvale, CA 94085
Custom
1 12Thursday, July 25, 2002
www.plxtech.comTitle
Size Document Number Rev
Date: Sheet of
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Compact PCI J1TO PCI 9030
Hot Swap PICMG 2.1 R1.0Complied
CompactPCI J1 Connector
Stub Terminal Resistors
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY870 Maude Ave, Sunnyvale, CA 94085
Custom
2 12Thursday, July 25, 2002
www.plxtech.comTitle
Size Document Number Rev
Date: Sheet of
PCI_AD0
PCI_INTA#
PCI_TRDY#
PCI_AD15
PCI_C/BE0#
PCI_AD6
PCI_AD10
PCI_AD21
PCI_AD12
PCI_AD23
PCI_AD25
PCI_AD30
PCI_AD9
PCI_PAR
PCI_SERR#
PCI_AD13
PCI_AD26
PCI_RST#
PCI_AD11
PCI_AD31
PCI_C/BE1#
PCI_IRDY#
PCI_IDSEL
PCI_AD1
PCI_C/BE2#
PCI_AD3
PCI_AD8
PCI_AD20
PCLK
PCI_AD2
PCI_AD4PCI_AD5
PCI_AD19
PCI_AD24
PCI_STOP#
PCI_AD7
PCI_AD22
PCI_AD17
PCI_BD_SEL#
PCI_AD14
PCI_AD16
PCI_AD27
PCI_AD29
PCI_FRAME#
PCI_DEVSEL#
PCI_LOCK#
PCI_AD28
PCI_C/BE3#
PCI_AD18
PCI_PERR#
PCI_HEALTHY#
PCI_ENUM#
AD20
AD16C/BE2L
PCI_AD18
PCI_AD16
PCI_AD20
PCI_AD17
PCI_C/BE2#
AD17
AD18AD19
AD21
IDSELC/BE3L
AD24
AD22
AD25
AD23
PCI_AD19
PCI_AD21
PCI_IDSEL
PCI_AD24PCI_AD25
PCI_C/BE3#
PCI_AD22
AD26AD27
PCI_AD26PCI_AD27
AD7 PCI_AD7
PCI_AD8
AD4PCI_AD3PCI_AD4
AD1AD2
AD5AD6AD3
PCI_AD2PCI_AD1
PCI_AD6PCI_AD5
PCI_ENUM#AD0ENUML
PCI_AD0
AD28 PCI_AD28AD29
AD31AD30
HEALTHYLPCIRSTL
PCI_HEALTHY#
PCI_AD31
PCI_AD29PCI_AD30
PCI_RST#
DEVSELL
BD_SELLTRDYL
IRDYL
FRAMEL
LOCKLSTOPL
PERRL
AD13
AD15
SERRL
PARC/BE1L
AD12AD11
PCI_AD14PCI_AD15
PCI_PAR
PCI_SERR#
PCI_C/BE1#
PCI_AD13
PCI_AD10
AD[31:0]
AD10PCI_AD11
AD14
PCI_AD12
AD9 PCI_AD9AD8
PCI_DEVSEL#
PCI_LOCK#PCI_PERR#
PCI_TRDY#
PCI_STOP#
PCI_IRDY#
PCI_FRAME#
PCI_BD_SEL#
PCI_AD23
PCI_INTA#
AD0AD1AD2AD3AD4AD5AD6AD7AD8AD9AD10AD11AD12AD13AD14AD15AD16AD17AD18AD19AD20AD21AD22AD23AD24AD25AD26AD27AD28AD29AD30AD31
INTAL
C/BE0L PCI_C/BE0#
AD[31:0]4
PCLK4
ENUML4
C/BE1L4PAR4
SERRL4PERRL4LOCKL4STOPL4
DEVSELL4TRDYL4
BD_SELL3,4IRDYL4
FRAMEL4C/BE2L4
C/BE3L4IDSEL4
HEALTHYL3INTAL4
PCIRSTL3
C/BE0L4
3.3VCPCI
+12VCPCI
VIOPCI
-12VCPCI
5VCPCI
LONG_3.3V
LONG_5V
LONG_VIO
R10.1
R30.2
C3
0.01uF
C5
0.01uF
R20.1
R40.2
C7
0.01uF
C1
0.01uF
RN2
742-08-3-100-J
1234 5
678
RN1
742-08-3-100-J
1234 5
678
RN4
742-08-3-100-J
1234 5
678
RN3
742-08-3-100-J
1234 5
678
RN6
742-08-3-100-J
1234 5
678
RN5
742-08-3-100-J
1234 5
678
RN7
742-08-3-100-J
1234 5
678
RN10
742-08-3-100-J
1234 5
678
RN9
742-08-3-100-J
1234 5
678
RN8
742-08-3-100-J
1234 5
678
RN12
742-08-3-100-J
1234 5
678
RN11
742-08-3-100-J
1234 5
678
RN13
742-08-3-100-J
1234 5
678
C2
0.01uF
C4
0.01uF
C6
0.01uF
C8
0.01uF
Co
mp
actP
CI C
onne
ctor
J1
J1
-12VB1
+12V D1
3.3VCCL C6
3.3VCCL C22
VI/OL C4
VI/O C8
VI/O C16
VI/O C20
VI/OLC24
AD0D24
AD1A24
AD2E23
AD3C23
AD4B23
AD5E22
AD6D22
AD7A22
AD8C21
AD9B21
AD10E20
AD11D20
AD12A20
AD13E19
AD14C19
AD15B19
AD16C11
AD17B11
AD18A11
AD19E10
AD20D10
AD21A10
AD22E9
AD23C9
AD24E8
AD25D8
AD26A8
AD27E7
AD28C7
AD29B7
AD30A7
AD31E6
C/BE0#E21
C/BE1#E18
C/BE2#E11
C/BE3#A9
INTA#A3
INTB#B3
INTC#C3
INTD#E3
GND B6
GNDB8
GND B10
GND B16
GND B18
GND B20
GNDB22
GNDL D5
GNDL D7
GNDL D9
GNDL D11
GNDLD17
GNDL D19
GND F1
GND F2
GNDF3
GND F4
GND F5
GND F6
GND F7
GNDF8
GND F9
GND F10
GND F11
GNDF15
GND F16
GND F17
GND F18
GND F19
GNDF20
GND F21
GND F22
GND F23
GND F24
GNDF25
TDI E2
TRST# C1
TCK A2
TMSC2
TDO D2
SBO# C17
SDONE B17
M66END21
ACK64# E24
REQ64# B25
BRSVP1A4 A4
BRSVP1A5A5
BRSVP1B5 B5
INTP D4
INTS E4
GNT#E5
FRAME#B15
IRDY#C15
DEVSEL#A16
TRDY#E15
STOP#D16
IDSELSB9
LOCK#E16
PARD18
PERR#E17
SERR#A18
PCI_RST#C5
HEALTHY#B4
BD_SEL#SD15
ENUM#C25
CLKD6
REQ#A6
3.3VCC A15
3.3VCCA17
3.3VCC A19
3.3VCC A21
3.3VCC A23
3.3VCC C10
3.3VCCC18
3.3VCC D25
5VCCL D3
5VCCLD23
5VCC A1
5VCC A25
5VCC B2
5VCC B24
5VCCE1
5VCC E25
NC
A12
NC
A13
NC
A14
NC
B12
NC
B13
NC
B14
NC
C12
NC
C13
NC
C14
NC
D12
NC
D13
NC
D14
NC
E12
NC
E13
NC
E14
NC
F12
NC
F13
NC
F14
R50.2 R6
0.2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Hot Swap control circuit
Hot Swap Control Circuit
BLUE LEDS: 1. PANASONIC, LNG91LCFBW orLNG901CFBW or LNG992CFBW.2. HP, HLMP-CB30 orHLMP-CB31
SWITCH & LED
1SMA12CAT3
ESD Strip Circuits - 3 Places
Bottom
Middle
Top
Handle isunlocked
Handle islocked
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY870 Maude Ave, Sunnyvale, CA 94085
Custom
3 12Thursday, July 25, 2002
WWW.PLXTECH.COMTitle
Size Document Number Rev
Date: Sheet of
3.3V_3A
PCIRSTL LOCAL_RSTL
CPCISW
LEDonL
ESD_STRIP3ESD_STRIP2
ESD_STRIP1
ESD_STRIP6ESD_STRIP5
ESD_STRIP4
ESD_STRIP9ESD_STRIP8
ESD_STRIP7
HEALTHYL2
PCIRSTL2
BD_SELL2,4
LOCAL_RSTL 4
CPCISW4
LEDonL4
3.3VCC
LONG_VIO
5VCPCI
+12VCPCI
+12V
-12V
-12VCPCI
LONG_3.3V
LONG_VIO
LONG_5V
LONG_5V
5VCC
C12
0.047UF
12
C15
0.1uF
12
R13
0K0 1/4W
1 2
R81.2K
R92K
R72K
C11
0.1UF
C10
0.1UF
R10 0.018, 1/2W, 1%
R12100
C9
0.1UF
+C14
10UF
R11 10
C13
0.1uF
S1
Molex 3-pin header
12
3
R143K
12
D2BLUE_LED
21
R151K
12
R16
75
12
+C16
10uF
U2
NC7SZ04M5
IN_A2 NOT_A 4
GND3
NC1 VCC 5U3
NC7SZ02M5
INB2 NOR_Y 4
GND3
INA1 VCC 5
R17
10K
U5LT1587CM-3.3
VIN3
AD
J1
VOUT 2
U4 FDR4420A
DRAIN1 1
DRAIN2 2
DRAIN33
GATE4
SOURCE1 5
DRAIN4 6
DRAIN5 7
SOURCE28
U1
LTC1643L
3VOUT 3
GATE 11
5VIN 13
5VSENSE 12
12VOUT 16
VEEOUT15
5VOUT 14
3VIN9
3VSENSE 10
ON#5
PWRGD#7
FAULT#6
TIMER4
GND8
VEEIN2
12VIN1
R81 10M1 2
R82 10M
12m269
1
m270
1 m267
1 m272
1
m271
1
m268
1
R79
10M
12
R80 10M
12m277
1
m278
1 m275
1 m274
1
m273
1
m276
1
D1
12V
21
R85
10M
12
R84 10M
12m279
1
m280
1 m281
1 m284
1
m283
1
m282
1
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Clock Circuit
JTAG Port
User Defined Status LEDsand Power LED
Multiplexed mode: install R27non-multiplexed mode: install R29(default).Non hot swap system: install R28.
Default settings for pin C12, B12, A12-A13 are address lines.Otherwise, pull-up or pull-down resistors may be required.
PCI9030, Clock Circuit, E2PROM& LEDs
0.8mm pitch 180-pin
Install R49 and R51 (default) Do not install R48 and R50
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY, INC.870 Maude Ave, Sunnyvale, CA 94085
Custom
4 12Thursday, July 25, 2002
www.plxtech.comTitle
Size Document Number Rev
Date: Sheet of
PEPRE
VD1
VD3
VD4
GD1
GD2
GD3
GD4
VD5
WRL
ADSLBLASTL
LBE0L
LBE2LLBE1L
LBE3L
LA11
LA17LA16 LA20LA15
LA2LA3
LA18
LA4
LA10LA19
LA5
LA14
LA9
LA7LA6
LA21
LA8
BTERMLREADYLLW/RL
LREQCS1L
LA13LA12
LA23LA24/GPIO7LA22LA25/GPIO6LA26/GPIO5LA27/GPIO4
LD1LD0
LD2LD3
LD5
LD11LD10 LD14LD9
LD12LD4LD13
LD8
LD15LD7LD6
LD25LD21
LD19LD26
LD20
LD22LD23
LD17LD18
LD24
LD27
LD16
LD31
LD29LD30
LD28
RDL CS0L
AD[31:0]
LD29LD28
AD23
AD13
AD29
LEDonL
EEDI
GPIO0/WAITo#
READYL
LINTi1
LA2LA3
LA8
LA18
PERRL
LA20
AD1
LA[23:2]
LD27
LD9
LA11
LD14
AD9
AD12
AD18
LA17 INTAL
AD6
AD8
PCLK
RDL
LD6
LA27/GPIO4
AD26
AD31
LA5
LA16
STOPL
C/BE1L
PAR
AD19
AD0
AD11
AD28
GPIO1/LLOCKoL
MODE
MODE
LPMINTL
CS0L
LD16
LD12
C/BE0L
AD20
EESK
LW/RL
LA14LA15
AD21
AD30
LGNT
LD26
LA7
AD16
AD27
IDSEL
BLASTL
LREQ
LCLK
LPMESET
CPCISW
GPIO2/CS2L
LD23
LA10
LD8
LOCKL
AD10
BD_SELL
BTERML
LA9
LA26/GPIO5
IRDYL
AD4
AD7
AD15
GPIO3/CS3L
ALE
LD25
LD22
LD5
LD20
LD3
LD0
LD11
C/BE3L
AD22
LD31
LD21
LD2
LA4
LD10
LA12
LA25/GPIO6
SERRL
AD24
AD5
LBE3L
LOCAL_RSTL
GPIO8
LD24
LD19
LD15
LA22
LA24/GPIO7
AD3
AD14
LBE1L
EEDO
LD4
LD1
LA13
LA19
AD2
ENUML
LRESEToL
EECS
CS1L
LD30
LD18
LA6
LD7
LA21
C/BE2L
FRAMEL
AD25
LBE0L WRL
ADSL
LINTi2
LD[31:0]
LD17
LD13
LA23
DEVSELL
TRDYL
AD17
LBE2L
VD2
GD5
BD_SELL
TDOTRSTLTDITMSTCK
OSCCLK
LVCC
GPIO0/WAIToL
GPIO1/LLOCKoL
GPIO2/CS2L
GPIO3/CS3L
GPIO8
LPMESET
LINTi1
LINTi2
AD[31:0] 2LD[31:0]5,6,7
LA[23:2]5,7
DPRAMCLK 5
POMCLK 6
GPIO85,7
LPMINTL7
IDSEL2
FRAMEL 2
STOPL 2DEVSELL 2PERRL 2SERRL 2
LOCKL 2PAR 2INTAL 2
ADSL 5,6,7ALE 6,7BLASTL 5,6,7LW/RL 5,6,7RDL 7WRL 7READYL 6,7
LRESEToL 6,7
CS1L 6,7GPIO3/CS3L 7GPIO2/CS2L 7GPIO1/LLOCKoL 6,7GPIO0/WAIToL 6,7
LREQ 6,7
LINTi2 7
CS0L 5,7
PCLK2LOCAL_RSTL3
BTERML 6,7
C/BE0L 2C/BE1L 2C/BE2L 2C/BE3L 2
IRDYL 2
LBE0L5,6,7LBE1L5,6,7LBE2L5,6,7LBE3L5,6,7
LCLOCK 7
TRDYL 2
LA24/GPIO77LA25/GPIO67LA26/GPIO57LA27/GPIO47
LGNT 6,7LINTi1 6,7
BD_SELL2,3
LPMESET7
CPCISW 3LEDonL 3
ENUML 2
EEDO 7EEDI 7EESK 7EECS 7
MODE7
LONG_3.3V
3.3VCC
3.3VCC
3.3VCC
3.3VCC
LONG_3.3V
LONG_3.3V
3.3VCC3.3VCC
3.3VCC
3.3VCC 3.3VCC
3.3VCC
3.3VCC
3.3VCC3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC 3.3VCC 3.3VCC
3.3VCC3.3VCC3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
LONG_VIO
C44
0.1uF
C18
0.1uFR19 22
R20 22
L1Ferrite 500mA
+ C1910uF
R18 22
PA1
U9
CY2305
CLK1 3
CLK2 2
CLK35
CLK4 7
CLKOUT 8
VDD6
GND4
REF1
R21 22
R22 22
J2
1x6 header
123456
R36 150
R38 150
PA2
PA3
PA4
PA5R39 150
R40 150
R28
0
RN14
742-08-3-103-J-XX
1234 5
678
RN15
742-08-3-103-J-XX
1234 5
678
RN18
742-08-3-103-J-XX
1234 5
678
RN21
742-08-3-103-J-XX
1234 5
678
RN20
742-08-3-103-J-XX
1234 5
678
RN19
742-08-3-103-J-XX
1234 5
678
RN24
742-08-3-103-J-XX
1234 5
678
RN22
742-08-3-103-J-XX
1234 5
678
RN16
742-08-3-103-J-XX
1234 5
678
RN17
742-08-3-103-J-XX
1234 5
678
RN25
742-08-3-103-J-XX
1234 5
678
RN27
742-08-3-103-J-XX
1234 5
678
RN26
742-08-3-103-J-XX
1234 5
678
RN28
742-08-3-103-J-XX
1234 5
678
RN29
742-08-3-103-J-XX
1234 5
678
RN30
742-08-3-103-J-XX
1234 5
678
RN31
742-08-3-103-J-XX
1234 5
678
RN32
742-08-3-103-J-XX
1234 5
678
R41 10K
U10
93CS66L(8DIP-Socket)
CS1
SK2
DI3
DO4
VCC 8
PRE7
PE 6
GND 5
R27 10K
R26
10KR37 150
D3GREEN2 1
D4GREEN2 1
D5GREEN2 1
D6GREEN2 1
D7 GREEN2 1
R231K
C25
0.1uF
C35
0.01uF
C24
0.1uF
C23
0.1uF
C32
0.01uF
C34
0.01uF
C30
0.01uF
C22
0.1uF
C29
0.01uF
C27
0.1uF
C26
0.1uF
C20
0.1uF
RN23
742-08-3-103-J-XX
1234 5
678
R29
0
R25
10K
C33
0.01uF
C28
0.01uF
C21
0.1uF
R24
10K
C17100pF
C31
0.01uF
R34 10K
R35 10K
R33 10K
R32 10K
R31 10K
R8310K
PA7
U8
60MHz OSC
VCC8
GND4 NC 1
OUT 5
R30 10K
R49 10K
R51 10K
R48
10K
R50
10K
PCI Signals
PCI Signals
PCI Signals
PCI Signals
PCI Signals
PCI 9030
U6
PCI9030-uBGA
LINTi1B8
BTERM# B10
READY#C10
LREQ E8
BLAST# B11
GPIO0/WAITo# D8
LGNT A9
LINTi2 C8
ADS# C11
LW/R# A11
EECS C7PCLKA4
WR# E10
EESKA7
EEDI D6RST#C4
IDSELE5
BD_SEL#/TESTG11
LCLKE9
MODEK9
LRESETo# D9
LBE0#N6
LBE1#M6
LBE2#P5
LBE3#M5
ENUM# N4PME# D5
AD22 D1
GPIO1/LLOCKo#A8
VD
DF
11
LEDon# K5
AD31 A3AD30 D4AD29 B3AD28C3AD27 C2AD26 B1
AD18F2AD17 F4AD16 F1AD15 J2AD14 J1AD13K2AD12 K3AD11 K1AD10 K4AD9 L2AD8L3AD7 M1AD6 L4AD5 M2AD4 M3AD3N3AD2 P2AD1 P3AD0 M4
AD25 C1
VD
DE
1V
DD
B13
VD
DM
8
VS
SJ3
VD
DN
2
VD
DJ5
VS
SA
2
VD
DN
5
VD
DK
13
VS
SA
10
VD
DP
12
INTA#B4
VS
SC
6
AD21 E3AD20 E2AD19 F3
AD23E4
PAR H1
VS
SE
13
VS
SB
14
AD24 D3
VS
SF
5
LOCK# H2
C/BE3# D2
VS
SG
13
FRAME#G2
C/BE2# G5
VS
SJ1
0
TRDY# G4
VS
SK
6
IRDY# G3
VS
SL7
C/BE1# J4
VS
SN
1
STOP# H4
C/BE0#L1
DEVSEL# G1
LA20D14
PERR#H3
SERR# H5
LA27/GPIO4A12 LA26/GPIO5A13 LA25/GPIO6B12 LA24/GPIO7C12
LD14/LAD14P11
LA23C13 LA22D11 LA21C14
LD6/LAD6L13
LA19D12 LA18E11 LA17E14 LA16E12
LD7/LAD7M14
LA15F14
LD8/LAD8N14
LA14F10 LA13F12 LA12F13 LA11G14
LD9/LAD9M13
LA10G10 LA9G12 LA8H14
LD10/LAD10M12
LA7H11 LA6H12 LA5H13 LA4H10
LD11/LAD11N13
LA3J14 LA2J11
LD12/LAD12N12
LD13/LAD13L11
LD15/LAD15M11
LD17/LAD17L10
LD0/LAD0J13
LD18/LAD18P10
LD1/LAD1K14
LD19/LAD19M10
LD2/LAD2K12
LD3/LAD3L14
LD20/LAD20P9
LD4/LAD4K11
LD5/LAD5K10
LD21/LAD21N9
LD22/LAD22L9
LD23/LAD23P8
LD24/LAD24N8
LD25/LAD25L8
LD26/LAD26P7
LD16/LAD16N11
LD27/LAD27M7
LD28/LAD28N7
LD29/LAD29K7
LD30/LAD30P6
LD31/LAD31L6
VD
DB
2
VD
DB
6
VS
SN
10
VS
SP
13
EEDO E7
TCKA6
TMSB5
TDIA5
TRST#E6
TDOC5
VI/O
L5
ALEM9
RD# D10GPIO8L12
CS0# C9
CS1# B9
GPIO3/CS3# B7
GPIO2/CS2# D7
CPCISWP4
BCLKo K8
LPMESETJ12
LPMINT#D13
NC
A1
NC
A14
NC
P1
NC
P14
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Dual-port RAM and Interface Circuits
DPRAM, Interface Circuits, & Test Header
16-bit bus: install RN33, RN35, and R37 (default)32-bit bus: install RN34, RN36, and R38
SynchronousDual-Port SRAM 4K x 18
SynchronousDual-Port SRAM 4K x 18
16-bit: install R46 (default)32-bit: install R47
Install R57, R59, R60, and R61.Do not install R58 and R62
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY, INC.870 Maude Ave, Sunnyvale, CA 94085
Custom
5 12Thursday, July 25, 2002
www.plxtech.comTitle
Size Document Number Rev
Date: Sheet of
A0
AR8
LD20DR19
A9
DR20
DR30
LD21
DR27
CLKR
A1
LD17
AR1
AR4
AR6
DR22LD23
LD31
DR26
LD18
AR5
LD27
A7
A11
DR23
DR24
AR9
AR0
DR25
A2
LD16
AR2AR3
AR7
LD25LD26
DR28
CLKL
LD30
FTL/PIPEL
A5A6
AR10
LD29
LBE3L
UBR1L
A4
LD22
LD24
LD19
DR31
A3
AR11
DR17
DR29
LBR1L
A8
LD28
DR16
DR18
A10
DR21
LD[0:31]
CLKR
AR9
DR1
DR18
DR25
AR0
AR3
DR3DR4
DR19
DR24
ADSRL
AR2
DR5
DR8
DR16
DR21DR22
AR4AR6
DR12
DR2
DR14
DR11
DR20
DR26
AR8
DR6
DR27
DR13
DR28
AR10
DR7
AR5
AR11
DR9
DR15
DR10
DR30 DR31
CNTENRL
AR7
DR0
DR17
AR1
DR23
ADSRLCE0RLCE1RCNTENRLCNTRSTRL
CLKR
UBR0LLBR0LR/WRLOERL
CE1L
A0A1A2A3A4A5A6A7A8A9A10A11
UBL0L
CS0L
ADSL
CLKL
LD13
LD10
LD0
LD15
LD4
LD14
CLKL
LD2
LD8LD9
LD12
LD1
LD7LD6LD5
LD11
LD3
LD[0:31]
AR4
AR10
AR5
DR1DR2
DR6DR7
DR9
DR3
DR8
DR10
DR14
DR4
DR11
DR15
DR5
DR12
AR6
DR13
AR1
AR7
AR11
AR0
AR2
AR8
DR0
AR3
AR9
DR29
AR[11:0]
DR[31:0]
AR[11:0]
DR[31:0]
FTL/PIPERFTL/PIPER
AR0AR2AR4AR6AR8AR10
DR1DR3DR5DR7DR9DR11DR13DR15DR17DR19DR21DR23DR25DR27DR29DR31
AR1AR3AR5AR7AR9AR11
AR[11:0]
DR0DR2DR4DR6DR8DR10DR12DR14DR16DR18DR20DR22DR24DR26DR28DR30
DR[31:0]
A4A5A6A7
A8A9A10A11
FTL/PIPEL
R/WL
CE0LL
CNTRSTLL
DPADSLCE0LL
CE0LL
LBE2L
R/WLL
CE1LCNTENLL
DPADSL
CNTENLLCNTRSTLL
LA9
A0
LA5
LA[23:2]
A2
LA13
LA10
A1LBE1L
LA6
LA7
LA10
LA3
LA12
LA8
LA6
LA11
LA4
LA5
LA11
LA12
LA9LA8
A3LA3LA2
LA7
LA4
LA2
CE0RL
CNTRSTRL
CE1RCNTENRL
ADSRL
DPADSLGPIO8
CE1RCNTRSTRL
UBR0LLBR0L
OELL OELL
R/WRL
OERL
OERL
R/WRL
CE0RLLBR1LUBR1L
BLASTL
R/WLLLW/RL
LBE3L4,6,7LBE2L4,6,7
LD[0:31]4,6,7
DPRAMCLK4
LBE0L4,6,7
LBE3L4,6,7
LBE1L4,6,7
LA[23:2]4,7
CS0L4,7
ADSL4,6,7
LW/RL4,6,7
LD[0:31]4,6,7
LBE1L4,6,7
GPIO84,7
BLASTL4,6,7
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
R62 10K
R63 10K
R55 10K
R56 10K
R46 0
R54 10K
R44 10K
R45 10K
R42 10K
R43 10K
PB12PB13
U14
OSC socket
VCC8
GND4 NC 1
OUT5
PB44PB43
PB56
PB47
PB55
PB46
PB54
PB42PB41
PB58
PB45
PB57
PB53
PB62PB61
PB68
PB65PB64
PB60PB59
PB66
PB63
PB67
PB19PB18PB17
PB15PB16
PB14
PB29PB28
PB24
PB26PB27
PB25
PB35
PB37
PB34
PB31PB32PB33
PB38
PB30
PB36
PB39PB40
RN34
10 ohm 4R isolated
1234 5
678
RN35
10 ohm 4R isolated
1234 5
678
RN36
10 ohm 4R isolated
1234 5
678
RN37
10 ohm 4R isolated
1234 5
678
RN38
10 ohm 4R isolated
1234 5
678
R61 10K R64
10K
R52
22
R57 10K
R59 10K
R58 10K
R60 10K
PB6PB5 PB9
PB8
PB11PB10
PB1PB2
PB7
R47 0
RN33
10 ohm 4R isolated
1234 5
678
U13
GAL16LV8-5NS
VC
C20
GN
D10
IN12
IN23
IN34
IN45
IN56
IN67
IN78
IN89
IN/CLK1
IN/OE#11
IO/Q8 12IO/Q7 13IO/Q6 14IO/Q5 15IO/Q416IO/Q3 17IO/Q2 18IO/Q1 19
RN40
10K 7R Isolated
1 142 133 124 115 106 97 8
C65
0.1UF
R53 10K
RN39
742-08-3-103-J-XX
1234 5
678
U12
CY7C09349V
A0L92
IO11R 51IO10R 50IO9R 49IO8R48IO7R 47IO6R 45IO5R 44IO4R 43IO3R42IO2R 41IO1R 40IO0R 39
A11R72A10R 73A9R 74A8R 75A7R 76A6R77A5R 78A4R 79A3R 80A2R 81A1R82A0R 83
VC
C46
VC
C28
VC
C15
NC
71N
C70
NC
69N
C68
NC
6N
C5
NC
4
A11L3 A10L2 A9L1 A8L100 A7L99 A6L
98 A5L97 A4L96 A3L95 A2L94 A1L93
IO12R 52
IO13R53
IO14R 54
IO15R 55
IO16R 56
IO17R 58
NC
7
IO0L37
IO1L36
IO2L34
IO3L33
IO4L32
IO5L31
IO6L30
IO7L29
IO8L27
IO9L26
IO10L25
IO11L24
IO12L23
IO13L22
IO14L21
IO15L20
IO16L18
IO17L17
ADSL#89
CE0L#10
CE1L11
CNTENL#91
CNTRSTL#12
CLKL90
UBL#9
LBL#8
R/WL#13
OEL#14
FT#/PIPEL16
GN
D19
GN
D35
GN
D38
GN
D57
GN
D61
GN
D87
GN
D88
ADSR# 86
CE0R# 65
CE1R 64
CNTENR#84
CNTRSTR# 63
CLKR 85
UBR#66
LBR# 67
R/WR# 62
OER# 60
FT#/PIPER 59
U11
CY7C09349V
A0L92
IO11R 51IO10R 50IO9R 49IO8R48IO7R 47IO6R 45IO5R 44IO4R 43IO3R42IO2R 41IO1R 40IO0R 39
A11R72A10R 73A9R 74A8R 75A7R 76A6R77A5R 78A4R 79A3R 80A2R 81A1R82A0R 83
VC
C46
VC
C28
VC
C15
NC
71N
C70
NC
69N
C68
NC
6N
C5
NC
4
A11L3 A10L2 A9L1 A8L100 A7L99 A6L
98 A5L97 A4L96 A3L95 A2L94 A1L93
IO12R 52
IO13R53
IO14R 54
IO15R 55
IO16R 56
IO17R 58
NC
7
IO0L37
IO1L36
IO2L34
IO3L33
IO4L32
IO5L31
IO6L30
IO7L29
IO8L27
IO9L26
IO10L25
IO11L24
IO12L23
IO13L22
IO14L21
IO15L20
IO16L18
IO17L17
ADSL#89
CE0L#10
CE1L11
CNTENL#91
CNTRSTL#12
CLKL90
UBL#9
LBL#8
R/WL#13
OEL#14
FT#/PIPEL16G
ND
19
GN
D35
GN
D38
GN
D57
GN
D61
GN
D87
GN
D88
ADSR# 86
CE0R# 65
CE1R 64
CNTENR#84
CNTRSTR# 63
CLKR 85
UBR#66
LBR# 67
R/WR# 62
OER# 60
FT#/PIPER 59
PB22PB23
J3
HEADER 29X2
1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 54
565557 58
PB21PB20
PB3
PB52
PB48
PB51
PB49PB50
C45
0.1uF
C46
0.1uF
C47
0.1uF
C48
0.1uF
C49
0.1uF
C50
0.01uF
C51
0.01uF
C52
0.01uF
C53
0.01uF
C54
0.01uF
C55
0.1uF
C56
0.1uF
C57
0.1uF
C58
0.1uF
C59
0.1uF
C60
0.01uF
C61
0.01uF
C62
0.01uF
C63
0.01uF
C64
0.01uF
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Serial Port, Flash, POM Connector, Reset Circuit,
PLX Option Module Connector(PCI 9030 Multiplexed Mode)
2X50 Connector
Serial Port (DTE)
PrototypingFlash ROM Socket
User Accessible Reset Circuit
Do not install R63 ( default)
UART
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY, INC.870 Maude Ave, Sunnyvale, CA 94085
Custom
6 12Thursday, July 25, 2002
www.plxtech.comTitle
Size Document Number Rev
Date: Sheet of
ADSL
POMCLK
BLASTL
LW/RL
POMREQPOMGNT
LBE0LLBE1LLBE2L
LRESETL
LBE3L
READYL
READYL
LD31 LAD31LD30 LAD30LD29 LAD29LD28 LAD28LD27 LAD27LD26 LAD26LD25 LAD25LD24 LAD24
LD23 LAD23LD22 LAD22LD21 LAD21LD20 LAD20LD19 LAD19LD18 LAD18LD17 LAD17LD16 LAD16
LD15 LAD15LD14 LAD14LD13 LAD13LD12 LAD12LD11 LAD11LD10 LAD10LD9 LAD9LD8 LAD8
LD7LAD7LD6LAD6LD5LAD5LD4LAD4LD3LAD3LD2LAD2LD1LAD1LD0LAD0
POM_WAITL
ALE
LINTi1
USER0USER1
GPIO1/LLOCKoL
CS1L
POMCSL
BTERML
CTS
RTS
RIDTR
DSR
TXB0DTR#B1RTS#B2
RXB3DSR#B4CTS#B5CD#B6RI#B7
CD
RD
TD
B0B1B2
B3B4B5B6B7
B[0:7]
F_OEF_WE
F_A0F_A1F_A2F_A3F_A4F_A5F_A6F_A7F_A8F_A9F_A10F_A11F_A12F_A13F_A14F_A15F_A16F_A17F_A18
F_CE
F_D0F_D1F_D2F_D3F_D4F_D5F_D6F_D7
RESET#
MR#
ADD2
DD0DD1DD2DD3DD4DD5DD6DD7
RSTINTIORLIOWL
CS0CS1CS2#
OP1LOP2L
IORIOW
DDISLASL
TXRDYLRXRDYL
DD3
DD1DD2
DD0
DD7
DD5DD6
DD4
ASL
IOWLDDISL
IORL
IOW
INTIOR
RST
ADD0ADD1
LD[31:0]4,5,7
ADSL4,5,7
LW/RL4,5,7
BLASTL4,5,7
READYL4,7LRESEToL4,7
GPIO1/LLOCKoL4,7
POMCLK4
CS1L 4,7
READYL 4,7
LINTi14,7
LBE0L4,5,7LBE1L4,5,7LBE2L4,5,7LBE3L4,5,7
BTERML 4,7
CS1L4,7
ALE 4,7
LREQ4,7LGNT4,7
GPIO0/WAIToL4,7
LRESEToL4,7
+12V-12V
5VCC 5VCC3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
J4
PLX Option Module 1 (POM1)
DMAREQ0# 51
DMAACK0# 52
DMAEOT0# 53
DMAREQ1#54
DMAACK1# 55
DMAEOT1# 56
USER0 57
USER1 58
5 VCC59
3.3 VCC 60
3.3 VCC 61
ASYNC_SEL# 62
PPC_ALE_H 63
LABS264
LABS3 65
3.3 VCC 66
POM_SERR# 67
5 VCC 68
DEN#69
DT/R# 70
3.3 VCC 71
RD_STRB# 72
RESERVED 73
RESERVED74
POM_RDY_OUT# 75
3.3 VCC 76
3.3 VCC 77
POM_PRESENT# 78
BREQ_IN79
BREQ_OUT 80
BTERM_IN# 81
BTERM_OUT# 82
5 VCC 83
AD0784
AD06 85
AD05 86
AD04 87
AD03 88
AD0289
AD01 90
AD00 91
GND 92
5 VCC 93
3.3 VCC94
3.3 VCC 95
GND 96
EESDA 97
EESCL 98
+12V99
-12V 100
ADS#1
GND2
PCLK3
GND4
BLAST#5
LOCK#6
W/R#7
GND8
POM_RDY_IN#9
RESET#10
BE0#11
BE1#12
BE2#13
BE3#14
SYNC_SEL#15
GND16
IRQ_OUT#17
IRQ_IN#18
POM_REQ19
POM_GNT20
POM_WAIT#21
GND22
5 VCC23
AD3124
AD3025
AD2926
AD2827
AD2728
AD2629
AD2530
AD2431
GND32
AD2333
AD2234
AD2135
AD2036
AD1937
AD1838
AD1739
AD1640
GND41
AD1542
AD1443
AD1344
AD1245
AD1146
AD1047
AD0948
AD0849
GND50
R72 0
R71 0
R66 0
R67 0R68 0
PC9
PC8
PC7
PC2PC3
PC1
R65 0
R69 0
R70 0
PC5PC6
PC4
R77 10K1 2
R7810K
12
J5
CONN DB9-MALE
594837261
U18
MAX3245
VCC26
V+27
V-3
GND25
C1+ 28
C1- 24
C2+ 1
C2- 2
T1IN14
T2IN13 T1OUT 9
T2OUT 10
FORCEOFF#22
FORCEON23
T3IN12 T3OUT 11
R5OUT15 R4OUT16 R3OUT17 R2OUT18 R1OUT19 R2OUTB20
R1IN 4
R2IN 5
R3IN 6
R4IN 7
R5IN8
INVALID#21
+C7410uF
12
PC28PC29
PC30PC31
PC32PC33
PC34PC35
PC58PC59PC60PC61PC62PC63PC64PC65
PC36PC37PC38PC39PC40PC41PC42PC43PC44PC45PC46PC47PC48PC49PC50PC51PC52PC53PC54
PC55PC56PC57
U15
MAX6306UK30D1-T
VCC 5MR#3
RESET# 1
GND 2RST_IN4
R7310K
R7410K
PC66
R750R760
PC12
PC13PC14PC15PC16PC17PC18PC19PC20
PC21PC22PC23PC24
PC25PC26PC27
RN41
742-08-3-103-J-XX
1234 5
678
RN42
742-08-3-103-J-XX
1234 5
678
RN43
742-08-3-103-J-XX
1234 5
678
RN44
742-08-3-103-J-XX
1234 5
678
C750.1uF
FP1
32-pin PLCC
CE22
OE24
WE31
I/O013
I/O1 14
I/O2 15
I/O3 17
I/O4 18
I/O519
I/O6 20
I/O7 21
VC
C32
GN
D16
A1730 A162 A153 A1429 A1328 A124 A1125 A10
23 A926 A827 A75 A66 A57 A48 A39 A210 A111 A0
12
A181
U17
ST16C550
IOR#19
IOW#16
CS2#11
TX 8
DTR# 33
RTS#32
RX 7
DSR# 39
CTS# 38
CD#40
RI# 41
VC
C42
GN
D18
OP1# 34
OP2# 31
IOR 20
IOW17
CS09
RESET35
RCLK 5
D74 D63 D52 D447 D346 D245 D144 D043
A226 A127 A028
BAUDOUT# 12
CS110 DDIS# 22
AS# 24
RXRDY# 29TXRDY#23
X215 X114
NC
1
NC
6N
C25
NC
36
INT30
NC
13
NC
21N
C37
NC
48
PC11PC10
C67
0.1uF
C69
0.1uF
C71
0.01uF
C72
0.01uF
C73
0.01uF
C68
0.1uF
C66
0.1uF
C70
0.01uF
C76
100nF
C77
100nF
C78
100nF
C79
100nF
U16
1.8432MHz OSC
OUT 3
NC 1GND2
VCC4
S2SW PUSHBUTTON
1 3
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Note: The test headers are designed to hook up directlyto HP logic analyzer termination adapter 01650-63203.
Test Headers
Logic Analyzer Test Headers
Control Signals in Local Bus (A)Local Address Bus -Upper Addresses
Local Address Bus - Lower Addresses
Local Data Bus - Upper Half
Local Data Bus - Lower Half
Control Signals in Local Bus (B)
16V 16V 16V 16V 16V 16V
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY, INC.870 Maude Ave, Sunnyvale, CA 94085
Custom
7 12Thursday, July 25, 2002
www.plxtech.comTitle
Size Document Number Rev
Date: Sheet of
LINTi1CS0LGPIO8LPMINTL
LBE2L
BLASTLRDL
GPIO1/LLOCKoLEEDOEECS
LINTi2CS1LLRESEToL
BTERML
LGNT
GPIO0/WAIToLEEDIEESK
LBE0L
LA23LA25/GPIO6
LA17
LA21
LA13LA15
LA19
LA23LA21LA19LA17LA15LA13
LA26/GPIO5
LA22LA20LA18LA16LA14
LA22LA20LA18LA16LA14LA12 LA12
LA11LA9LA7LA5LA3
LA11LA9LA7LA5LA3
LA10LA8LA6LA4LA2
LA10LA8LA6LA4LA2
LD31LD29LD27LD25LD23LD21LD19LD17
LD30LD28LD26LD24LD22LD20LD18LD16
LD31LD29LD27LD25LD23LD21LD19LD17
LD30LD28LD26LD24LD22LD20LD18LD16
LD14LD12LD10LD8LD6LD4LD2LD0
LD14LD12LD10LD8LD6LD4LD2LD0
LD15LD13LD11LD9LD7LD5LD3LD1
LD15LD13LD11LD9LD7LD5LD3LD1
MODE LBE3LREADYL
LREQ
LD[31:0]
LD[31:0]
LA[23:2]
LA[23:2]
LA24/GPIO7
LA27/GPIO4GPIO2/CS2L
ADSL
LCLOCK
GPIO3/CS3L
LBE1L
LPMESET
LW/RLWRL
ALE
LA[23:2]4,5
LD[31:0]4,5,6
LD[31:0]4,5,6
LA[23:2]4,5
GPIO2/CS2L4GPIO0/WAIToL4,6
GPIO1/LLOCKoL 4,6EEDI4EEDO 4EESK4EECS 4
LPMINTL4GPIO84,5
LRESEToL 4,6CS0L4,5CS1L 4,6LINTi14,6LINTi2 4
BTERML 4,6RDL4
LW/RL 4,5,6LGNT 4,6
ADSL4,5,6
LBE2L4,5,6LBE0L4,5,6MODE4 LBE3L 4,5,6
READYL4,6
BLASTL4,5,6
LCLOCK4
LA26/GPIO54
LA24/GPIO74LA27/GPIO4 4LA25/GPIO6 4
LREQ4,6
GPIO3/CS3L 4
WRL 4
LBE1L 4,5,6
LPMESET 4
ALE
3.3VCC
LAH5
Logic Analyzer Header
+5V1
CLK13
D145
D127
D109
D811
D613
D415
D217
D019
CLK2 2
D15 4
D136
D11 8
D9 10
D7 12
D5 14
D316
D1 18
GND 20PD72
PD66
PD70PD69
PD65
PD71
PD68PD67
PD80
PD78PD77
PD73
PD75PD76
PD74
PD79
PD40
PD34
PD38PD37
PD33
PD39
PD36PD35
LAH1
Logic Analyzer Header
+5V1
CLK13
D145
D127
D109
D811
D613
D415
D217
D019
CLK2 2
D15 4
D136
D11 8
D9 10
D7 12
D5 14
D316
D1 18
GND 20PD8
PD2
PD6PD5
PD1
PD7
PD4PD3
PD16
PD14PD13
PD9
PD11PD12
PD10
PD15
PD24
PD18
PD22PD21
PD17
PD23
PD20PD19
PD32
PD30PD29
PD27PD28
PD26
PD31
LAH3
Logic Analyzer Header
+5V1
CLK13
D145
D127
D109
D811
D613
D415
D217
D019
CLK2 2
D15 4
D13 6
D11 8
D910
D7 12
D5 14
D3 16
D1 18
GND20
PD48
PD46PD45
PD41
PD43PD44
PD42
PD47
LAH4
Logic Analyzer Header
+5V1
CLK13
D145
D127
D109
D811
D613
D415
D217
D019
CLK2 2
D15 4
D136
D11 8
D9 10
D7 12
D5 14
D316
D1 18
GND 20PD56
PD50
PD54PD53
PD49
PD55
PD52PD51
PD64
PD62PD61
PD57
PD59PD60
PD58
PD63
LAH6
Logic Analyzer Header
+5V1
CLK13
D145
D127
D109
D811
D613
D415
D217
D019
CLK22
D15 4
D13 6
D11 8
D9 10
D712
D5 14
D3 16
D1 18
GND 20PD88
PD82
PD86PD85
PD81
PD87
PD84PD83
PD96
PD94PD93
PD89
PD91PD92
PD90
PD95
LAH2
Logic Analyzer Header
+5V1
CLK13
D145
D127
D109
D811
D613
D415
D217
D019
CLK2 2
D154
D13 6
D11 8
D9 10
D7 12
D514
D3 16
D1 18
GND 20 PD25
+C91
10UF
+C92
10UF
+C93
10UF
+C94
10UF
+C95
10UF
+C96
10UF
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Prototyping Footprint A
Prototyping Footprint A
0.05" pitch
0.05" pitch
0.05" pitch
0.05" pitch
0.05" pitch
Footprint
Footprint
Footprint
Footprint
Footprint 0.150" wide, 0.05" pitch
0.300" wide, 0.05" pitch
0.300" wide, 0.05" pitch
0.300" wide, 0.025" pitch
0.300" wide, 0.025" pitch
0.8mm 0.8mm
All prototyping Footprints are locatedon the component side of the PCB
Power & Ground Rails
Note: Place four PLCC devices co-incident on the componentside of the board; that is, they share common pins and the 28fits inside the 44 which fits inside the 68 which fits inside the84.
0.150" wide, 0.05" pitch
Jumpers to Join Top and Bottom
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY, INC.870 Maude Ave, Sunnyvale, CA 94085
Custom
8 12Thursday, July 25, 2002
www.plxtech.comTitle
Size Document Number Rev
Date: Sheet of
PE71
PE71
PE70
PE68
PE67
PE67
PE60
PE56
PE
44
PE42
PE
39
PE
36
PE29
PE25
PE23
PE18
PE13
PE1
PE[1:84]
PE84
PE58
PE
38
PE22
PE
2
PE
49
PE20
PE3P
E3
PE59
PE55
PE30
PE30
PE27
PE19
PE13
PE78
PE74
PE72
PE28
PE
9
PE63
PE35
PE17
PE12
PE
83
PE58
PE54
PE32
PE15
PE70
PE6
PE66
PE48
PE21
PE8
PE4
PE
53
PE
35P
E38
PE20
PE27
PE44
PE18
PE
75
PE69
PE5
PE11
PE16
PE16
PE
6
PE
84
PE19
PE68
PE25 PE61
PE43
PE
37
PE66
PE
49
PE59
PE71
PE
39
PE18
PE75
PE
5
PE
51
PE41
PE
47
PE77
PE62
PE53
PE
33
PE
2
PE49
PE20
PE20
PE19
PE70
PE
36
PE23
PE
10
PE
37
PE73
PE73
PE79
PE
41
PE
47
PE17
PE15
PE24
PE25
PE23
PE13
PE76
PE61
PE14
PE69
PE69
PE51
PE
41
PE65
PE47
PE
4
PE
9
PE
38
PE
7
PE55
PE68
PE39
PE13
PE64
PE
43P
E43
PE10
PE
34
PE
40
PE
80P
E48
PE
4
PE72
PE28
PE9
PE38 PE22
PE7
PE60
PE18
PE64
PE
37
PE14P
E41
PE16
PE65
PE57
PE
8
PE
33
PE26
PE74
PE
35
PE12
PE12
PE
7
PE
42P
E42
PE
39
PE
39
PE
1
PE
11
PE37
PE34
PE
34
PE
40
PE40
PE
5
PE
79
PE57
PE26
PE
78
PE74
PE72
PE17
PE
52
PE
36
PE36
PE31
PE
10
PE80
PE73
PE73
PE
6
PE21
PE62
PE
33
PE
45
PE45
PE74
PE63
PE83
PE22
PE22
PE15
PE24
PE24
PE
3
PE
82P
E81
PE70
PE52
PE68PE67PE67
PE
36
PE13
PE
1
PE64
PE14
PE14
PE69
PE16
PE66
PE
77
PE62PE74
PE28
PE12
PE82
PE19
PE71
PE70
PE
42
PE31
PE
76
PE61
PE73
PE
46
PE
11
PE65
PE65
PE66PE21
PE
8
PE72
PE63
PE17
PE17
PE12
PE58
PE15
PE59PE27
PE68
PE29
PE
43
PE50
PE
50
PE
34
PE14
PE69
PE46
PE
46
PE16
PE
48
PE21
PE
45
PE72
PE54
PE
38
PE2
PE81
PE71
PE56
PE64
PE
37
PE
34
PE
40
PE
33
PE33
PE26
PE
35
PE
35
PE32
PE15
PE60
PE
44
PE18
PE
84P
E83
PE
82P
E81
PE
80P
E79
PE
11P
E10
PE
9P
E8
PE
7P
E6
PE
5P
E4
PE
3P
E2
PE
1
PE
11P
E10
PE
9P
E8
PE
7P
E6
PE
5
5VCC
3.3VCC
5VCC
3.3VCC
PF17PF18PF19PF20PF21PF22
PF24PF23
PF16PF15
PF13PF14
PF10PF9
PF11PF12
PF1PF2
PF4PF3
PF6
PF8
PF5
PF7
PF147PF148
PF146
PF142
PF144
PF141
PF145
PF143
PF149PF150
PF196
PF194PF193
PF189
PF191PF192
PF190
PF195
PF188PF187
PE68
PE64
PE67
PE65
PE63
PE58
PE62
PE59
PE66
PE60PE61
PE53
PE55PE54
PE57PE56
PE52
PE49
PE41
PE46
PE48
PE43PE42
PE50
PE47
PE45PE44
PE51
PE36
PE38
PE40
PE37
PE39
PE35
PE32
PE24
PE29
PE31
PE26PE25
PE33
PE30
PE28PE27
PE34
PE19
PE21
PE23
PE20
PE22
PE18
PE15
PE7
PE12
PE14
PE9PE8
PE16
PE13
PE11PE10
PE17
PE2
PE4
PE6
PE3
PE5
PE1
PF162
PF159
PF168
PF164
PF161
PF165
PF167
PF163
PF166
PF160
PF171PF170
PF177
PF174
PF178
PF173
PF169
PF175
PF172
PF176
PE69PE70PE71PE72PE73PE74PE75PE76PE77PE78PE79PE80PE81PE82PE83PE84
FP5
28 Pin PLCC
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
19 1920 2021 21222223 2324 2425 2526
2627
2728
28
FP11
28-pin SOIC Wide Footprint
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414 15 15161617 1718 1819 1920 20212122 2223 2324 2425 25262627 2728 28
PF158
PF155
PF157PF156
PF154
PF151
PF153PF152
PF185PF186
PF184PF183
PF181PF180PF179
FP12
28-pin SOIC Wide Footprint
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
151516 1617 1718 1819 19202021 2122 2223 2324 24252526 2627 2728 28
PF182
PF247PF246
PF253
PF250
PF254
PF249
PF245
PF251
PF248
PF252
PF257PF256PF255
PF258
PF261PF260
PF267
PF264
PF268
PF263
PF259
PF265
PF262
PF266
PE292
PE290PE289
PE285
PE287PE288
PE286
PE291
PE284PE283
PE281PE282
PE280
PF278
PF276PF275
PF271
PF273PF274
PF272
PF277
PF270
FP2
84 Pin PLCC
99
88
77
66
55
44
33
22
11
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
60 60
59 59
58 58
5757
56 56
55 55
54 54
5353
5252
5151
5050
4949
4848
4747
4646
4545
4444
68 68
6767
66 66
65 65
64 64
63 63
6262
61 61
1010
1111
69 6970 7071 71727273 7374 7475
7576
7677
7778
7879
7980
8081
8182
8283
8384
84
FP4
44 Pin PLCC
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
33 33
3232
31 31
30 30
29 29
39 39
38 38
3737
36 36
35 35
34 34
4444
4343
4242
4141
4040
66
55
44
33
22
11
2323
2424
2525
2626
2727
2828
TB4
HEADER 30
123456789101112131415161718192021222324252627282930
TB3
HEADER 30
123456789
101112131415161718192021222324252627282930
TB1
HEADER 30
123456789101112131415161718192021222324252627282930
TB5
HEADER 30
123456789101112131415161718192021222324252627282930
TB2
HEADER 30
123456789
101112131415161718192021222324252627282930
PF269
FP6
20 Pin PLCC 44
55
66
77
88
99
1010
1111
1212
1313
33
22
11
18 18
17 17
1616
15 15
14 14
2020
1919
PE86
PE89
PE85
PE88PE87
PE95
PE99
PE96
PE98PE97
PE
103
PE
101
PE
100
PE
102
PE
104
PE
92
PE
90P
E91
PE
93P
E94
PF107
PF88
PF103
PF99
PF95
PF106
PF91
PF102
PF98
PF87
PF94
PF109
PF90
PF105
PF101
PF97
PF108
PF93
PF104
PF89
PF100
PF96
PF110
PF92
PF132PF133
PF131
PF121
PF126PF125
PF118
PF130PF129
PF122
PF124
PF119
PF128
PF123
PF127
PF120
PF116PF117
PF115
PF136
PF140
PF114PF113
PF137
PF139
PF134
PF138
PF111
PF135
PF112
FP10
54-pin TSOP Footprint
256Mb SDRAM
A023
A124
A225
A326
A429
A530
A631
A732
A833
A934
A1022
A1135
DQ0 2
DQ2 5
DQ48
DQ6 11
DQ944
DQ11 47
DQ13 50
DQ15 53
BA020
BA121
CS#19
RAS#18
CAS#17
WE#16
UDMQ39
CLK38
CKE37
VDD1 1
VDD2 14
VDD327
VDDQ1 3
VDDQ2 9
VDDQ3 43
VDDQ4 49
VSS1 28
VSS241
VSS3 54
VSSQ1 6
VSSQ2 12
VSSQ3 46
VSSQ452
DQ1 4
DQ3 7
DQ5 10
DQ7 13
A1236
NC/RFU40
DQ8 42
DQ10 45
DQ12 48
DQ1451
LDMQ15
PF70
PF55
PF57
PF61
PF73
PF76
PF46
PF40
PF59
PF42
PF33
PF68
PF51
PF41
PF81
PF85
PF83
PF63
PF69
PF64
PF45
PF60
PF49
PF56
PF34
PF58
PF80
PF62
PF74
PF71
PF53
PF86
PF78
PF38
PF52
PF79
PF67
PF77
PF36PF37
PF65
PF72
PF43
PF84
PF82
PF66
PF75
PF54
PF48
PF50
PF39
PF44
PF35
PF47
PF31PF30PF29PF28
PF25
PF27PF26
PF32
PF199PF198
PF205
PF202
PF206
PF201
PF197
PF203
PF200
PF204
PF209PF208PF207
PF210
PF213PF212
PF219
PF216
PF220
PF215
PF211
PF217
PF214
PF218
PF244
PF242PF241
PF237
PF239PF240
PF238
PF243
PF236PF235
PF233PF234
PF232
PF230
PF228PF227
PF223
PF225PF226
PF224
PF229
PF222PF221
FP13
48-pin SSOP Footprint
11
22
33
44
55
66
77
88
99
1010
2020 1919 1818 1717 1616 1515 1414 1313 1212 1111
2121
2222
2323
2424 25 2526 2627 2728 28292930 3031 3132 3233 33343435 3536 3637 3738 38393940 4041 4142 4243 43444445 4546 4647 4748 48
PF231
FP14
48-pin SSOP Footprint
11
22
33
44
55
66
77
88
99
1010
2020 1919 1818 1717 1616 1515 1414 1313 1212 1111
2121
2222
2323
2424 25 25262627 2728 2829 2930 30313132 3233 3334 3435 35363637 3738 3839 3940 40414142 4243 4344 4445 45464647 4748 48
PF279
FP7
16-pin SOIC Narrow Footprint
11
22
33
44
55
66
77
88
16 16
15 15
1414
13 13
12 12
11 11
10 10
99
FP8
16-pin SOIC Narrow Footprint
11
22
33
44
55
66
77
88
16 16
15 15
14 14
1313
12 12
11 11
10 10
9 9
FP3
68 Pin PLCC
99
88
77
66
55
44
33
22
11
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
60 60
59 59
5858
57 57
56 56
55 55
54 54
5353
52 52
51 51
50 50
49 49
4848
47 47
46 46
45 45
44 44
6868
6767
6666
6565
6464
6363
6262
6161
FP9
54-pin TSOP Footprint
256Mb SDRAM
A023
A124
A225
A326
A429
A530
A631
A732
A833
A934
A1022
A1135
DQ0 2
DQ2 5
DQ48
DQ6 11
DQ944
DQ11 47
DQ13 50
DQ15 53
BA020
BA121
CS#19
RAS#18
CAS#17
WE#16
UDMQ39
CLK38
CKE37
VDD1 1
VDD2 14
VDD327
VDDQ1 3
VDDQ2 9
VDDQ3 43
VDDQ4 49
VSS1 28
VSS241
VSS3 54
VSSQ1 6
VSSQ2 12
VSSQ3 46
VSSQ452
DQ1 4
DQ3 7
DQ5 10
DQ7 13
A1236
NC/RFU40
DQ8 42
DQ10 45
DQ12 48
DQ1451
LDMQ15
JP2
HEADER 2
12
JP4
HEADER 2
12
JP6
HEADER 2
12
JP8
HEADER 2
12
JP1
HEADER 2
12
JP3
HEADER 2
12
JP5
HEADER 2
12
JP7
HEADER 2
12
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Prototyping Footprint B
Prototyping Footprint B
0.8mm pitch
0.300" wide, 0.05" pitch 0.300" wide, 0.05" pitch
0.150" wide, 0.025" pitch0.150" wide, 0.025" pitch
Footprint
0.300" wide, 0.025" pitch0.300" wide, 0.025" pitch
All prototyping footprints are locatedon the component side of the PCB.
0.300" Wide, 0.05" pitch0.300" wide, 0.05" pitch0.150" wide, 0.05" pitch 0.150" wide, 0.05" pitch
0.150" wide, 0.025" pitch
0.150" wide, 0.025" pitch
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY, INC.870 Maude Ave, Sunnyvale, CA 94085
Custom
9 12Thursday, July 25, 2002
www.plxtech.comTitle
Size Document Number Rev
Date: Sheet of
FP19
20 pin SOIC Wide Footprint
11
22
33
44
55
66
77
88
99
1010
2020
19 19
18 18
17 17
16 16
1515
14 14
13 13
12 12
11 11
FP21
24 pin SSOP Footprint
44
55
66
77
88
99
1010
1111
1212
1313
33 22 11
1818
17 17
16 16
15 15
14 14
20 20
19 19
21 2122 22232324 24
FP22
24 pin SSOP Footprint
44
55
66
77
88
99
1010
1111
1212
1313
33 22 11
1818
17 17
16 16
15 15
14 14
20 20
19 19
21 2122 22232324 24
PG163PG162
PG169
PG166
PG170
PG165
PG161
PG167
PG164
PG168
PG173PG172PG171
PG174
PG177PG176
PG183
PG180
PG184
PG175
PG181
PG178
PG182
PG208
PG206PG205
PG201
PG203PG204
PG202
PG207
PG200PG199
PG197PG198
PG196
PG194
PG192PG191
PG187
PG189PG190
PG188
PG193
PG186PG185
PG195
PG211PG210
PG217
PG214
PG218
PG213
PG209
PG215
PG212
PG216
PG221PG220PG219
PG222
PG225PG224
PG231
PG228
PG232
PG227
PG223
PG229
PG226
PG230
PG256
PG254PG253
PG249
PG251PG252
PG250
PG255
PG248PG247
PG245PG246
PG244
PG242
PG240PG239
PG235
PG237PG238
PG236
PG241
PG234PG233
FP24
48-pin SSOP Footprint
11
22
33
44
55
66
77
88
99
1010
2020 1919 1818 1717 1616 1515 1414 1313 1212 1111
2121
2222
2323
2424
252526 2627 2728 2829 29303031 3132 3233 3334 34353536 3637 3738 3839 39404041 4142 4243 4344 44454546 4647 4748 48
PG243
PG77
PG74
PG76
PG82
PG75
PG79PG78
PG73
PG81PG80
PG97
PG94
PG96
PG102
PG95
PG99PG98
PG93
PG101PG100
PG117
PG114
PG123
PG116
PG122
PG115
PG124
PG119PG118
PG113
PG121PG120
PG141
PG138
PG147
PG140
PG146
PG139
PG148
PG143PG142
PG137
PG145PG144
PG91
PG85PG86
PG89
PG83
PG88
PG90
PG84
PG87
PG92
PG105PG106
PG103PG104
PG135
PG129PG130
PG133
PG127
PG132
PG134
PG128
PG131
PG136PG159
PG153PG154
PG157
PG151
PG156
PG158
PG152
PG155
PG160
PG125 PG149PG150PG126
PG
293
PG
296
PG
271
PG288
PG263
PG
273
PG
294
PG
272
PG286
PG266
PG264
PG
300
PG
274
PG
295
PG283
PG257
PG
292
PG287
PG
270
PG279
PG265
PG285
PG
276
PG
290
PG261
PG289
PG
277
PG
268
PG259
PG284PG262
PG
291
PG
298
PG
299
PG281
PG260
PG
269
PG282
PG267
PG258
FP20
20 pin SOIC Wide Footprint
11
22
33
44
55
66
77
88
99
1010
2020
19 19
18 18
17 17
16 16
1515
14 14
13 13
12 12
11 11
PG111
PG109PG108
PG110
PG112
PG107
PG
275
PG
278
PG280
PG67
FP18
20 pin SOIC Wide Footprint
11
22
33
44
55
66
77
88
99
1010
20 20
19 19
18 18
1717
16 16
15 15
14 14
13 13
1212
11 11
PG58PG57
PG64
PG59PG65
PG63PG62
PG55PG56
PG66PG60
PG54 PG71
PG69
PG61
PG68
PG70
PG53
PG15PG14PG13PG12
PG9
PG11PG10
PG16 PG17PG18PG19PG20PG21PG22
PG24PG23
PG31PG30PG29PG28
PG25
PG27PG26
PG32
FP23
48-pin SSOP Footprint
11
22
33
44
55
66
77
88
99
1010
2020 1919 1818 1717 1616 1515 1414 1313 1212 1111
2121
2222
2323
2424
252526 2627 2728 2829 29303031 3132 3233 3334 34353536 3637 3738 3839 39404041 4142 4243 4344 44454546 4647 4748 48
PG179
FP25
44 Pin TQFP
11
22
33
44
55
66
77
88
99
1010
1111
33 33
32 32
3131
30 30
29 29
28 28
27 27
2626
25 25
24 24
23 23
4444
4343
4242
4141
4040
3939
3838
3737
3636
3535
3434
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
PG
297
FP26
16 pin SSOP Footprint
44
55
66
77
88 9 910 1011 11121213 1333 22 11 16 16
15 15
14 14PG315
PG309PG310
PG313PG312
PG314
PG311
PG316
PG305
PG302
PG304PG303
PG307PG306
PG301
PG308
FP27
16 pin SSOP Footprint
44
55
66
77
88
9910 1011 1112 1213 133
3 22 11 16 16
15 15
1414
PG326PG325
PG332
PG327
PG330
PG328
PG331
PG329
PG318
PG320
PG324PG323
PG319
PG317
PG321PG322
FP15
16-pin SOIC Narrow Footprint
11
22
33
44
55
66
77
88
16 16
15 15
1414
13 13
12 12
11 11
10 10
99
PG1PG2 PG3 PG4 PG5 PG6
PG8 PG7
FP16
16-pin SOIC Narrow Footprint
11
22
33
44
55
66
77
88
16 16
15 15
1414
13 13
12 12
11 11
10 10
99
PG72
PG48
PG46
PG51
PG44PG40
PG43
PG33
PG50
PG39PG45
PG41
PG52
PG38
PG42
PG37PG36
PG34
PG49PG35
PG47
FP17
20 pin SOIC Wide Footprint
11
22
33
44
55
66
77
88
99
1010
20 20
19 19
18 18
1717
16 16
15 15
14 14
13 13
1212
11 11
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Prototyping Footprint C
Prototyping Footprint C
Note: three footprints are placed on the componentside of the PCB. They are arranged as FP30 inside ofFP29 and FP29 insde of FP28. All 208 holes for prototypingare located outside of 208-pin PQFP footprint.
0.5mm pitch
0.5mm pitch
0.5mm pitch
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY, INC.870 Maude Ave, Sunnyvale, CA 94085
Custom
10 12Thursday, July 25, 2002
www.plxtech.comTitle
Size Document Number Rev
Date: Sheet of
PH[1:208]
PH40
PH159
PH121
PH144
PH62
PH78
PH33
PH33
PH80
PH27
PH97
PH21 PH21
PH16
PH12
PH
177
PH114
PH114
PH35
PH132
PH45
PH22
PH138
PH102
PH
172
PH36
PH50PH51
PH105
PH124PH125
PH
160
PH
161
PH
173
PH
174
PH
204
PH
205
PH41
PH36
PH131
PH173
PH145
PH142
PH115
PH178
PH
178
PH
176
PH23
PH139
PH185
PH130
PH130
PH205
PH197
PH
168
PH26
PH166
PH124
PH49
PH
81
PH
102
PH126PH127
PH
162
PH
163
PH
175
PH
176
PH
206
PH
207
PH116PH40
PH131
PH66
PH44
PH203
PH24
PH49
PH32
PH37
PH
195
PH
175
PH137
PH106
PH101
PH113
PH130PH129
PH79
PH
177
PH14
PH84
PH20
PH6PH7
PH
59P
H60
PH106PH107
PH128
PH131PH132
PH145PH146
PH
164
PH
165
PH
177
PH
178
PH
194
PH19
PH
167
PH136
PH15
PH146
PH146
PH
173
PH140
PH120
PH1
PH77
PH189
PH
174
PH
85
PH177
PH
95
PH158
PH132
PH117
PH96
PH201
PH141
PH134
PH26
PH
84
PH25
PH25
PH172
PH165
PH1
PH4PH5
PH25PH26
PH30PH31
PH
57P
H58
PH
79P
H80
PH
104
PH108PH109
PH133PH134
PH
166
PH
167
PH
179
PH
183
PH
195
PH
196
PH36
PH65
PH17
PH83
PH24
PH39
PH9
PH27
PH
200
PH135
PH118
PH105
PH
69
PH43
PH
194
PH204
PH202
PH29
PH147
PH
85
PH18
PH117
PH48
PH3
PH17PH18
PH24
PH28PH29
PH
55P
H56
PH
77P
H78
PH
92
PH
103
PH110PH111
PH114
PH135PH136
PH
168
PH
197
PH
198
PH100
PH4
PH188
PH181
PH38
PH145
PH140
PH176
PH
87PH200
PH
190
PH169
PH157
PH
86
PH
86
PH162
PH119
PH95
PH14
PH133
PH133
PH133PH134
PH11
PH76
PH124
PH94
PH16
PH27
PH
54
PH
75P
H76
PH115PH116
PH137PH138
PH
199
PH
200
PH109
PH
193
PH17
PH28
PH37
PH64
PH23
PH16
PH
88
PH35
PH82
PH148
PH134
PH60
PH47
PH
90
PH
70
PH
73P
H74
PH
90P
H91
PH117PH118
PH192
PH
192
PH116
PH36
PH99
PH44
PH149
PH144PH93
PH123
PH6
PH
87
PH9
PH154
PH120
PH175
PH55
PH
188
PH137
PH135
PH75
PH161
PH88
PH180
PH18
PH132
PH
96
PH168
PH53
PH13
PH13
PH43
PH48
PH
68P
H69
PH
71P
H72
PH
88P
H89
PH
101
PH119PH120
PH155
PH19
PH121
PH51
PH15
PH
189
PH
91
PH
63
PH24
PH
199
PH39
PH27
PH8
PH43
PH
88
PH81
PH
185
PH
79
PH
180
PH
61
PH22
PH41PH42
PH46PH47
PH
66P
H67
PH
86P
H87
PH
99P
H10
0
PH121
PH129
PH
184
PH74
PH191
PH
191
PH136
PH136
PH
83
PH
62
PH184
PH
184
PH140
PH115
PH153
PH92
PH
92
PH
80
PH54
PH23
PH160
PH196
PH108
PH
81
PH59
PH129
PH12
PH35
PH
82
PH42
PH148
PH122
PH122
PH
166
PH143
PH44PH45
PH
64P
H65
PH
84P
H85
PH
97P
H98
PH130
PH
185
PH
186
PH
71
PH19
PH
188
PH38
PH123
PH
176
PH
89
PH
80
PH
197
PH52
PH10
PH137P
H69
PH
81
PH
72
PH
70
PH31
PH
187
PH26
PH22
PH50
PH3
PH23
PH
62P
H63
PH
82P
H83
PH
95P
H96
PH139PH140
PH
159
PH
187
PH
188
PH126
PH
74
PH
71
PH
73
PH
181
PH
93
PH128
PH125PH32
PH107
PH195
PH135
PH164
PH112
PH
70
PH147
PH119
PH
180
PH171
PH152
PH58
PH
82
PH183
PH
183
PH122
PH10
PH15
PH21PH22
PH
61
PH
93P
H94
PH112PH113
PH141PH142
PH156
PH
180
PH
181
PH
189
PH
190
PH208
PH121
PH73
PH91
PH
83
PH128
PH
175
PH
75
PH69
PH190
PH21
PH
72
PH31
PH
187
PH18
PH
186
PH42
PH5
PH
198
PH11
PH
179
PH30
PH8PH9
PH13PH14
PH19PH20
PH34PH35
PH52
PH143PH144
PH147
PH
182
PH
191
PH
192
PH126
PH
74
PH
73
PH163
PH156
PH111
PH7
PH199
PH
178
PH125
PH104
PH57
PH
182
PH
77PH139
PH118
PH
75
PH70
PH29
PH187
PH
174
PH
171
PH
186
PH141
PH151
PH
76
PH25
PH
165
PH127
PH127
PH
94
PH30
PH30
PH20
PH11PH12
PH32PH33
PH148PH149
PH
157
PH
193
PH
208
PH126
PH
191
PH17
PH63
PH
184
PH170
PH
170
PH
78
PH
78
PH182
PH
77
PH
64
PH10
PH194
PH86
PH46
PH207
PH72
PH31
PH
185
PH34
PH68
PH
76
PH127
PH90
PH150PH151
PH
158
PH
169
PH
192
PH41
PH2
PH167
PH131
PH
181
PH
66P
H65
PH103
PH
173
PH142
PH128
PH125PH32
PH98
PH
189
PH
190
PH113
PH
196
PH29
PH
79
PH56
PH
67
PH155
PH61
PH
183
PH
68
PH110
PH179
PH124
PH39PH40
PH152PH153
PH
170
PH
201
PH71
PH206
PH193
PH123
PH28
PH28
PH89
PH87
PH33
PH
182
PH198
PH139
PH
169
PH174
PH129
PH85
PH67
PH34
PH34
PH186
PH150
PH138
PH138
PH
84
PH
179
PH143
PH20
PH2
PH37PH38
PH
53
PH122PH123
PH154
PH
171
PH
172
PH
202
PH
203
FP29
144 Pin TQFP Footprint
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
4444
4545
4646
4747
4848
4949
5050
5151
5252
5353
5454
5555
5656
5757
5858
5959
6060
6161
6262
6363
6464
6565
6666
6767
6868
6969
7070
7171
7272
73 7374 7475 7576 76777778 7879 7980 8081 81828283 8384 8485 8586 86878788 8889 8990 9091 91929293 9394 9495 9596 96979798 9899 99100 100101 101102102103 103104 104105 105106 106107107108 108
109
109
110
110
111
111
112
112
113
113
114
114
115
115
116
116
117
117
118
118
119
119
120
120
121
121
122
122
123
123
124
124
125
125
126
126
127
127
128
128
129
129
130
130
131
131
132
132
133
133
134
134
135
135
136
136
137
137
138
138
139
139
140
140
141
141
142
142
143
143
144
144
PH201PH202PH203PH204PH205PH206PH207PH208
PH151PH152PH153PH154PH155PH156PH157PH158PH159PH160PH161PH162PH163PH164PH165PH166PH167PH168PH169PH170PH171PH172PH173PH174PH175PH176PH177PH178PH179PH180PH181PH182PH183PH184PH185PH186PH187PH188PH189PH190PH191PH192PH193PH194PH195PH196PH197PH198PH199PH200
PH101PH102PH103PH104PH105PH106PH107PH108PH109PH110PH111PH112PH113PH114PH115PH116PH117PH118PH119PH120PH121PH122PH123PH124PH125PH126PH127PH128PH129PH130PH131PH132PH133PH134PH135PH136PH137PH138PH139PH140PH141PH142PH143PH144PH145PH146PH147PH148PH149PH150
PH96
PH77
PH65
PH59
PH92
PH63
PH61
PH88
PH99
PH84
PH52
PH95
PH80
PH91
PH87
PH76
PH54
PH83
PH75
PH56
PH98
PH79
PH74
PH64
PH58
PH94
PH73
PH62
PH60
PH90
PH72
PH86
PH71
PH51
PH97
PH82
PH70
PH93
PH78
PH69
PH89
PH68
PH53
PH85
PH67
PH55
PH100
PH81
PH66
PH57
PH46
PH27
PH15
PH9
PH42
PH13
PH11
PH38
PH49
PH34
PH2
PH45
PH30
PH41
PH37
PH26
PH4
PH33
PH25
PH6
PH48
PH29
PH24
PH14
PH8
PH44
PH23
PH12
PH10
PH40
PH22
PH36
PH21
PH1
PH47
PH32
PH20
PH43
PH28
PH19
PH39
PH18
PH3
PH35
PH17
PH5
PH50
PH31
PH16
PH7
FP30
80 Pin TQFP Footprint
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
41 4142 4243 43444445 4546 4647 4748 48494950 5051 5152 5253 53545455 5556 5657 5758 58595960 60
6161
6262
6363
6464
6565
6666
6767
6868
6969
7070
7171
7272
7373
7474
7575
7676
7777
7878
7979
8080
208 Pin PQFP Footprint
FP28
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
4444
4545
4646
4747
4848
4949
5050
5151
5252
5353
5454
5555
5656
5757
5858
5959
6060
6161
6262
6363
6464
6565
6666
6767
6868
6969
7070
7171
7272
7373
7474
7575
7676
7777
7878
7979
8080
8181
8282
8383
8484
8585
8686
8787
8888
8989
9090
9191
9292
9393
9494
9595
9696
9797
9898
9999
100
100
101
101
102
102
103
103
104
104
105 105106 106107 107108108109 109110 110111 111112 112113113114 114115 115116 116117 117118118119 119120 120121 121122 122123123124 124125 125126 126127 127128128129 129130 130131 131132 132133133134 134135 135136 136137 137138138139 139140 140141 141142 142143143144 144145 145146 146147 147148148149 149150 150151 151152 152153153154 154155 155156 15615
715
715
815
815
915
916
016
016
116
116
216
216
316
316
416
416
516
516
616
616
716
716
816
816
916
917
017
017
117
117
217
217
317
317
417
417
517
517
617
617
717
717
817
817
917
918
018
018
118
118
218
218
318
318
418
418
518
518
618
618
718
718
818
818
918
919
019
019
119
119
219
219
319
319
419
419
519
519
619
619
719
719
819
819
919
920
020
020
120
120
220
220
320
320
420
420
520
520
620
620
720
720
820
8
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Prototyping Footprint D
Prototyping Footprint D
0.5mm pitch
0.5mm pitch
0.5mm pitch
All prototyping footprints are locatedon the component side of the PCB.
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY, INC.870 Maude Ave, Sunnyvale, CA 94085
Custom
11 12Thursday, July 25, 2002
www.plxtech.comTitle
Size Document Number Rev
Date: Sheet of
PI1
75
PI1
65
PI1
60
PI1
60
PI1
49
PI1
48
PI1
44
PI1
40
PI118
PI115
PI34
PI26
PI26
PI22
PI1
76
PI1
66
PI101
PI7
1
PI6
9
PI29
PI24
PI20
PI1
59
PI1
55
PI1
54
PI1
53
PI1
51
PI110
PI108
PI107
PI106
PI103
PI102
PI7
7
PI6
3
PI6
3PI21 PI17
PI12
PI10
PI22
PI1
70
PI1
63
PI105
PI7
5
PI6
1
PI5
9
PI27
PI27
PI13
PI1
51
PI21
PI12
PI34
PI20
PI1
71
PI123
PI116
PI99
PI97
PI7
8 PI39
PI8
PI1
64
PI124
PI28
PI1
43
PI117
PI114
PI89
PI1
45
PI6
6
PI6
4
PI25
PI1
58
PI111
PI16
PI14
PI13
PI1
53
PI106
PI37
PI33
PI1
60
PI115
PI1
66
PI127
PI122
PI121P
I54
PI32
PI19
PI2
PI1
43
PI23
PI123
PI100
PI14
PI107
PI21
PI10
PI101
PI1
62
PI1
35
PI6
7
PI6
7
PI6
0
PI30
PI1
39
PI6
5
PI15
PI6
PI113
PI42
PI111
PI1
59
PI1
55
PI1
51
PI17
PI1
49
PI118
PI7
1
PI28
PI130
PI117
PI114
PI104
PI11
PI113
PI1
47
PI131
PI105
PI112
PI91
PI1
57
PI1
57
PI96
PI126
PI102
PI119
PI26
PI1
74
PI43
PI7
0
PI1
41
PI25
PI23
PI6
5
PI1
69
PI1
61
PI92
PI38
PI100
PI44
PI31
PI105P
I159
PI110
PI110
PI35
PI17
PI22
PI1
56
PI1
45
PI6
2
PI109
PI109
PI31
PI112
PI6
8
PI1
54
PI1
54
PI1
52
PI107
PI106
PI1
46
PI1
68
PI1
56PI114
PI7
2
PI5
6
PI109
PI95
PI16
PI18
PI18
PI1
52
PI5
5
PI29
PI122
PI121
PI1
62
PI15
PI1
47
PI120
PI40
PI1
34
PI1
50P
I149
PI28
PI1
56
PI19
PI19
PI30
PI7
2
PI125
PI1
58
PI1
63
PI6
1
PI1
53
PI1
37
PI7
PI1
46
PI1
44
PI6
9
PI1
73
PI90
PI11
PI116
PI98
PI7
3
PI1
67
PI18
PI108PI103
PI4
PI5
7
PI33
PI3
PI24
PI20
PI[176:1]
PI36
PI6
6
PI6
4
PI23
PI116
PI1
42
PI1
38
PI112
PI6
8
PI1
57
PI1
55
PI1
52
PI108
PI1
PI1
65
PI1
50
PI1
50
PI1
48
PI1
33
PI119
PI94
PI7
0
PI32
PI25
PI1
36
PI129
PI5
8
PI113
PI6
2
PI1
58
PI111
PI99
PI27
PI1
67
PI1
72
PI5
PI115
PI132
PI7
6
PI7
4
PI9
PI104
PI1
61
PI128
PI1
64PI120
PI93PI41
PI24
PI4
5P
I46
PI4
7P
I48
PI4
9P
I50
PI5
1P
I52
PI5
3P
I54
PI5
5P
I56
PI5
7P
I58
PI5
9P
I60
PI6
1P
I62
PI6
3P
I64
PI6
5P
I66
PI6
7P
I68
PI6
9P
I70
PI7
1P
I72
PI7
3P
I74
PI7
5P
I76
PI7
7P
I78
PI7
9P
I80
PI8
1P
I82
PI8
3P
I84
PI8
5P
I86
PI8
7P
I88
PI91
PI75
PI99
PI123
PI127
PI4
PI120
PI162PI11
PI44
PI19
PI121
PI62
PI165
PI110PI59
PI103PI102
PI49
PI169
PI65
PI104
PI70
PI15
PI139
PI6
PI64
PI23
PI98
PI71
PI79
PI150
PI129
PI8 PI158
PI144
PI68
PI85
PI167
PI95
PI128
PI173
PI16
PI148
PI67
PI32
PI115
PI108
PI43
PI34
PI80
PI137
PI76
PI107
PI142
PI57
PI171
PI10
PI47
PI90
PI9
PI69
PI7
PI37
PI55
PI119
PI176
PI45
PI112
PI118
PI82
PI161
PI14
PI33
PI35
PI21
PI30
PI160
PI106
PI54
PI93
PI133
PI159
PI74
PI111
PI138
PI63
PI89
PI131
PI117
PI163
PI88
PI143
PI116
PI58
PI24
PI101
PI26
PI87
PI13
PI78PI29
PI154
PI92
PI152
PI149
PI12
PI20
PI122
PI168
PI175
PI109
PI140
PI3
PI172
PI94
PI60
PI113
PI125
PI56
PI51
PI42
PI48PI97
PI53
PI50
PI81
PI96
PI38
PI146
PI83
PI18
PI39
PI132
PI114
PI105
PI164
PI155
PI157
PI52
PI134
PI136
PI174
PI141
PI156
PI1
PI135
PI25
PI100
PI86
PI22
PI41
PI2
PI73
PI36
PI40
PI31
PI170
PI27
PI46
PI153
PI28
PI17
PI151
PI61
PI130
PI147
PI126PI77
PI72
PI66
PI145
PI166
PI84
PI5
PI124
100 Pin TQFP Footprint
FP32
99 88 77 66 55 44 33 22 11
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
4444
4545
4646
4747
4848
4949
5050
515152 5253 5354 5455 55565657 5758 5859 5960 60616162 6263 6364 6465 65666667 6768 6869 6970 70717172 7273 7374 7475 7576
7677
7778
7879
7980
8081
8182
8283
8384
8485
8586
8687
8788
8889
8990
9091
9192
9293
9394
9495
9596
9697
9798
9899
9910
010
0
FP33
48 pin TQFP Footprint66 55 44 33 22 11
77
88
99
1010
1111
121213
13
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
25 2526 26272728 2829 2930 3031 31323233 3334 3435 3536 3637
3738
3839
3940
4041
4142
4243
4344
4445
4546
4647
4748
48
FP31
176 Pin TQFP Footprint
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
4444
4545
4646
4747
4848
4949
5050
5151
5252
5353
5454
5555
5656
5757
5858
5959
6060
6161
6262
6363
6464
6565
6666
6767
6868
6969
7070
7171
7272
7373
7474
7575
7676
7777
7878
7979
8080
8181
8282
8383
8484
8585
8686
8787
8888
89 8990 9091 9192 92939394 9495 9596 9697 97989899 99100 100101 101102 102103103104 104105 105106 106107 107108108109 109110 110111 111112 112113113114 114115 115116 116117 117118118119 119120 120121 121122 122123123124 124125 125126 126127 127128128129 129130 130131 131132 132
133
133
134
134
135
135
136
136
137
137
138
138
139
139
140
140
141
141
142
142
143
143
144
144
145
145
146
146
147
147
148
148
149
149
150
150
151
151
152
152
153
153
154
154
155
155
156
156
157
157
158
158
159
159
160
160
161
161
162
162
163
163
164
164
165
165
166
166
167
167
168
168
169
169
170
170
171
171
172
172
173
173
174
174
175
175
176
176
PI18
PI8
PI11
PI27
PI100
PI90
PI80
PI121
PI159
PI174
PI164
PI3
PI44
PI38
PI81
PI72
PI91
PI122
PI158
PI176
PI168
PI35
PI23
PI49
PI66
PI86PI87
PI123
PI114
PI157
PI173
PI161
PI17
PI12
PI34
PI42
PI57
PI71
PI76
PI59
PI124
PI118
PI113
PI156
PI172
PI165
PI5
PI10
PI45PI46
PI51
PI54
PI125
PI112
PI155
PI175
PI169
PI50
PI40
PI30
PI97
PI83
PI126
PI111
PI154
PI171
PI162
PI31
PI22
PI41
PI82
PI75
PI138
PI127
PI115
PI110
PI153
PI166PI16
PI36PI37
PI70
PI56
PI52
PI139
PI130
PI128
PI119
PI109
PI152
PI163
PI7
PI21
PI26
PI9
PI93
PI98
PI146
PI140
PI131
PI129
PI120
PI108
PI151
PI170
PI167
PI1
PI4
PI78PI79
PI147
PI141
PI132
PI107
PI47
PI33
PI69
PI74
PI148
PI142
PI133
PI106
PI32
PI25
PI89
PI64PI63
PI65
PI149
PI143
PI134
PI116
PI105
PI20
PI6
PI2
PI68
PI58
PI61
PI77
PI150
PI144
PI135
PI104
PI43
PI48
PI53
PI94
PI88
PI96PI145
PI136
PI103
PI28PI29
PI85
PI73
PI99
PI137
PI102
PI19
PI24
PI67
PI62
PI84
PI117
PI101
PI39
PI14PI13
PI15
PI55
PI60
PI95
PI92
PI160
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Suggested Board Layout
J1
Stub Terminal Resistors
J2
9030
Hot SwapControlCircuit
LAH
2
Prototype FootprintsArea
DB9
POM connector
U11
Sap
erat
e b
us
FlashROM
160mm
LAH
1
LAH6
LAH5
LAH4
LAH3
U12
serialEEPROM
60MHzOSC
GAL
Reset circuit
RS232 port
BLUE LED
Handle Switchheader
4Kx18DPRAM
4Kx18DPRAM
100mm
233.35mm
CompactPCI 9030RDK-LITE 002
PLX TECHNOLOGY, INC.870 Maude Ave, Sunnyvale, CA 94085
Custom
12 12Thursday, July 25, 2002
www.plxtech.comTitle
Size Document Number Rev
Date: Sheet of