CMS Upgrades

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CMS Upgrades

LHCC March 20, 2012Didier Contardo, Jeff Spalding

o Upgrade Organizationo Brief Update for LS1 Projectso LHC Performance and CMS Strategyo TDR Preparations and Project Highlightso Towards Phase 2 / LS3

DRAFT_V2

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CMS Upgrade Organization

Consolidation and Upgrades LS1… TDR Projects Phase 2

Upgrade Project Office

Project managers: Didier Contardo, Jeff Spalding

Pixel DetectorR. Horisberger

Cross-organization

Representatives

Trigger Performance and Strategy

Working Group

Phase II Forward Detector

Working Group

Silicon TrackerD. Abbaneo

ECALE. Auffray, S. Singovski

HCALD. Baden, C. Tully

CSCD. Loveless

DTC. Fernandez Bedoya

RPCG. Iaselli

L1 TriggerA. Tapper

DAQA. Racz

BRMA. Dabrowski, D. Stickland

Infrastructure and Common Projects: W.

Zeuner

Track Trigger Task ForceM. Mannelli

Forward Calorimetry Task ForceB. Cox, R Ruchti

Physics Coordination

DPC: Chris Hill

Tech. Coordination

DTC: Wolfram Zeuner

Two WGs being formed to develop long-range strategies for the CMS Upgrade Program

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Planning for LS1o Detailed schedule for LS1 work maintained by Technical Coordinationo In the process of linking-in the project milestones o Workshops planned for May and September

CMS Upgrades

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HF-PMT and HO-HPD/SiPM ReplacementHF-PMTo >50% of 1800 HF-PMTs received and testedo P5 results confirm expected performance (8 new PMTs operated in 2011)

o In-situ operation of one full Readout Box (24 new PMTs) in 2012

HO-SiPMo All SiPMs delivered and characterized by batcho System tests of preproduction FE electronics (including test beam) – full board

production and QC underwayo Relies on extraction and retrofit of Readout Boxes during LS1 build test-

stand factory this summer

(A) benefit from thinner window and metal sides in new PMT (B) multi-channel (needs Phase1 electronics)

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Target Rate 5 kHz

Trigger performance: significantly lower threshold for same rateCSC and RPC: ME4/2 (1.25< η <1.8)⎢ ⎢More hits, lower rates CSC: M1/1 (2.1< η <2.4)⎢ ⎢ new digital boards and trigger cards : higher strip granularity Electronics reliabilityDT: new trigger readout board and relocation of sector collector from UXC55 to USC55 (new optical link)

LS1 Muon Upgrades

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Muon Upgradeso ME4: 144 chambers + spares, CSC and RPC each

RPCo 3 sites CERN, Gent, Mumbai. Total capacity = 18/moo First batch of Bakelite sheets had a cleaning problem,

now resolved (worn cleaning roller at vendor)o Expect first few chambers at each site by August

CSCo Two initial pre-production chambers fabricated, one has completed a 2mo

long-term HV test.

DTo Electronics upgrade

– Trigger Readout Board in UXC55– Move sector collector: Reviewing relocation plan and fiber installation

o Next: Additional pre-production with first batch of production panels from new vendor (just shipped to Fermilab)

RPC

CSC assembly in B904

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Following Chamonix 2012o The outcome of MD studies in 2012 and injector work in LS1 are needed

to better predict performance prior to LS2o Major upgrades in the Injector Chain largely target LS2 (possibly LS1.5)o Performance will very likely exceed design luminosity/pile-up (when?)o Developing a strategy for CMS upgrades which can adapt to the

accelerator performance

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H. Damerau, Chamonix 2012, 09/02/2012

2012

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Study batch compression in PS2012 MD: 25ns operation in LHC

Scrubbing in the SPSPrior to LHC startup

Possible connection of Linac4 w/ H- (LS1.5 = YETS + 2-3mo) PSB-PS 1.42GeV

RF upgrades in PS and SPSPossible aC coating SPS Coupled-bunch

Feedback PS

Improvement Steps in Injector Chain

From H Damerau: talk on LHC Injectors Upgrade at Chamonix 2012

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Batch compressionSPS scrubbed

Possible Linac4 w/H- LIU complete

Werner Herr: https://indico.cern.ch/getFile.py/access?contribId=44&sessionId=6&resId=0&materialId=paper&confId=164089

What can we expect for LHCo LHC likely able to operate >2E34 before LS3o Prior to LS2: batch compression, SPS scrubbing… could approach 2E34o 25ns is baseline plan. Many issues easier at 50nso Lumi-leveling will be developed, but SEE and UFO induced beam-dumps

will continue to limit fill length

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Developing Upgrade Strategy for CMSo Expect step-wise increase in luminosity with improvements in injector chaino Assume 25ns operation, or lumi-leveling at 50ns as a fall-backo Strategy must be able to adapt to new information (after LS1)

Strategy for Phase 1 under discussiono Simulate/design for <PU>=50 “baseline”o Study performance degradation for <PU>=100o Use LS1 for preparatory work to allow efficient progress between LS1 and LS2

Pixel– Install new beam-pipe in LS1 to facilitate future pixel upgrade– Pixel detector technical-driven schedule ready by late-2016, and can

install in 5mo stopHCAL– Backend electronics needed ahead of Frontend replacement to support

commissioning– HF FE could be upgraded in same 5mo, HB and HE in LS2L1-Trigger– Provide parallel inputs to the present and new trigger for a development

slice after LS1 grow to commissioning of new trigger in parallel

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Three TDRso Internal reviews of the projects in the next 3 monthso Goal: internal draft documents for Pixel and HCAL in June and for L1-

Trigger by end of 2012o We expect to send documents for Pixel and HCAL to LHCC for September

meeting

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Pixel Technical Highlightso Present detector designed for 1E34/25ns. At 2E34/25 ns or 1E34/50ns,

~16% data loss in innermost layer due to full buffers in readout chipso Tracking performance degrades at high PU (3 layers)

Features of New Designo Robust design with 4 barrel layers and 3 endcap disks at each end. o Smaller inner radius with new beampipe. o New readout chip with expanded buffers, embedded digitization

and high speed data link.

New 43.4mm ID beampipe allows 12-facet inner layer

BPIX Layout

FPIX Disk

o Reduced mass with 2-phase CO2 cooling and displaced optical transceivers

o Powering using DC-DC converters

Prototype DC-DC converter with AMIS2 ASIC

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31 2

USC55UXC55

CO2 Cooling System Concept at P5 and plans for full prototype system at TIF

ROC Two step development– 2011/12:‘PSI-46dig’

• Bigger buffers• Digital readout: 8bit ADC 160MHz• Other improvements, 5 metal layers to 6

– 2012/13: next generation• Deeper re-design, touching also column-

drain architecture

Pixel Technical Highlights

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Pixel Simulations

New

Current

o Tracking efficiency and b-tagging studies- Adaptation of current tracking code for

current and new geometry- Simulation of data-loss due to ROC:

16%(50%) in layer 1 with present ROC at <PU>=50(100). New ROC will be ~few%

o Physics performance being studied in simulated ZH mmbb

o Almost ready for MC production, and upgrade reconstruction code available in standard release for wider use

o Physics Analysis Groups plan to expand studies to other channels (SUSY: 3rd generation - stops, sbottoms)

Efficiency Fake rate

Pt

h

50 PU

50 PU

Current and new geometry, but current inner radius

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HCALo Backgrounds in HF multi-channel readout and TDCo HPDs in HB and HE: old issue – discharge in magnetic field (operate at low

gain), and new issue – response changing with time

At end of 2011 ~10% of HPDs >10% change

Features of New Designo Photodetector SiPMs: compact, greatly improved S/N, and B-field immuneo Depth segmentation in HB and HE:

backgrounds, isolation and radiation damage compensation (HE)

o Rising and falling edge timing (especially important for HF)

o ~3-fold increase in data volume GBT and new BE electronics

Extensive test beam studies. Optimization of FE package and DAQ suggests 4 SiPM layers in HB, readout as 3-depths

Channels within one HPD, operation over 2 years

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HCAL

Electronicso Proto QIE10 under test (joint development

Atlas tile calorimeter). Next gen with TDC.o Prototype ASICs for GBTX MOSIS submission

next montho Prototype mTCA boards and software a test

system for the BE electronics

Jet backgrounds for isolated electrons

SiPM studieso Recent test beam focus:

Hamamatsu, Ketek devices.o Next versions expected to be

[pre-]production grade

Simulationo Full simulation with depth segmentation,

TDC. Reco code is in standard release.o Physics performance studies beginning:

VBF tagging jets (+ MET), stops in l+jets, di-photon + MET in SUSY

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o Series of meetings to review each part of the project- Muon trigger systems. CSC - new muon port (mezzanine) card removes bandwidth

bottleneck, DT – new DTTF improves maintainability and performance

- Software requirements. Reviewing “lessons learned” and developing requirements.

o Looking at common hardware solutions (standard FPGA boards used for several functions)

o Developing mTCA standards across CMS (communications, controls and hardware solutions).

L1-Trigger

Calorimeter Trigger System

conventional regional approach and time multiplexed

- Calorimeter trigger system. Two architectures under study. Next step – consider algorithm implementation, timing …

- Global trigger system and TTC. Increase capability and flexibility with large FPGAs. Consolidate electronics.

- Algorithm and performance studies. Just starting. Example trigger menus for high PU. Object level performance studies, and specific physics channels

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L1-Trigger

Developing plan for preparatory work in LS1o To minimize risk to CMS, need development and commissioning of new trigger

in parallel with operation of present L1o Requires optical splitting for calorimeter and muon signalso Goal: Install a slice in LS1, and pre-work to allow the parallelism to grow to

allow complete L1 trigger upgrade prior to LS2

Trigger Studieso Rate studies versus PUo Trigger tables in place for up

to 6E33 at 50ns (PU>30)o Studying new algorithms

with improved granularityo Will extend studies: new

algorithms employing higher precision (invariant mass, ΔR, Ptrel), and pile-up mitigation

o Physics studies planned (VBF, taus in 3rd generation SUSY)

t trigger rate in high-PU Fill: <PU>~30

Current trigger granularity

Algos for upgraded trigger, higher granularity

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Towards Phase 2o Ongoing:

- Silicon Tracker/Trigger: Conceptual design and R&D- ECAL studies: Performance degradation at high radiation and pile-up- Muon systems: Study longevity, and R&D on new detectors- Forward Calorimetry Task Force: Studies and R&D for calorimetry in the endcap

and forward regions (EE and HE)o New Working groups: develop physics and object-driven requirements, and

develop long-term strategies 2012-13: Physics-driven understanding of detector characteristics needed

R&D and studies to develop concepts ~2014: Develop a Technical Proposal for the Phase 2 Upgrades

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Phase 2 Tracker and Track Trigger

The Phase 2 Projecto Develop design concept for a full tracker

upgrade to produce tracking primitives for L1-trigger. Two complimentary configurations ready for performance simulation

o R&D– Advanced sensors

• lab tests, irradiation, simulation• goal to select sensor technology by end

2013, then move to prototyping– Cooling, Power

• build on developments for Phase 1 Pixels– Advanced module mechanics and

packaging for onboard electronics• goal to develop first prototype in 2012

x

yz

“stub”

General Concept

PT Module Concepts: strip-strip, pixel-strip

strip-strip

o HL-LHC: Luminosity–leveled at 5E34, delivering a total of 300fb-1

o Emphasis on tracking and triggering at PU>>100 and very high radiation levels

– Low-power version of the GigaBit Transceiver: LP-GBT • evolution of present GBT development

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ECAL, and Forward Calorimetry Task ForceECALo Projections

– Phase 1: EB, EE and ES will perform well with some radiation damage effects which can be handled with monitoring and calibration

– Phase 2: EB is not expected to degrade significantly, while the performance of EE and ES will be degraded

o Program of test beam, irradiation and laboratory tests– 2012: EE crystals exposed at test beam and on Castor Table at P5– Recovery schemes measured in lab

o Simulation and R&D– In conjunction with Forward Calorimetry Task Force

Forward Calorimetry Task Forceo Simulation studies

– Developing calorimetry aging simulation model (including beam test results)– Developing FullSim and flexible FastSim for studies of candidate configurations

o R&D progress– Rad hard APD/SiPM photodetectors in GaAs (prototypes) and SiC (discussions)– Crystals, tiles and radiation-hard fibers for EM and HE

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Upgrade Costso The overall cost scale for the Phase 1 upgrade program was established with

the Technical Proposal: 65 MCHF materials and services.o Cost tracking for the LS1 projects continues to be very close to these original

estimates, and fully funded/resourced. o For the three TDR projects we will update the cost estimates at the time of the

TDRs to reflect the significant progress in the designs since the concepts in the Technical Proposal.

o Specific work in LS1 to prepare for the upgrades requires early funding.o Funding for the Phase 2 R&D is essential to progress to a Technical Proposal.

Scheduleso The LS1 projects have detailed schedules and milestones. The LS1 work at P5

has a very detailed schedule. We are linking the two via milestones.o For the three TDR projects we are developing mid-detail schedules and

milestones which are currently technically driven. These may be adjusted once funding models are established.

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Remarkso The CMS upgrades are making good progress on all fronts. o LS1 projects are on track. The LS1 schedule is tight, and detailed planning is

essential – workshops in May and September.o The Physics Analysis Groups engaging in simulation studies (brief gap in the

conference cycle!)o Pixel and HCAL TDRs are in preparation for the September LHCC meetingo The L1-Trigger TDR will be ~6 months latero We anticipate LHC operation at 2E34 or higher before LS3, and possibly near

this by LS2. An extended YETS (aka LS1.5) may be possibleo CMS is developing a strategy for the upgrade program that allows CMS to

adapt to a change in LHC projections and plans – we expect much more to be known after LS1 startup

o Funding for the LS1 projects is in place. We are developing a funding plan for preparatory work in LS1. Phase 2 R&D needs continuing support for progress to a TP.

Documents

CMS Upgrades