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Circuit Theory - Solved Assignments - Semester Fall 2007
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Assignment 1(Fall 2007) (Solution)
CIRCUIT THEORY (PHY301) MARKS: 35
Due Date: 12/10/2007
Q.1. Determine the power that is absorbed or supplied by the circuit elements in figure below.
Sol:
Power of 24v voltage source: As we see current is flowing out of the +ve terminal of 24v voltage source so according to passive convention power is supplied by this element, its value is
P=VXI=24X2=48w
Power of element 1: we see current is flowing into the +ve of element 1 so according to passive convention power is absorbed by this element, its value is
P=VXI=10X2=20w
Power of element 2: Current is flowing into the +ve of element 2 so according to passive convention power is absorbed by this element, its value is
P=VXI=14X2=28w
Power supplied=power absorbed
48v=20+28
=48w
Q.2.
In the network given below find the voltage Vab .and Vs
Sol:
40v is dropped across 20Ω , therefore from Ohm’s law current I2 will be
I2=V/R=40/20=2A
As we know same current flows in series so same current I2 flowes through 10Ω.
Vab=IXR
=2X(10+20) ( As 60Ω and 30Ω are in parallel, same voltage drops)
Vab =60v
I3=Vab/60=60/60=1A
We know entering current =leaving current so
I1=I2+I3
=2+1
I1 =3A (that is current flowing through 5kΩ) therefore
V5k=I1XR=3AX5KΩ=15Kv OR =15000V
Vs=V5k+Vab=15000v+60=15060v
Q.3.
For the circuit shown in the figure below, all the resistors are given in K Ohms; Find the total resistance RT in the following circuits. Draw the circuit diagram of each step otherwise you will lose your marks. Draw the circuit diagram of each step otherwise you will lose your marks. Write each step of the calculation to get maximum marks and also mention the units of each derived value.
Sol:
Starting from right side we see, at point a current will not pass through R7(6Ω) but follow easy path (short circuit path) and reach to point b.At point b again due to short circuit current will not pass through R6 and R2 but follow short circuit path and thus passing through 7Ω completes its path to reach voltage source V, so effect of 23Ω , 6Ω(R6) and 6Ω(R7) is neglected. Therefore circuit adopts the form as From left we see that R1 and R3 are in parallel so 8x8/8+8=64/16=4Ω 4Ω and 2Ω are in series so 4+2=6Ω Here 7Ω and 6Ω are in parallel so 7x6/7+6=42/13=3.23Ω Hence Rt=3.23Ω
Assignment 2(Fall 2007)
(Solution) CIRCUIT THEORY (PHY301)
MARKS: 40
Due Date: 29/10/2007
Q.1. For the network given below
(a) Find the total resistance and conductance.
(b) Determine Is and the current through each parallel branch.
Sol: (a) We see here that all resistances are in parallel So 1/Rt = 1/R11/R21/R3 Put the values 1/Rt =1/101/51/4
1/Rt = (245)/20 1/Rt = 11/20 Rt= 20/11 Rt = 1.81kΩ Now To calculate Conductance We know conductance is the reciprocal of resistance, means Conductance = 1/Rt = 1/1.81KΩ = 0.55 mili Siemens
(b) As all the resistors are in parallel so same 20v battery voltage are applied across the all resistors.
11
10
VI
k
1
20
10I
k
1 2I mA
22
5
vI
k
2
20
5I
k
2 4I mA
33
4
vI
k
3
20
4I
k
3 5I mA
Apply the KCL Rule, we get
1 2 3SI I I I
2 4 5
11
S
S
I mA mA mA
I mA
Q.2. Use Nodal analysis to find Voltage drop across 10Ω resistance in the network
given below. Identify and label each node otherwise you will lose your marks. Write each
step of the calculation to get maximum marks and also mention the units of each derived
value.
Sol: Labeling the nodes
1 1 2
1 1 2
1 2
1 2
2 2 2 1
2 2
KCL for node 1:
V V V10 0
10 20
2V V V10
20
3V V10
20
3V V 200........................................................ 1
V V 12 V V0
2 4 20
2V V 12
4
Writing KCL for the two nodes;
KCL for node 2:
2 1
2 2 1
2 2 1
2 2 1
2 1
V V0
20
5 3V 12 +V V 0
15V 60 V V 0
15V +V -V 60
16V -V 60..............................................(2)
1 2
2
1
1
Multiplying equ. (1) by 16 and adding in (2)
48V 16V 3200
-V1+16V =60
-----------------------------------
47V 3260
3260 V
47
V1 6
9.36v
That is the voltage drop across 10 Ω
Q.3. Use nodal analysis to find VO in the network given below. Label each node
otherwise you will lose your marks. Write each step of the calculation to get maximum
marks and also mention the units of each derived value.
sol: Labeling fig.
6k ohm resistance is short circuited so role of 6kΩ is neglected.
3 4 0v v
Because they are connected to ground directly.
As 10v voltage source involves between two nodes so Making v1 and v2 a super node
Equation for super node
31 2 2
3 3 34 10 0
4 10 3 10 6 10
v v v
1 2 2 44 3 6
v v v
1 2212 1212
4(12)4 3 6
v vv
1 2 23 4 2 48v v v
1 23 6 48v v -----------------------------------(1)
Also the constraint or coupling equation is
1 2 10v v ---------------------------------(2)
Multiplying (2) by 6 and adding in (1)
1 23 6 48v v
1 26 6 60v v
19 108v v
1 12v v
From the given figure
1 4 0v v v
Also
4 0v
So
1 0v v
0 12v v
Q.4.
(a) How much resistance is required to limit the current to 1.5 mA, if a 6v battery is
connected across the resistance?
Ans: We are given here
V=6v
I=1.5mA OR 1.5x10-3A
By ohm’s law V=IR so
R=V/I
R= 6/1.5x10-3
R=4KΩ
(b) Give your arguments about the statement that every short circuit is a close circuit but
every close circuit is not a short circuit.
Ans: It is necessary condition for a short circuit that it should be closed as current
cannot pass through open circuit. An electricl device will function only if the circuit is
closed. ie. current is allowed to pass through it. In the circuit there must be a energy
consuming device.
But before reaching any device if the circuit is completed (closed) heavy current will be
flowing through the circuit This is called "short circuit"
If the circuit is completed It is closed circuit whether it is passing through a device or not.
If the circuit is completed without a device it can be called a "short circuit"
……..Good Luck………
Assignment 3 (Fall 2007)
(SOLUTION) CIRCUIT THEORY (PHY301)
MARKS: 30
Due Date: 09/11/2007
Q.1. For the network given below Find V1 and V2
Sol: We use Loop method and assign loop 1 and 2 for the given circuit.
Now we write KVL, and as from KVL, the sum of voltage around a closed loop is = 0
Therefore, writing KVL for loop 1
3 + V1-6 = 0
V1 = 3V
Writing KVL for loop 2 on the right:
-10 + V2 - V1 = 0
By putting the value of V1 we get:
-10 + V2 - 3 = 0
V2 = 13 V
Q.2.
You are given the network below. Use any method you desire to find Vda . Show your
complete work. Label circuit diagram properly otherwise you will loose marks..
SOL:
We assume that current I is passing through close path
Writing KVL for closed path abcde:
-30 + 8I + 12I – 70 + 5I + 10I + 50 + 15I= 0
-50 + 50I=0
50I=50 or I = 1A ------------- (i)
So the current flowing in the circuit is 1A.
Now we’ll calculate the Voltage between a and d. (Vda) following the path abcd
-30 + 8I + 12I – 70 + 5I + Vda=0 => -100 + 25I + Vda=0
Vda = 100 – 25I --------------- (ii) Put the value of I from (i) into (ii)
Vda= 100 – 25 (1)
Vda= 100 – 25
Vda= 75v
We get same result if follow dea path
Writing kvl for dea path
10I+ 50+15I+Vad=0
10+50+15+Vad=0
75+Vad=0
Vad=-75 or Vda=75v
Q.3. Use loop analysis to find current Io through 10Ω resistance in the network given
below. Identify and label each loop otherwise you will lose your marks. Write each step
of the calculation to get maximum marks and also mention the units of each derived
value.
SOL: Labeling circuit for loop currents
Here I3=4A
Writing KVL for loop I1:
6I1 + 2 (I1 - I2)-10 = 0 => 6I1 + 2I1 - 2I2-10 =0
8I1 - 2I2 = 10 ----------------- (I)
KVL for loop I2:
10I2 + 4(I2 – I3)+ 2 (I2 - I1) = 0 => 16I2-2I1-4I3=0 putting I3=4
-2I1 + 16I2 = 16 ----------------- (II)
Multiplying (II) by 4 and adding in (I)
8I1 - 2I2 = 10
-8I1+64I2=64
62I2=74
I2=74/62
I2 =1.19
As Io=I2
so Io=1.19A
Assignment 4(Fall 2007) (Solution)
CIRCUIT THEORY (PHY301) MARKS: 30
Due Date: 28/12/2007
Q.1. Use nodal analysis to find IO in the given network. Identify and label each node otherwise you will lose your marks. Label circuit diagram properly. Write each step of the calculation to get maximum marks.
Sol:
Labeling circuit diagram for nodes
Writing KCL for node V1 V1/3+(V1-2)/2+(V1-V2)/1=0 2V1+3V1-6+6V1-6V2=0 11V1-6V2=6………………(I) Writing KCL for node V2 V2/5+(V2-V1)/1-2=0 V2+5V2-5V1-10=0 -5V1+6V2=10…………….(II) Adding (I) and (II) 11V1-6V2=6 -5V1+6V2=10 6V1=16
V1=2.66v Putting V1 in (I) 11(2.66)+6V2=6 29.33-6V2=6 V2=23.33/6 V2=3.88v Here Io=V1-V2/1 =2.66-3.88/1 Io =-1.22A
Q.2. Use Mesh analysis to find voltage Vo in the given network. Draw and labeled complete circuit diagram otherwise you will lose your marks. Sol: Labeling fig. for mesh KVL for loop 1
I1 = -5mA KVL for loop 2 2(I2 – I1) - 15 + 1(I2-I3) = 0 2I2 – 2I1 - 15 + I2 – I3 = 0 -2I1 + 3I2 – I3 = 15 Putting I1 in Eq. -2(-5) + 3I2 – I3 = 15 10 + 3I2 – I3 = 15
3I2 – I3 = 15 – 10 3I2 – I3 = 5…………………(A) OR I2=5+I3/3 KVL for loop 3 15 + 1(I3 – I2) + 3(I3 – I4) = 0 15 + I3 – I2 + 3I3 – 3I4 = 0 -I2 + 4I3 – 3I4 = -15 Putting I2 value and simplifying we get 11I3-9I4=-40 ……………(B) KVL for loop 4 4I4 +10 + 3(I4 – I3) = 0 4I4 + 3I4 – 3I3 = -10
-3I3 +7I4 = -10…………(C) Multiplying (B) by 7 and (C) by 9 and adding we get I3=-7.4mA so I2=-0.8mA Therefore VO=(I2-I3) 1K VO=(-0.8+7.4)10-3 X103
VO=6.6v
Q.3 First Define all nodes and Identify and label each Mesh in the network. Use Mesh analysis to find Current IO and Voltage Vo in the given network. Draw and labeled complete circuit diagram otherwise you will lose your marks. Write each step of the calculation to get maximum marks and also mention the units of each derived value.
Sol: Labeling the figure for mesh and super mesh KVL equation for loop 1 is 10I1+20(I1-I2) + 4V0 -50=0 As V0=30I3 so putting V0 value in above eq. 10I1+20I1-20I2+4(30I3)=50 30I1-20I2+120I3=50……….…..(A) There is a current controlled current source between mesh 2 and 3, so Mesh 2 and Mesh 3 form a Super Mesh:
Writing KVL for super mesh 40I2+30I3+20(I2-I1)-4V0 –120=0 40I2+30I3+20I2-20I1-4(30I3)=120 -20I1+60I2-90I3=120……………..(B) Constraint equation is I3-I2=2I0 As I0=I2 So I3-I2=2I2 3I2-I3=0……………………….(C) Multiplying eq (A) by 2 and (B) by 3 and adding we get 140I2-30I3=460 …………….(D) Multiplying (C) by 30 and subtracting from (D) 140I2-30I3=460 -90I2+30I3=0 50I2=460 I2=9.2A =I0 Putting I2 in (C) I3=27.6A V0=30I3 =30(27.6) V0=828v
Assignment 5(Fall 2007) (Solution)
CIRCUIT THEORY (PHY301) MARKS: 35
Due Date: 17/01/2008
Q.1
Using source transformation find VO in the following network. Draw and label each circuit diagram, otherwise you will lose your marks. Write each step of calculation and also mention the units of each derived values.
Solution: From left side we see 8k is in parallel with 3mA source, so it can be converted into a voltage source, using ohms law
Ω
(3 )(8 ) 24= = Ω =V IR mA k VOur modified circuit will be: In the above circuit resistor is in series with 8kΩ 4kΩ . we add them as 8k+4k=12k
24V is in series with 12 resistor so it can be converted into a current source of value: Ωk24 2
12= = =
ΩV VI mAR k
Circuit will be
In the above circuit two current sources are parallel to each other, so current sources will add up to give value:
2 2 4= + =I mA mA mA So the circuit adopts the form as : Now 12 resistor is in parallel with kΩ 6kΩ resistor so;
12 612 || 6 412 6
k kk k kk k×
Ω Ω = =+
Ω
V
4k resistor is in parallel with 4mA source, so it can be converted into a voltage source.
Ω
(4 )(4 ) 16= = Ω =V IR mA k VOur modified circuit will be: Positive terminal of 16V battery is connected with the positive terminal of 12V battery and negative terminal of 16V battery is connected with the negative terminal of 12V battery. Net voltage will be
16 12 4= − =V V V The circuit would be: Applying voltage division rule:
( )
1o
1 2
o
V
4 44 41 6 8
V = 2 V
= ×+
= ×+
=
sR V
R Rk
k k
Q.2. Find the Vo in the network below using Thevenin’s Theorem. Draw and label the circuit diagram of each step, otherwise you will lose your marks. Write each step of calculation to get maximum marks also mention the units of each derived value.
…………Good Luck………..
Sol: Step 1: Removing load resistance Here 2k is load resistance across which we have to find Vo. Step 2: Calculating Vth
We use nodal analysis method to determine Vth. At node 1 V1-V3/2k = -2mA + 1mA therefore V1-V3 = -2 ------------- (1) At node 2 V2/1k + V2-V3/1k - 2mA=0 2V2 –V3=2 ---------------- (2) At node 3 V3-V2/1k + V3-V1/2k+ V3-Vx/1k =4mA 5V3 -2V2-V1-2Vx=8 ----------------- (3) At node x
Vx-V3/1k + 1mA =0 Vx –V3 = -1------------ (4) Writing equitation (3) in terms of V3 and Vx we have from (1) and (2) 5V3 -2-V3-V3+2-2Vx = 8 3V3 -2Vx = 8 Putting value of V3 from (4) 3Vx +3-2Vx=8 Vx =5V so Voc= Vx =5V Third step : Calculating Rth
by open circuiting the current source Here 2kΩ is not in close path but has open terminal so We will ignore its effect in the circuit Therefore Rth will be sum of series 1k+1k+1k=3kΩ Rth=3kΩ
Fourth step. Now Vo can be found reinserting load resistance 2kΩ in series of Rth (3kΩ) and Vth Using voltage division rule, Vo will be Vo= 5 2
3 2x+
=10/5
V0=2v
…………Good Luck…………
Assignment 6(Fall 2007) (Solution)
CIRCUIT THEORY (PHY301) MARKS: 40
Due Date: 31/01/2008
Q.1 Find VO in the network given below using Thevenin’s theorem. Show each step of calculation otherwise you will lose your marks. Draw and label the circuit diagram of each step and also mention the units of each derived value.
Solution: First step: Removing Load resistance We remove load resistance 2k Second resistance: Finding Vth To find Vth we use node analysis method so we assign nodes V1 and V2 Constraint equation is V2-V1=2kIx……………(A) As Ix= 5-V1 Putting this value of Ix in (A) 2k V2-V1=2k(5-V1)/2k V2-V1=5-V1 V2=5v Actually V2=Vth so Vth=5v
Third step: Finding Rth Because dependent voltage source involves in the circuit so working with dependent sources is different from working with independent sources while applying Thevenin’s theorem . For dependent source while calculating R
th we will short circuit the open terminals of the Thevenin circuit and
will calculate the Isc
and then divide Vth
with Isc
to calculate Rth
.
Using nodal method
Isc=V2/1k V can be calculated as in second step above which is V2=5v so 2 Isc=5/1k Isc=5mA Now Rth will be Rth=Vth/Isc =5/5mA Rth =IKΩ
Fourth step: Reinserting Load resistance 2k in series of Rth and Vth
Now Vo can be calculated using voltage division rule. Vo=2x5/2+1=10/3 Vo=3.33v
Q.2 Find VO in the network given below using Norton’s theorem. Show each step of calculation otherwise you will lose your marks. Draw and label the circuit diagram of each step and also mention the unit of each derived value.
Solution: First step: Here 3kΩ is load resistance, replacing RL with a short circuit to find IN.
Second step: Finding INWe find IN using loop method.
Here I1=4mA Writing KVL for loop 2 6kI2-5+2k(I2-I1)=0 6kI2-5+2kI2-2kI1=0 Putting I1 value 6kI2-5+2kI2-8=0 8kI2-13=0 I2=13/8k I2=1.62mA Since I2=IN So IN=1.62mA Third step: Calculating Rth To calculate Rth we short circuit voltage source and open circuit current source of 4mA. Since 6kΩ (To the left of circuit) becomes open due to open circuiting, we ignore its effect. Now 2k and 6k are in series their sum is 2k+6k=8kΩ so Rth=8kΩ
Fourth step: Re-inserting Load resistance RL in the circuit in parallel of Rth and IN. First we find Io using current division rule. Io=8x1.62/8+3=12.96/11 Io=1.17mA Now Vo=Iox3k =1.17mAx3k Vo=3.53v
Q.3 Below are given three diodes (a),(b),(c) with different polarities. Describe reverse/forward biased condition of each with justification. Answers: Fig(a) In fig(a) diode is in reverse biased condition because +ve terminal of voltage source is connected to the cathode of the diode through a resistance . The anode terminal of the diode is grounded.. Now the diode is in reversed biased condition so, it will act as an open circuit. Fig (b) In fig (b) diode is also in reversed biased condition because -ve terminal of voltage source is connected to the anode of the diode through a resistance. The cathode terminal of the diode is grounded. Now the diode is in reversed biased condition so, it will act as an open circuit. Fig(c) In fig(c) diode is in forward biased condition because -ve terminal of voltage source is connected to the cathode of the diode through a resistance. The anode terminal of the diode is grounded.. Now the diode is in forward biased condition so, it will act as closed circuit.
Assignment 7(Fall 2007)
(Solution)
CIRCUIT THEORY (PHY301)
MARKS: 25
Due Date: 19/02/2008
Q.1.
Assume that the diode is germanium diode. Determine power dissipated through
3kΩ resistance. Also find current and voltage of resistance, considering diode to be
ideal. Show each step of calculation otherwise you will lose your marks.
Sol:
Here 10v is the source voltage (VS). As the diode is forward biased , so some of
voltage drops across diode for its farward biasing(VF) and remaining across
3KΩ (VR).Therefor
VS=VF+VR
To find power dissipated through 3kΩ, first of all we determine VR so from above
VR=VS-VF For germanium VF=0.3v
VR=10-0.3
VR=9.7v
As P=VI=V2/R
P=V2/R
P=(9.7)2/3k
P=31.36mw
Now if we consider this diode to be ideal then no voltage drop will occur
Across it (VF=0), then we have
VS=VR
VR=10v
I=VR/R
I=10/3
I=3.33mMA
Formatted: Font: Bold
Q.2
Determine the dc voltage and current values for the circuit shown in the figure
below.Also find the diode Peak inverse voltage. Mention the units of each derived
value.
Sol.
Here we are given 20Vac rated transformer, the peak secondary voltage is found as
V2(pk)
= 20/0.707
=28.28Vpk
The peak load voltage is now found as
VL(pk)
= V2
– 1.4
VL(pk)
=26.88Vpk
The dc load voltage is found as
Vave
= 2VL(pk)
/Π
=53.77/Π
Vave
=17.12 Vdc
Finally the dc load current is found as
Iave
= Vave
/RL
= 17.12/10k
Iave
= 1.71mA
Diode peak inverse voltage is
PIV= VL(pk)
+0.7v
=27.58v
Q.3: Consider a diode with n=1 which biased at 2mA.Find the change in currents as a result of
changing the voltage by (a) -10mv (b) +5mv (c) +10mv , using small signal model and
exponential model.
Sol:
For small signal model we have
Δv = rd Δi
Δi = Δv / rd
But
rd = n VT / I
=1 x 25m/2m
= 12.5ohms
Δi = Δv / 12.5
(a) Changing voltage at -10mv
Δi = -10 / 12.5
= -0.8mA
(b) For Δv=5mv
Δi = 5 / 12.5
=0.4mA
(c) For Δv=10mv
Δi = 10 / 12.5
=0.8mA
Now from exponential model i = Is e v / nVT
we know that
ID + Δi = ID e Δv/nVT
ID + Δi = ID e Δv/nVT
Δi = ID (e Δv/nVT - 1)
We are given
ID = 2mA thus
Δi = 2(eΔv
/nVT -1)
(a) For Δv=-10mv Δi = 2(eΔv
/nVT -1)
Δi = 2(e-10
/25 -1)
=2(-0.329)
=-0.659mA
(b) For Δv= 5mv Δi = 2(e5/25 -1)
= 2(1.22-1)
=0.44mA
(c) For Δv= 10mv Δi = 2(e10
/25 -1)
=0.98mA
Assignment 8(Fall 2007)
(Solution)
CIRCUIT THEORY (PHY301)
MARKS: 25
Due Date: 29/02/2008
Q.1. Draw the schematic diagrams for half wave and full wave rectifier and their typical
output waveform. Also write formulae to determine
i) Peak load voltage ii) DC load current iii)PIV , for both rectifiers.
Answer:
Half wave Rectifier:
(Input waveform) (Half wave rectifier) (Out put waveform)
i). Peak load voltage:
VL(pk) = V2(pk) – VF
ii). DC load current:
VL(pk) / RL
iii). PIV:
V2(pk)
Full wave rectifier:
11 1
i). Peak load voltage:
VL(pk)=V2(pk) / 2 - VF
ii). DC load current: I
L(pk)= V
L(pk)/R
L
iii). PIV:
2VL(pk) + 0.7V
Q.2. For each of the circuits shown in the figure below, find the emitter, base, and collector
voltages and currents. Use 20, but assume |VBE| = 0.3V independent of current
level.
SOL:
From fig (A) have VB = 0V
VE = VB+0.3 =0.3V
IE= (5-VE) / 1.5 = (5- 0.3)/1.5 = 3.13mA
IC = ά IE = 20/21 x 3.13mA = 2.98mA
VC = -5 + 2xIC = -5 + 5.96 = 0.96V
IB = IC/ = 2.98 / 20 = 0.149mA
From fig (B) we have
VB = 4V
VE = VB+0.3 =4.3V
IE= (12-VE) / 2 = (12-4.3)/2 = 3.85mA
IC = ά IE = 20/21 x 3.85mA = 3.66mA
VC = IC x 5= 18.33V
IB = IC/ = 3.66/ 20 = 0.183mA