chap 4 dc biasing bjt

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DC BIASING -BJTs

Chapter 4



Introduction

The term biasing is used for application of dc voltages toestablish a fixed level of current and voltage.

Transistor must be properly biased with dc voltage to

operate as a linear amplifier.

If amplifier is not biased with correct dc voltages on input

and output, it can go into saturation or cutoff when the input

signal applied.

There are several methods to establish DC operating point.

In DC analysis all capacitor act as open circuit.



Biasing

• Biasing: The DC voltages applied to a transistor in order

to turn it on so that it can amplify the AC signal or to

establish a fixed level of current and voltage.

• The base current,

is the first to be determined. Once

is known, the remaining quantities can be determined.

• The basic relationships for a transistor

• ≅ 0.7; = + 1 ≅ ; =



Operating Point

• The DC input establishes an

operating point or quiescent

point called Q-point

• Quiescent means quiet,still, inactive

• A transistor’s operating

point (Q-point) is defined by

IC

, VCE

, and IB



Active Operating Region

• For the BJT to be biased in its linear or active region thefollowing must be true:

BE junction must be forward biased (p-region more positive)

with a resulting forward biased voltage of about 0.6 – 0.7V

BC junction must be reversed based 9n-region more positive)with the reverse bias voltage being any value within the

maximum limits of device.

Note :for FB, voltage across the pn junction is p positive

whereas for RB it is opposite with n positive.



The three states of operation

• Active or linear region operation

Base-Emitter junction is forward biased

Base-Collector junction is reverse biased

• Cutoff region operation Base-Emitter junction is reverse biased

Base-Collector junction is reverse biased

• Saturation region operation

Base-Emitter junction is forward biased

Base-Collector junction is forward biased



The DC Operating Point

The goal of amplification in most cases is to increase theamplitude of an ac signal without altering it.




For a transistor circuit to amplify it must be properly biased with dc

voltages. The dc operating point between saturation and cutoff is called the

Q-point. The goal is to set the Q-point such that that it does not go into

saturation or cutoff when an a ac signal is applied.




C

CC

CE

c

c

R

V V

R+

−= )

1(I

Recall that the collector characteristic curves graphically show the

relationship of collector current and VCE for different base currents. Withthe dc load line superimposed across the collector curves for this

particular transistor we see that 30 mA of collector current is best for

maximum amplification, giving equal amount above and below the Q-

point. Note that this is three different scenarios of collector current

being viewed simultaneously.

Slope of the dc load line?



The DC Operating PointWith a good Q-point established, let’s look at the effect a superimposed ac

voltage has on the circuit. Note the collector current swings do not exceed

the limits of operation(saturation and cutoff). However, as you might already

know, applying too much ac voltage to the base would result in driving the

collector current into saturation or cutoff resulting in a distorted or clipped

waveform. (Example 5-1)



Saturation

• When the transistor is operating in saturation, current

through the transistor is at its maximum possible values.

•

=

• ≅ 0



DC biasing circuit• Fixed-bias circuit

- highly dependent on βdc • Emitter-stabilized bias circuit

Add emitter resistor

Greatly reduces effect of change of β

Equations

• Collector-emitter loop – Less common than CE circuit

– Collector connected to ground

– Similar analysis

– Voltage gain < 1

• Voltage divider bias circuit

• DC bias with voltage feedback



BJT - DC Analysis

• Using KVL for the input and output circuits and the transistor

characteristics, the following steps apply:1. Draw the load lines on the transistor characteristics curve

2. For the input characteristics determine the Q point for theinput circuit from the intersection of the load line and thecharacteristic curve where Q point is between saturation

and cut off(Note that some transistor do not need an inputcharacteristic curve.)

3. From the output characteristics, find the intersection ofthe load line and characteristic curve determined from theQ point found in step 2, determine the Q point for the

output circuit.4. Best Q for a linear amplifier - Midway between saturation

and cut-off



Base/Fixed Bias

This type of circuit is very unstable since its changes

with temperature and collector current. Base biasing

circuits are mainly limited to switching applications.



Base/Fixed Bias

In a simple biasing circuit, VBB is eliminated byconnecting the resistor RB to the supply VCC

This biasing circuit is called base bias, or fixed bias.

• Single power supply

• Coupling capacitors

As shown in the above circuit, two dc

voltage supplies are needed to bias a

BJT which is not practical



Base/Fixed bias

Applying KVL,

= +

•Therefore,

=

= ; = ; since = 0; = =



The Base-Emitter Loop

• From KVL

+

Solving for base current

=



Collector-Emitter Loop

• Collector current =

• From KVL

=



Feedback bias: collector-feedback bias



Feedback bias: Emitter-feedback bias



Load line for fixed bias circuit

The Q-point is the operating point:

Where the value of RB sets the value

of IB

Where IB and the load line intersect

That sets the values of VCE and IC

=

DC load line is defined by two points,

consider = 0 and = 0 thus

= �=

; =

=



DC Load Line

Ci i V l Aff h Q P i



Circuit Values Affect the Q-Point

Decreasing

value of VCC

Increasing

level of RC

Increasing

level of IB



Emitter-Stabilized Bias Circuit

This type of circuit is independent of

making it as stable as the voltage-divider

type. The drawback is that it requires two

power supplies.

Two key equations for analysis of this type

of bias circuit are shown below. With these

two currents known we can apply Ohm’s

law and Kirchhoff's law to solve for the

voltages.

IB ≈ IE/

IC ≈ IE ≈( -VEE-VBE)/(RE + RB/ DC)



Base-emitter loop(input loop)Collector-emitter loop(output loop)

KVL at loop 1 + + + = 0

Since

=

+ 1

:

+ 1 = 0

Solving for IB

= −+(+1)

1 2

KVL at loop 2

+ = 0

Since ≅ :

= ( + )

Also = =

=

+

=

= = +



Load Line for Emitter-bias circuit

= ( + )

From equation (2)

The end points of the load line

are:

= �

= +



Voltage-Divider Bias Voltage-divider bias is the most widely

used type of bias circuit..

DC bias voltage at base of transistor is

developed by a resistive voltage-divider

consists of R1 and R2.

Vcc is dc collector supply voltage. 2current path between point A and

ground: one through R2 and the other

through BE junction and RE.

The current in the base-emitter circuit is

much smaller, so for all practicalpurposes we say that IE approximately

equals IC.

IE≈ IC



Voltage-Divider Bias

• This is a very stable bias circuit.

• The currents and voltages are

almost independent of

variations in β.

• There are two ways of analyzing

the voltage divider bias circuit :-

• 1. Exact analysis

• 2. Approximate analysis



Voltage Divider Bias

For the Voltage Divider Bias configurations

• Draw Equivalent Input circuit

• Draw Equivalent Output circuit

• Write necessary KVL and KCL Equations

• Determine the Quiescent Operating Point



1. Exact AnalysisStep 1 : Redraw circuit

Step 2 : find thevenin equivalent

circuit

= 1//2

=

2=

21 + 2

Step 3 : Replace thevenin equivalent circuit

Step 4 : Apply KVL to determine IB

and VCE

= 0

Substitute = ( + 1)

= + ( + 1)

= ( + )



2. Approximate AnalysisUsed for circuit that have a very small

IB due to large resistance betweenbase and ground.

If Ri ≥ R2, IB < I2. So approx. I1 ≅ I2

Testing βRE ≥ 10R2. If satisfied

= 21 + 2 ; = ; = And ≅

Apply KVL at output loop: =

Substitute

≅

= (+)



Voltage-Divider Bias for PNP Transistor

Pnp transistor has opposite polarities from npn. To obtainpnp, required negative collector supply voltage or with apositive emitter supply voltage. The analysis of pnp isbasically the same as npn.



Analysis of voltage bias for pnp transistor

• Base voltage

• Emitter voltage

• By Ohm’s Law,

• And,

EE

E DC

B V

R R R

RV

+=

21

1

BE B E V V V +=

E

E EE

E

R

V V I

−

=

C E EC

C C C

V V V

R I V

−=

=



Collector Feedback configuration

Another way to improve the stability of a bias circuit is to

add a feedback path from collector to base.

In this bias circuit the Q-point is only slightly dependent on

the transistor beta, β.



Base – Emitter Loop Solve for IBKVL at input loop:

′ = 0

Where IB ≤ IC, so approx.:

IC′ = + ≅ = ; ≅

Knowing IC = βIB and IE

≅ IC, the

loop equation becomes: = 0

Solving for

= + ( + )



Collector Emitter Loop

KVL at output loop:

+ + = 0

Since IC′ ≅ IC as IB=0 and IC = βIB:(+) + = 0

Solving for VCE: = ( + )



BJT DC Analysis - Summary

•Calculating the Q-point for BJT is the first step in analyzing thecircuit

• To summarize: – We ignored the AC (variable) source

• Short circuit the voltage sources

• Open Circuit the current sources

– We applied KVL to the base-emitter circuit and using load line analysison the base-emitter characteristics, we obtained the base current Q-point

– We then applied KVL to the collector-emitter circuit and using loadline analysis on the collector-emitter characteristics, we obtained thecollector current and voltage Q-point

• This process is also called DC Analysis

• We now proceed to perform AC Analysis



Troubleshooting

Shown is a typical voltage divider circuit with correct voltage readings.Knowing these voltages is a requirement before logical troubleshooting can

be applied. We will discuss some of the faults and symptoms.



Troubleshooting

R1 Open

With no bias the

transistor is in cutoff.

Base voltage goes down

to 0 V.

Collector voltage goes

up to 10 V(V CC ).

Emitter voltage goes

down to 0 V.



TroubleshootingResistor R

E Open:

Transistor is in cutoff.

Base reading voltage will stay

approximately the same.

Collector voltage goes up to 10

V(V CC).

Emitter voltage will be

approximately the base voltage +

.7 V.



Troubleshooting

Base Open Internally:


Base voltage stays


Collector voltage goes up to 10V(V CC).

Emitter voltage goes down to 0

V.



Troubleshooting

Open BE Junction:


Base voltage stays


Collector voltage goes up to 10V(V CC)

Emitter voltage goes down to 0

V.



TroubleshootingRC Open:

Base voltage goes down to 1.11 Vbecause of more current flow

through the emitter.

Collector voltage will drop to .41 V

because of current flow from

forward-biased collector-base junction.

Emitter voltage will drop to .41 V

because of small current flow from

forward-biased base-emitter

junction.



Summary

The purpose of biasing is to establish a stable operating point (Q-point).

The Q-point is the best point for operation of a transistor for a given collector

current.

The dc load line helps to establish the Q-point for a given collector current.

The linear region of a transistor is the region of operation within

saturation and cutoff.

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chap 4 dc biasing bjt