ATF15xx-DK3 - Microchip Technologyww1.microchip.com/...CPLD-ATF15xx-DK3...UserGuide.pdf · Atmel 44-pin TQFP Socket Adapter Board (P/N: ATF15xx-DK3 ... [USER GUIDE] Atmel-3605C-CPLD-ATF15xx-DK3

ATF15xx-DK3

CPLD Development/Programmer Kit

USER GUIDE

Introduction

The Atmel® ATF15xx-DK3 Complex Programmable Logic Device (CPLD) Development/Programmer Kit is a

complete development system and an In-System Programming (ISP) programmer for the Atmel ATF15xx

Family of industry standard pin compatible CPLDs with Logic Doubling® features. This kit provides designers a

very quick and easy way to develop prototypes and evaluate new designs with an ATF15xx ISP CPLD. The

ATF15xx Family of ISP CPLDs includes the Atmel ATF15xxAS, ATF15xxASL, ATF15xxASV, and

ATF15xxASVL CPLDs. With the availability of the different socket adapter boards to support most of the

package types(1) offered in the ATF15xx Family of ISP CPLDs, this kit can be used as an ISP programmer to

program the ATF15xx ISP CPLDs in most of the available package types(1) through the industry standard JTAG

interface (IEEE 1149.1).

Kit Contents

Atmel CPLD Development/Programmer Board (P/N: ATF15xx-DK3)

Atmel 44-pin TQFP Socket Adapter Board (P/N: ATF15xx-DK3-SAA44)(2)

Atmel ATF15xx LPT-based JTAG ISP Download Cable (P/N: ATDH1150VPC)

Two Atmel 44-pin TQFP Sample Devices

Device Support

The ATF15xx-DK3 CPLD Development/Programmer Kit supports the following devices in all currently available

Atmel speed grades and packages (except the 100-PQFP):

ATF1502AS/ASL

ATF1504AS/ASL

ATF1508ASV/ASVL

ATF1502ASV

ATF1504ASV/ASVL

ATF1508AS/ASL

1. The socket adapter board is not offered for the 100-pin PQFP.

2. Only the 44-pin TQFP Socket Adapter Board is included in this kit. Other socket adapter boards are sold separately. See

Section, “Hardware Description” for more information on socket adapter board ordering codes.

Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014

2

Table of Contents

Kit Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

CPLD Development/Programmer Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Logic Doubling CPLDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

ATF15xx ISP Download Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

PLD Development Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

System Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Hardware Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

CPLD Development/Programmer Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

7-segment Displays with Selectable Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

LEDs with Selectable Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Push-button Switches with Selectable Jumpers for I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Push-button Switches with Selectable Jumpers for GCLR and OE1 Pins . . . . . . . . . . . . . . . . . . . . . 9

2MHz Oscillator and Clock Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

VCCIO and VCCINT Voltage Selection Jumpers and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

ICCIO and ICCINT Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Power Supply Switch and Power LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Power Supply Jack and Power Supply Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

JTAG ISP Connector and TDO Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Socket Adapter Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Atmel ATF15xx ISP Download Cable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

References and Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Atmel ProChip Designer Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Atmel WinCUPL Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Atmel ATMISP Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Atmel POF2JED Conversion Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014

Kit Features

CPLD Development/Programmer Board

10-pin JTAG-ISP Port

Regulated Power Supply Circuits for 9VDC Power Source

Selectable 5V, 3.3V, 2.5V, or 1.8V I/O Voltage Supply

Selectable 1.8V, 3.3V, or 5.0V Core Voltage Supply

44-pin TQFP Socket Adapter Board

Headers for I/O Pins of the ATF15xx Device

2MHz Crystal Oscillator

Four 7-segment LED Displays

Eight Individual LEDs

Eight Push-button Switches

Global Clear and Output Enable Push-button Switches

Current Measurement Jumpers

Logic Doubling CPLDs

ATF15xx ISP CPLD with Logic Doubling Architecture

ATF15xx ISP Download Cable

5V, 3.3V, 2.5V, or 1.8V ISP Download Cable for PC Parallel Printer (LPT) Port

PLD Development Software

The Atmel PLD development software tools are available online for PLD designer’s use of the ATF15xx

ISP CPLDs. Please reference the Overview document, “PLD Design Software Overview” available at:

http://www.atmel.com/images/atmel-3629-pld-design-software-overview.pdf

System Requirements

The minimum hardware and software required to program an ATF15xx ISP CPLD device which is

designed using the Atmel ProChip Designer Software on the CPLD Development/Programmer Board

through the Atmel ATMISP v6.x (ATF15xx CPLD ISP Software) are:

x86 Microprocessor-based Computer

Windows XP®, Windows® 98, Windows NT® 4.0, or Windows 2000

128-MByte RAM

500-MByte Free Hard Disk Space

Windows-supported Mouse

Available Parallel Printer (LPT) Port

9VDC Power Supply with 500mA of Supply Current

SVGA Monitor (800 x 600 Resolution)

3ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014



4

Ordering Information

Hardware Description

CPLD Development/Programmer Board

The CPLD Development/Programmer and Socket Adapter Boards shown in the below figure contain

features that are useful for developing, prototyping, or evaluating ATF15xx CPLD designs. Features

that make this a very versatile starter/development kit and an ISP programmer for the ATF15xx family

of JTAG-ISP CPLDs include:

Figure 1. CPLD Development/Programmer Kit with 44-pin TQFP Socket Adapter Board

Atmel Part Number Description

ATF15xx-DK3 CPLD Development/Programmer Kit (includes the ATF15xxDK3-SAA44*)

ATF15xxDK3-SAA100 100-pin TQFP Socket Adapter Board for DK3 Board

ATF15xxDK3-SAJ44 44-pin PLCC Socket Adapter Board for DK3 Board

ATF15xxDK3-SAJ84 84-pin PLCC Socket Adapter Board for DK3 Board

ATF15xxDK3-SAA44* 44-pin TQFP Socket Adapter Board for DK3 Board

Push-button Switches

LEDs

7-segment Displays

2MHz Crystal Oscillator

5V, 3.3V, 2.5V, or 1.8V VCCIO Selector

1.8V, 3.3V, or 5.0V VCCINT Selector

JTAG ISP Port

Socket Adapters

VoltageRegulators

GCLRSwitch

GOESwitch

VccIOSelector

VCCINT Selector

VccIO LED

VccINT LEDPower LED

Clock Selector

Power Switch

Oscillator

Power Supply Jack

Power Supply Header

JTAG Cascade Jumper

JTAG ISP Header

g

7-SegmentDisplays

ATF15xxDK3-SAA44Socket Adapter Board

User I/OPin Headers

LEDs

Device Socket

Push-Button Switches

IccINT Jumper

IccIO Jumper


7-segment Displays with Selectable Jumpers

The CPLD Development/Programmer Board contains four 7-segment displays which allow the

observation of the ATF15xx CPLD outputs. These four displays are labeled as DSP1, DSP2, DSP3,

and DSP4. The 7-segment displays have common anode LEDs with the common anode lines

connected to the VCCIO (I/O supply voltage for the CPLD) through a series of resistors with selectable

jumpers labeled as JPDSP1, JPDSP2, JPDSP3, and JPDSP4. These jumpers can be removed to

disable the displays by unconnecting the VCCIO to the displays. Individual cathode lines are connected

to the I/O pins of the ATF15xx CPLD on the CPLD Development/Programmer Kit. To turn on a

particular segment, including the DOT of a display, the corresponding ATF15xx I/O pin connected to

this LED segment must be in a logic low state with the corresponding selectable jumper set; therefore,

the outputs of the ATF15xx device will require configuration for active-low outputs in the design file.

The displays work best at 2.5V VCCIO or higher.

Each segment of each display is hard-wired to one specific I/O pin of the ATF15xx device. For the

higher pin count devices (100-pin and larger), all seven segments and the DOT segments of the four

displays are connected to the I/O pins; however, for the lower pin count devices, only a subset of the

displays, first and fourth displays, are connected to the ATF15xx device’s I/O pins. Tables 1 and 2

show the 7-segment display package connections to the ATF15xx device. The circuit schematic of the

displays and jumpers is shown in the figure below.

Figure 2. Circuit Diagram of 7-segment Display and Jumpers

a b c d e f

Vc1

Vc2

g

ab

cd

e

f g

DO

T

DSP1

a b c d e f

Vc1

Vc2

g

ab

cd

e

f g

DO

T

DSP2

a b c d e f

Vc1

Vc2

g

ab

cd

e

f g

DO

T

DSP3

a b c d e f

Vc1

Vc2

g

ab

cd

e

f g

DO

T

DSP4

RD

SP

21R

DS

P22

RD

SP

23R

DS

P24

RD

SP

25R

DS

P26

RD

SP

27

RD

SP

31R

DS

P32

RD

SP

33R

DS

P34

RD

SP

35R

DS

P36

RD

SP

37

RD

SP

41R

DS

P42

RD

SP

43R

DS

P44

RD

SP

45R

DS

P46

RD

SP

47

VccIO

DO

T2

DO

T3

DO

T4RDOT2 RDOT3 RDOT4

D4A

D4B

D4C

D4D

D4E

D4F

D4G

JPDSP1JPLED1

JPDSP2JPLED2

JPDSP3JPLED3

JPDSP4JPLED4

RDOT1

RD

SP

11R

DS

P12

RD

SP

13R

DS

P14

RD

SP

15R

DS

P16

RD

SP

17D

OT1

D1A

D1B

D1C

D1D

D1E

D1F

D1G

D2A

D2B

D2C

D2D

D2E

D2F

D2G

D3A

D3B

D3C

D3D

D3E

D3F

D3G


6

Table 1. ATF15xx 44-pin Connections to 7-segment Displays

Table 2. ATF15xx 84-pin and 100-pin Connections to 7-segment Displays

44-pin TQFP 44-pin PLCC

DSP/Segment PLD Pin DSP/Segment PLD Pin DSP/Segment PLD Pin DSP/Segment PLD Pin

1/A 27 3/A NC 1/A 33 3/A NC

1/B 33 3/B NC 1/B 39 3/B NC

1/C 30 3/C NC 1/C 36 3/C NC

1/D 21 3/D NC 1/D 27 3/D NC

1/E 18 3/E NC 1/E 24 3/E NC

1/F 23 3/F NC 1/F 29 3/F NC

1/G 20 3/G NC 1/G 26 3/G NC

1/DOT 31 3/DOT NC 1/DOT 37 3/DOT NC

2/A NC 4/A 3 2/A NC 4/A 9

2/B NC 4/B 10 2/B NC 4/B 16

2/C NC 4/C 6 2/C NC 4/C 12

2/D NC 4/D 43 2/D NC 4/D 5

2/E NC 4/E 35 2/E NC 4/E 41

2/F NC 4/F 42 2/F NC 4/F 4

2/G NC 4/G 34 2/G NC 4/G 40

2/DOT NC 4/DOT 11 2/DOT NC 4/DOT 17

84-pin PLCC 100-pin TQFP

DSP/Segment PLD Pin DSP/Segment PLD Pin DSP/Segment PLD Pin DSP/Segment PLD Pin

1/A 68 3/A 22 1/A 67 3/A 13

1/B 74 3/B 28 1/B 71 3/B 19

1/C 70 3/C 25 1/C 69 3/C 16

1/D 63 3/D 21 1/D 61 3/D 8

1/E 58 3/E 16 1/E 57 3/E 83

1/F 65 3/F 17 1/F 64 3/F 6

1/G 61 3/G 12 1/G 60 3/G 92

1/DOT 73 3/DOT 29 1/DOT 75 3/DOT 20

2/A 52 4/A 5 2/A 52 4/A 100

2/B 57 4/B 10 2/B 54 4/B 94

2/C 55 4/C 8 2/C 47 4/C 97

2/D 48 4/D 79 2/D 41 4/D 81

2/E 41 4/E 76 2/E 46 4/E 76

2/F 50 4/F 77 2/F 40 4/F 80

2/G 45 4/G 75 2/G 45 4/G 79

2/DOT 50 4/DOT 11 2/DOT 56 4/DOT 93


LEDs with Selectable Jumpers

The CPLD Development/Programmer Board has eight individual LEDs, which allow designers to

display the output signals from the user I/Os of the ATF15xx devices. These eight LEDs are labeled

LED1 to LED8 on the CPLD Development/Programmer Board. The cathode of each LED is connected

to Ground (GND) through a series resistor, while the anode of each LED is connected to a user I/O pin

of the CPLD through the JPL1/2/3/4/5/6/7/8 selectable jumper. These jumpers can be removed to

disable the LEDs by unconnecting the anodes of the LEDs to the I/O pins of the CPLD. The figure

below illustrates the circuit diagram of the LEDs with the selection jumpers.

To turn on a particular LED, the corresponding ATF15xx I/O pin connected to the LED must be in a

logic high state with the corresponding jumper set; therefore, the outputs of the ATF15xx device will

need to be configured as active high outputs. The LEDs work best at 2.5V VCCIO or higher.

The lower pin count devices (44-pin) only have four I/Os connected to LED1/2/3/4. For the higher

pin-count devices (100-pin and larger), all eight LEDs are connected to the I/Os of the device. Table 3

shows the different package connections of the CPLD I/Os to the LEDs.

Figure 3. Circuit Diagram of the LEDs and Jumpers

Table 3. ATF15xx Connections to LEDs

44-pin TQFP 44-pin PLCC 84-pin PLCC 100-pin TQFP

LED PLD Pin LED PLD Pin LED PLD Pin LED PLD Pin

LED1 28 LED1 34 LED1 69 LED1 68

LED2 25 LED2 31 LED2 67 LED2 65

LED3 22 LED3 28 LED3 64 LED3 63

LED4 19 LED4 25 LED4 60 LED4 58

LED5 27 LED5 17

LED6 24 LED6 14

LED7 18 LED7 10

LED8 15 LED8 9

LED8GREEN

LED7GREEN

LED6GREEN

LED5GREEN

JPL8SIP2

JPL7SIP2

JPL6SIP2

JPL5SIP2

RL8330

RL7330

RL6330

RL5330

LED

1

LED

2

LED

3

LED

4

LED

5

LED

6

LED

7

LED

8

LED4GREEN

LED3GREEN

LED2GREEN

LED1GREEN

JPL4SIP2

JPL3SIP2

JPL2SIP2

JPL1SIP2

RL4330

RL3330

RL2330

RL1330


8

Push-button Switches with Selectable Jumpers for I/O Pins

The CPLD Development/Programmer Board contains eight push-button switches, which are

connected to the I/O pins of the CPLD. The switches send input logic signals to the user I/O pins of the

ATF15xx device. These switches are labeled SW1 to SW8 on the CPLD Development/Programmer

Board. One end of each input push-button switch is connected to VCCIO, while the other end of each

push-button switch is connected to a pull-down resistor and then connected to the specific I/O pin of

the CPLD through the JPS1/2/3/4/5/6/7/8 selectable jumper.

If any one of these switches is pressed and the corresponding jumper is set, the specific I/O pin of the

device will be driven to a logic high state by the output of switch circuit. Since each push-button switch

is also connected to a pull-down resistor, the input will have a logic low state if the switch is not pressed

with the corresponding jumper set. If the push-button jumper is not set, the corresponding pin will be

treated as an unconnected pin. Figure 4 is a circuit diagram of the push-button switch and selectable

jumper. Table 4 shows the connections of these eight push-button switches to the CPLD I/O pins in the

different package types.

Figure 4. Circuit Diagram of the Push-button Switches and Jumpers for the I/O Pins

Table 4. ATF15xx Connections to the I/O Pin Switches


Push Button PLD Pin Push Button PLD Pin Push Button PLD Pin Push Button PLD Pin

SW1 15 SW1 21 SW1 54 SW1 48

SW2 14 SW2 20 SW2 51 SW2 36

SW3 13 SW3 19 SW3 49 SW3 44

SW4 12 SW4 18 SW4 44 SW4 37

SW5 8 SW5 14 SW5 9 SW5 96

SW6 5 SW6 11 SW6 6 SW6 98

SW7 2 SW7 8 SW7 4 SW7 84

SW8 44 SW8 6 SW8 80 SW8 99

R191K

SW1

VCCIO

C130.001uF

JPS1

SIP2SW1R29

1K


Push-button Switches with Selectable Jumpers for GCLR and OE1 Pins

The CPLD Development/Programmer Board contains two push-button switches for the Global Clear

(GCLR) and Output Enable (OE1) pins of the CPLD. The switches control the logic states of the OE1

and GCLR inputs of the ATF15xx devices. These switches are labeled SW-GCLR and SW-GOE1 on

the board. One end of the SW-GCLR input push-button switch is connected to GND. The other end of

the push-button switch is connected to a pull-up resistor to VCCIO, and then connected to the GCLR

dedicated input pin of the ATF15xx device. It is intended to be used as an active-low reset signal to

reset the registers in the ATF15xx device with the JPGCLR selectable jumper set. Similarly, one end of

the SW-GOE1 input push-button switch is connected to GND. The other end of the push-button switch

is connected to a pull-up resistor to VCCIO, and then connected to the OE1 dedicated input pin of the

ATF15xx device. It is intended to be used as an active-low output enable signal to control the

enabling/disabling of the tri-state output buffers in the ATF15xx with the JPGOE selectable jumper set.

Figure 5 is the circuit diagram of the push-button switches and the jumpers for the GCLR and OE1

pins.

If any of these push-button switches is pressed and the corresponding jumper is set, the specific I/O of

the CPLD will be driven to a logic low state. Since each push-button is also connected to a pull-up

resistor, the corresponding CPLD input will have a logic high state if the push-button switch is not

pressed with the corresponding selectable jumper set. If the selectable jumper is not set, the

corresponding dedicated input pin of the CPLD can be considered a No Connect (NC) pin. Table 5

shows the pin numbers of the GCLR and OE1 dedicated input pins of the ATF15xx devices in all

available package types.

Figure 5. Circuit Diagram of Push-button Switches and Selectable Jumpers for GCLR and OE1

Table 5. Pin Numbers of GCLR and OE1


GCLR 39 1 1 89

OE1 38 44 84 88

GCLR

R151K

R161K

VccIO

JPGCLR JPGOE GOE

C70.001uF

C80.001uF

SW-GCLRSW-GCLR

SW-GOESW-GOE

R37

1K

R38

1K


10

2MHz Oscillator and Clock Selection Jumper

The Clock Selection Jumper labeled JP-GCLK on the CPLD Development/Programmer Board is a

two-position jumper that allows the users to select which GCLK dedicated input pin (either GCLK1 or

GCLK2) of the ATF15xx device should be connected to the output of the 2MHz oscillator. In addition,

the jumper can be removed to allow an external clock source to be connected to GCLK1 and/or GCLK2

of the ATF15xx device. Figure 6 is an illustration of the circuit diagram of the oscillator and selection

jumper. Table 6 shows the pin numbers for the GCLK1 and GCLK2 dedicated input pins of the

ATF15xx device in all the different available package types.

Figure 6. Circuit Diagram of Oscillator and Clock Selection Jumper

If GCLK1 jumper is set, the jumper will be located toward the side of the board. On the other

hand, if GCLK2 jumper is set, the jumper will be located toward the middle of the board.

Table 6. Pin Numbers of GCLK1 and GCLK2


GCLK1 37 43 83 87

GCLK2 40 2 2 90

1 4

2 3

OSC

2MHZ

GCLK2 GCLK1

1 2 3JPGCLK

R181K

R171K

VccOSC

C210.1uF

R39100


VCCIO and VCCINT Voltage Selection Jumpers and LEDs

The VCCIO and VCCINT Voltage Selection Jumpers, labeled VCCIO Selector and VCCINT Selector

respectively on ATF15xx-DK3 Development/Programming Kit, allow the selection of the I/O supply

voltage level (VCCIO) and core supply voltage level (VCCINT) that are used for the target CPLD on the

kit. Once these jumpers are set correctly, the LEDs (labeled VCCINT LED and VCCIO LED) will turn

on; however, at lower supply voltage levels (i.e. 2.5V or lower), the LEDs might be very dim.

For ATF15xxAS/ASL (5.0V) CPLDs, both the VCCIO Selector and VCCINT Selector jumpers

must be set to 5.0V.

For ATF15xxASV/ASVL (3.3V) CPLDs, both the VCCIO Selector and VCCINT Selector Jumpers

must be set to 3.3V only.

ICCIO and ICCINT Jumpers

The ICCIO and ICCINT jumpers can be removed and used as ICC measurement points. When the

jumpers are removed, current meters can be connected to the posts to measure the current

consumption of the target CPLD. When users are not using these jumpers to measure the current,

these jumpers must be set in order for the kit and CPLD to operate.

Voltage Regulators

Two voltage regulators, labeled VR1 and VR2, are used to independently generate and regulate the

VCCINT and VCCIO voltages from the 9VDC power supply. For details, please see the ATF15xx-DK3 kit

schematic, Figure 12.

Power Supply Switch and Power LED

The Power Supply Switch, labeled POWER SWITCH, can be switched to the on or off position, which

is used to turn on or off the power of the ATF15xx-DK3 board respectively. It allows the 9VDC voltage

at the Power Supply Jack to pass to the voltage regulators when it is in the on position. When the

Power Supply Switch is turned on, the Power LED (labeled POWER LED) will light up to indicate that

the ATF15xx-DK3 Kit is supplied with power.

Power Supply Jack and Power Supply Header

The ATF15xx-DK3 board contains two different types of power supply connectors labeled JPower and

JP Power. Either one of these power supply connectors can be used to connect a 9VDC power source

to the kit. The first power connector labeled JPower, is a barrel power jack with a 2.1mm diameter post,

and it mates to a 2.1mm (inner diameter) x 5.5mm (outer diameter) female plug. The second power

supply header labeled JP Power, is a 4-pin male 0.100" header with 0.025" square posts. The

availability of these two types of power connectors allows the users to choose the type of power supply

equipment to use for ATF15xx-DK3 Development/Programmer Kit.

The power of the CPLD Development/Programmer Kit must be turned OFF when

changing the position of the VCCIO or VCCINT Voltage Selection Jumper (VCCIO

Selector or VCCINT Selector).

Only one of these two power supply connectors should be powered with a 9VDC

source but not both at the same time.


12

JTAG ISP Connector and TDO Selection Jumper

The JTAG ISP Connector labeled JTAG-IN, is used to connect the ATF15xx JTAG port pins (TCK, TDI,

TMS, and TDO) through the ISP download cable to the parallel printer (LPT) port of a PC for JTAG ISP

programming of the ATF15xx device. Polarized connectors are used on the ATF15xx-DK3 and ISP

Download Cable to minimize connection problems. The PIN1 label at the bottom of the JTAG ISP

connector indicates the pin 1 position of the 10-pin header and further reduces the chance of

connecting the ISP Download Cable incorrectly.

To the left of the JTAG-IN connector, there are two columns of vias, and they are labeled JTAG-OUT.

They are intended to allow the users to create a JTAG daisy chain to perform JTAG operations to

multiple devices. Users will need to solder the same type of connector as the one used for JTAG-IN

into the JTAG-OUT position in order to utilize this available feature.

To create a JTAG daisy chain using multiple ATF15xx-DK3 boards, the TDO Selection Jumper,

labeled JP-TDO, must be set to the appropriate position. For all the devices in the daisy chain except

the last device, this jumper must be set to the TO NEXT DEVICE position. For the last device in the

chain, this jumper must be set to the TO ISP CABLE position. When this jumper is in the TO NEXT

DEVICE position, the TDO of that particular JTAG device will be connected to the TDI of the next JTAG

device in the chain. When this jumper is in the TO ISP CABLE position, the TDO of that device will be

connected to the TDO of the JTAG 10-pin connector, which will allow the TDO signal of the that device

in the chain to be transmitted back to the host PC with the ISP software. The figure below is a circuit

diagram of the JTAG connectors and the JP-TDO jumper. The table below lists the pin numbers of the

four JTAG pins for the ATF15xx device in all the available packages.

For a single device setup, the position of the JP-TDO jumper must be set to TO ISP CABLE.

Figure 7. Circuit Diagram of the JTAG ISP Connectors and TDO Jumper

Table 7. Pin Numbers of JTAG Port Signals


TDI 1 7 14 4

TDO 32 38 71 73

TMS 7 13 23 15

TCK 26 32 62 62

1 4

2 3

OSC

2MHZ

GCLK2 GCLK1

1 2 3

JPGCLK

R181K

R171K

VccOSC

C210.1uF

R39100


The ISP algorithm is controlled by the ATMISP software, which is running on the PC. The four JTAG

signals are generated by the LPT port, and they are buffered by the ISP download cable before going

into the ATF15xx device on the CPLD Development/Programmer board. The 10-pin JTAG Port Header

pinout on the CPLD Development/Programmer board is shown in Figure 8, and the dimensions of this

10-pin male JTAG header are shown in Figure 9.

Figure 8. 10-pin JTAG Port Header Pinout

Figure 9. 10-pin Male Header Dimensions

The 10-pin JTAG Port Header pinout is compatible with the ATDH1150PC/VPC LPT port based cable

and ATDH1150USB USB port based cable, as well as the Altera ByteBlaster/MV/II LPT port based

cables. In addition, the ATMISP v6.7 software allows the use of either the Atmel

ATDH1150PC/VPC/USB cable or the ByteBlaster/MV/II cable to implement ISP.

ATMISP v7.0 only supports the ATDH1150USB cable.

GND

NC

NC

VCC

GND

TDI

NC

TMS

TDO

TCK

10

8

6

4

2

9

7

5

3

1

10-Pin JTAG Port Header(Top View)

0.100 0.025 Sq.

0.235

Top View Side View

0.100

All dimensions are in inches.


14

Socket Adapter Board

The ATF15xx-DK3 CPLD Development/Programmer Socket Adapter Boards (ATF15xx-DK3-XXXXX)

are circuit boards that interface with the ATF15xx-DK3 CPLD Development/Programmer Board. They

are used in conjunction with the ATF15xx-DK3 CPLD Development/Programmer Board to evaluate or

program ATF15xx ISP CPLD devices in different package types. There are four Socket Adapter

Boards available for the ATF15xx-DK3 covering the 44-TQFP, 44-PLCC, 84-PLCC, and 100-TQFP

package types in the ATF15xx family of CPLDs.

Each socket adapter board contains a socket for the ATF15xx device and has male headers on the

bottom side, labeled JP1 and JP2. The headers on the bottom side mate with the female headers on

the ATF15xx-DK3 board, labeled JP4 and JP3. The four 7-segment displays, push-button switches,

JTAG port signals, oscillator, VCCINT, VCCIO, and GND on the CPLD Development/Programmer Board

are connected to the ATF15xx device on the Socket Adapter Board through these two sets of

connectors.

On the top of the 44-TQFP socket adapter, there are four 10-pin connectors with the same dimensions

as the JTAG ISP connector. The pins of these four connectors are connected to the input and I/O pins

(except the four JTAG pins) of the target CPLD device. They can be used to connect to an oscilloscope

or logic analyzer to capture the activities of the input and I/O pins of the CPLD. They also can be used

to connect the input and I/O pins of the CPLD to other external boards or devices for system level

evaluation or testing.

Atmel ATF15xx ISP Download Cable

The ATF15xx ISP Download Cable (P/N: ATDH1150VPC) connects the LPT port of the PC to the

10-pin JTAG header on the CPLD Development/Programmer Board or a custom circuit board. This is

shown in Figure 10. This ISP cable acts as a buffer to buffer the JTAG signals between the PC’s LPT

port and the ATF15xx on the circuit board. The Power-On LED on the back of the 25-pin male

connector housing indicates that the cable is connected properly.

This ISP cable consists of a 25-pin (DB25) male connector, which is connected to the LPT port of a PC.

The 10-pin female plug connects to the 10-pin male JTAG header on the ISP circuit board. The red

color stripe on the ribbon cable indicates the orientation of pin 1 of the female plug. The 10-pin male

JTAG header on the CPLD Development/Programmer Board is polarized to prevent users from

inserting the female plug in the wrong orientation.

The CPLD Development/Programmer kits includes the ATF15xx ISP Download Cable

(ATDH1150VPC); however, other supported ISP cables can also be used. The ATDH1150VPC,

ATDH1150USB, ByteBlasterMV, and ByteBlasterII cables can be used for the ATF15xx/ASL (5V) and

ATF15xxASV/ASVL (3.3V) devices, while the older ATDH1150PC and the ByteBlaster cables can be

used for the ATF15xxAS/ASL (5V) only.

Be sure this LED is turned on before using the Atmel CPLD ISP Software (ATMISP).


Figure 10. ATF15xx ISP Download Cable Connection to ISP Hardware Board/Circuit Board

Figure 11 illustrates the 10-pin female header pinout for the ATF15xx ISP Download Cable. The

10-pin male header pinout on the PC board (if used for ISP) must match this pinout.

Figure 11. ATF15xx ISP Download Cable 10-pin Female Header Pinout

Note: The circuit board must supply VCC and GND to the CPLD ISP Cable through the 10-pin male header.

ISP

DOWNLOAD

CABLE

Pin 1

LED

Color Stripe

1 3 5 7 9

2 4 6 8 10

1 3 5 7 9

2 4 6 8 10

Color Stripe


16

Schematic Diagrams

Figure 12. ATF15xx-D3 Development/Programmer Kit Schematic Diagram

abcdef

Vc1

Vc2

g

ab c

def

g

DOT

DSP1

abcdef

Vc1

Vc2

g

ab c

def

g

DOT

DSP2

abcdef

Vc1

Vc2

g

ab c

def

g

DOT

DSP3

abcdef

Vc1

Vc2

g

ab c

def

g

DOT

DSP4

RDSP21RDSP22

RDSP23RDSP24

RDSP25RDSP26

RDSP27

RDSP31RDSP32

RDSP33RDSP34

RDSP35RDSP36

RDSP37

RDSP41RDSP42

RDSP43RDSP44

RDSP45RDSP46

RDSP47

VccIO

BIGA

TMEL

MAR

K

ATM

EL

D2

Vin

3

ADJ 1

+Vou

t2

VR1

D1 1N40

01

POW

ER SW

ITCH

C1 100u

FC2 0.1

uF

R3 240

R2 510

GCLR

14

23

OSC

2MHZ

GCLK

2GC

LK1

123

JPGC

LK

R18

1KR1

71K

R15

1KR1

61K

9VDC

500mA

JPow

er9V

DC

Cente

r Pos

itive

C3 0.1uF

LM31

7Vc

cIO

VccO

SC

DOT2

DOT3

DOT4

RDOT

2RD

OT3

RDOT

4

D4AD4BD4CD4DD4ED4FD4G

VCCI

OGN

D

GCLK

1

TCK

VCCI

NTGN

D

GCLK

2

TDO

VCCI

OGN

D

GCLR

TDI

VCCI

NTGN

D

GOE

TMS

12

34

56

78

910

JTAG

-IN

TCK

TDO

TDI

TMSR1

24.7

KR1

410

KR1

34.7

KR1

14.7

K

R1 1K

R4 270

R5 330

R6 680

JPIO

181.8

V(BE

)

JPIO

252.5

V(BE

) JPIO

333.3

V(AS

V/BE

)

JPIO

505V

(AS)

C4 10uF

VccI

NVi

n3

ADJ 1

+Vou

t2

VR2

R8 240

R7 510

C5 0.1uF

LM31

7Vc

cINT

R9 620

R10

680

JPIN

T18

1.8V(

BE)

JPIN

T33

3.3V(

ASV) JP

INT5

05.0

(AS)

C6 10uF

C9 0.1uF

C10

0.1uF

VccI

O

C12

0.1uF

JP2

IccI

NT

JP1

IccI

O

JPDS

P1JP

LED1

JPDS

P2JP

LED2

JPDS

P3JP

LED3

JPDS

P4JP

LED4

12

34

56

78

910

JTAG

-OUT

VccI

OVc

cIO

123JP

-TDO

VccI

O

JPGC

LRJP

GOE

GOE

C7 0.001

uFC8 0.0

01uF

C11

0.1uF

VccI

NTRDOT

1

RDSP11RDSP12

RDSP13RDSP14

RDSP15RDSP16

RDSP17DOT1

LED8

GREE

NLE

D7GR

EEN

LED6

GREE

NLE

D5GR

EEN

JPL8

SIP2

JPL7

SIP2

JPL6

SIP2

JPL5

SIP2

RL8

330

RL7

330

RL6

330

RL5

330




D1A

D1B

D1C

D1D

D1E

D1F

D1G

D2A

D2B

D2C

D2D

D2E

D2F

D2G

DOT1

DOT2

LED1

LED2

LED3

LED4

LED5

LED6

LED7

LED8

LED1

LED2

D4A

D4B

D4C

D4D

D4E

D4F

D4G

D3A

D3B

D3C

D3D

D3E

D3F

D3G

DOT3

DOT4

LED3

LED4

LED5

LED6

LED7

LED8

LED4

GREE

NLE

D3GR

EEN

LED2

GREE

NLE

D1GR

EEN

JPL4

SIP2

JPL3

SIP2

JPL2

SIP2

JPL1

SIP2

RL4

330

RL3

330

RL2

330

RL1

330

R19

1KSW

1 VCCI

O

C13

0.001

uF

JPS1

SIP2

R21

1KSW

2 VCCI

O

C15

0.001

uF

JPS2

SIP2

R23

1KSW

3 VCCI

O

C17

0.001

uF

JPS3

SIP2

R25

1KSW

4 VCCI

O

C19

0.001

uF

JPS4

SIP2

R20

1KSW

5

VCCI

O

C14

0.001

uF

JPS5

SIP2

R22

1KSW

6 VCCI

O

C16

0.001

uF

JPS6

SIP2

R24

1KSW

7 VCCI

O

C18

0.001

uF

JPS7

SIP2

R26

1KSW

8 VCCI

O

C20

0.001

uF

JPS8

SIP2

SW1

SW1

SW2

SW3

SW4

SW5

SW6

SW7

SW8

SW-G

CLR

SW-G

CLR

SW-G

OESW

-GOE

VCCI

N

D3 R27

1K

D4 R28

1K

C21

0.1uF

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

JP3 1

23

45

67

89

1011

1213

1415

1617

1819

2021

2223

2425

2627

2829

3031

3233

3435

3637

3839

40

JP4

GND

GND

GND

GND

GND

GND

GND

GND

R37

1K

R38

1K

R39

100

R29

1K

SW5

R30

1KSW

6R3

2

1K

SW2

R31

1KSW

3R3

3

1K

SW7

R34

1K

SW4

R35

1K

SW8

R36

1K

1234

JP JP P

ower

Vin

3

ADJ 1

+Vou

t2

VR3

R41

820

R40

510

C22

0.1uF

LM31

7

C23

10uF

VCCI

NVc

cOSC


Figure 13. 44-pin TQFP Socket Adapter Board Schematic Diagram

c1 0.1uF

c2 0.1uF

c3 0.1uF

c4 0.1uF

VCCI

NT

TDI

TMS

VCCI

O

VCCINT

VCCI

O

TDO

TCK

VCCINT

GND

GND

GND

GND

VCCI

OGN

D

GCLK

1

TCK

VCCI

NTGN

D

GCLK

2

TDO

VCCI

OGN

D

GCLR

TDI

VCCI

NTGN

D

GOE

TMS

D1A

D1B

D1C

D1D

D1E

D1F

D1G

D2A

D2B

D2C

D2D

D2E

D2F

D2G

DOT1

DOT2

LED1

LED2

D4A

D4B

D4C

D4D

D4E

D4F

D4G

D3A

D3B

D3C

D3D

D3E

D3F

D3G

DOT3

DOT4

LED3

LED4

LED5

LED6

LED7

LED8

SW1

SW2

SW3

SW4

SW5

SW6

SW7

SW8

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

JP2

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

JP1

GND

GND

GND

GND

GND

GND

GND

GND

PIN3

8PI

N39

PIN3

7PI

N40

12

34

56

78

910

JL1

23

45

67

89

10

JR

12

34

56

78

910

JB

12

34

56

78

910

JT ATM

EL T

QFP4

4

TDI

1I/O

2I/O

3GN

D4

I/O5

TMS

7I/O

8VC

C9

I/O10

I/O11

I/O6

I/O 12I/O 13I/O 14I/O 15GND 16VCC 17I/O 18I/O 19I/O 20I/O 21I/O 22I/O

23GN

D24

I/O25

TCK

26I/O

27I/O

28VC

C29

I/O30

I/O31

TDO

32I/O

33

I/O34 GCLK335 GND36 GCLK137 OE138 GCLR39 I/OE2/GCLK240 VCC41 I/O42 I/O43 I/O44

U1 TQFP

44

PIN2

PIN3

PIN5

PIN6

PIN8

PIN1

0PI

N11

PIN12PIN13PIN14PIN15

PIN18PIN19PIN20PIN21PIN22

PIN2

3

PIN2

5

PIN2

7PI

N28

PIN3

0PI

N31

PIN3

3

PIN34PIN35


PIN42PIN43PIN44

PIN3

4PI

N35

PIN4

2PI

N43

PIN2

PIN3

PIN5

PIN6

PIN8

PIN1

0PI

N11

PIN4

4

PIN3

4PI

N35

PIN3

7PI

N38

PIN3

9PI

N40

PIN4

2PI

N43

PIN4

4

PIN2

PIN3

PIN5

PIN6

PIN8

PIN1

0PI

N11

PIN1

2PI

N13

PIN1

4PI

N15

PIN1

8PI

N19

PIN2

0PI

N21

PIN2

2

PIN2

3PI

N25

PIN2

7PI

N28

PIN3

0PI

N31

PIN3

3

PIN2

3PI

N25

PIN2

7PI

N28

PIN3

0PI

N31

PIN3

3

PIN1

8PI

N19

PIN2

0PI

N21

PIN2

2

PIN1

2PI

N13

PIN1

4PI

N15

VCCI

O


18

Figure 14. 44-pin PLCC Socket Adapter Board Schematic Diagram

ATM

EL P

LCC4

4

TDI

7I/O

8I/O

9GN

D10

I/O11

TMS

13I/O

14VC

C15

I/O16

I/O17

I/O12

I/O 18I/O 19I/O 20I/O 21GND 22VCC 23I/O 24I/O 25I/O 26I/O 27I/O 28I/O

29GN

D30

I/O31

TCK

32I/O

33I/O

34VC

C35

I/O36

I/O37

TDO

38I/O

39

I/O40 GCLK341 GND42 GCLK143 OE144 GCLR1 I/OE2/GCLK22 VCC3 I/O4 I/O5 I/O6

U1 PLCC

44PIN1PIN2

VCCINTPIN4PIN5PIN6

TDI

PIN8

PIN9

GND

PIN1

1PI

N12

TMS

PIN1

4VC

CIO PI

N16

PIN1

7


GNDVCCINT


PIN2

9GND

PIN3

1TCK

PIN3

3PI

N34VC

CIO

PIN3

6PI

N37TD

OPI

N39

PIN40PIN41

GNDPIN43PIN44

VCCI

OGN

D

GCLK

1

TCK

VCCI

NTGN

D

GCLK

2

TDO

VCCI

OGN

D

GCLR

TDI

VCCI

NTGN

D

GOE

TMS

D1A

D1B

D1C

D1D

D1E

D1F

D1G

D2A

D2B

D2C

D2D

D2E

D2F

D2G

DOT1

DOT2

LED1

LED2

D4A

D4B

D4C

D4D

D4E

D4F

D4G

D3A

D3B

D3C

D3D

D3E

D3F

D3G

DOT3

DOT4

LED3

LED4

LED5

LED6

LED7

LED8

SW1

SW2

SW3

SW4

SW5

SW6

SW7

SW8

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

JP2

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

JP1

GND

GND

GND

GND

GND

GND

GND

GND

PIN4

4PI

N1

PIN4

3PI

N2

PIN4

0PI

N41

PIN4

PIN5

PIN8

PIN9

PIN1

1PI

N12

PIN1

4PI

N16

PIN1

7

PIN6

PIN2

9PI

N31

PIN3

3PI

N34

PIN3

6PI

N37

PIN3

9

PIN2

4PI

N25

PIN2

6PI

N27

PIN2

8

PIN1

8PI

N19

PIN2

0PI

N21

12

34

56

78

910

JL

12

34

56

78

910

JB

12

34

56

78

910

JR

12

34

56

78

910

JT

PIN8

PIN9

PIN1

1PI

N12

PIN1

4PI

N16

PIN1

7

PIN1

8PI

N19

PIN2

0PI

N21

PIN2

4PI

N25

PIN2

6PI

N27

PIN2

8

PIN2

9PI

N31

PIN3

3PI

N34

PIN3

6PI

N37

PIN3

9

PIN4

0PI

N41

PIN4

3PI

N44

PIN1

PIN2

PIN4

PIN5

PIN6

c1 0.1uF

c2 0.1uF

c3 0.1uF

c4 0.1uF

VCCI

NTVC

CIO


Figure 15. 84-pin PLCC Socket Adapter Board Schematic Diagram

INPUT/GCLRn1 INPUT/OE2/GCLK22 VCC_INT3 I/O4 I/O5 I/O6 GND7 I/O8 I/O9 I/O10 I/O11

I/O12

VCC_

IO13

I/O / T

DI14

I/O15

I/O16

I/O17

I/O18

GND

19I/O

20I/O

21I/O

22I/O

/ TM

S23

I/O24

I/O25

VCC_

IO26

I/O27

I/O28

I/O29

I/O30

I/O31

GND

32

I/O 33I/O 34I/O 35I/O 36I/O 37VCC_IO 38I/O 39I/O 40I/O 41GND 42VCC_INT 43I/O 44I/O 45I/O 46GND 47I/O 48I/O 49I/O 50I/O 51I/O 52VCC_IO 53

I/O54

I/O55

I/O56

I/O57

I/O58

GND

59I/O

60I/O

61I/O

/ TCK

62I/O

63I/O

64I/O

65VC

C_IO

66I/O

67I/O

68I/O

69I/O

70I/O

/ TDO

71GN

D72

I/O73

I/O74

I/O75 I/O76 I/O77 VCC_IO78 I/O79 I/O80 I/O81 GND82 INPUT/GCLK183 INPUT/OE184

ATM

EL

ATF1

508A

S-15

JC84

U1

PIN1

GND

GND

GND

GND

GND

GND

GND

GNDVCCINT

VCCIO

VCCI

O

VCCI

O

VCCI

O

VCCIO

VCCIO

VCCINTPIN84PIN83

PIN2

TDI

TMS

TDO

TCK

C1 0.1uF

C2 0.1uF

C3 0.1uF

C5 0.1uF

VCCI

O

SMAL

LATM

ELM

ARK1

PIN4PIN5PIN6

PIN8PIN9PIN10PIN11

PIN1

2

PIN1

5PI

N16

PIN1

7PI

N18

PIN2

0PI

N21

PIN2

2

PIN2

4PI

N25

PIN2

7PI

N28

PIN2

9PI

N30

PIN3

1


PIN39PIN40PIN41

PIN44PIN45PIN46


PIN5

4PI

N55

PIN5

6PI

N57

PIN5

8

PIN6

0PI

N61

PIN6

3PI

N64

PIN6

5

PIN6

7PI

N68

PIN6

9PI

N70

PIN7

3PI

N74

PIN75PIN76PIN77

PIN79PIN80PIN81

PIN1

PIN8

4PI

N83

PIN2

PIN4

PIN5

PIN6

PIN8

PIN9

PIN1

0PI

N11

PIN7

5PI

N76

PIN7

7PI

N79

PIN8

0PI

N81

12

34

56

78

910

1112

1314

1516

1718

JP3

JPTO

P

12

34

56

78

910

1112

1314

1516

1718

JP4

JPLE

FT

PIN1

2PI

N15

PIN1

6PI

N17

PIN1

8

PIN2

0

PIN2

1PI

N22

PIN2

4

PIN2

5PI

N27

PIN2

8PI

N29

PIN3

0PI

N31

12

34

56

78

910

1112

1314

1516

1718

JP6

JPBO

TTOM

PIN3

3PI

N34

PIN3

5PI

N36

PIN3

7PI

N39

PIN4

0PI

N41

PIN4

4PI

N45

PIN4

6PI

N48

PIN4

9PI

N50

PIN5

1PI

N52

VCCI

OGN

D

GCLK

1

TCK

VCCI

NTGN

D

GCLK

2TD

O

VCCI

OGN

D

GCLR

TDI

VCCI

NTGN

D

GOE

TMS

D1A

D1B

D1C

D1D

D1E

D1F

D1G

D2A

D2B

D2C

D2D

D2E

D2F

D2G

DOT1

DOT2

LED1

LED2

D4A

D4B

D4C

D4D

D4E

D4F

D4G

D3A

D3B

D3C

D3D

D3E

D3F

D3G

DOT3

DOT4

LED3

LED4

LED5

LED6

LED7

LED8

SW1

SW2

SW3

SW4

SW5

SW6

SW7

SW8

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

JP2

IDC4

0

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

JP1

IDC4

0

GND

GND

GND

GND

GND

GND

GND

GND

12

34

56

78

910

1112

1314

1516

1718

JP5

JPBO

TTOM

PIN1

PIN2

PIN8

3

PIN8

4

PIN5

PIN6

PIN8

PIN9

PIN1

2PI

N15

PIN1

8PI

N16

PIN2

1PI

N17

PIN2

4

PIN2

5PI

N22

PIN2

9PI

N28

PIN3

7PI

N39

PIN4

0PI

N41

PIN4

4PI

N45

PIN4

6PI

N48

PIN4

9PI

N50

PIN5

1PI

N52

PIN5

8PI

N60

PIN6

1PI

N63

PIN6

4PI

N65

PIN6

7PI

N68

PIN6

9PI

N70

PIN7

3PI

N74

PIN5

4PI

N55

PIN5

6PI

N57

PIN5

8PI

N60

PIN6

1PI

N63

PIN6

4PI

N65

PIN6

7PI

N68

PIN6

9PI

N70

PIN7

3PI

N74

C7 0.1uF

C8 0.1uF

C4 0.1uF

C6 0.1uF

VCCI

NT

PIN1

1PI

N10

PIN4

PIN8

0PI

N79

PIN7

5

PIN7

7

PIN5

7

PIN5

5

PIN4

8

PIN4

1

PIN5

0

PIN4

5

PIN5

6PI

N54

PIN5

1PI

N49

PIN4

4PI

N27

PIN7

6


20

Figure 16. 100-pin TQFP Socket Adapter Board Schematic Diagram

I/On

1I/O

n2

VCCI

O3

TDI

4I/O

n5

I/O6

I/On

7I/O

8I/O

9I/O

10GN

D11

I/O12

I/O13

I/O14

TMS

15I/O

16I/O

17VC

CIO

18I/O

19I/O

20I/O

21I/O

n22

I/O23

I/On

24I/O

25

GND 26I/On 27I/On 28I/O 29I/O 30I/O 31I/O 32I/O 33VCCIO 34I/O 35I/O 36I/O 37GND 38VCCINT 39I/O 40I/O 41I/O 42GND 43I/O 44I/O 45I/O 46I/O 47I/O 48I/On 49I/On 50

VCCI

O51

I/O52

I/On

53I/O

54I/O

n55

I/O56

I/O57

I/O58

GND

59I/O

60I/O

61TC

K62

I/O63

I/O64

I/O65

VCCI

O66

I/O67

I/O68

I/O69

I/On

70I/O

71I/O

n72

TDO

73GN

D74

I/O75

ATM

EL T

QFP1

00

I/O76 I/On77 I/O78 I/On79 I/O80 I/O81 VCCIO82 I/O83 I/O84 I/O GCLK385 GND86 GCLK187 OE188 GCLR89 GCLK290 VCCINT91 I/O92 I/O93 I/O94 GND95 I/O96 I/O97 I/O98 I/O99 I/O100

U1 TQFP

100

PIN1

PIN2

VCCI

OTD

I PIN5

PIN6

PIN7

PIN8

PIN9

PIN1

0GN

D PIN1

2PI

N13

PIN1

4TM

S PIN1

6PI

N17

VCCI

OPI

N19

PIN2

0PI

N21

PIN2

2PI

N23

PIN2

4PI

N25

GNDPIN27PIN28PIN29PIN30PIN31PIN32PIN33

VCCIOPIN35PIN36PIN37

GND

VCCI

NT

PIN40PIN41PIN42

GNDPIN44PIN45PIN46PIN47PIN48PIN49PIN50

VCCI

OPI

N52

PIN5

3PI

N54

PIN5

5PI

N56

PIN5

7PI

N58

GND

PIN6

0PI

N61

TCK

PIN6

3PI

N64

PIN6

5VC

CIO

PIN6

7PI

N68

PIN6

9PI

N70

PIN7

1PI

N72

TDO

GND

PIN7

5

PIN76PIN77PIN78PIN79PIN80PIN81

VCCIOPIN83PIN84PIN85

GNDPIN87PIN88PIN89PIN90

VCCINTPIN92PIN93PIN94

GNDPIN96PIN97PIN98PIN99PIN100

C1 0.1uF

C2 0.1uF

C3 0.1uFVC

CIO

C5 0.01u

FC6 0.0

1uF

VCCI

NT

VCCI

OGN

D

GCLK

1

TCK

VCCI

NTGN

D

GCLK

2

TDO

VCCI

OGN

D

GCLR

TDI

VCCI

NTGN

D

GOE

TMS

D1A

D1B

D1C

D1D

D1E

D1F

D1G

D2A

D2B

D2C

D2D

D2E

D2F

D2G

DOT1

DOT2

LED1

LED2

D4A

D4B

D4C

D4D

D4E

D4F

D4G

D3A

D3B

D3C

D3D

D3E

D3F

D3G

DOT3

DOT4

LED3

LED4

LED5

LED6

LED7

LED8

SW1

SW2

SW3

SW4

SW5

SW6

SW7

SW8

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

JP2

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

JP1

GND

GND

GND

GND

GND

GND

GND

GND

PIN8

8PI

N89

PIN8

7PI

N90

PIN7

6PI

N79

PIN8

0PI

N81

PIN8

4

PIN9

2PI

N93

PIN9

4PI

N96

PIN9

7PI

N98

PIN8

3

PIN6

4PI

N65

PIN6

7PI

N68

PIN6

9PI

N71

PIN7

5

PIN5

7PI

N58

PIN6

0PI

N61

PIN6

3

PIN3

7PI

N44

PIN4

6

PIN4

8PI

N9PI

N10

PIN1

4PI

N17

PIN2

0

PIN1

3

PIN1

9PI

N16

PIN8

PIN1

00

PIN6

PIN9

9

PIN5

6PI

N47

PIN5

2

PIN4

5PI

N41

PIN4

0PI

N36

PIN5

4

12

34

56

78

910

1112

1314

1516

1718

1920

2122

JL HEAD

ER 11

X2

12

34

56

78

910

1112

1314

1516

1718

1920

2122

JT HEAD

ER 11

X2

12

34

56

78

910

1112

1314

1516

1718

1920

2122

JR HEAD

ER 11

X2

12

34

56

78

910

1112

1314

1516

1718

1920

2122

JB HEAD

ER 11

X2

PIN1

PIN2

PIN5

PIN6

PIN7

PIN8

PIN9

PIN1

0PI

N12

PIN1

3

PIN1

4

PIN1

6

PIN1

7

PIN1

9

PIN2

0

PIN2

1

PIN2

2PI

N23

PIN2

4PI

N25

PIN2

7PI

N28

PIN2

9PI

N30

PIN3

1

PIN3

2PI

N33

PIN3

5PI

N36

PIN3

7PI

N40

PIN4

1PI

N42

PIN4

4PI

N45

PIN4

6

PIN4

7PI

N48

PIN4

9PI

N50

PIN5

2PI

N53

PIN5

4PI

N55

PIN5

6PI

N57

PIN5

8PI

N60

PIN6

1PI

N63

PIN6

4PI

N65

PIN6

7PI

N68

PIN6

9PI

N70

PIN7

1PI

N72

PIN7

5

PIN7

6PI

N77

PIN7

8

PIN7

9PI

N80

PIN8

1PI

N83

PIN8

4PI

N85

PIN8

7PI

N88

PIN8

9PI

N90

PIN9

2PI

N93

PIN9

4PI

N96

PIN9

7PI

N98

PIN9

9PI

N100

C7 0.1uF

C8 0.1uF

C9 0.1uF

C10

0.1uF

123

J1

CON3PIN39

PIN39

C11

0.2uF

C12

0.2uF


References and Support

For additional PLD design software references and support, documentation such as help files, tutorials,

application notes/briefs, and user guides are available at www.atmel.com.

Atmel ProChip Designer Software

Table 8. ProChip Designer References and Support

Atmel WinCUPL Software

Table 9. WinCUPL References and Support

Atmel ATMISP Software

Table 10. ATMISP References and Support

Atmel POF2JED Conversion Software

Table 11. POF2JED References and Support

ProChip Designer From the main ProChip window menu...

Help Select Help > Prochip Designer Help.

Tutorials Select Help > Tutorials.

Known Problems and Solutions Select Help > Review KPS.

WinCUPL From the main WinCUPL window menu...

Help Select Help > Contents.

CUPL Programmers Reference Guide Select Help > CUPL Programmers Reference.

Tutorials Select Help > Atmel Info > Tutorial1.pdf.

Known Problems and Solutions Select Help > Atmel Info > CUPL_BUG.pdf.

ATMISP From the main ATMISP window menu...

Help Files Select Help > ISP Help.

Tutorials Select Help > ATMISP Tutorial.

Known Problems and SolutionsUsing the Windows Explorer browser, locate the ATMISP folder and

open the readme.txt file with an ASCII text editor.

POF2JED From the main POF2JED window menu...

ATF15xx Conversion Application Brief Select Help > Conversion Options.


www.atmel.com

www.atmel.com

22

Technical Support

For technical support on any Atmel PLD related issues, contact the Atmel PLD Applications Group at:

Email [email protected]

Hotline (+1)(408) 436-4333

Online Support Form http://support.atmel.com/bin/customer.exe

Revision History

Revision Date Description

3605C 06/2014Update schematics, template, logos, and disclaimer page. Add the Revision

History section.

3605B 05/2008


http://support.atmel.com/bin/customer.exe

XX X XX X

Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441.0311 F: (+1)(408) 436.4200 | www.atmel.com

© 2014 Atmel Corporation. / Rev.: Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014.

Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities, and others are registered trademarks or trademarks of Atmel Corporation in U.S. and other countries. Other terms and product names may be trademarks of others.

DISCLAIMER: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rightis granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THEATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTSINCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENTSHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGESFOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HASBEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of thisdocument and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the informationcontained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended,authorized, or warranted for use as components in applications intended to support or sustain life.

SAFETY-CRITICAL, MILITARY, AND AUTOMOTIVE APPLICATIONS DISCLAIMER: Atmel products are not designed for and will not be used in connection with any applications wherethe failure of such products would reasonably be expected to result in significant personal injury or death (“Safety-Critical Applications”) without an Atmel officer's specific writtenconsent. Safety-Critical Applications include, without limitation, life support devices and systems, equipment or systems for the operation of nuclear facilities and weapons systems.Atmel products are not designed nor intended for use in military or aerospace applications or environments unless specifically designated by Atmel as military-grade. Atmel products arenot designed nor intended for use in automotive applications unless specifically designated by Atmel as automotive-grade.

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Documents

ATF15xx-DK3 - Microchip Technologyww1.microchip.com/...CPLD-ATF15xx-DK3...UserGuide.pdf · Atmel 44-pin TQFP Socket Adapter Board (P/N: ATF15xx-DK3 ... [USER GUIDE] Atmel-3605C-CPLD-ATF15xx-DK3