ASNT Pre-Emphasis 32.5Gbps Advanced Driver/Amplifier Pre-Emphasis 32.5Gbps Advanced Driver/Amplifier ... application of a common mode voltage on DC-coupled I/O’s greater than 1V

Rev. 1.1.1 1 July 2016

Advanced Science And Novel Technology Company, Inc.

27 Via Porto Grande, Rancho Palos Verdes, CA 90275

Offices: 310-377-6029 / 310-803-9284 Fax: 310-377-9940 www.adsantec.com

ASNT Pre-Emphasis

32.5Gbps Advanced Driver/Amplifier

USER GUIDE

Rev. 1.1.1 2 July 2016




Unit

Description

Fig. 1 incorporates the advanced programmable driver amplifier with built-in pre-emphasis ASNT6119-

KMF, and support logic. The differential Data Output (P/N) have female K connectors, and the remaining

signal I/O’s (front panel) have female SMA connectors.

Fig. 1. ASNT Pre-Emphasis Unit

Rev. 1.1.1 3 July 2016




All high speed I/O’s have a default common mode level of . A correct

common mode level needs to be observed if the input signals are applied in DC-coupled mode. The

application of a common mode voltage on DC-coupled I/O’s greater than 1V may permanently damage

the chip. Connect the data inputs through DC blocks.

The control interface is provided through a USB mini-B connector. The unit is controlled through a GUI

or DLL with example python code. The DLL is 32-bit, and you must use a 32-bit compiler/interpreter for

it to work.

Initial Impedance Test

Before the first use of the unit, it is recommended to verify 50Ohms resistance referenced to the connector

return for all connections except the clock inputs, which should read effectively open (> 10 MΩ).

Computer and Power Supply Connection

Connect the supplied power brick to a 100 to 240-Volt AC outlet, using a customer-provided power cord

if necessary (CEE-22 connector). Connect the DC power tail to the DC Power input connector on the

box. Turn switch to “On”. The associated DC power light should come ON indicating that the power

supply is active and connected.

Plug in the USB B cable to the board and the A end to a Windows XP/Vista/7/8 64-bit or 32-bit computer.

The computer should be on.

USB LED be ON indicating that the USB port is connected to the computer. The computer should also

recognize the device.

Software Installation

1. Locate installation files given. Double click on setup.exe

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2. Select Target directory for location of the files that will be installed. Then click Next.

3. Click Next.

4. Wait for the files to be installed.

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5. Click Finish.

6. Click Restart if the window shown below appears.

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7. Double click on the “CDM v2.10.00 WHQL Certified.exe” to install USB drivers. This file can be

found in the same directory as the setup file used earlier to install software.

8. Connect the USB B connector to the board if not already done.

9. Double click on the icon ASNT PreEmp V1.x.1 on the desktop to open the control software.

10. Wait until the USB indicator at the bottom of the control software window has turned green. This

indicates that the software is connected to the PreEmp. If green indicator does not appear, then USB

drivers may not be installed correctly or USB cable may need to be re-inserted.

Operation

Set all the GUI controls as shown in Fig. 2. For an explanation of the controls, see

Rev. 1.1.1 7 July 2016




Table 1 below. To adjust the slide bars, left-click on the corresponding button, and move it up/down, or

left/right with the mouse’s left button, or arrows keys. Scroll the mouse wheel for fine adjustment. To

change the states of a switch, left-click on the corresponding box.

Fig. 2. GUI Initial Setup

Rev. 1.1.1 8 July 2016




Table 1. GUI Slide Bars

GUI Slide Bars Function Default state

Pre-Emphasis Tap 1 / Tune 1 Sets the relative digital + analog weight of Tap 1 Minimum

Pre-Emphasis Tap 2 / Tune 2 Sets the relative digital + analog weight of Tap 2 Between

3/8 to 4/8

Pre-Emphasis Tap 3 / Tune 3 Sets the relative digital + analog weight of Tap 3 Minimum

Pre-Emphasis Tap 4 Sets the relative digital weight of Tap 4 Minimum

VTH Controls a reference voltage level for all analog tap

controls

Middle

Data Peak Controls the output data peaking Maximum

Eye Crossing Controls the vertical position of the output eye’s

crossing point

Middle

Data and Clock Fine Adjustment

Control delays of Clock and Data signals (parallel or

opposite, as defined by the Parallel/Opposite switches)

prior to data latching into internal registers. Coarse

adjustment range is two times larger than the range of

the fine adjustment

Minimum

Data and Clock Course Adjustment

Minimum

Clock Multiplier

Controls an internal delay of the Clock 0 frequency

multiplication unit. The multiplication function is

disabled if the bar is moved all the way down

Minimum

Clock Amplitude Controls the clock output amplitude. The output is

disabled if the bar is set to minimum

Middle

Clock Peak Controls the output clock peaking Maximum

Table 2. GUI Switches

GUI Switches Function Default state

Tap 1 Invert ON/OFF Inversion of the Tap 1 output signal Invert OFF




Tap 1 <1/8Analog ON/OFF Enables/disables the analog portion of the Tap 1 weight OFF

Tap 2 <1/8Analog ON/OFF Enables/disables the analog portion of the Tap 2 weight ON



Fine Adjustment Parallel Delay/ Opposite Delay

Cyclic selection of parallel/opposite modes for the Data

and Clock0 fine delay adjustment

Opposite

Coarse Adjustment Parallel Delay/ Opposite Delay

Cyclic selection of parallel/opposite modes for the Data

and Clock 0 coarse delay adjustment

Parallel

Rev. 1.1.1 9 July 2016




Table 3. GUI Indicators

GUI Indicators Function Comments

USB Green – USB is active, Red – USB is disconnected

Eye Cross, % Eye crossing point position in % of the swing

Output Data Peak Voltage at the control input For reference only

Output Clock Peak Voltage at the control input For reference only

VTH Voltage at the control input For reference only

Die Temperature, degC On-chip temperature Requires initial

calibration

Clock Input Duty Cycle Duty cycle indicator in relative units For reference only

Opposite/Parallel Delay mode indicator

Clock Multiplier Voltage at the control input For reference only

Clock Amplitude, mV Clock output amplitude indicator

Output Clock Duty Cycle Duty cycle indicator in relative units

For reference only.

Same units as for the

Input Duty Cycle

Clock Configuration

Half-Rate or Full-Rate Clock

A half-rate clock from 4 to 16.25GHz for data rates of 8 to 32.5Gbps may be used.

A full-rate clock from 1 to 17GHz for data rates of 1 to 17Gbps may be used.

Apply a clock to Clock In single-ended or differentially. It is recommended, if possible, to use a

differential clock input. Inputs are AC coupled inside the unit. If using only a single-ended input, 50Ohms

terminate the unused input. Single-ended input amplitude can range from 100mV to a maximum of 500mV

peak to peak.

For Half-Rate Clock

The clock input should have a 50±1% duty cycle. Move the Clock Multiplier slider from the top

down until the Output Duty Cycle ~= Input Duty Cycle indicator. Usually just move the mouse

scroll wheel one click at a time, and wait for it to indicate the update. It is necessary to wait a

couple seconds after moving the slider to get a new reading on the Input/Output Duty Cycle indicator. Repeat this step anytime the clock frequency is changed.

Note: Be aware that positions of Fine Adjustment and Coarse Adjustment controls may affect

the output clock duty cycle which may require the Clock Multiplier to be adjusted again.

For Full-Rate Clock

Move the Clock Multiplier slide bar to the bottom (-2.2) to turn off.

Rev. 1.1.1 10 July 2016




Aligning Clock vs. Data

1. Set the initial states as shown in Fig. 2, except for clock multiplier which was previously adjusted.

2. Apply PRBS data to Data In P/N single-ended or differentially. The Data In amplitude needs to

be in the range from 100mV to 500mV max peak to peak single-ended. If DC coupling these

inputs, be sure to set the correct DC common mode voltage level of the data signal. The common

mode voltage levels on the data inputs are ground (0V). It is recommended to apply a differential

DC coupled input. AC coupling, and single-ended signaling may be used, but this will degrade the

performance.

3. Connect one or both Data Output P/N to a 50Ohms terminated error detector. Terminate the

unused output with a 50Ohms load.

4. Move the Fine Adjustment (clock slider) slider to the right until no errors are found in the error

detector. At high data rates i.e. 32Gbps, it is best to only move the Fine Adjustment slider and

keep the slider to the left most as possible with error free operation.

5. If the optimal sampling point cannot be achieved, then:

1.1. Move one of the Duty Cycle +/- sliders and repeat steps 4 and 5 until the error free region

is found. After each change in the duty cycle slider, make sure to start the Fine Adjustment (clock slider) from the left again.

Rev. 1.1.1 11 July 2016




Multi-Tap Data Mode

Tap Controls Description

The input Data stream arrives at the input of a 4-bit serial register where it is latched by the input clock.

The signals at the outputs of the register’s four stages represent copies of the input Data stream

sequentially shifted by 1 clock period. Thus, the output of the second register stage (Tap 2) is delayed by

one clock period with respect to the output of the first stage (Tap 1). The output of the third register stage

(Tap 3) is shifted by two clock periods with respect to the output of the first stage. The output of the

fourth register stage (Tap 4) is shifted by three clock periods with respect to the output of the first stage.

The four samples of the data stream arrive to the output buffer via four identical channels. The four

samples are mixed together in the output buffer with weights that can be selected with the help of GUI. Signal polarities in all four channels can be selected by appropriate Invert switches of GUI.

The Tap weights are controlled by four pre-emphasis slide bars in the top left corner of GUI (named Tap 1 / Tune 1, Tap 2 / Tune 2, Tap 3 / Tune 3, and Tap 4). Positions of all bar sliders correspond to Tap

weights at the output. Positions to the right correspond to more weight than positions to the left. The

actual weight of a particular Tap is presented by a blue bar that appears to the left of the slider. The first

three slide bars control both digital and analog weights of the corresponding Taps. The last slide bar (Tap 4) controls only the digital weight of the Tap.

Each slide bar is divided into segments corresponding to 1/8th of the total maximum output amplitude

Smax. If the <1/8 Analog switches of all Taps are set to OFF position, the output amplitude is distributed

between Taps in digital steps equal to Smax/8 and represented by vertical marks across the slide bars in

combination with fractional numbers on top. The assigned digital weight of a Tap is indicated by the

closest digital mark to the left of the corresponding slider. In this mode, the blue bars may be ignored.

The maximum digital weights of Tap 1 and Tap 4 are equal to 2*Smax/8. The maximum digital weight of

Tap 3 is equal to 3*Smax/8. The maximum digital weight of Tap 2 is equal to 7*Smax/8 if all other Taps

are set to 0. Otherwise, the actual digital weights of Tap 1, Tap 3, and Tap 4 are automatically

subtracted from the maximum weight of Tap 2. Thus, the total digital weight of all Taps cannot exceed

7*Smax/8.

A certain analog weight may be additionally distributed between all Taps for their fine-tuning. The value

of this analog weight can be adjusted from 0 to Smax/8 by the 1/8 Analog Amplitude slide bar. The

analog weight distribution is controlled by moving Tap sliders within one segment between the n/8 and

(n+1)/8 digital marks. The selection of a segment does not affect the analog weight distribution that is

defined by the relative positions of the sliders within selected segments.

The available analog weight (100%) is distributed between four Taps sequentially as described below:

1. The Tap 1 / Tune 1 slide bar defines the analog weight of Tap 1 (from 0% to 100%) and presents

the unused weight (W2%) for distribution between other Taps;

2. The Tap 2 / Tune 2 slide bar defines the analog weight of Tap 2 (from 0% to W2%) and presents

the unused weight (W3%) for distribution between other Taps;

Rev. 1.1.1 12 July 2016




3. The Tap 3 / Tune 3 slide bar defines the analog weight of Tap 3 (from 0% to W3%) and presents

the unused weight (from W4% to 0%) as the weight of Tap 4.

When the Tap 1 / Tune 1 slide bar is at the right-most position within any 1/8 segment, the analog weight

of Tap 1 equals to 100%. All other taps have analog weights of 0%. To decrease the analog weight of

Tap 1, its control slider should be gradually moved to the next 1/8 mark on the left. As the weight of the

Tap 1 decreases, the combined weight of all other Taps increases keeping the total analog weight

constant.

If the Tap 2 / Tune 2 slide bar is at the right-most position within any 1/8 segment, the unused analog

weight of Tap 1 is applied to Tap 2. Tap 3 and Tap 4 have the analog weights of 0%.

If the Tap 2 / Tune 2 slide bar is at the left-most position within any 1/8 segment and the Tap 3 slide bar

is at the right-most position within any 1/8 segment, the unused analog weight of Tap 1 is applied to Tap 3. Tap 2 and Tap 4 have the analog weights of 0%.

If the Tap2 / Tune 2 and Tap 3 / Tune 3 slide bars are at the left-most positions within their 1/8

segments, the unused weight of Tap 1 is applied to Tap 4. Tap 2 and Tap 3 have the analog weights of

0%.

So, if the weight of the first tap is equal to 100%, the positions of the Tap 2 / Tune 2 and Tap 3 / Tune 3

slide bars within a segment produce a negligible effect on the output signal.

The total digital + analog weight distribution between Taps is indicated by the mentioned blue bars. The

indicated analog weight is applied to the corresponding Tap if its <1/8 Analog switch is set to ON. If one

or more <1/8 Analog switches are set to OFF, the corresponding Taps get their digital weights only, but

the analog weight distribution between other Taps is not affected.

The accuracy of the analog weight controls can be adjusted using the VTH slide bar as described in the

Section Analog Amplitude and Threshold Control below.

The following set of formulae describes possible weight distributions between taps:

Si = Sm * (Di + Ai)/8

D0 = 0 --> 2, A0 = 0 --> 1

D1 = 0 --> (7 - D0 - D2 - D3 ), A1 = 0 --> (1 - A0)

D2 = 0 --> 3, A2 = 0 --> (1 - A0 - A1)

D3 = 0 --> 2, A3 = 0 --> (1 - A0 - A1 - A2)

Here Si is the total weight of the ith Tap. Sm is the total maximum weight of all Taps. Di is the total digital

weight of the ith Tap in Sm/8 units. It can only be adjusted discretely in steps of 1. Ai is the total analog

weight of the ith tap. There are some states that cannot be attained with this particular Tap weight

distribution algorithm due to the obvious restriction of Amax = A0 + A1 + A2 + A3 ≤ 1/8. The following list

presents these states:

For S0: no forbidden states

Rev. 1.1.1 13 July 2016




For S1: from k1 to (k1 + 1 - A0), where k1 = 0, 1, 2, 3, 4, 5, 6, 7

For S2: from k2 to (k2 + 1 - A0 - A1), where k2 = 0, 1, 2, 3

For S3: from k3 to (k3 + 1 - A0 - A1 - A2), where k2 = 0, 1, 2

Tap Controls Calibration Procedures

The calibration is required for matching positions of control slides to the corresponding control voltages.

1. Digital Tap weight controls do not require any calibration.

2. Analog Tap weight controls also do not require calibration.

3. Analog Amplitude and Threshold Control

3.1. Set Invert switches to OFF for all Taps.

3.2. Set the 1/8 Analog Amplitude slide bar to maximum.

3.3. Set <1/8 Analog switches to ON for Tap 1.

3.4. Set <1/8 Analog switches to OFF for other Taps.

3.5. Set the Tap 1 slide bar to one step below 3/8 digital mark (maximum analog weight of Tap 1).

Fig. 3. Threshold Calibration Setup

3.6. Manipulate VTH to get the maximum amplitude of the output signal.

3.7. Note the VTH voltage (-0.54V for the test PCB).

3.8. In case of the correct calibration, the output amplitudes should be matching for the Tap 1 slide

bar positions one step below or one step above any n/8 digital mark.

4. Data Peak and Eye Cross Controls


4.2. Set the 1/8 Analog Amplitude slide bar to maximum.

4.3. Set <1/8 Analog switches to ON for Tap 2 and Tap 3.

4.4. Set <1/8 Analog switches to OFF for other Taps.

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4.5. Set the Tap 4 slide bar between the 0/8 and 1/8 digital marks.

4.6. Manipulate the Tap 2 slide bar to get an output signal with 3 rails.

4.7. Manipulate the data Peak slide bar and observe the output shapes as shown in Fig. 4.

a. b.

Fig. 4. Middle Value of the Tune 1 Voltage: High Peak (a) and Low Peak (b)

4.8. Select the optimal value of the Data Peak voltage. The shape of the central rate may still deviate

form the straight horizontal line in case of non-optimal settings for the Eye Crossing control.

Helpful Hint: To achieve the best quality output eye, the Data Peak control should be adjusted for

each data amplitude settings. This is especially critical at low output amplitudes.

4.9. Manipulate the Eye Cross slide bars and observe the output shapes as shown in Fig. 5.

a. b.

Fig. 5. Middle Value of the Tune 1 Voltage: High Crossing (a) and Low Crossing (b)

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4.10. Select the optimal value of the Eye Cross voltage.

4.11. Repeat the previous steps until the optimal shape is achieved.

4.12. Note the corresponding voltage values (Peak = -1.0V and Eye Cross = 0.6V for the test PCB).

Pre-Emphasis Setting Examples

1. Perform the calibration described above.

2. Perform the following initial setup:


2.2. Set <1/8 Analog switches to OFF for all Taps.

2.3. Set the VTH slide bar to its optimal value.

2.4. Set the Data Peak slide bar to its optimal value.

2.5. Set the Eye Cross slide bar to its optimal value.

3. Tap Weights Setting Procedures

3.1. Set Invert switches as required for the selected pre-emphasis configuration.

3.2. Define the required amplitude range and weight distribution between Taps using the

formulas from the Section Tap Controls Description.

3.3. Round up the required Tap weight values to the nearest lower number of 1/8s.

3.4. Set the Tap 1 slide bar one step above the 1/8 digital mark corresponding to its rounded

weight.


weight.


weight.

3.7. Set the Tap 4 slide bar between its rounded weight and the next higher 1/8 digital mark.

3.8. Set <1/8 Analog switches to ON for all Taps.

3.9. Manipulate the slide bars for Tap 1. Tap 2, and Tap 3 within 1/8 of the amplitude to

fine-tune the required weights. Stay within the selected 1/8 segments and do not cross the

1/8 digital marks!

Helpful Hint: The accuracy of the pre-emphasis settings depends on the precise calibration of

VTH. If the rails are doubled at the selected Tap settings, fine-tune the VTH slide.

4. Tap Weights Setting Example (12.5%-50%-25%-12.5% weight distribution between Taps 1, 2, 3,

and 4)

4.1. Set the initial states as shown in Fig. 3.

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4.2. Select the total amplitude and Tap weights. Depending on the required amplitude, several

possible weight distributions are shown in Table 4, where values of Ai correspond to

fractions of the full analog amplitude of Smax/8.

Table 4. Several Possible Tap Weight Settings

Required

amplitude

Tap 1 Tap 2 Tap 3 Tap 4 Required

Amax State

D1 A1 D2 A2 D3 A3 D4 A4

8/8 1/8 0 3/8 1 2/8 0 1/8 0 1/8 Allowed

7/8 0/8 0.875 3/8 0.5 1/8 0.75 0/8 0.875 3/8 Forbidden

6/8 0/8 0.75 3/8 0 1/8 0.5 0/8 0.75 2/8 Forbidden

5/8 0/8 0.125 2/8 0.5 1/8 0.25 0/8 0.125 1/8 Allowed

4/8 0/8 0.5 2/8 0 1/8 0 0/8 0.5 1/8 Allowed

3/8 0/8 0.375 1/8 0.5 0/8 0.75 0/8 0.375 2/8 Forbidden

2/8 0/8 0.25 1/8 0 0/8 0.5 0/8 0.25 1/8 Allowed

1/8 0/8 0.125 0/8 0.5 0/8 0.25 0/8 0.125 1/8 Allowed

4.3. Apply the selected settings using GUI.

4.3.1. Fine-tune the VTH slide bar if required.

4.3.2. The multi-rail output eyes observed on a test PCB for two different amplitudes are

shown in Fig. 6 and Fig. 7.

Fig. 6. 9-Rail Output Signal Eye for the 2/8 Amplitude

Rev. 1.1.1 17 July 2016




Fig. 7. 9-Rail Output Signal Eye for the 1/8 Amplitude

GUI Expert Mode

1. To view all the DC control voltages as shown in Fig. 8, left-click on View Raw Data.

Fig. 8. Access to Raw Data Values

2. When GUI is closed, all the settings are automatically saved.

3. The last saved settings are automatically loaded when GUI is stared.

Rev. 1.1.1 18 July 2016




4. Configuration files that include specific settings for desired operational modes can be saved or

loaded.

5. To save a current configuration, left-click on File>>Save Configuration. A window will appear

and choose where to save this file. In the box to the right of File Name:, enter a name for the file

ending with .txt. An example filename is “32.5Gbps.txt”. Save current configuration by left-

clicking on Save.

6. Open a configuration file by left-clicking on File>>Open Configuration. Locate the saved

configuration file that was previously saved. Left-click on the configuration file and select Load.

All settings in this selected file will be restored. Example file shown below is “32.5Gbps.txt”

which is selected.

Rev. 1.1.1 19 July 2016




7. It is possible to observe and directly manipulate the values of all 32 bits of the 3-wire interface

internal registers by selecting Vew/Modify 32 Bit Register from the main GUI menu.

Fig. 9. Access to Register Settings

7.1.The bits are displayed in a special form where green means logic “1” and red means logic

“0” states of the corresponding bit (see Fig. 9).

7.2.The states of the bits change automatically when the GUI controls are manipulated.

7.3. The state of a bit can be changed manually by left-clicking on it.

7.4. The states of bits 0, 1, 2, and 3 change automatically every time the corresponding Tap

slide bar is manipulated. To keep the desired manual settings, the Prebuf Control switch

should be changed from AUTO to Manual as shown in Fig. 9.

Troubleshooting

1. If the part does not seem to respond to the program, restart the computer and make sure that

the USB indicator is green.

2. If no clock output is observed even after restarting program, try to move the Skew and Delay

slide bars all the down and then back to defaults. If clock is still not observed, power cycle the

supplies and restart the computer.

Rev. 1.1.1 20 July 2016




DLL The 32-bit DLL is compiled from CVI Labwindows. Its functions are in C style arguments, and they

return integers. The DLL can be used as an alternative to the GUI. This is useful for using the unit to

automate control. A python example is provided as an example on how to use the DLL. The DLL may be

used by any program that can deal with C type functions. The DLL and python example file can be found

in the installation directory of the GUI. Note: A 32-bit version of Python must be used.

int usb_init(void)

Description: Finds USB device and loads GUI panel resources. Must be called first in the

program.

Argument: none

Returns: ‘1’ USB is connected, ‘0’ USB is not connected

int usb_close(void)

Description: Closes USB devices. Must be called to clear the USB handle so that another program

can control the unit.

Argument: none

Returns: ‘1’ USB closed, ‘0’ Error (handle may be closed already)

Notes for Tune1, Tune2, Tune3, and Tune4

!!! The total digital tap value for all four taps may not exceed 7 !!!!

int Tune1(float Tune1Value)

Description: Control of Tune 1 / Tap 1

Every increment of 0.125 increases digital tap by one

Example 1: 0.35 = digital tap value of 2 (0.125 * 2) and remainder is analog weight

(0.35-0.25 = 0.1)

Example 2: 0.125 = digital tap 1, analog value = 0

Example 3: 0.136 = digital tap = 1, analog value = 0.136 - 0.125 = 0.11

2 Max digital tap available

Tune1Analog must be ON to use analog portion

Argument: Float value from 0 to 0.375

Returns: ‘1’ write successful, ‘0’ write unsuccessful





(0.35-0.25 = 0.1)





Argument: Float value from 0 to 1


Rev. 1.1.1 21 July 2016








(0.35-0.25 = 0.1)









Settings possible is 0, 0.125, 0.250

Analog portion is remainder from tap1,tap2,tap3. Tune4Analog must be ON to use it

(0.35-0.25 = 0.1)




int Tune1Analog(int Tune1Analog)

Description: Turn analog Tune 1 / Tap 1 ON/OFF

Argument: ‘1’ ON, ‘0’ OFF














Rev. 1.1.1 22 July 2016




int Tune1Invert(int Tune1Invert)

Description: Turn invert Tune 1 / Tap 1 ON/OFF

Argument: ‘1’ INVERT ON, ‘0’ INVERT OFF














int vth(float vth)

Description: Control of VTH

Argument: float value from -2.2 to 0


int vddshd(float vddshd)

Description: Control of data peaking



int xadj(float xadj)

Description: Control of eye crossing

Argument: float value from -4 to 4


int vddshc(float vddshc)

Description: Control of clock peaking



int ClkAmp(float ClkAmp)

Description: Control of clock output amplitude



Rev. 1.1.1 23 July 2016




int ClkMultiplier (float ClkMultValue)

Description: Control of clock multiplier delay



int CoarseDelay (float CoarseDelayValue)

Description: Control of Coarse Delay



int FineDelay (float FineDelayValue)

Description: Control of Coarse Delay



int FineDelayOppPar (int FineDelayOppParValue)

Description: Control of Fine Delay's Opposite or Parallel mode

Argument: '1' = Parallel, '0' Opposite


int CoarseDelayOppPar (int CoarseDelayOppParValue)

Description: Control of Coarse Delay's Opposite or Parallel mode

Argument: '1' = Parallel, '0' Opposite


int ClkDutyCycleP (float ClkDutyCyclePValue)

Description: Control of input P clock duty cycle



int ClkDutyCycleN (float ClkDutyCycleNValue)

Description: Control of input P clock duty cycle



int ReadInputDutyCycle (void)

Description: get input duty cycle indicator

Argument: none

Returns: (int) returns 12bit ADC reading

int ReadOutputDutyCycle (void)

Description: get output duty cycle indicator

Argument: none


Rev. 1.1.1 24 July 2016




int get_temperature(void)

Description: get temperature

Argument: none


Revision History

Revision Date Changes

1.1.1 07-2016 Updated GUI pictures to newest version

Added DLL Feature

Added Clock vs. Data section

Added Clock Operation section

1.0.1 01-2015 Initial release

Documents

ASNT Pre-Emphasis 32.5Gbps Advanced Driver/Amplifier Pre-Emphasis 32.5Gbps Advanced Driver/Amplifier ... application of a common mode voltage on DC-coupled I/O’s greater than 1V