AMBA - search read.pudn.comread.pudn.com/downloads119/sourcecode/others/508101/AMBA.pdf · pwdata apb Ç amba. amba apb apb apb bridge apb ahb apb apb pclk psel penable psel ahb psel

(System On a Chip SOC)

(Silicon Intellectual Property

IP ) SOC

SOC IP

IP

IP

IP

IP

www.Chip123.com

IC D

ES

IGN

IC DESIGN MAGAZINE

2002

1

May.

Content

AMBA

CIC

Reprint

Copyright © 2001 by Chip123 Technology Co., Ltd. All rights reserved www.chip123.com [email protected]

ISSN 1609-8633

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ISSN 1609-8633

Interconnect Bus) PIbus2 PALMCHIP

Mbus PalmBus ARM

ARM

A R M

AMBA

AMBA

AMBA IC

SOC

AMBA

AMBA

(AHB)

(APB) AHB

(On Chip Bus

Architecture)

(Advanced Microprocessor Bus

Architecture AMBA)

( ) AMBA

( ) AMBA (AHB)

( ) AMBA (APB) ( )

AMBA ( )

( ) AMBA

IBM OPB (On-

Chip Peripheral Bus) PLB (Processor

Local Bus) ARM APB(ARM

Peripheral Bus) ASB(ARM System

Bus) AHB(ARM High Performance

B u s ) O M I P I b u s ( P e r i p h e r a l

IC DESIGN MAGAZINE

2002

2

May.

ѱ ☼ Ю

ῶ Л ѱ

OPB PLB APB ASB AHB PIbus PIbus2 Mbus PalmBus

ќ (ᴯа) 8, 16, 32 8,16,24,32 32 8, 16, 32 2n (n=3~10) 8,16,32 8,16,24,32, 64 8,16,32,64 8,16,32

(ḕ ) Ϛ ϡ 4ᴯа 4ᴯа 128ᴯа Ϛ Ϛ ☼ ☼

ӣ ἤ ᵅ

ᵅғ

ᵅ

ᵅғ

ᵅ

ᵅғ

ᶧ ⁄ ᴍиѩ ᴍиѩ ᶧ ᶧ ᶧ ȳМȳנ ȳМȳנ ӑ῀ ӑ῀

Ḕ ╥ ╥ ╥(Ӕ ) ╥( ) ╥(Ӕ ) ╥(Ӕ ) ╥(Ӕ ) ╥ ╥(Ӕ )

☼ Џ Џ Џ Ϯ Џ Ϯ Ϯ ӑ῀ ӑ῀

М ᵡ ᵡ ᵡ ᵡ ᵡ ᵡ ᵡ ᵡ ᵡ

и ה ᵡ ᵡ ᵡ ᵡ ╥ ╥ ╥ ᵡ ᵡ

ԇ ῏ ╥ ╥ ᵡ ╥ ╥ ╥ ╥ ╥ ᵡ

╥ ╥ ᵡ ╥ ╥ ╥ ╥ ╥ ᵡ

AMBA

(bridge) APB bridge

AMBA

(Technology Independent)

AMBA ARM

(ASB) AHB

AMBA

APB

AMBA

AHB APB

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IC D

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IC DESIGN MAGAZINE

2002

3

May.

Reprint


ISSN 1609-8633

High-performace

ARM processor

High-bandwidth

on-chip RAM

High-bandwidth

External Memory

Interface

DMA bus

master

B

R

I

D

G

E

UART Timer

PIOKeypad

High-performace

ARM processor

High-bandwidth

on-chip RAM

High-bandwidth

external memory

interface

DMA bus

master

B

R

I

D

G

E

UART Timer

PIOKeypad

APBAHB or ASB

AMBA

High-performace

ARM processor

High-bandwidth

on-chip RAM

High-bandwidth

External Memory

Interface

DMA bus

master

B

R

I

D

G

E

UART Timer

PIOKeypad

High-performace

ARM processor

High-bandwidth

on-chip RAM

High-bandwidth

external memory

interface

DMA bus

master

B

R

I

D

G

E

UART Timer

PIOKeypad

APBAHB or ASB

AMBA AHB

Reprint


ISSN 1609-8633

AMBA

A H B

HCLK AHB

HADDR

HWRITE

HREADY

HWDATA

HRDATA

AHB

AHB

AMBA AHB

HCLK

HCLK

AMBA

AHB APB

( ) AMBA(AHB)

AHB AMBA

APB bridge

AHB

(master)

( B U R S T )

(SPLIT)

64 128

(slave)

(a rb i te r ) (decoder )

AMBA AHB

IC DESIGN MAGAZINE

2002

4

May.

AMBA

A H B

(HREADY 0)

HREADY

HREADY 1

HCLK

HREADY 0

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IC DESIGN MAGAZINE

2002

5

May.

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ISSN 1609-8633

A

Control

Data

(A)

Data

(A)

Address phase Data phase

HCLK

HADDR[31:0]

Control

HWDATA[31:0]

HREADY

HRDATA[31:0]

AHB

Control

Data

(A)

Data

(A)

A

Address phase Data phase

HCLK

HADDR[31:0]

Control

HWDATA[31:0]

HREADY

HRDATA[31:0]

AHB

Reprint


ISSN 1609-8633

AHB

AHB

IC DESIGN MAGAZINE

2002

6

May.

AHB

masterReset

Clock PCLK

HRDATA[31:0]

HBUSREQx

HADDR[31:0]

HWDATA[31:0]

Address

and

control

Data

Data

PRESETn

HGRANTx

HREADY

HRESP[1:0]

Arbitergrant

Transferresponse

HLOCKx

HTRANS[1:0]

HWRITE

HSIZE[2:0]

HBURST[2:0]

HPROT[3:0]

Arbiter

Transfertype

AHB

HTRANS[1:0]

IDLE BUSY NONSEQ

S E Q

IDLE

OKAY

BUSY

BUSY

IDLE

OKAY

NONSEQ

NONSEQ

SEQ

SEQ

AHB

AHB

AMBA

AMBA

Reprint


ISSN 1609-8633

( NONSEQ)

HBURST[2:0] HSIZE[2:0]

T1

(HADDR[31:0]=0x20)

NONSEQ

(HADDR[31:0]=0x24)

SEQ

BUSY

(HADDR[31:0]=0x28)

HREADY

(HREADY 0)

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IC D

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IC DESIGN MAGAZINE

2002

7

May.

HCLK

HTRANS[1:0]

HADDR[31:0]

HBURST[2:0]

HWDATA[31:0]

HREADY

T1 T2 T3 T4 T5 T6 T7 T8

0x20

INCR

NONSEQ BUSY

0x24

Data

(0x20)

SEQ

0x24

Data

(0x20)Data

(0x24)

Data

(0x24)

SEQ

0x28

Data

(0x28)

SEQ

0x2C

Data

(0x2C)

Data

(0x28)Data

(0x2C)HRDATA[31:0]

AHB

(HADDR[31:0]=0x2c)

SEQ

AHB

HSIZE[2:0] AMBA

8 16 32 64 128 256

512 1024 AMBA

AHB

HSIZE[2:0] HBURST[2:0]

AHB

(INCR)

(WRAP)

Reprint


ISSN 1609-8633

INCR4

0x34

0x34 0x38

0x3c 0x40

(WRAP)

0

0

WRAP4

0x34 0x34 0x38

0x3c

IC DESIGN MAGAZINE

2002

8

May.

HBURST[2:0] ₤ Ẃ

000 SINGLE 0x48

001 INCR ӑ╓ứ 0x48, 0x4c, 0x50

010 WRAP4 ҳ Ҕ 0x48, 0x4c, 0x40, 0x44 ה

011 INCR4 ҳ 0x48, 0x4c, 0x50, 0x54 ה

100 WRAP8 ϥ Ҕ 0x48, 0x4c,…, 0x5c, 0x40, 0x44 ה

101 INCR8 ϥ 0x48, 0x4c,...., 0x5c, 0x60, 0x64 ה

110 WRAP16 ϫг Ҕ 0x48, 0x4c,… … …, 0x7c, 0x40, 0x44 ה

111 INCR16 ϫг 0x48, 0x4c,… … …, 0x7c, 0x80, 0x84 ה

(0x40)

(0x10)

0x30

( )

H T R A N S [ 1 : 0 ] S E Q

B U S Y N O N S E Q

IDLE

INC

AMBA AHB

LOCK

HLOCK

HLOCK

AMBA

Reprint


ISSN 1609-8633

HMASTLOCK

LOCK

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IC D

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IGN

IC DESIGN MAGAZINE

2002

9

May.

AHB

slaveHW DATA[31:0]

Select

Reset

C lock

Data

HRDATA[31:0]

HREADY

HRESP[1:0]

HSPLITx[15:0]

HTRANS[1:0]

HRESETn

HCLK

HSELx

Transferresponse

Data

HADDR[31:0]

HW RITE

HSIZE[2:0]

HBURST[2:0]

HM ASTER[3:0]

HM ASTLO CKSplit-capable

slave

Address

and

control

AHB

AHB

AHB

HSELx

( HSELx 1

) HREADY

HREADY 0

HREADY

1

HREADY

HRESP[1:0]

OKAY

H R E A D Y 1 H R E S P [ 1 : 0 ]

OKAY

(HREADY 0)

OKAY

ERROR

Reprint


ISSN 1609-8633

IC DESIGN MAGAZINE

2002

10

May.

RETRY

SPLIT RETRY

SPLIT

RETRY

AMBA AHB SPLIT

AHB SPLIT

HRESP[1:0] SPLIT

HMASTER[3:0]

HMASTER[3:0] HSPLITx[15:0]

HSPLITx[15:0]

AHB

arbiter

Reset

Clock

HTRANS[1:0]

HRESETn

HCLK

HADDR[31:0]

HREADY

HRESP[1:0]

HBURST[2:0]

Address

and

control

HBUSREQx1

HLOCKx1

HBUSREQx2

HLOCKx2

HBUSREQx3

HLOCKx3

HSPLITx[15:0]

Arbiter

requests

and

locks

HGRANTx1

HGRANTx2

HGRANTx3

HMASTER[3:0]

HMASTLOCK

Arbiter

grants

AHB

AMBA

HGRANT

HMASTER[3:0]

(HADDR[31:0])

AHB

AHB

HSPLITx[15:0]

AHB

SPLIT

AMBA AHB

HBUSREQx

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IC D

ES

IGN

IC DESIGN MAGAZINE

2002

11

May.

Reprint


ISSN 1609-8633

HCLK

HBUSREQx

HGRANTx

HMASTER[3:0]

HADDR[31:0]

HWDATA[31:0]

T1 T2 T3 T4 T5 T6

A A+4

#1

Data(A)

ԇ ῏ Ӑ ᵂ ᶧ

AHB

decoderHADDR[31:0]Address Select

HSELx1

HSELx2

HSELx3

AHB

Reprint


ISSN 1609-8633

(ASIC library)

AHB APB (APB

bridge)

APB bridge AMBA AHB

AMBA APB

APB

APB bridge APB APB

bridge AHB

APB

PSELx

APB bridge AHB

APB

APB AHB

HSELx

HADDR[31:0]

( ) AMBA(APB)

AMBA APB

APB APB

bridge

APB

AHB

APB

AHB

APB

APB

IC DESIGN MAGAZINE

2002

12

May.

AHB

decoderHADDR[31:0]Address Select

HSELx1

HSELx2

HSELx3

AHB

AMBA

HADDR[31:0]

(PSELx) SETUP

ENABLE SETUP

ENABLE

ENABLE

PENABLE

APB

IDLE APB

SETUP

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IC D

ES

IGN

IC DESIGN MAGAZINE

2002

13

May.

Reprint


ISSN 1609-8633

APB

bridge

Reset

Clock

PRESETn

PCLK

PRDATA

Selects

PSEL1

PSEL2

PSELn

PENABLE

PADDR

PWRITE

PWDATA

Address

and

control

W rite data

Strobe

Read data

System busslave

interface

AMBA APB bridge

IDLEPSELx = 0

PENAABLE = 0

SETUPPSELx = 1

PENAABLE = 0

ENABLEPSELx = 1

PENAABLE = 1

IDLEPSELx = 0

PENABLE = 0

SETUPPSELx = 1

PENABLE = 0

ENABLEPSELx = 1

PENABLE = 1

No transfer

Transfer

No transfer

Transfer

APB

Reprint


ISSN 1609-8633

SETUP

APB

APB

PENABLE 1

IDLE

IC DESIGN MAGAZINE

2002

14

May.

T1 T2 T3 T4 T5

PCLK

Addr 1

Data 1

PADDR

PWRITE

PSEL

PENABLE

PWDATA

APB

APB

T1

IDLE T2

SETUP

APB

PSEL 0 1 T3

ENABLE PENABLE

1 T4

PENABLE 1 0

T1 T2 T3 T4 T5

PCLK

Addr 1

Data 1

PADDR

PWRITE

PSEL

PENABLE

PWDATA

ϫ ᶧAPB

AMBA

AMBA APB

APB

APB bridge

APB AHB

APB

APB

PCLK PSEL

PENABLE

PSEL

AHB

PSEL

1 0

APB

APB

APB

APB

T3 ENABLE

T4

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IC D

ES

IGN

IC DESIGN MAGAZINE

2002

15

May.

Reprint


ISSN 1609-8633

APB

slaveReset

Clock

PRESETn

PADDRAddress

and

control

PRDATA Read data

PCLK

PSELX

PENABLE

PWRITE

PWDATAWrite data

Select

Strobe

APB

AHB APB

ѻϢ ѻϢ ϚѻϢ

ќ ╥ ᵡ

╥ ᵡ

и ה ╥ ᵡ

╥ ᵡ

AHB APB

Reprint


ISSN 1609-8633

(HADDR HWRITE) T2 APB

bridge AHB

APB

ENABLE

APB

APB

AHB APB

( )

AHB APB

T1 AHB

IC DESIGN MAGAZINE

2002

16

May.

T1 T2 T3 T4 T5

Addr 1

Data 1

PADDR

PWRITE

PSEL

PENABLE

PWDATA

Addr 1

Data 1

HADDR

HWRITE

HRDATA

HREADY

AHB APB

( ) AMBA

AMBA

AMBA

AMBA

(TIC)

AMBA

AMBA

(TREQA TREQB TACK)

AMBA

(TREQA 0

1) (TACK

0 1)

TREQB 0 1

( T C L K )

www.Chip123.com

IC D

ES

IGN

IC DESIGN MAGAZINE

2002

17

May.

Reprint


ISSN 1609-8633

Application

peripheral

Dedicated

peripheral

inputs

Bus interfaceTest stimuli Test results

Dedicated

peripheral

outputs

AMBA

Test

Interface

Controller

(TIC)

External

Bus

Interface

(EBI)

TCLK

TREQA

TREQB

TACK

Control

Address

DataTBUS[31:0]

Reprint


ISSN 1609-8633

IC DESIGN MAGAZINE

2002

18

May.

T1 T2 T3 T4 T5 T6

TCLK

Address

TREQA

TREQB

TACK

TBUS[31:0]

Test bus

requested

Test bus

available

Address

vector

TREQA TREQB TACK

0 0 0 Ϛ ה

1 0 0 ḖṆ Ϥ ה

0 1 0 ’

1 Ϥ ה

TREQA TREQB TACK

0 ӑᶙכᾼ׀ậ ᵂ

1 1 1 ᴯᵿȳ ạц

1 0 1

0 1 1

ה 1 0 0

TREQA TREQB TACK (Add ress

Vector)

AMBA

(Burst Vector)

TREQA TREQB

0

TACK 0

( )

AMBA

AMBA

(AHB)

(APB) AHB APB bridge

AMBA

TREQA TREQB 1

TBUS[31:0]

TREQA TREQB

(Control Vector)

TREQA TREQB 1

TBUS[31:0]

TREQA TREQB

(Write Vector)

(Read Vector) (Turnaround

Vector)

www.Chip123.com

IC D

ES

IGN

IC DESIGN MAGAZINE

2002

19

May.

Reprint


ISSN 1609-8633

Reprint


ISSN 1609-8633

( )

(1) AMBATM Specification (Rev 2.0)

(2)On-Chip Bus Attributes Specification

Version 2.0 (OCB1 2.0), VSI Alliance

TM

(3)David Flynn, AMBA: Enabling

Reusable On-Chip Designs, IEEE

Macro, pp 20-27, 1997

IC DESIGN MAGAZINE

2002

20

May.

AMBA

Documents

AMBA - search read.pudn.comread.pudn.com/downloads119/sourcecode/others/508101/AMBA.pdf · pwdata apb Ç amba. amba apb apb apb bridge apb ahb apb apb pclk psel penable psel ahb psel