18 Power Amplifiers

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  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD

    Power Amplifiers

    Prof. Bhaskar Banerjee

    EERF 6330- RF IC Design

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 2

    Power Amplifier

    What is a Power Amplifier (PA)? The final stage of amplification in a transmitter Needs to drive a large power into an antenna.

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 3

    Basic Amplifier

    Matching N/W RL

    RFC

    vin M1

    Voltage-Swing at X: 2Vdd (Inductor allows for that swing) dc Stress for M1

    Large Signal Impedance Matching Conjugate Matching?

    Even if it worked ~ 50% efficiency!

    X

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 4

    Figure-Of-Merits Efficiency

    Drain efficiency ()

    Power Added Efficiency (PAE)

    PRFin PRFout

    IDCVDC

    PA

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 5

    Figure-Of-Merits Linearity

    AM-AM distortion (Gain compression) AM-PM distortion

    PA

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 6

    Figure-Of-Merits Linearity

    AM-AM distortion (Gain compression) IP1dB: Input P1dB OP1dB: Output P1dB Psat: Saturation power

    Pout(dB)

    Pin(dB)

    1dBOP1dB

    IP1dB

    Psat

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 7

    Figure-Of-Merits Linearity

    Spectral regrowth Adjacent Channel Power or Leakage Ratio (ACPR/ACLR)

    ACPR

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 8

    Figure-Of-Merits Linearity

    Spectral regrowth in CDMA Adjacent Channel Power Ratio (ACPR)

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 9

    Figure-Of-Merits Linearity

    Constellation distortion Error Vector Magnitude (EVM)

    Used to determine errors and their cause Measured Vector Reference Vector = Error Vector

    Measured = Actual signal magnitude and phase Reference = Ideal signal based on knowledge of data

    (ie. bit rate, number of symbols, filtering, etc.)

    Sideal

    Serror

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 10

    Trade-off: Efficiency and Linearity Efficiency improves with drive level, highest when the gain is

    several dB compressed Gain compression, phase distortion, and inter-modulation

    cause the bandwidth limited signal to distort and spill over into adjacent channels, resulting in spectral regrowth and increase in EVM

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 11

    Power Performance Measurement Load-pull and Source-pull system configuration

    Tuner for Source-pull Tuner for load-pull

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 12

    Power Performance Measurement Load-pull and Source-pull measurement

    Finding optimum load and source impedances for.. maximum power gain maximum output power maximum PAE minimum ACPR

    Varying the impedances seen by the Device Under Test (DUT) with tuners and measures its performance

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 13

    Power Performance Measurement Contours with constant gain, output power, PAE, or ACPR

    with specified step values Contours can be overlapped to find the optimum impedance

    region to meet the multiple specifications

    Constant gain contours Constant PAE contours Overlap of constant gain and PAE contours

    Optimum impedance region

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 14

    Power Performance Measurement Measurement example

    Load-pull measurement Constant output power contours to find maximum output power

    impedance region

    S22* = Small Signal Conjugate Output Impedance

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 15

    Power Performance Measurement Measurement example

    Load-pull measurement Constant output power contours to find maximum output power

    impedance region

    S22* = Small Signal Conjugate Output Impedance

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 16

    Amplifier Classification

    Class of operation The manner in which transistors are operated or biased Output current waveform when the input is applied

    Non-switch mode amplifiers (Conduction Angle based ) Power transistors behave as current sources Linearity and efficiency are trade-off Class A, B, AB, C Conduction angle = (fraction of a cycle the transistor is turned

    on) 360

    Switch mode amplifiers (Harmonic Termination based) Power transistors behave as switches 100% efficiency can be achieved in theory Nonlinear Class D (switch mode), E (switching), F (harmonically

    terminated).

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 17

    Amplifier Classification Non-switch mode amplifiers (Conduction angle based)

    Class A : The device conducts current during the entire cycle of the

    input waveform (conduction angle is 360 degrees) Class B :

    The device conducts current during the half of the cycle of the input waveform (conduction angle is 180 degrees)

    Class AB : The device conducts current more than half but less than the

    entire cycle of the input waveform (conduction angle is 180-360 degrees)

    Class C : The device conducts current less than half of the cycle of the

    input waveform (conduction angle is 0-180 degrees)

    *Conduction angle: the portion of the input cycle for which the transistor conducts and an output current flows.

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 18

    Class operation Class A

    Vk VDSmax

    Im

    VDS

    IDS

    VDD

    IDS

    VGS VGS=VP

    VGS=0

    VP2VPVGS

    Q

    P

    2P

    Q

    VDS

    IDS

    Q

    Im

    P 2P

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 19

    Class operation Class B

    Vk VDSmax

    Im

    VDS

    IDS

    VDD

    IDS

    VGS VGS=VP

    VGS=0

    VP2VPVGS

    Q

    P

    2P

    Q

    VDS

    IDS

    Q

    Im

    P 2P

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 20

    Class operation Class AB

    Vk VDSmax

    Im

    VDS

    IDS

    VDD

    IDS

    VGS VGS=VP

    VGS=0

    VP2VPVGS

    Q

    P

    2P

    Q

    VDS

    IDS

    Q

    Im

    P 2P

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 21

    Class operation Class C

    Vk VDSmax

    Im

    VDS

    IDSIDS

    VGS VGS=VP

    VGS=0

    VP2VPVGS

    Q

    P

    2P

    Q

    VDS

    IDS

    Q

    Im

    P 2PVDD

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 22

    Amplifier Classification Non-switch mode amplifiers

    Voltage and Current at the output

    t

    t

    VD

    ID

    Class A

    t

    t

    VD

    ID

    Class A

    VD

    t

    t

    ID

    Class B

    t

    t

    ID

    Class B

    t

    t

    VD

    ID

    Class C

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD

    Class A Operation

    similar to small-signal but on steroids!

    23

  • iD = IDC + irf sin0t

    v0 = irfR sin0t

    Prf =i2rfR

    2

    IDC = irf =) PDC = IDCVDD = irfVDD

    Drain eciency, =PrfPDC

    =i2rf/2R

    irfVDD=

    irfR

    2VDD

    Maximum value of irfR is VDD =) max = 12= 50%

    Bhaskar Banerjee, EERF 6330, Sp2013, UTD

    Class A Operation

    similar to small-signal but on steroids!

    24

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD

    Class B Operation

    Bias is arranged to shut off the output device for half of every cycle. (duty cycle = 50%).

    25

  • iD = irf sin0t for iD > 0.

    ifund =2

    T

    T/2R0

    irf (sin0t)(sin0t) dt =irf2

    vout irf2

    R sin0t

    vout,max = VDD =) irf,max = 2VDDR

    Pout =v2o2R

    =) Pout,max = V2DD

    2R

    iD =1

    T

    R T/20

    2VDDR

    sin0tdt =2VDDR

    =) PDC = 2V2DD

    R

    ) = Pout,maxPDC

    =

    4 0.785 = 78.5%

    Bhaskar Banerjee, EERF 6330, Sp2013, UTD

    Class B Operation

    non linearity (not in terms of input-output waveforms, but in terms of input-output power proportionality).

    26

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD

    Class C Operation

    Bias is arranged to shut off the output device for more than half of every cycle. (duty cycle < 50%).

    Maximum efficiency ~ 100% (when it is always off!)

    27

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 28

    Amplifier Classification Non-switch mode amplifiers

    Trade-off between Efficiency and Linearity

    Conduction angle = (fraction of a cycle the transistor is turned on) 360

    output RF powerDC powerEfficiency =

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 29

    Amplifier Classification Influence of conduction angel

  • Idc =Imax2

    2sin(/2) cos(/2)1 cos(/2)

    In =Imax

    (1 cos(/2))

    1n 1sin(n 1)

    2 2

    ncos(/2)sin(n/2) +

    1n+ 1

    sin(n+ 1)

    2

    I1 =Imax2

    sin1 cos(/2)

    Bhaskar Banerjee, EERF 6330, Sp2013, UTD 30

    Harmonics

  • Conduction Angle

    Ampli

    tude

    Fundamental

    DC

    2nd 3rd 4th2 0

    Imax

    Bhaskar Banerjee, EERF 6330, Sp2013, UTD 31

    Amplifier Classification Influence of conduction angle

    Imax/

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 32

    Amplifier Classification Summary

  • Pmax =V 2DD2R

    =(3.3)2

    2 50 0.1 W

    Rmax =V 2DD2Pmax

    =(3.3)2

    2 1 5.4

    IDC =VDDR

    = 825 mA Ipeak = 2 IDC = 1.65 A

    =PoutPDC

    =1 W

    0.825 A 3.3 V 37%Bhaskar Banerjee, EERF 6330, Sp2013, UTD 33

    Class A PA Example

    Frequency = 1 GHz, POUT = 1 W into a 50 load, Vdd = 3.3 V

    Hence for 1 W power we need impedance transformation

    In practice, R would be less than this (~ 4 ), and hence, bias current:

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 34

    Class A PA Example

    When such a large current flows through a transistor, Ron becomes critical. Can lose say 200 mV => Ron < 200 m Transistor width ~ several mm Also, = 37%, hence 1 W output power => 1.7 W dissipated Packaging and Heat Sink becomes very critical! Class A - if input drive = 0 ; Power dissipated = 2.7 W! Design for worst case Use adaptive bias1

    1 A. Saleh, and D. Cox, IEEE Trans. Microw. Theory Tech., v. 31, no. 1, Jan 1983, pp. 51-56.

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 35

    Class A Example

    vin

    Id RFC

    DC BlockRL = 50

    vOUTvin

    CL

    VDD

  • XC = 5 => C =1

    5 2 1 GHz = 31.8 pF

    Bhaskar Banerjee, EERF 6330, Sp2013, UTD 36

    Class A Example

    Output Filter is a simple parallel LC BW = 100 MHz, f0 = 1 GHz => Q = 10 One solution is XL = XC = 5

    XL = 5 => L =5

    2 1 GHz = 0.8 nH

    RFC should be at least 10-15 times larger than R (4 ) RFC > 6.4 nH Also need matching network to transform 50 to 4 L-matching network

  • L1 =RL0Q

    502109 3.5 2.3 nH

    C1 =1

    0QRS 1

    2109 3.5 4 11.7 pF

    Bhaskar Banerjee, EERF 6330, Sp2013, UTD 37

    Class A Example

    Transformation ratio (50/4) sets the Q = 3.5 L-matching n/w:

    Combine these values with the filter L and C values

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 38

    Class A Example

    vin

    825 mA >6.4 nH

    11.7 pFRL = 50

    vOUTvin

    32 pF0.6 nH

    3.3 V

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 39

    Class A Example

    825 mA >6.4 nH

    11.7 pFRL = 50

    vOUT

    vin

    32 pF0.6 nH

    3.3 VIbias/n

    A/n A

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 40

    3 Stage PA Configurations

    MatchingNetwork

    MatchingNetwork

    MatchingNetwork

    On-ChipOff-Chip3 dBm

    Self-BiasIndep. Bias

    Class of Operation

    Device Size:40/3212 dB Gain15 dBm

    On-ChipOff-Chip30 dBm

    Self-BiasIndep. Bias

    Class of Operation

    Device Size: 160

    Push-PullSingle Device6 dB Gain

    MatchingNetwork

    Self-BiasIndep. Bias

    Class of Operation

    Device Size: 409 dB Gain24 dBm

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 41

    Addressing Vds(Vce), Vdg(Vcb) Breakdown

    Methods to overcome voltage breakdown

    Decrease effective output resistance by increasing current

    Distribution of the power output over multiple devices.

    Cascode design

    Stacked power amplifier

    Balanced power amplifier

    Power Combining

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 42

    CMOS Power Amplifier

    Power Amplifiers in RF transmitters Consume Most of Power in Transmission Mode Linearity Cost

    Cost Reduction Strategy Silicon-Based Technology High levels of Integration

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD 43

    Issues in CMOS PA Design

    Transistor Characteristics Low Breakdown Voltage High Knee Voltage

    Passive Component Lossy Si substrate Thin Metal Layers

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD

    CMOS PA Example

    44

    Power combining with transformers

    ref: Aoki, et. al., JSSC 2002, vol. 37, no. 3.

  • Bhaskar Banerjee, EERF 6330, Sp2013, UTD

    CMOS PA Example

    45