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Lecture 1: Introduction toDigital Logic Design
CK Cheng
CSE Dept.
UC San Diego
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Outlines
• Administration
• Motivation
• Scope
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Administration
Web site:
http://www.cse.ucsd.edu/classes/sp09/cse140/
WebBoard:
http://webboard.ucsd.edu
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Administration
Instructor: CK Cheng, CSE2130, [email protected], 858 534-6184
Teaching Assistants:
• Thomas Weng, [email protected]
• Renshen Wang, [email protected]
• Chengmo Yang, [email protected]
• Mingjing Chen, [email protected]
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Administration
Schedule
• Outlines (Use index to check the location of the textbook)
• Lectures: 2:00-3:20PM, TTh, Center 216.
• Discussion: 2:00-2:50PM, M, Center 212.
• Office hours: 10:30-11:30AM, TTh, CSE 2130.
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Administration
Textbook
• Digital Design and Computer Architecture, David Money Harris and Sarah L. Harris, published by Morgan Kaufmann, 2007.
Grading
• Midterm 1: 25% (T 4/21)
• Midterm 2: 30% (Th 5/14)
• Final Exam: 40% (3:00-6:00PM, Th 6/11)
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Motivation• Microprocessors have revolutionized our world
– Cell phones, internet, rapid advances in medicine, etc.
• The semiconductor industry has grown from $21 billion in 1985 to $213 billion in 2004.
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Robert Noyce, 1927 - 1990• Nicknamed “Mayor of Silicon
Valley”
• Cofounded Fairchild Semiconductor in 1957
• Cofounded Intel in 1968
• Co-invented the integrated circuit
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Gordon Moore, 1929 - • Cofounded Intel in
1968 with Robert Noyce.
• Moore’s Law: the number of transistors on a computer chip doubles every year (observed in 1965)
• Since 1975, transistor counts have doubled every two years.
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Moore’s Law
“If the automobile had followed the same development cycle as the computer, a Rolls-Royce would today cost $100, get one million miles to the gallon, and explode once a year . . .”
– Robert Cringley
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Scope
• The purpose of this course is that we:– Learn what’s under the hood of an electronic
component– Learn the principles of digital design– Learn to systematically debug increasingly
complex designs – Design and build a digital system
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Scope
• Hiding details when they aren’t important
Physics
Devices
AnalogCircuits
DigitalCircuits
Logic
Micro-architecture
Architecture
OperatingSystems
ApplicationSoftware
electrons
transistorsdiodes
amplifiersfilters
AND gatesNOT gates
addersmemories
datapathscontrollers
instructionsregisters
device drivers
programs
focus o
f th
is c
ours
e
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We will cover four major things in this course:
- Combinational Logic (Ch 2)- Sequential Networks (Ch 3)- Standard Modules (Ch 5)- System Design (Chs 4, 6-8)
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Overall Picture of CS140
ControlSubsystem
Conditions
Control
Mux
Memory File
ALU
Memory Register
Conditions
Input
Pointer
CLK: Synchronizing Clock
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fi(x)
x1
.
.
.xn
fi(x)
Combinational Logic vs Sequential Network
Combinational logic:
yi = fi(x1,..,xn)
CLK
Sequential Networks 1) Memory 2) Time Steps (Clock)yi
t = fi (x1t,…,xn
t, s1t, …,sm
t)
Sit+1 = gi(x1
t,…,xnt, s1
t,…,smt)
fi(x)
x1
.
.
.xn
fi(x)fi(x)
x1
.
.
.xn
fi(x) si
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Scope
Subjects Building Blocks Theory
Combinational Logic
AND, OR, NOT,XOR
Boolean Algebra
Sequential Network
AND, OR, NOT, FF
Finite State Machine
Standard Modules
Operators,
Interconnects, Memory
Arithmetics, Universal Logic
System Design Data Paths, Control Paths
Methodologies
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Part I. Combinational Logic
• I) Specification• II) Implementation• III) Different Types of Gates
ab + cdab
cd
ecd
ab
e (ab+cd)
