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EDK 7.1 Tutorial -- EDK 7.1 Tutorial -- SystemACE and SystemACE and EthernetMAC on Avnet EthernetMAC on Avnet Virtex II pro Development Virtex II pro Development BoardsBoards

Chia-Tien Dan LoChia-Tien Dan Lo

Department of Computer ScienceDepartment of Computer ScienceUniversity of Texas at San AntonioUniversity of Texas at San Antonio

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GoalsGoals Avnet Virtex II pro Development is equipped Avnet Virtex II pro Development is equipped

with compact flash memory and gigabit with compact flash memory and gigabit Ethernet interface.Ethernet interface.

To build a working platform:To build a working platform: Store system in the compact flashStore system in the compact flash Configure FPGAs from compact flashConfigure FPGAs from compact flash Retrieve network packets directly from the Ethernet Retrieve network packets directly from the Ethernet

interfaceinterface Store results back to compact flashStore results back to compact flash Use XMD to assist software development and testUse XMD to assist software development and test

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PremisePremise

SoftwareSoftware Using EDK 7.1 and ISE 7.1Using EDK 7.1 and ISE 7.1 Download Avnet XBD file for EDK 7.1Download Avnet XBD file for EDK 7.1 Using Windows XPUsing Windows XP

HardwareHardware Using Avnet Virtex-II pro development board Using Avnet Virtex-II pro development board

(XC2VP30-6)(XC2VP30-6) Xilinx Parallel Cable IV (DLC7)Xilinx Parallel Cable IV (DLC7) ADS-DB9-MD7 CableADS-DB9-MD7 Cable

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SetupSetup

Connect Xilinx Parallel Cable IV from Connect Xilinx Parallel Cable IV from PC’s printer port to JTAG4 on Avnet PC’s printer port to JTAG4 on Avnet boardboard Omit this if using PCI interfaceOmit this if using PCI interface

Connect ADS-DB9-MD6-Cable from PC’s Connect ADS-DB9-MD6-Cable from PC’s Com1 port to JS1 on Avnet boardCom1 port to JS1 on Avnet board

Connect J8 to a Ethernet routerConnect J8 to a Ethernet router

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Using EDK7.1 BSB WizardUsing EDK7.1 BSB Wizard

In case Base System Builder Wizard In case Base System Builder Wizard won’t create a new directory, manually won’t create a new directory, manually create a project directory, say “c:\create a project directory, say “c:\download\SysaceEthernetTest”download\SysaceEthernetTest”

Start EDK 7.1 and check Base System Start EDK 7.1 and check Base System Builder WizardBuilder Wizard

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Use Base System Builder Use Base System Builder WizardWizard

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Browse the directory Browse the directory “SystemaceEthernetTest” “SystemaceEthernetTest” created earlycreated early

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Create a new designCreate a new design

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Select Avnet Virtex-II pro Select Avnet Virtex-II pro BoardBoard

Note: the Avnet XBD file has to be stored in the directory: C:\EDK7.1i\board\Xilinx\boards\Avnet_V2P30_FF896

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Select PowerPCSelect PowerPC

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Configure ProcessorConfigure Processor

Set processor clock to 300 MHzSet processor clock to 300 MHz Set FPGA JTAGSet FPGA JTAG Enable cacheEnable cache On-Chip Memory On-Chip Memory

Data: 64KData: 64K Instruction: 128KInstruction: 128K

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Configure Processor Configure Processor (cont.)(cont.)

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Set I/O InterfaceSet I/O Interface

Set RS232 to Set RS232 to OPB UARTLITEOPB UARTLITE 19200 bps19200 bps 8 data bits8 data bits No parity No parity Use interruptUse interrupt

UncheckUncheck SDRAM_64Mx16SDRAM_64Mx16 SRAMSRAM

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Set I/O Interface (cont.)Set I/O Interface (cont.)

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Set System ACE and Set System ACE and EthernetEthernet

UncheckUncheck FLASH_4Mx32FLASH_4Mx32

CheckCheck SysACE_CompactFlashSysACE_CompactFlash

OPB SYSACEOPB SYSACE Use InterruptUse Interrupt

Ethernet_MACEthernet_MAC PLB ETHERNETPLB ETHERNET No DMANo DMA Use InterruptUse Interrupt

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Set System ACE and Set System ACE and Ethernet (cont.)Ethernet (cont.)

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Set Internal PeripheralSet Internal Peripheral

Set PLB BRAM IF CNTLRSet PLB BRAM IF CNTLR plb_bram_if_cntlr_1plb_bram_if_cntlr_1 16K16K

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Set Internal Peripheral Set Internal Peripheral (cont.)(cont.)

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Set Internal Peripheral Set Internal Peripheral (cont.)(cont.)

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Software SetupSoftware Setup

Set standard I/O to RS232Set standard I/O to RS232 CheckCheck

Memory TestMemory Test Peripheral SelfTestPeripheral SelfTest

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Software Setup (cont.)Software Setup (cont.)

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Configure memory for Configure memory for test applicationstest applications

Set instructions to on-chip instruction Set instructions to on-chip instruction memory (iocm_cntlr)memory (iocm_cntlr)

Set data and stack/heap to on-chip data Set data and stack/heap to on-chip data memory (docm_cntlr)memory (docm_cntlr)

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Configure memory for Configure memory for test applications (cont.)test applications (cont.)

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Configure memory for Configure memory for test applications (cont.)test applications (cont.)

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Create SystemCreate System

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Configure Drivers and Configure Drivers and LibrariesLibraries

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Check xilfatfsCheck xilfatfs

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Set PROC_INSTANCE to Set PROC_INSTANCE to ppc405_0 for xilfatfsppc405_0 for xilfatfs

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Build Hardware: Toos->Update Build Hardware: Toos->Update BitstreamBitstreamThis step may take hours subject to the performance of This step may take hours subject to the performance of the PC!the PC!

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Build Software: Tools -> Build All User Build Software: Tools -> Build All User ApplicationsApplications

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Download Hardware Download Hardware Design to FPGAsDesign to FPGAs

Start iMPACT from XP’s start menu Start iMPACT from XP’s start menu (EDK’s download function may not work!)(EDK’s download function may not work!)

Assign implementation/download.bit to Assign implementation/download.bit to XC2VP30 device XC2VP30 device

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Download Hardware Download Hardware Design to FPGAs (cont.)Design to FPGAs (cont.)

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Download Hardware Download Hardware Design to FPGAs (cont.)Design to FPGAs (cont.)

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Start a 19200 hyper Start a 19200 hyper terminalterminal

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Start XMD: Tools -> XMDStart XMD: Tools -> XMD

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Download Test Download Test ApplicationsApplications

In XMD consoleIn XMD console Change directory to applicationsChange directory to applications

““cd TestApp_Peripheral”cd TestApp_Peripheral” Download the designDownload the design

““dow executable.elf”dow executable.elf” Run the applicationRun the application

““run”run”

Monitor the output in the hyper terminalMonitor the output in the hyper terminal Some messages should be shown if everything is Some messages should be shown if everything is

okayokay

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ReferencesReferences

Xilinx Platform Studio User Guide, Embedded Xilinx Platform Studio User Guide, Embedded Development Kit EDK 7.1Development Kit EDK 7.1

Xilinx Embedded System Tools Reference Xilinx Embedded System Tools Reference Manual, Embedded Development Kit EDK 7.1iManual, Embedded Development Kit EDK 7.1i

Xilinx Platform Specification Format Reference Xilinx Platform Specification Format Reference Manual, Embedded Development Kit EDK 7.1iManual, Embedded Development Kit EDK 7.1i

Xilinx OS and Libraries Document CollectionXilinx OS and Libraries Document Collection Xilinx EDK PowerPC TutorialXilinx EDK PowerPC Tutorial Avnet User’s Guide, Xilinx Virtex-II Pro Avnet User’s Guide, Xilinx Virtex-II Pro

Development KitDevelopment Kit