1 - CPRE 583 (Reconfigurable Computing): Evolvable Hardware Iowa State University (Ames) CPRE 583 Reconfigurable Computing Lecture 24: Fri 11/18/2011 (Evolvable

1 - CPRE 583 (Reconfigurable Computing): Evolvable Hardware Iowa State University (Ames)

CPRE 583Reconfigurable ComputingLecture 24: Fri 11/18/2011

(Evolvable Hardware)

Instructor: Dr. Phillip Jones([email protected])

Reconfigurable Computing LaboratoryIowa State University

Ames, Iowa, USA

http://class.ee.iastate.edu/cpre583/

http://class.ece.iastate.edu/cpre583/


•HW3: will be assigned as extra credit

•Exam 2– Reminder push back to Friday after Thanksgiving week– Note: I will have a substitute administrating the exam since I will be

attending a conference.

•Weekly Project Updates due: Friday’s (midnight)

Announcements/Reminders


Project Grading Breakdown

• 50% Final Project Demo• 30% Final Project Report

– 20% of your project report grade will come from your 5-6 project updates. Friday’s midnight

• 20% Final Project Presentation


• FPL• FPT• FCCM• FPGA• DAC• ICCAD• Reconfig• RTSS• RTAS• ISCA

Projects Ideas: Relevant conferences• Micro• Super Computing• HPCA• IPDPS


• Teams Formed and Topic: Mon 10/10– Project idea in Power Point 3-5 slides

• Motivation (why is this interesting, useful)• What will be the end result• High-level picture of final product

– Project team list: Name, Responsibility• High-level Plan/Proposal: Fri 10/14

– Power Point 5-10 slides (presentation to class Wed 10/19)• System block diagrams• High-level algorithms (if any)• Concerns

– Implementation– Conceptual

• Related research papers (if any)

Projects: Target Timeline


• Work on projects: 10/19 - 12/9– Weekly update reports

• More information on updates will be given• Presentations: Finals week

– Present / Demo what is done at this point– 15-20 minutes (depends on number of projects)

• Final write up and Software/Hardware turned in: Day of final (TBD)

Projects: Target Timeline


Initial Project Proposal Slides (5-10 slides)• Project team list: Name, Responsibility (who is project leader)

– Team size: 3-4 (5 case-by-case)• Project idea

• Motivation (why is this interesting, useful)• What will be the end result• High-level picture of final product

• High-level Plan– Break project into mile stones

• Provide initial schedule: I would initially schedule aggressively to have project complete by Thanksgiving. Issues will pop up to cause the schedule to slip.

– System block diagrams– High-level algorithms (if any)– Concerns

• Implementation• Conceptual

• Research papers related to you project idea


Weekly Project Updates

• The current state of your project write up– Even in the early stages of the project you

should be able to write a rough draft of the Introduction and Motivation section

• The current state of your Final Presentation– Your Initial Project proposal presentation

(Due Wed 10/19). Should make for a starting point for you Final presentation

• What things are work & not working• What roadblocks are you running into


Common Questions


• Text: Chapter 33• Readings:

– #8: A new species of hardware (2000) – #9: Real-world applications of analog and digital

evolvable hardware (1999) – #10: Generalized Disjunction Decomposition for

Evolvable Hardware (2006)

Resources on Evolvable Hardware


• Understand Evolvable Hardware basics?• Benefits and Drawbacks• Key types/categories

What you should learn


• One of the first papers to compare reconfigurable HW with biological organisms (1993) – “Evolvable Hardware with Genetic Learning: A first step

towards building a Darwin Machine”, Higuchi– Biological organism => DNA

• GATACAAAGATACACCAGATA– Reconfigurable Hardware => Configuration bitstream

• 000100111011011011011010101

Evolvable Hardware





• 000100111011011011011010101

Evolvable Hardware

GATACA

GenotypePhenotype





• 000100111011011011011010101

Evolvable Hardware

GATACA

GATAGA

GenotypePhenotype





• 000100111011011011011010101

Evolvable Hardware

GATACA

GATAGA

GenotypePhenotype





• 000100111011011011011010101

Evolvable Hardware

0001 1100

GenotypePhenotype





• 000100111011011011011010101

Evolvable Hardware

0001 1100

0001 0000

GenotypePhenotype





• 000100111011011011011010101

Evolvable Hardware

0001 1100

0001 0000

DFF

DFF

GenotypePhenotype


• Phylogeny Ontogeny Epigenesis (POE) – Phylogeny: Evolution through recombination and mutations

• Biological reproduction : Genetic Algorithms– Ontogeny: Self replication

• Multicellular organism's cell division : Cellular Automata– Epigenesis: adaptation trigger by external environment

• Immune system development : Artificial Neural Networks

Classifying Adaption/Evolution


• Phylogeny Ontogeny Epigenesis (POE) – Phylogeny: Evolution through recombination and mutations

• Biological reproduction : Genetic Algorithms– Ontogeny: Self replication

• Multicellular organism's cell division : Cellular Automata– Epigenesis: adaptation trigger by external environment

• Immune system development : Artificial Neural Networks

Classifying Adaption/Evolution

Ontogeny

Epigenesis

Phylogeny


• 30/40 year old concept. But applying to reconfigurable hardware is newish (1990’s)

• Evolutionary Algorithms (EAs)– Genetic Algorithms– Genetic Programming– Evolution Strategies– Evolutionary programming

Artificial Evolution


• 30/40 year old concept. But applying to reconfigurable hardware is newish (1990’s)

• Evolutionary Algorithms (EAs)– Genetic Algorithms– Genetic Programming– Evolution Strategies– Evolutionary programming

Artificial Evolution


• Genome: a finite string of symbols encoding an individual

• Phenotype: The decoding of the genome to realize the individual

• Constant Size population

• Generic steps– Initial population– Decode– Evaluate (must define a fitness function)– Selection– Mutation– Cross over

Genetic Algorithms


Genetic AlgorithmsInitialize Population

0000 10001010 11111100 00001111 00000000 00001111 1111

Decode Evaluate

Selection

Mutation

Next Generation

CrossOver



0000 10001010 11111100 00001111 00000000 00001111 1111

Decode Evaluate

1010 00111010 01001100 00001111 00000000 00001111 0100

Selection

Mutation

Next Generation

CrossOver

0000 = Black1111 = White

Left 4 bits: color

0000 = 01111 = 15

Right 4 bits: # sides



0000 10001010 11111100 00001111 00000000 00001111 1111

Decode Evaluate

1010 00111010 01001100 00001111 00000000 00001111 0100

Selection

Mutation

Next Generation

CrossOver

(0110 1000)

0000 = Black1111 = White

Left 4 bits: color

0000 = 01111 = 15Right 4 bits: # sides



0000 10001010 11111100 00001111 00000000 00001111 1111

Decode Evaluate

1010 00111010 01001100 00001111 00000000 00001111 0100

1010 0011 (.40)1010 0100 (.70)1100 0000 (.20)1111 0000 (.10)0000 0000 (.10)1111 0100 (.60) (0110 1000)

Selection

Mutation

Next Generation

CrossOver



0000 10001010 11111100 00001111 00000000 00001111 1111

Decode Evaluate

1010 00111010 01001100 00001111 00000000 00001111 0100

1010 0011 (.40)1010 0100 (.70)1100 0000 (.20)1111 0000 (.10)0000 0000 (.10)1111 0100 (.60) (0110 1000)

Selection

1010 0011 (.40)1010 0100 (.70)1111 0100 (.60)

Mutation

Next Generation

CrossOver



Decode Evaluate

1010 00111010 01001100 00001111 00000000 00001111 0100

1010 0011 (.40)1010 0100 (.70)1100 0000 (.20)1111 0000 (.10)0000 0000 (.10)1111 0100 (.60) (0110 1000)

Selection

1010 0011 (.40)1010 0100 (.70)1111 0100 (.60)

Mutation

1110 0011 1010 1100 1110 0100

1010 0111 0010 0110 1111 0100

Next Generation

CrossOver

0000 10001010 11111100 00001111 00000000 00001111 1111



Decode Evaluate

1010 00111010 01001100 00001111 00000000 00001111 0100

1010 0011 (.40)1010 0100 (.70)1100 0000 (.20)1111 0000 (.10)0000 0000 (.10)1111 0100 (.60) (0110 1000)

Selection

1010 0011 (.40)1010 0100 (.70)1111 0100 (.60)

Mutation

1110 0011 1010 1100 1110 0100

1010 0111 0010 0110 1111 0100

1110 1100 1010 0011 1110 0100

1010 0110 0010 0111 1111 0100

Next Generation

CrossOver

0000 10001010 11111100 00001111 00000000 00001111 1111



Decode Evaluate

1010 00111010 01001100 00001111 00000000 00001111 0100 (0110 1000)

Selection

1010 0011 (.40)1010 0100 (.70)1111 0100 (.60)

Mutation

1110 0011 1010 1100 1110 0100

1010 0111 0010 0110 1111 0100

1110 1100 1010 0011 1110 0100

1010 0110 0010 0111 1111 0100

Next Generation

CrossOver

1110 1100 1010 0011 1110 01001010 0110 0010 0111 1111 0100

1010 0011 (.40)1010 0100 (.70)1100 0000 (.20)1111 0000 (.10)0000 0000 (.10)1111 0100 (.60)



Decode Evaluate

1110 11001010 00111110 01001010 01100010 01111111 0100

1010 0011 (.40)1010 0100 (.70)1100 0000 (.20)1111 0000 (.10)0000 0000 (.10)1111 0100 (.60) (0110 1000)

Selection

1010 0011 (.40)1010 0100 (.70)1111 0100 (.60)

Mutation

1110 0011 1010 1100 1110 0100

1010 0111 0010 0110 1111 0100

1110 1100 1010 0011 1110 0100

1010 0110 0010 0111 1111 0100

Next Generation

CrossOver

1110 1100 1010 0011 1110 01001010 0110 0010 0111 1111 0100



Decode Evaluate

1110 11001010 00111110 01001010 01100010 01111111 0100 (0110 1000)

Selection

1010 0011 (.40)1010 0100 (.70)1111 0100 (.60)

Mutation

1110 0011 1010 1100 1110 0100

1010 0111 0010 0110 1111 0100

1110 1100 1010 0011 1110 0100

1010 0110 0010 0111 1111 0100

Next Generation

CrossOver

1110 1100 1010 0011 1110 01001010 0110 0010 0111 1111 0100

1110 1100 (.70) 1010 0011 (.40) 1110 0100 (.65) 1010 0110 (.85) 0010 0111(.80) 1111 0100 (.60)



Decode Evaluate

1110 11001010 00111110 01001010 01100010 01111111 0100 (0110 1000)

Selection

1110 1100 (.70)1010 0110 (.85)0010 0111 (.80)

Mutation

1110 0011 1010 1100 1110 0100

1010 0111 0010 0110 1111 0100

1110 1100 1010 0011 1110 0100

1010 0110 0010 0111 1111 0100

Next Generation

CrossOver

1110 1100 1010 0011 1110 01001010 0110 0010 0111 1111 0100

1110 1100 (.70) 1010 0011 (.40) 1110 0100 (.65) 1010 0110 (.85) 0010 0111(.80) 1111 0100 (.60)


Evolvable Hardware Platform


• GA are a type of guided search

• Why use a guide search? Why not just do an exhaustive search?

Genetic Algorithms




• Assume – 1 billion individuals can be evaluated a second– The genome of a individual is 32-bits in size– How long to do an exhaustive search?

Genetic Algorithms




• Assume – 1 billion individuals can be evaluated a second– Now genome of a individual is a FPGA

• 1,000,000 bits in size– How long to do an exhaustive search?

Genetic Algorithms


• Extrinsic Evolution (furthest from biology)– Evolution done in SW, then result realized in HW

• Intrinsic Evolution– HW is used to deploy individuals– Results are sent back to SW for fitness calculation

• Complete Evolution– Evolution is completely done on target HW device

• Open-ended Evolution (closest to biology)– Evaluation criteria changes dynamically

Evolvable Hardware Taxonomy

OntogenyEpigenesis

Phylogeny


Evolvable Hardware Applications• Prosthetic Hand controller chip

– Kajitani “An Evolvable Hardware Chip for Prostatic Hand Controller”, 1999


Evolvable Hardware Applications• Tone Discrimination and Frequency generation

– Adrian Thompson “Silicon Evolution”, 1996

Xilinx XC6200



Node Functions Node Genotype



Evolved 4KHz oscillator


Benefits of Evolvable Hardware?


Evolvable Hardware Issues?


Evolvable Hardware Issues?


Evolvable Hardware Platforms• Commercial Platforms

– Xilinx XC6200• Completely multiplex base, thus could program

random bitstreams dynamically without damaging chip

– Xilinx Virtex FPGA• Custom Platforms

– POEtic cell– Evolvable LSI chip (Higuchi)


Next Lecture

• Exam 2 Overview


Notes• Notes

Documents

1 - CPRE 583 (Reconfigurable Computing): Evolvable Hardware Iowa State University (Ames) CPRE 583 Reconfigurable Computing Lecture 24: Fri 11/18/2011 (Evolvable