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CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial Billy Huang / Graham Naylor * Microblaze is a Xilinx trademark .

04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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Page 1: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority

FPGA WorkshopJanuary 2011

XPS Microblaze* Tutorial

Billy Huang / Graham Naylor

* Microblaze is a Xilinx trademark .

Page 2: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

2

Soft Processor

• Overview

– Introduction the soft processors and the Microblaze.

– Creating an XPS Microblaze project, compiling andrunning.

– Testing the FPGA is configured with the soft processor.

Page 3: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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Soft Processor

• What is a soft processor?

– It is a 32-bit “soft-processor”, i.e. a processor written inHDL code. As such it can be imported into an FPGAproject as a module.

• What is the Microblaze?

– It is the first soft-processor to be supported in themainline Linux kernel (the maintainer is Michal Simek).

– Specifically used on Xilinx FPGAs.

Page 4: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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Soft Processor

• The benefits of a soft processor:– Can be upgraded and made more easily backwards compatible.

– Multiple processors can be included. (Scientists at the University ofGlasgow have created a 1,000-core computer processor based on aXilinx field programmable gate arrayhttp://www.eetimes.com/electronics-news/4211856/1-000-processors-on-a-Xilinx-FPGA)

• The disadvantages:– Slower clock frequency ~100 MHz.

– Not generally supported as well as soft processors.

• The alternatives:– Soft processor: Nios II by Altera.

– Hard processor: 400MHz – 800MHz, such as PowerPC or the CortexM1 ARM (coming soon - hopefully).

Page 5: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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Microblaze

• What is XPS (Xilinx Platform Studio)?

– A program to visually assemble a Microblaze processor,and define the connections with VHDL/Verilog modules(IP).

Page 6: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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Xilinx Platform Studio (XPS)

• There is more than one way to create an XPSproject:

– Generally for a standard FPGA board you can downloadthe reference design of a pre-built project. This has theadded guarantee that it should just work.

– Or create a project from scratch.

• In this tutorial we will:

– Use a pre-made Microblaze/XPS project.

– Describe how XPS works.

– Test the soft processor.

Page 7: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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XPS – Key files

• Key files for an XPS project:– data/system.ucf: user constraints file.

– system.mhs: port/net assignments.

– system.mss: driver declarations.

– system.xmp: the XPS project file.

• For the purposes of the workshop we will not delve into thedetails of these files. However if doing much developmenton the Microblaze it is almost essential to be able to handedit them.

• The most important and general file is the UCF file. Itdefines the connection of the input/output pins of the FPGAto VHDL/Verilog defined signals.

Page 8: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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XPS – Creating a project

• Open the XPS project

• Start -> Programs -> Xilinx ISE Design Suite 12.2 -> EDK ->Xilinx Platform Studio

On opening you will be presentedWith the box below. Select cancel.

1.

2.

3. Navigate to:C:\BSB\sp60X_bist_6b_up_12.2

Page 9: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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A tour of XPS

Page 10: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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Export XPS to SDK

• XPS handles the hardware creation of the softprocessor. The Software development kit (SDK)handles the software development on theprocessor.

1. Select the SDK ICON. 2. Select Export and Launch SDK

This will compile (Takes Time!!) the FPGAbitstream and create the necessary files for SDK.

Page 11: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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Software Developmment Kit (SDK)

• Assuming everything has generated fine, the SDK program should launch.

Page 12: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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Connect the USB cables

• Ensure both USB cables are connected from your laptop into the JTAG andUART of the SP60X board.

SP605 SP601

Page 13: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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Generate and Program the Bitstream

1. Select the Generate Bitstream button in SDK. (Note XPS hasa similar button so please ensure you are using SDK!

• This next step will create a Bitstream. A bitstream file is a configuration fileloaded into the FPGA which defines how it should connect its internal logic.

2. The Bitstream and BMM File locations should already be set. Select“Program”. Here it is initialised with a basic “bootloop” program.

Page 14: 04 MBTUT Microblaze XPS Tutorial - a clean future · CCFE is the fusion research arm of the United Kingdom Atomic Energy Authority FPGA Workshop January 2011 XPS Microblaze* Tutorial

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Test the soft processor on the FPGA

• We will use XMD to test the processor.

1. Launch Bash Shell (fromthe SDK program).

2. Type “xmd”, press enter.Type “connect mb mdm”, press enter.

You will see on connection to the Microblaze it’sdefined hardware. This is an initial test todemonstrate that the FPGA has been programmedwith the soft processor.